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iic.cpp
资源名称：SMDK2440.rar　[点击查看]
上传用户：qiulin1960
上传日期：2013-10-16
资源大小：2844k
文件大小：15k
源码类别：

Windows CE

开发平台：

Windows_Unix

iic.cpp：源码内容
  1. #include <windows.h>
  2. #include <Winbase.h>
  3. #include <s2440.h>
  4. #include <nkintr.h>
  5. #include <oalintr.h>
  6. #include <p2.h>
  8. #include "camif.h"
  10. #define U8 unsigned char
  11. #define U16 unsigned short
  12. #define U32 unsigned int
  14. #define CAM_OV7620 (0) // OMNI Vision camera, 640x480 VGA
  15. #define CAM_S5X433 (1) // Samsung S5X433 VGA camera
  16. #define CAM_S5X532 (2) // Samsung S5X532 VGA camera
  17. #define CAM_AU70H (3) // 1152x864 MegaPixel Camera, max 19.3Mhz
  18. #define CAM_S5X3A1 (4) // Mega pixel
  20. //#define SlaveID 0x42  //OV7620 Slave ID 
  21. #define SlaveID 0x5a  //S5X532 Slave ID 
  23. #define WRDATA      (1)
  24. #define RDDATA      (3)
  25. #define SETRDADDR   (4)
  26. #define CAMIICBUFSIZE 0x20
  27. #define IICBUFSIZE  0x20
  29. // Change GP8(I2CSDA) as input/output mode.
  30. #define SET_SDA_INPUT (s2440IOP->rGPECON &= ~(3<<30))
  31. #define SET_SDA_OUTPUT (s2440IOP->rGPECON = (s2440IOP->rGPECON & ~(2<<30)) |(1<<30) )
  33. static U8 _iicData[IICBUFSIZE];
  34. static volatile int _iicDataCount;
  35. static volatile int _iicStatus;
  36. static volatile int _iicMode;
  37. static int _iicPt;
  39. /*
  40. const unsigned char Ov7620_YCbCr8bit_TV[][2] = {
  41. // OMNI Vision
  42. {0x12, 0x80}, // Camera Soft reset. Self cleared after reset.
  43. {0x00, 0x00},
  44. {0x01, 0x80}, // set blue gain
  45. {0x02, 0x80}, // set red gain
  46. {0x03, 0xb0},
  47. {0x06, 0x60}, // set brightness
  48. {0x0c, 0x24}, // set blue background
  49. {0x0d, 0x24}, // set red background
  50. {0x10, 0xff}, // set exposure time, brightness control
  51. {0x11, 0x80}, // set frame rate CLK_input = PCLK
  52. {0x12, 0x74}, // set 8 Bit YUV mode, enable AGC/AWB, mirror image enabled.
  53. {0x13, 0x21},   // 8bit Data, CCIR601 Format
  54. {0x15, 0x01}, // Use PCLK falling edge to latch data, 8 Bit UYVY....
  55. {0x16, 0x03}, //
  56. {0x17, 0x2f}, //
  57. {0x18, 0xcf},        // (207-47)*4 = 640
  58. {0x19, 0x06}, //
  59. {0x1a, 0xf5},        // ((244-5)+1)*2=480
  60. {0x1b, 0x00},
  61. {0x20, 0x00},
  62. {0x21, 0x80},
  63. {0x22, 0x80},
  64. {0x23, 0x00},
  65. {0x26, 0xa2},
  66. {0x27, 0xea},
  67. {0x29, 0x00},
  68. {0x2a, 0x00},
  69. {0x2b, 0x00},
  70. {0x2c, 0x88},
  71. {0x2e, 0x80},
  72. {0x2f, 0x44},
  73. {0x60, 0x27},
  74. {0x61, 0x82},
  75. {0x62, 0x5f},
  76. {0x63, 0xd5},
  77. {0x64, 0x57},
  78. {0x65, 0x83},
  79. {0x66, 0x55},
  80. {0x68, 0xcf},
  81. {0x69, 0x76},
  82. {0x6a, 0x22},
  83. {0x6b, 0x00},
  84. {0x6c, 0x08},
  85. {0x6d, 0x48},
  86. {0x6e, 0x80},
  87. {0x6f, 0x0c},
  88. {0x70, 0x89},
  89. {0x71, 0x00},
  90. {0x72, 0x14},
  91. {0x73, 0x54},
  92. {0x75, 0x0e},
  93. {0x76, 0x00},
  94. {0x77, 0xff},
  95. {0x78, 0x80},
  96. {0x79, 0x80},
  97. {0x7a, 0x80},
  98. {0x7b, 0xe6},
  99. {0x7c, 0x00},
  100. {0x13, 0x21},
  101. {0x14, 0x94},
  102. {0x24, 0x10},
  103. {0x25, 0x8a},
  104. {0x28, 0x20}, // Progressive mode.
  105. {0x2d, 0x95}, //
  106. {0x67, 0x92}, // 
  107. {0x74, 0x00}, // -CJH
  109. {0x12, 0x74} // set 8 Bit YUV mode, enable AGC/AWB, mirror image enabled.
  110. };
  111. */
  113. const unsigned char S5X532_YCbCr8bit_TV[][2] = 
  114. {
  115. #if 0
  116. // page 5
  117. {0xec,0x05},
  118. {0x08,0x55},
  119. {0x0a,0x75},
  120. {0x0c,0x90},
  121. {0x0e,0x18},
  122. {0x12,0x09},
  123. {0x14,0x9d},
  124. {0x16,0x90},
  125. {0x1a,0x18},
  126. {0x1c,0x0c},
  127. {0x1e,0x09},
  128. {0x20,0x06},
  129. {0x22,0x20},
  130. {0x2a,0x00},
  131. {0x2d,0x04},
  132. {0x12,0x24},
  133. // page 3
  134. {0xec,0x03},
  135. {0x0c,0x09},
  136. {0x6c,0x09},
  137. {0x2b,0x10}, // momo clock inversion
  138. // page 2
  139. {0xec,0x02},
  140. {0x03,0x09},
  141. {0x05,0x08},
  142. {0x06,0x01},
  143. {0x07,0xf8},
  144. {0x15,0x25},
  145. {0x30,0x29},
  146. {0x36,0x12},
  147. {0x38,0x04},
  148. {0x1b,0x77}, // 24MHz : 0x77, 12MHz : 0x22
  149. {0x1c,0x77}, // 24MHz : 0x77, 12MHz : 0x22
  150. // page 1
  151. {0xec,0x01},
  152. {0x00,0x03}, // 
  153. {0x0a,0x08}, // 0x0-QQVGA, 0x06-CIF, 0x02-QCIF, 0x08-VGA, 0x04-QVGA, 0x0a-SXGA
  154. {0x0c,0x00}, // Pattern selectio. 0-CIS, 1-Color bar, 2-Ramp, 3-Blue screen
  155. //{0x10,0x27}, // 0x21-ITU-R656(CbYCrY), 0x25-ITU-R601(CbYCrY), 0x26-ITU-R601(YCrYCb)
  156. {0x10,0x21}, // 0x21-ITU-R656(CbYCrY), 0x25-ITU-R601(CbYCrY), 0x26-ITU-R601(YCrYCb)
  157. {0x50,0x21}, // Hblank
  158. {0x51,0x00}, // Hblank
  159. {0x52,0xA1}, // Hblank
  160. {0x53,0x02}, // Hblank
  161. {0x54,0x01}, // Vblank
  162. {0x55,0x00}, // Vblank
  163. {0x56,0xE1}, // Vblank 
  164. {0x57,0x01}, // Vblank
  165. {0x58,0x21}, // Hsync
  166. {0x59,0x00}, // Hsync
  167. {0x5a,0xA1}, // Hsync
  168. {0x5b,0x02}, // Hsync
  169. {0x5c,0x03}, // Vref
  170. {0x5d,0x00}, // Vref
  171. {0x5e,0x05}, // Vref
  172. {0x5f,0x00}, // Vref
  173. {0x70,0x0E},
  174. {0x71,0xD6},
  175. {0x72,0x30},
  176. {0x73,0xDB},
  177. {0x74,0x0E},
  178. {0x75,0xD6},
  179. {0x76,0x18},
  180. {0x77,0xF5},
  181. {0x78,0x0E},
  182. {0x79,0xD6},
  183. {0x7a,0x28},
  184. {0x7b,0xE6},
  185. {0x50,0x00},
  186. {0x5c,0x00},
  188. // page 0
  189. {0xec,0x00},
  190. {0x79,0x01},
  191. {0x58,0x90},
  192. {0x59,0xA0},
  193. {0x5a,0x50},
  194. {0x5b,0x70},
  195. {0x5c,0xD0},
  196. {0x5d,0xC0},
  197. {0x5e,0x28},
  198. {0x5f,0x08},
  199. {0x50,0x90},
  200. {0x51,0xA0},
  201. {0x52,0x50},
  202. {0x53,0x70},
  203. {0x54,0xD0},
  204. {0x55,0xC0},
  205. {0x56,0x28},
  206. {0x57,0x00},
  207. {0x48,0x90},
  208. {0x49,0xA0},
  209. {0x4a,0x50},
  210. {0x4b,0x70},
  211. {0x4c,0xD0},
  212. {0x4d,0xC0},
  213. {0x4e,0x28},
  214. {0x4f,0x08},
  215. {0x72,0x82}, // main clock = 24MHz:0xd2, 16M:0x82, 12M:0x54
  216. {0x75,0x05} // absolute vertical mirror.  junon
  217. #endif 
  219. #if 1
  220. {0xec,0x00},
  221. {0x02,0x00},
  222. {0x14,0x60},
  223. {0x15,0x60},
  224. {0x16,0x60},
  225. {0x1b,0x20},
  226. {0x1c,0x20},
  227. {0x1d,0x20},
  228. {0x1e,0x20},
  229. {0x72,0xdc},
  230. {0x73,0x11},
  231. {0x76,0x82},
  232. {0x77,0x90},
  233. {0x78,0x6c},
  234. {0x0a,0x02},
  235. {0x34,0x0d},
  236. {0x35,0x0a},
  237. {0x36,0x05},
  238. {0x37,0x05},
  239. {0x38,0x06},
  240. {0x39,0x08},
  241. {0x3A,0x0d},
  242. {0x3B,0x0d},
  243. {0x3C,0x18},
  244. {0x3D,0xE0},
  245. {0x3E,0x20},
  246. {0x66,0x02},
  247. {0x6c,0x40},
  248. {0x7c,0x01},
  249. {0x0D,0x24},
  250. {0x40,0x1B},
  251. {0x41,0x4F},
  252. {0x42,0x24},
  253. {0x43,0x3E},
  254. {0x44,0x32},
  255. {0x45,0x30},
  256. {0x48,0xa0},
  257. {0x49,0xd0},
  258. {0x4A,0x28},
  259. {0x4B,0x7d},
  260. {0x4C,0xd0},
  261. {0x4D,0xe0},
  262. {0x4E,0x1a},
  263. {0x4F,0xa0},
  264. {0x50,0xc0},
  265. {0x51,0xc0},
  266. {0x52,0x42},
  267. {0x53,0x7e},
  268. {0x54,0xc0},
  269. {0x55,0xf0},
  270. {0x56,0x1e},
  271. {0x57,0xe0},
  272. {0x58,0xc0},
  273. {0x59,0xa0},
  274. {0x5A,0x4a},
  275. {0x5B,0x7e},
  276. {0x5C,0xc0},
  277. {0x5D,0xf0},
  278. {0x5E,0x2a},
  279. {0x5F,0x10},
  280. {0x79,0x00},          
  281. {0x7a,0x00},
  282. {0xe0,0x0f},
  283. {0xe3,0x14}, 
  284. {0xe5,0x48},
  285. {0xe7,0x58},
  287. //=============== page1 ===============//
  288. {0xec,0x01},
  289. {0x10,0x05},
  290. {0x20,0xde},
  291. {0x0b,0x06},
  292. {0x30,0x00},
  293. {0x31,0x00},
  294. {0x32,0x00},
  295. {0x24,0x28},
  296. {0x25,0x3F},
  297. {0x26,0x65},
  298. {0x27,0xA1},
  299. {0x28,0xFF},
  300. {0x29,0x96},
  301. {0x2A,0x85},
  302. {0x2B,0xFF},
  303. {0x2C,0x00},
  304. {0x2D,0x1B},
  305. {0xB0,0x28},
  306. {0xB1,0x3F},
  307. {0xB2,0x65},
  308. {0xB3,0xA1},
  309. {0xB4,0xFF},
  310. {0xB5,0x96},
  311. {0xB6,0x85},
  312. {0xB7,0xFF},
  313. {0xB8,0x00},
  314. {0xB9,0x1B},
  315. {0x15,0x15},
  316. {0x18,0x85},
  317. {0x1f,0x05},
  318. {0x87,0x40},
  319. {0x37,0x60},
  320. {0x38,0xd5},
  321. {0x48,0xa0},
  322. {0x61,0x54},
  323. {0x62,0x54},
  324. {0x63,0x14},
  325. {0x64,0x14},
  326. {0x6d,0x12},
  327. {0x78,0x09},
  328. {0x79,0xD7},
  329. {0x7A,0x14},
  330. {0x7B,0xEE},
  331.                  
  332. //=============== page2 ===============//
  333. {0xec,0x02},
  334. {0x2c,0x76},
  335. {0x25,0x25},
  336. {0x27,0x27},
  337. {0x30,0x29},
  338. {0x36,0x08},
  339. {0x38,0x04},
  341. //=============== page3 ===============//
  342. {0xec,0x03},
  343. {0x08,0x00},
  344. {0x09,0x33},
  346. //=============== page4 ===============//
  347. {0xec,0x04},
  348. {0x00,0x21},
  349. {0x01,0x00},            
  350. {0x02,0x9d},            
  351. {0x03,0x02},            
  352. {0x04,0x04},         
  353. {0x05,0x00},            
  354. {0x06,0x1f},          
  355. {0x07,0x02},            
  356. {0x08,0x21},            
  357. {0x09,0x00},            
  358. {0x0a,0x9d},           
  359. {0x0b,0x02},            
  360. {0x0c,0x04},             
  361. {0x0d,0x00},            
  362. {0x0e,0x20},            
  363. {0x0f,0x02},            
  364. {0x1b,0x3c},            
  365. {0x1c,0x3c},            
  367. //=============== page5 ===============//
  368. {0xec,0x05},                               
  369. {0x1f,0x00},                               
  370. {0x08,0x59},            
  371. {0x0a,0x71},            
  372. {0x1e,0x23},            
  373. {0x0e,0x3c},            
  375. //=============== page7 ===============//
  376. {0xec,0x07},
  377. {0x11,0xfe},
  379. // added by junon
  380. {0xec,0x01}, 
  381. {0x10,0x26}, // 0x21-ITU-R656(CbYCrY), 0x25-ITU-R601(CbYCrY), 0x26-ITU-R601(YCrYCb)
  382. #endif
  383. };
  386. extern void Camera_Initialize(void);
  388. extern volatile IOPreg *s2440IOP;
  389. extern volatile IICreg *s2440IIC;
  391. void Camera_Initialize(void);
  392. void Delay(int time);
  393. void SetCAMClockDivider(int divn);
  395. void CAM_WriteBlock(void);
  396. void Wr_CamIIC(U32 slvAddr, U32 addr, U8 data);
  397. void Rd_CamIIC(U32 slvAddr, U32 addr, U8 *data);
  398. void Run_IicPoll(void);
  399. void IicPoll(void);
  401. static HANDLE IIC_InterruptEvent = NULL;
  403. void Camera_Initialize(void)
  404. {
  405. if (IIC_InterruptEvent == NULL)
  406. {
  407.     // allocate the interrupt event for IIC
  408.     IIC_InterruptEvent = CreateEvent(NULL, FALSE, FALSE,NULL);
  409.     
  410.     if (NULL == IIC_InterruptEvent) {
  411. RETAILMSG(1,(TEXT("IIC interrupt event Error1rn")));
  412.     }
  413.     // initialize the card insertion interrupt event
  414.     if (!InterruptInitialize (SYSINTR_IIC, IIC_InterruptEvent, NULL, 0)) {
  415. RETAILMSG(1,(TEXT("IIC interrupt event Error2rn")));
  416.     }
  417. }
  418. RETAILMSG(1,(TEXT("Use IIC for initializationrn")));
  419. // Use IIC for initialization
  420. CAM_WriteBlock();
  421. }
  423. void SetCAMClockDivider(int divn) // divn is even number 0~15
  424. {
  425. volatile CLKPWRreg *s2440PWR = (CLKPWRreg *)CLKPWR_BASE;
  427. s2440PWR->rCAMDIVN = (s2440PWR->rCAMDIVN & ~(0xf))|(0x10)|(divn); // CAMCLK is divided..
  428. // RETAILMSG(1,(TEXT("s2440PWR->rCLKCON:0x%xrn"),s2440PWR->rCLKCON));
  429. }
  431. void CAM_WriteBlock(void)
  432. {
  433.     unsigned int i, save_E, save_PE;
  434.     static U8 rdata[256]; 
  435.     int err = 0;
  436.       
  437.     save_E   = s2440IOP->rGPECON;
  438.     save_PE  = s2440IOP->rGPEUP;
  440.     s2440IOP->rGPEUP  &= ~0xc000;                   //Pull-up disable
  441.     s2440IOP->rGPEUP  |=  0xc000;                   //Pull-up disable
  442.     s2440IOP->rGPECON &= ~(0xF<<28);                //GPE15:IICSDA , GPE14:IICSCL    
  443.     s2440IOP->rGPECON |=  (0xa<<28);                //GPE15:IICSDA , GPE14:IICSCL    
  445.     //Enable ACK, Prescaler IICCLK=PCLK/16, Enable interrupt, Transmit clock value Tx clock=IICCLK/16
  446.     s2440IIC->rIICCON  = (1<<7) | (1<<6) | (1<<5) | (0xf);
  448.     s2440IIC->rIICADD  = 0x10;                     //2440 slave address = [7:1]. this is avialable when 240 is slave.
  449.     s2440IIC->rIICSTAT = 0x10;                     //IIC bus data output enable(Rx/Tx)
  450.     s2440IIC->rIICLC = (1<<2)|(3);   // Filter enable, 15 clocks SDA output delay     added into 2440
  451.   
  452.     for(i=0; i<(sizeof(S5X532_YCbCr8bit_TV)/2); i++){
  453.      //RETAILMSG(1,(TEXT("num:%drn"),i));
  454. Wr_CamIIC(SlaveID, S5X532_YCbCr8bit_TV[i][0], S5X532_YCbCr8bit_TV[i][1]);
  455. Sleep(1);
  456. }
  458.     RETAILMSG(1,(TEXT("Block TX Ended...rn")));
  460.     s2440IOP->rGPEUP  = save_PE;
  461.     s2440IOP->rGPECON = save_E;
  462. }
  464. void Wr_CamIIC(U32 slvAddr, U32 addr, U8 data)
  465. {
  466.     _iicMode      = WRDATA;
  467.     _iicPt        = 0;
  468.     _iicData[0]   = (U8)addr;
  469.     _iicData[1]   = data;
  470.     _iicDataCount = 2;
  471.     // write slave address
  472.     s2440IIC->rIICDS = slvAddr;  //0x42: OV7620 Slave ID 
  473.     // After this time, timing is critical, because IIC start.
  474.     s2440IIC->rIICSTAT = 0xf0;  //Start Master TX Condition    
  475.     s2440IIC->rIICCON = 0xef;    //Clearing the pending bit isn't needed because the pending bit has been cleared.
  477.     while(_iicDataCount!=-1)
  478.        Run_IicPoll();
  479.     
  480. }
  482. void Rd_CamIIC(U32 slvAddr,U32 addr,U8 *data) { /*IIC Slave Addr Write + IIC Reg Addr Write */ _iicMode      = SETRDADDR; _iicPt        = 0; _iicData[0]   = (U8)addr; _iicDataCount = 1;        
  483.     // write slave address
  484.     s2440IIC->rIICDS = slvAddr;  //0x42: OV7620 Slave ID 
  485.     // After this time, timing is critical, because IIC start.
  486.     s2440IIC->rIICSTAT = 0xf0;  //Start Master TX Condition    
  487.     s2440IIC->rIICCON = 0xef;    //Clearing the pending bit isn't needed because the pending bit has been cleared.
  489.     while(_iicDataCount!=-1)
  490.        Run_IicPoll();
  492.     _iicMode      = RDDATA;
  493.     _iicPt        = 0;
  494.     _iicDataCount = 1;
  495.     
  496.     s2440IIC->rIICDS   = slvAddr;
  497.     s2440IIC->rIICSTAT = 0xb0;                    //Master Rx,Start
  498.     s2440IIC->rIICCON  = 0xef;                    //Resumes IIC operation. 
  500.     while(_iicDataCount!=-1)
  501.        Run_IicPoll();
  503. *data = _iicData[1];    
  504. //RETAILMSG(1,(TEXT("Data:0x%xrn"),_iicData[1]));
  505. }
  507. void Run_IicPoll(void)
  508. {
  509. DWORD waitStatus;
  511. // When using Interrupt mode
  512. waitStatus = WaitForSingleObject(IIC_InterruptEvent, INFINITE);
  513. // When using polling mode
  514. //    if(s2440IIC->rIICCON & 0x10)                  //Tx/Rx Interrupt Enable
  515.         IicPoll();
  516. }       
  518. void IicPoll(void)
  519. {
  520.     volatile U32 i;
  522. //RETAILMSG(1,(TEXT("IIC Interrupt occurrn")));
  524.     switch(_iicMode)
  525.     {
  526.         case RDDATA:
  527.             if((_iicDataCount--)==0)
  528.             {
  529.                 _iicData[_iicPt++] = s2440IIC->rIICDS;
  530.             
  531.                 s2440IIC->rIICSTAT = 0x90;      //Stop MasRx condition 
  532.                 s2440IIC->rIICCON  = 0xef;      //Resumes IIC operation.
  533.                 Delay(10);                 //Wait until stop condtion is in effect., Too long time... 
  534.                                                 //The pending bit will not be set after issuing stop condition.
  535.                 break;    
  536.             }      
  537.             _iicData[_iicPt++] = s2440IIC->rIICDS;     //The last data has to be read with no ack.
  539.             if((_iicDataCount)==0)
  540.                 s2440IIC->rIICCON = 0x6f;                 //Resumes IIC operation with NOACK in case of OV7620 Cameara  
  541.             else 
  542.                 s2440IIC->rIICCON = 0xef;                 //Resumes IIC operation with ACK
  543.             break;
  545.         case WRDATA:
  546.             if((_iicDataCount--)==0)
  547.             {
  548.                 s2440IIC->rIICSTAT = 0xd0;                //stop MasTx condition 
  549.                 s2440IIC->rIICCON  = 0xef;                //resumes IIC operation.
  550.                 Delay(10);                        // we should adjust this time.
  551.                 
  552.                 //The pending bit will not be set after issuing stop condition.
  553.                 break;    
  554.             }
  555.           
  556.             s2440IIC->rIICDS = _iicData[_iicPt++];         //_iicData[0] has dummy.
  557.             //for setup time until rising edge of IICSCL. we have to adjust this time.
  558. Delay(10);
  559.             //for(i=0;i<1000;i++);
  560. // IICDS has to be written before clearing the IIC interrupt pending bit
  561. //RETAILMSG(1,(TEXT("BB"))); // we should adjust this time.
  562.             
  563.             s2440IIC->rIICCON = 0xef;                      //resumes IIC operation.
  564.             
  565.             break;
  567.         case SETRDADDR:
  568.             if((_iicDataCount--)==0)
  569.             {
  570.                   s2440IIC->rIICSTAT = 0xd0;                //stop MasTx condition 
  571.            s2440IIC->rIICCON  = 0xef;                //resumes IIC operation.
  572.                   Delay(1);      //wait until stop condtion is in effect.
  573.                   
  574.                   
  575.                   break;                  //IIC operation is stopped because of IICCON[4]    
  576.             }
  578.             s2440IIC->rIICDS = _iicData[_iicPt++];
  579. Delay(10); 
  580. //for(i=0;i<1000;i++);          //for setup time until rising edge of IICSCL
  581.             //RETAILMSG(1,(TEXT("RD"))); // we should adjust this time.
  582.             s2440IIC->rIICCON = 0xef;             //resumes IIC operation.
  583.             break;
  585.         default:
  586.             break;      
  587.     }
  588.     
  589.     InterruptDone(SYSINTR_IIC);
  590. }
  592. void Delay(int time)
  593. {
  594.     volatile int i;
  595.     
  596.     for(;time>0;time--)
  597.         for(i=0;i<100;i++);
  598. }