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reg2440.a
资源名称：SMDK2440.rar　[点击查看]
上传用户：qiulin1960
上传日期：2013-10-16
资源大小：2844k
文件大小：25k
源码类别：

Windows CE

开发平台：

Windows_Unix

reg2440.a：源码内容
  1. ;******************************************************************************
  2. ;*
  3. ;* System On Chip(SOC)
  4. ;*
  5. ;* Copyright (c) 2002 Software Center, Samsung Electronics, Inc.
  6. ;* All rights reserved.
  7. ;*
  8. ;* This software is the confidential and proprietary information of Samsung 
  9. ;* Electronics, Inc("Confidential Information"). You Shall not disclose such 
  10. ;* Confidential Information and shall use it only in accordance with the terms 
  11. ;* of the license agreement you entered into Samsung.
  12. ;*
  13. ;*-----------------------------------------------------------------------------
  14. ;*
  15. ;* S3C2440 BSP
  16. ;*
  17. ;* 2440.a : S3C2440's Register map (non-translated by MMU) & 
  18. ;* Memory Configuration Table
  19. ;*
  20. ;* @author zartoven@samsung.com (SOC, SWC, SAMSUNG Electronics)
  21. ;*
  22. ;* @date 2002/04/04
  23. ;* 
  24. ;* Log:
  25. ;*      2002/04/04  Start
  26. ;*      
  27. ;******************************************************************************
  30. ;******************************************************************************
  31. ; Memory control 
  32. ;******************************************************************************
  33. BWSCON EQU 0x48000000 ;Bus width & wait status
  34. BANKCON0 EQU 0x48000004 ;Boot ROM control
  35. BANKCON1 EQU 0x48000008 ;BANK1 control
  36. BANKCON2 EQU 0x4800000c ;BANK2 cControl
  37. BANKCON3 EQU 0x48000010 ;BANK3 control
  38. BANKCON4 EQU 0x48000014 ;BANK4 control
  39. BANKCON5 EQU 0x48000018 ;BANK5 control
  40. BANKCON6 EQU 0x4800001c ;BANK6 control
  41. BANKCON7 EQU 0x48000020 ;BANK7 control
  42. REFRESH EQU 0x48000024 ;DRAM/SDRAM refresh
  43. BANKSIZE EQU 0x48000028 ;Flexible Bank Size
  44. MRSRB6 EQU 0x4800002c ;Mode register set for SDRAM
  45. MRSRB7 EQU 0x48000030 ;Mode register set for SDRAM
  47. vREFRESH EQU 0xB0800024 ;DRAM/SDRAM refresh
  49. ;******************************************************************************
  50. ; INTERRUPT
  51. ;******************************************************************************
  52. SRCPND EQU 0x4a000000 ;Interrupt request status
  53. INTMOD EQU 0x4a000004 ;Interrupt mode control
  54. INTMSK EQU 0x4a000008 ;Interrupt mask control
  55. PRIORITY EQU 0x4a00000c ;IRQ priority control
  56. INTPND EQU 0x4a000010 ;Interrupt request status
  57. INTOFFSET EQU 0x4a000014 ;Interruot request source offset
  58. SUSSRCPND EQU 0x4a000018 ;Sub source pending
  59. INTSUBMSK EQU 0x4a00001c ;Interrupt sub mask
  61. vSRCPND EQU 0xb0a00000 ;Interrupt request status
  62. vINTMOD EQU 0xb0a00004 ;Interrupt mode control
  63. vINTMSK EQU 0xb0a00008 ;Interrupt mask control
  64. vPRIORITY EQU 0xb0a0000c ;IRQ priority control
  65. vINTPND EQU 0xb0a00010 ;Interrupt request status
  66. vINTOFFSET EQU 0xb0a00014 ;Interruot request source offset
  67. vSUSSRCPND EQU 0xb0a00018 ;Sub source pending
  68. vINTSUBMSK EQU 0xb0a0001c ;Interrupt sub mask
  69. vINTBASE EQU 0xb0a00000 ;Interrupt request status
  70. oSRCPND EQU 0x00         ;Interrupt request status
  71. oINTMSK EQU 0x08         ;Interrupt mask control
  72. oINTPND EQU 0x10         ;Interrupt request status
  73. oINTSUBMSK EQU 0x1c         ;Interrupt sub mask
  75. ;******************************************************************************
  76. ; DMA
  77. ;******************************************************************************
  78. DISRC0 EQU 0x4b000000 ;DMA 0 Initial source
  79. DISRCC0 EQU 0x4b000004 ;DMA 0 Initial source control
  80. DIDST0 EQU 0x4b000008 ;DMA 0 Initial Destination
  81. DIDSTC0 EQU 0x4b00000c ;DMA 0 Initial Destination control
  82. DCON0 EQU 0x4b000010 ;DMA 0 Control
  83. DSTAT0 EQU 0x4b000014 ;DMA 0 Status
  84. DCSRC0 EQU 0x4b000018 ;DMA 0 Current source
  85. DCDST0 EQU 0x4b00001c ;DMA 0 Current destination
  86. DMASKTRIG0 EQU 0x4b000020 ;DMA 0 Mask trigger
  88. DISRC1 EQU 0x4b000040 ;DMA 1 Initial source
  89. DISRCC1 EQU 0x4b000044 ;DMA 1 Initial source control
  90. DIDST1 EQU 0x4b000048 ;DMA 1 Initial Destination
  91. DIDSTC1 EQU 0x4b00004c ;DMA 1 Initial Destination control
  92. DCON1 EQU 0x4b000050 ;DMA 1 Control
  93. DSTAT1 EQU 0x4b000054 ;DMA 1 Status
  94. DCSRC1 EQU 0x4b000058 ;DMA 1 Current source
  95. DCDST1 EQU 0x4b00005c ;DMA 1 Current destination
  96. DMASKTRIG1 EQU 0x4b000060 ;DMA 1 Mask trigger
  98. DISRC2 EQU 0x4b000080 ;DMA 2 Initial source
  99. DISRCC2 EQU 0x4b000084 ;DMA 2 Initial source control
  100. DIDST2 EQU 0x4b000088 ;DMA 2 Initial Destination
  101. DIDSTC2 EQU 0x4b00008c ;DMA 2 Initial Destination control
  102. DCON2 EQU 0x4b000090 ;DMA 2 Control
  103. DSTAT2 EQU 0x4b000094 ;DMA 2 Status
  104. DCSRC2 EQU 0x4b000098 ;DMA 2 Current source
  105. DCDST2 EQU 0x4b00009c ;DMA 2 Current destination
  106. DMASKTRIG2 EQU 0x4b0000a0 ;DMA 2 Mask trigger
  108. DISRC3 EQU 0x4b0000c0 ;DMA 3 Initial source
  109. DISRCC3 EQU 0x4b0000c4 ;DMA 3 Initial source control
  110. DIDST3 EQU 0x4b0000c8 ;DMA 3 Initial Destination
  111. DIDSTC3 EQU 0x4b0000cc ;DMA 3 Initial Destination control
  112. DCON3 EQU 0x4b0000d0 ;DMA 3 Control
  113. DSTAT3 EQU 0x4b0000d4 ;DMA 3 Status
  114. DCSRC3 EQU 0x4b0000d8 ;DMA 3 Current source
  115. DCDST3 EQU 0x4b0000dc ;DMA 3 Current destination
  116. DMASKTRIG3 EQU 0x4b0000e0 ;DMA 3 Mask trigger
  119. ;******************************************************************************=========
  120. ; CLOCK & POWER MANAGEMENT
  121. ;******************************************************************************=========
  122. LOCKTIME EQU 0x4c000000 ;PLL lock time counter
  123. MPLLCON EQU 0x4c000004 ;MPLL Control
  124. UPLLCON EQU 0x4c000008 ;UPLL Control
  125. CLKCON EQU 0x4c00000c ;Clock generator control
  126. CLKSLOW EQU 0x4c000010 ;Slow clock control
  127. CLKDIVN EQU 0x4c000014 ;Clock divider control
  128. CAMDIVN EQU 0x4c000018
  130. vMPLLCON EQU 0xb0c00004 ;MPLL Control
  131. vCLKCON EQU 0xb0c0000c ;Clock generator control
  132. vCLKDIVN EQU 0xb0c00014 ;Clock divider control
  133. vCAMDIVN EQU 0xb0c00018 ;Camera Clock divider control
  135. ;******************************************************************************
  136. ; LCD CONTROLLER
  137. ;******************************************************************************
  138. LCDCON1 EQU 0x4d000000 ;LCD control 1
  139. LCDCON2 EQU 0x4d000004 ;LCD control 2
  140. LCDCON3 EQU 0x4d000008 ;LCD control 3
  141. LCDCON4 EQU 0x4d00000c ;LCD control 4
  142. LCDCON5 EQU 0x4d000010 ;LCD control 5
  143. LCDSADDR1 EQU 0x4d000014 ;STN/TFT Frame buffer start address 1
  144. LCDSADDR2 EQU 0x4d000018 ;STN/TFT Frame buffer start address 2
  145. LCDSADDR3 EQU 0x4d00001c ;STN/TFT Virtual screen address set
  146. REDLUT EQU 0x4d000020 ;STN Red lookup table
  147. GREENLUT EQU 0x4d000024 ;STN Green lookup table 
  148. BLUELUT EQU 0x4d000028 ;STN Blue lookup table
  149. DITHMODE EQU 0x4d00004c ;STN Dithering mode
  150. TPAL EQU 0x4d000050 ;TFT Temporary palette
  151. LCDINTPND EQU 0x4d000054 ;LCD Interrupt pending
  152. LCDSRCPND EQU 0x4d000058 ;LCD Interrupt source
  153. LCDINTMSK EQU 0x4d00005c ;LCD Interrupt mask
  154. ;LPCSEL EQU 0x4d000060 ;LPC3600 Control
  155. TCONSEL EQU 0x4d000060 ;LPC3600 Control ;;; SHL
  157. ;vLCDCON1 EQU 0x90d00000 ;LCD control 1
  160. ;******************************************************************************
  161. ; NAND flash
  162. ;******************************************************************************
  163. NFCONF EQU 0x4e000000 ;NAND Flash configuration
  164. NFCMD EQU 0x4e000004 ;NADD Flash command
  165. NFADDR EQU 0x4e000008 ;NAND Flash address
  166. NFDATA EQU 0x4e00000c ;NAND Flash data
  167. NFSTAT EQU 0x4e000010 ;NAND Flash operation status
  168. NFECC EQU 0x4e000014 ;NAND Flash ECC
  171. ;******************************************************************************
  172. ; UART
  173. ;******************************************************************************
  174. ULCON0 EQU 0x50000000 ;UART 0 Line control
  175. UCON0 EQU 0x50000004 ;UART 0 Control
  176. UFCON0 EQU 0x50000008 ;UART 0 FIFO control
  177. UMCON0 EQU 0x5000000c ;UART 0 Modem control
  178. UTRSTAT0 EQU 0x50000010 ;UART 0 Tx/Rx status
  179. UERSTAT0 EQU 0x50000014 ;UART 0 Rx error status
  180. UFSTAT0 EQU 0x50000018 ;UART 0 FIFO status
  181. UMSTAT0 EQU 0x5000001c ;UART 0 Modem status
  182. UBRDIV0 EQU 0x50000028 ;UART 0 Baud rate divisor
  184. ULCON1 EQU 0x50004000 ;UART 1 Line control
  185. UCON1 EQU 0x50004004 ;UART 1 Control
  186. UFCON1 EQU 0x50004008 ;UART 1 FIFO control
  187. UMCON1 EQU 0x5000400c ;UART 1 Modem control
  188. UTRSTAT1 EQU 0x50004010 ;UART 1 Tx/Rx status
  189. UERSTAT1 EQU 0x50004014 ;UART 1 Rx error status
  190. UFSTAT1 EQU 0x50004018 ;UART 1 FIFO status
  191. UMSTAT1 EQU 0x5000401c ;UART 1 Modem status
  192. UBRDIV1 EQU 0x50004028 ;UART 1 Baud rate divisor
  194. ULCON2 EQU 0x50008000 ;UART 2 Line control
  195. UCON2 EQU 0x50008004 ;UART 2 Control
  196. UFCON2 EQU 0x50008008 ;UART 2 FIFO control
  197. UMCON2 EQU 0x5000800c ;UART 2 Modem control
  198. UTRSTAT2 EQU 0x50008010 ;UART 2 Tx/Rx status
  199. UERSTAT2 EQU 0x50008014 ;UART 2 Rx error status
  200. UFSTAT2 EQU 0x50008018 ;UART 2 FIFO status
  201. UMSTAT2 EQU 0x5000801c ;UART 2 Modem status
  202. UBRDIV2 EQU 0x50008028 ;UART 2 Baud rate divisor
  204. UTXH0 EQU 0x50000020 ;UART 0 Transmission Hold
  205. URXH0 EQU 0x50000024 ;UART 0 Receive buffer
  206. UTXH1 EQU 0x50004020 ;UART 1 Transmission Hold
  207. URXH1 EQU 0x50004024 ;UART 1 Receive buffer
  208. UTXH2 EQU 0x50008020 ;UART 2 Transmission Hold
  209. URXH2 EQU 0x50008024 ;UART 2 Receive buffer
  212. ;******************************************************************************
  213. ; PWM TIMER
  214. ;******************************************************************************
  215. TCFG0 EQU 0x51000000      ;Timer 0 configuration
  216. TCFG1 EQU 0x51000004      ;Timer 1 configuration
  217. TCON EQU 0x51000008      ;Timer control
  218. TCNTB0 EQU 0x5100000c      ;Timer count buffer 0
  219. TCMPB0 EQU 0x51000010      ;Timer compare buffer 0
  220. TCNTO0 EQU 0x51000014      ;Timer count observation 0
  221. TCNTB1 EQU 0x51000018      ;Timer count buffer 1
  222. TCMPB1 EQU 0x5100001c      ;Timer compare buffer 1
  223. TCNTO1 EQU 0x51000020      ;Timer count observation 1
  224. TCNTB2 EQU 0x51000024      ;Timer count buffer 2
  225. TCMPB2 EQU 0x51000028      ;Timer compare buffer 2
  226. TCNTO2 EQU 0x5100002c      ;Timer count observation 2
  227. TCNTB3 EQU 0x51000030      ;Timer count buffer 3
  228. TCMPB3 EQU 0x51000034      ;Timer compare buffer 3
  229. TCNTO3 EQU 0x51000038      ;Timer count observation 3
  230. TCNTB4 EQU 0x5100003c      ;Timer count buffer 4
  231. TCNTO4 EQU 0x51000040      ;Timer count observation 4
  234. ;******************************************************************************
  235. ; USB DEVICE
  236. ;******************************************************************************
  237. FUNC_ADDR_REG       EQU  0x52000140     ;Function address
  238. PWR_REG             EQU  0x52000144     ;Power management
  239. EP_INT_REG          EQU  0x52000148     ;EP Interrupt pending and clear
  240. USB_INT_REG         EQU  0x52000158     ;USB Interrupt pending and clear
  241. EP_INT_EN_REG       EQU  0x5200015c     ;Interrupt enable
  242. USB_INT_EN_REG      EQU  0x5200016c
  243. FRAME_NUM1_REG      EQU  0x52000170     ;Frame number lower byte
  244. FRAME_NUM2_REG      EQU  0x52000174     ;Frame number lower byte
  245. INDEX_REG           EQU  0x52000178     ;Register index
  246. MAXP_REG            EQU  0x52000180     ;Endpoint max packet
  247. EP0_CSR             EQU  0x52000184     ;Endpoint 0 status
  248. IN_CSR1_REG         EQU  0x52000184     ;In endpoint control status
  249. IN_CSR2_REG         EQU  0x52000188
  250. OUT_CSR1_REG        EQU  0x52000190     ;Out endpoint control status
  251. OUT_CSR2_REG        EQU  0x52000194
  252. OUT_FIFO_CNT1_REG   EQU  0x52000198     ;Endpoint out write count
  253. OUT_FIFO_CNT2_REG   EQU  0x5200019c
  254. EP0_FIFO            EQU  0x520001c0     ;Endpoint 0 FIFO
  255. EP1_FIFO            EQU  0x520001c4     ;Endpoint 1 FIFO
  256. EP2_FIFO            EQU  0x520001c8     ;Endpoint 2 FIFO
  257. EP3_FIFO            EQU  0x520001cc     ;Endpoint 3 FIFO
  258. EP4_FIFO            EQU  0x520001d0     ;Endpoint 4 FIFO
  259. EP1_DMA_CON         EQU  0x52000200     ;EP1 DMA interface control
  260. EP1_DMA_UNIT        EQU  0x52000204     ;EP1 DMA Tx unit counter
  261. EP1_DMA_FIFO        EQU  0x52000208     ;EP1 DMA Tx FIFO counter
  262. EP1_DMA_TTC_L       EQU  0x5200020c     ;EP1 DMA total Tx counter
  263. EP1_DMA_TTC_M       EQU  0x52000210
  264. EP1_DMA_TTC_H       EQU  0x52000214
  265. EP2_DMA_CON         EQU  0x52000218     ;EP2 DMA interface control
  266. EP2_DMA_UNIT        EQU  0x5200021c     ;EP2 DMA Tx unit counter
  267. EP2_DMA_FIFO        EQU  0x52000220     ;EP2 DMA Tx FIFO counter
  268. EP2_DMA_TTC_L       EQU  0x52000224     ;EP2 DMA total Tx counter
  269. EP2_DMA_TTC_M       EQU  0x52000228
  270. EP2_DMA_TTC_H       EQU  0x5200022c
  271. EP3_DMA_CON         EQU  0x52000240     ;EP3 DMA interface control
  272. EP3_DMA_UNIT        EQU  0x52000244     ;EP3 DMA Tx unit counter
  273. EP3_DMA_FIFO        EQU  0x52000248     ;EP3 DMA Tx FIFO counter
  274. EP3_DMA_TTC_L       EQU  0x5200024c     ;EP3 DMA total Tx counter
  275. EP3_DMA_TTC_M       EQU  0x52000250
  276. EP3_DMA_TTC_H       EQU  0x52000254
  277. EP4_DMA_CON         EQU  0x52000258     ;EP4 DMA interface control
  278. EP4_DMA_UNIT        EQU  0x5200025c     ;EP4 DMA Tx unit counter
  279. EP4_DMA_FIFO        EQU  0x52000260     ;EP4 DMA Tx FIFO counter
  280. EP4_DMA_TTC_L       EQU  0x52000264     ;EP4 DMA total Tx counter
  281. EP4_DMA_TTC_M       EQU  0x52000268
  282. EP4_DMA_TTC_H       EQU  0x5200026c
  284. ;******************************************************************************
  285. ; WATCH DOG TIMER
  286. ;******************************************************************************
  287. WTCON EQU 0x53000000      ;Watch-dog timer mode
  288. WTDAT EQU 0x53000004      ;Watch-dog timer data
  289. WTCNT EQU 0x53000008      ;Eatch-dog timer count
  290. vWTCON EQU 0xB1300000      ;Watch-dog timer mode
  291. vWTDAT EQU 0xB1300004      ;Watch-dog timer data
  292. vWTCNT EQU 0xB1300008      ;Eatch-dog timer count
  295. ;******************************************************************************
  296. ; IIC
  297. ;******************************************************************************
  298. IICCON EQU 0x54000000 ;IIC control
  299. IICSTAT EQU 0x54000004      ;IIC status
  300. IICADD EQU 0x54000008      ;IIC address
  301. IICDS EQU 0x5400000c      ;IIC data shift
  304. ;******************************************************************************
  305. ; IIS
  306. ;******************************************************************************
  307. IISCON EQU 0x55000000      ;IIS Control
  308. IISMOD EQU 0x55000004      ;IIS Mode
  309. IISPSR EQU 0x55000008      ;IIS Prescaler
  310. IISFCON EQU 0x5500000c      ;IIS FIFO control
  311. IISFIFO EQU 0x55000010      ;IIS FIFO entry
  314. ;******************************************************************************
  315. ; I/O PORT 
  316. ;******************************************************************************
  317. GPACON EQU 0x56000000 ;Port A control
  318. GPADAT EQU 0x56000004 ;Port A data
  319.        
  320. GPBCON EQU 0x56000010 ;Port B control
  321. GPBDAT EQU 0x56000014 ;Port B data
  322. GPBUP EQU 0x56000018 ;Pull-up control B
  323.        
  324. GPCCON EQU 0x56000020 ;Port C control
  325. GPCDAT EQU 0x56000024 ;Port C data
  326. GPCUP EQU 0x56000028 ;Pull-up control C
  327.        
  328. GPDCON EQU 0x56000030 ;Port D control
  329. GPDDAT EQU 0x56000034 ;Port D data
  330. GPDUP EQU 0x56000038 ;Pull-up control D
  331.        
  332. GPECON EQU 0x56000040 ;Port E control
  333. GPEDAT EQU 0x56000044 ;Port E data
  334. GPEUP EQU 0x56000048 ;Pull-up control E
  335.        
  336. GPFCON EQU 0x56000050 ;Port F control
  337. GPFDAT EQU 0x56000054 ;Port F data
  338. GPFUP EQU 0x56000058 ;Pull-up control F
  339.        
  340. GPGCON EQU 0x56000060 ;Port G control
  341. GPGDAT EQU 0x56000064 ;Port G data
  342. GPGUP EQU 0x56000068 ;Pull-up control G
  343.        
  344. GPHCON EQU 0x56000070 ;Port H control
  345. GPHDAT EQU 0x56000074 ;Port H data
  346. GPHUP EQU 0x56000078 ;Pull-up control H
  347.        
  348. MISCCR EQU 0x56000080 ;Miscellaneous control
  349. DCKCON EQU 0x56000084 ;DCLK0/1 control
  350. EXTINT0 EQU 0x56000088 ;External interrupt control register 0
  351. EXTINT1 EQU 0x5600008c ;External interrupt control register 1
  352. EXTINT2 EQU 0x56000090 ;External interrupt control register 2
  353. EINTFLT0 EQU 0x56000094 ;Reserved
  354. EINTFLT1 EQU 0x56000098 ;Reserved
  355. EINTFLT2 EQU 0x5600009c ;External interrupt filter control register 2
  356. EINTFLT3 EQU 0x560000a0 ;External interrupt filter control register 3
  357. EINTMASK EQU 0x560000a4 ;External interrupt mask
  358. EINTPEND EQU 0x560000a8 ;External interrupt pending
  359. GSTATUS0 EQU 0x560000ac ;External pin status
  360. GSTATUS1 EQU 0x560000b0 ;Chip ID(0x32410000)
  361. GSTATUS2 EQU 0x560000b4 ;Reset type
  362. GSTATUS3 EQU 0x560000b8 ;Saved data0(32-bit) before entering POWER_OFF mode 
  363. GSTATUS4 EQU 0x560000bc ;Saved data1(32-bit) before entering POWER_OFF mode
  365. vGPFDAT EQU 0xb1600054 ;Port F data
  367. vGPIOBASE EQU 0xb1600000 ;Port A control
  368. oGPACON EQU 0x00
  369. oGPADAT EQU 0x04            ;Port A data
  370.   
  371. oGPBCON EQU 0x10            ;Port B control
  372. oGPBDAT EQU 0x14            ;Port B data
  373. oGPBUP EQU 0x18            ;Pull-up control B
  374.   
  375. oGPCCON EQU 0x20            ;Port C control
  376. oGPCDAT EQU 0x24            ;Port C data
  377. oGPCUP EQU 0x28            ;Pull-up control C
  378.   
  379. oGPDCON EQU 0x30            ;Port D control
  380. oGPDDAT EQU 0x34            ;Port D data
  381. oGPDUP EQU 0x38            ;Pull-up control D
  382.   
  383. oGPECON EQU 0x40            ;Port E control
  384. oGPEDAT EQU 0x44            ;Port E data
  385. oGPEUP EQU 0x48            ;Pull-up control E
  386.   
  387. oGPFCON EQU 0x50            ;Port F control
  388. oGPFDAT EQU 0x54            ;Port F data
  389. oGPFUP EQU 0x58            ;Pull-up control F
  390.   
  391. oGPGCON EQU 0x60            ;Port G control
  392. oGPGDAT EQU 0x64            ;Port G data
  393. oGPGUP EQU 0x68            ;Pull-up control G
  394.   
  395. oGPHCON EQU 0x70            ;Port H control
  396. oGPHDAT EQU 0x74            ;Port H data
  397. oGPHUP EQU 0x78            ;Pull-up control H
  398.   
  399. oMISCCR EQU 0x80            ;Miscellaneous control
  400. oDCKCON EQU 0x84            ;DCLK0/1 control
  401. oEXTINT0 EQU 0x88            ;External interrupt control register 0
  402. oEXTINT1 EQU 0x8c            ;External interrupt control register 1
  403. oEXTINT2 EQU 0x90            ;External interrupt control register 2
  404. oEINTFLT0 EQU 0x94            ;Reserved
  405. oEINTFLT1 EQU 0x98            ;Reserved
  406. oEINTFLT2 EQU 0x9c            ;External interrupt filter control register 2
  407. oEINTFLT3 EQU 0xa0            ;External interrupt filter control register 3
  408. oEINTMASK EQU 0xa4            ;External interrupt mask
  409. oEINTPEND EQU 0xa8            ;External interrupt pending
  410. oGSTATUS0 EQU 0xac            ;External pin status
  411. oGSTATUS1 EQU 0xb0            ;Chip ID(0x32410000)
  412. oGSTATUS2 EQU 0xb4            ;Reset type
  413. oGSTATUS3 EQU 0xb8            ;Saved data0(32-bit) before entering POWER_OFF mode 
  414. oGSTATUS4 EQU 0xbc            ;Saved data1(32-bit) before entering POWER_OFF mode
  416. vMISCCR EQU 0xb1600080 ;Miscellaneous control
  418. ;******************************************************************************
  419. ; RTC
  420. ;******************************************************************************
  421. RTCCON EQU 0x57000040      ;RTC control
  422. TICNT EQU 0x57000044      ;Tick time count
  423. RTCALM EQU 0x57000050      ;RTC alarm control
  424. ALMSEC EQU 0x57000054      ;Alarm second
  425. ALMMIN EQU 0x57000058      ;Alarm minute
  426. ALMHOUR EQU 0x5700005c      ;Alarm Hour
  427. ALMDAY EQU 0x57000060      ;Alarm day
  428. ALMMON EQU 0x57000064      ;Alarm month
  429. ALMYEAR EQU 0x57000068      ;Alarm year
  430. RTCRST EQU 0x5700006c      ;RTC round reset
  431. BCDSEC EQU 0x57000070      ;BCD second
  432. BCDMIN EQU 0x57000074      ;BCD minute
  433. BCDHOUR EQU 0x57000078      ;BCD hour
  434. BCDDAY EQU 0x5700007c      ;BCD day
  435. BCDDATE EQU 0x57000080      ;BCD date
  436. BCDMON EQU 0x57000084      ;BCD month
  437. BCDYEAR EQU 0x57000088      ;BCD year
  439. ;******************************************************************************
  440. ; ADC
  441. ;******************************************************************************
  442. ADCCON EQU 0x58000000 ;ADC control
  443. ADCTSC EQU 0x58000004 ;ADC touch screen control
  444. ADCDLY EQU 0x58000008 ;ADC start or Interval Delay
  445. ADCDAT0 EQU 0x5800000c ;ADC conversion data 0
  446. ADCDAT1 EQU 0x58000010 ;ADC conversion data 1                     
  447. ADCUPDN EQU 0x58000014 ;AEC touch screen up-down ;;; SHL
  449. ;******************************************************************************                      
  450. ; SPI           
  451. ;******************************************************************************
  452. SPCON0 EQU 0x59000000 ;SPI0 control
  453. SPSTA0 EQU 0x59000004 ;SPI0 status
  454. SPPIN0 EQU 0x59000008 ;SPI0 pin control
  455. SPPRE0 EQU 0x5900000c ;SPI0 baud rate prescaler
  456. SPTDAT0 EQU 0x59000010 ;SPI0 Tx data
  457. SPRDAT0 EQU 0x59000014 ;SPI0 Rx data
  459. SPCON1 EQU 0x59000020 ;SPI1 control
  460. SPSTA1 EQU 0x59000024 ;SPI1 status
  461. SPPIN1 EQU 0x59000028 ;SPI1 pin control
  462. SPPRE1 EQU 0x5900002c ;SPI1 baud rate prescaler
  463. SPTDAT1 EQU 0x59000030 ;SPI1 Tx data
  464. SPRDAT1 EQU 0x59000034 ;SPI1 Rx data
  466. ;******************************************************************************
  467. ; SD Interface
  468. ;******************************************************************************
  469. SDICON EQU 0x5a000000 ;SDI control
  470. SDIPRE EQU 0x5a000000 ;SDI baud rate prescaler
  471. SDICmdArg EQU 0x5a000000 ;SDI command argument
  472. SDICmdCon EQU 0x5a000000 ;SDI command control
  473. SDICmdSta EQU 0x5a000000 ;SDI command status
  474. SDIRSP0 EQU 0x5a000000 ;SDI response 0
  475. SDIRSP1 EQU 0x5a000000 ;SDI response 1
  476. SDIRSP2 EQU 0x5a000000 ;SDI response 2
  477. SDIRSP3 EQU 0x5a000000 ;SDI response 3
  478. SDIDTimer EQU 0x5a000000 ;SDI data/busy timer
  479. SDIBSize EQU 0x5a000000 ;SDI block size
  480. SDIDatCon EQU 0x5a000000 ;SDI data control
  481. SDIDatCnt EQU 0x5a000000 ;SDI data remain counter
  482. SDIDatSta EQU 0x5a000000 ;SDI data status
  483. SDIFSTA EQU 0x5a000000 ;SDI FIFO status
  484. SDIIntMsk EQU 0x5a000000 ;SDI interrupt mask
  486. SDIDAT EQU 0x5a00003c ;SDI data
  488.             
  489. ;******************************************************************************
  490. ; PENDING BIT
  491. ;******************************************************************************
  492. BIT_EINT0 EQU (0x1)
  493. BIT_EINT1 EQU (0x1<<1)
  494. BIT_EINT2 EQU (0x1<<2)
  495. BIT_EINT3 EQU (0x1<<3)
  496. BIT_EINT4_7 EQU (0x1<<4)
  497. BIT_EINT8_23 EQU (0x1<<5)
  498. ;BIT_NOTUSED6 EQU (0x1<<6)
  499. BIT_CAM EQU (0x1<<6) ;;; SHL
  500. BIT_BAT_FLT EQU (0x1<<7)
  501. BIT_TICK EQU (0x1<<8)
  502. BIT_WDT_AC97 EQU (0x1<<9)
  503. BIT_TIMER0 EQU (0x1<<10)
  504. BIT_TIMER1 EQU (0x1<<11)
  505. BIT_TIMER2 EQU (0x1<<12)
  506. BIT_TIMER3 EQU (0x1<<13)
  507. BIT_TIMER4 EQU (0x1<<14)
  508. BIT_UART2 EQU (0x1<<15)
  509. BIT_LCD EQU (0x1<<16)
  510. BIT_DMA0 EQU (0x1<<17)
  511. BIT_DMA1 EQU (0x1<<18)
  512. BIT_DMA2 EQU (0x1<<19)
  513. BIT_DMA3 EQU (0x1<<20)
  514. BIT_SDI EQU (0x1<<21)
  515. BIT_SPI0 EQU (0x1<<22)
  516. BIT_UART1 EQU (0x1<<23)
  517. ;BIT_NOTUSED24 EQU (0x1<<24)
  518. BIT_NFCON EQU (0x1<<24)
  519. BIT_USBD EQU (0x1<<25)
  520. BIT_USBH EQU (0x1<<26)
  521. BIT_IIC EQU (0x1<<27)
  522. BIT_UART0 EQU (0x1<<28)
  523. BIT_SPI1 EQU (0x1<<29)
  524. BIT_RTC EQU (0x1<<30)
  525. BIT_ADC EQU (0x1<<31)
  526. BIT_ALLMSK EQU (0xffffffff)
  530. ;******************************************************************************
  531. ; Memory Configuration
  532. ;******************************************************************************
  534. DW8 EQU (0x0)
  535. DW16 EQU (0x1)
  536. DW32 EQU (0x2)
  537. WAIT EQU (0x1<<2)
  538. UBLB EQU (0x1<<3)
  540. B1_BWSCON EQU (DW32)
  541. B2_BWSCON EQU (DW16)
  542. B3_BWSCON EQU (DW16 + WAIT + UBLB)
  543. B4_BWSCON EQU (DW16)
  544. B5_BWSCON EQU (DW16)
  545. B6_BWSCON EQU (DW32)
  546. B7_BWSCON EQU (DW32)
  548. ;******************************************************************************
  549. ; BANK0CON 
  550. ;******************************************************************************
  552. B0_Tacs EQU 0x0 ;0clk
  553. B0_Tcos EQU 0x0 ;0clk
  554. B0_Tacc EQU 0x7 ;14clk
  555. B0_Tcoh EQU 0x0 ;0clk
  556. B0_Tah EQU 0x0 ;0clk
  557. B0_Tacp EQU 0x0
  558. B0_PMC EQU 0x0 ;normal
  560. ;******************************************************************************
  561. ; BANK1CON
  562. ;******************************************************************************
  564. B1_Tacs EQU 0x0 ;0clk
  565. B1_Tcos EQU 0x0 ;0clk
  566. B1_Tacc EQU 0x7 ;14clk
  567. B1_Tcoh EQU 0x0 ;0clk
  568. B1_Tah EQU 0x0 ;0clk
  569. B1_Tacp EQU 0x0
  570. B1_PMC EQU 0x0 ;normal
  572. ;******************************************************************************
  573. ; Bank 2 parameter
  574. ;******************************************************************************
  576. B2_Tacs EQU 0x0 ;0clk
  577. B2_Tcos EQU 0x0 ;0clk
  578. B2_Tacc EQU 0x7 ;14clk
  579. B2_Tcoh EQU 0x0 ;0clk
  580. B2_Tah EQU 0x0 ;0clk
  581. B2_Tacp EQU 0x0
  582. B2_PMC EQU 0x0 ;normal
  584. ;******************************************************************************
  585. ; Bank 3 parameter
  586. ;******************************************************************************
  588. B3_Tacs EQU 0x0 ;0clk
  589. B3_Tcos EQU 0x0 ;0clk
  590. B3_Tacc EQU 0x7 ;14clk
  591. B3_Tcoh EQU 0x0 ;0clk
  592. B3_Tah EQU 0x0 ;0clk
  593. B3_Tacp EQU 0x0
  594. B3_PMC EQU 0x0 ;normal
  596. ;******************************************************************************
  597. ; Bank 4 parameter
  598. ;******************************************************************************
  600. B4_Tacs EQU 0x0 ;0clk
  601. B4_Tcos EQU 0x0 ;0clk
  602. B4_Tacc EQU 0x7 ;14clk
  603. B4_Tcoh EQU 0x0 ;0clk
  604. B4_Tah EQU 0x0 ;0clk
  605. B4_Tacp EQU 0x0
  606. B4_PMC EQU 0x0 ;normal
  608. ;******************************************************************************
  609. ; Bank 5 parameter
  610. ;******************************************************************************
  612. B5_Tacs EQU 0x0 ;0clk
  613. B5_Tcos EQU 0x0 ;0clk
  614. B5_Tacc EQU 0x7 ;14clk
  615. B5_Tcoh EQU 0x0 ;0clk
  616. B5_Tah EQU 0x0 ;0clk
  617. B5_Tacp EQU 0x0
  618. B5_PMC EQU 0x0 ;normal
  620. ;******************************************************************************
  621. ; Bank 6 parameter
  622. ;******************************************************************************
  624. B6_MT EQU 0x3 ;SDRAM
  625. B6_Trcd EQU 0x1 ;3clk
  626. B6_SCAN EQU 0x1 ;9bit
  628. ;******************************************************************************
  629. ; Bank 7 parameter
  630. ;******************************************************************************
  632. B7_MT EQU 0x3 ;SDRAM
  633. B7_Trcd EQU 0x1 ;3clk
  634. B7_SCAN EQU 0x1 ;9bit
  636. ;******************************************************************************
  637. ; REFRESH parameter
  638. ;******************************************************************************
  640. REFEN EQU 0x1 ;Refresh enable
  641. TREFMD EQU 0x0 ;CBR(CAS before RAS)/Auto refresh
  642. ;Trp EQU 0x0 ;2clk
  643. ;Trp EQU 0x2 ;2clk
  644. ;Trc EQU 0x3 ;7clk
  645. ;Trc EQU 0x3 ;7clk
  646. Trp EQU 0x1 ;3clk
  647. Trc EQU 0x2 ;6clk
  648. Tchr EQU 0x2 ;3clk
  649. ;REFCNT EQU 1113 ;period=15.6us, HCLK=60Mhz, (2048+1-15.6*60)
  650. REFCNT EQU 1011 ; 500Mhz ;;; SHL
  651. END