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timescale(1).v
资源名称：pci_core_verilog.rar　[点击查看]
上传用户：quan1896
上传日期：2014-05-14
资源大小：211k
文件大小：22k
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并行计算

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timescale(1).v：源码内容
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  516. <a href="./timescale.v#rev1.2"><img src="/icons/back.gif" alt="[BACK]" border="0" width="20" height="22" /></a><b>Return to <a href="./timescale.v#rev1.2">timescale.v</a> CVS log</b> <img src="/icons/text.gif" alt="[TXT]" border="0" width="20" height="22" /></td>  <td style="text-align: right"><img src="/icons/dir.gif" alt="[DIR]" border="0" width="20" height="22" /> <b>Up to  <a href="/cvsweb.shtml/#dirlist">[Official OpenCores CVS Repository]</a> / <a href="/cvsweb.shtml/pci/#dirlist">pci</a> / <a href="/cvsweb.shtml/pci/rtl/#dirlist">rtl</a> / <a href="/cvsweb.shtml/pci/rtl/verilog/#dirlist">verilog</a></b></td>
  517.  </tr>
  518. </table>
  519. <hr />
  520. <div class="log-markup">
  521. File:&nbsp;
  522.  <a href="/cvsweb.shtml/#dirlist">[Official OpenCores CVS Repository]</a> / <a href="/cvsweb.shtml/pci/#dirlist">pci</a> / <a href="/cvsweb.shtml/pci/rtl/#dirlist">rtl</a> / <a href="/cvsweb.shtml/pci/rtl/verilog/#dirlist">verilog</a> / <a href="/cvsweb.shtml/pci/rtl/verilog/timescale.v">timescale.v</a><br />
  523. <a name="rev1.2"></a><a name="wb2hpi"></a><a name="rel_WB_B3"></a><a name="rel_9"></a><a name="rel_8"></a><a name="rel_7"></a><a name="rel_6"></a><a name="rel_5"></a><a name="rel_4"></a><a name="rel_3"></a><a name="rel_2"></a><a name="rel_13"></a><a name="rel_12"></a><a name="rel_11"></a><a name="rel_10"></a><a name="rel_1"></a><a name="rel_00"></a><a name="asyst_3"></a><a name="asyst_2"></a><a name="HEAD"></a>
  524.  Revision <b>1.2</b>: <a href="/cvsweb.cgi/~checkout~/pci/rtl/verilog/timescale.v?rev=1.2;content-type=text%2Fplain" class="download-link">download</a> - view: <a href="timescale.v?rev=1.2;content-type=text%2Fplain" class="display-link">text</a>, <a href="timescale.v?annotate=1.2">annotated</a> - <a href="timescale.v?r1=1.2#rev1.2">select&nbsp;for&nbsp;diffs</a><br />
  525. <i>Fri Feb  1 15:25:13 2002 UTC</i> (5 years, 3 months ago) by <i>mihad</i><br />
  526. Branches: <a href="./timescale.v?only_with_tag=MAIN">MAIN</a><br />
  527. CVS tags: <a href="./timescale.v?only_with_tag=wb2hpi">wb2hpi</a>,
  528. <a href="./timescale.v?only_with_tag=rel_WB_B3">rel_WB_B3</a>,
  529. <a href="./timescale.v?only_with_tag=rel_9">rel_9</a>,
  530. <a href="./timescale.v?only_with_tag=rel_8">rel_8</a>,
  531. <a href="./timescale.v?only_with_tag=rel_7">rel_7</a>,
  532. <a href="./timescale.v?only_with_tag=rel_6">rel_6</a>,
  533. <a href="./timescale.v?only_with_tag=rel_5">rel_5</a>,
  534. <a href="./timescale.v?only_with_tag=rel_4">rel_4</a>,
  535. <a href="./timescale.v?only_with_tag=rel_3">rel_3</a>,
  536. <a href="./timescale.v?only_with_tag=rel_2">rel_2</a>,
  537. <a href="./timescale.v?only_with_tag=rel_13">rel_13</a>,
  538. <a href="./timescale.v?only_with_tag=rel_12">rel_12</a>,
  539. <a href="./timescale.v?only_with_tag=rel_11">rel_11</a>,
  540. <a href="./timescale.v?only_with_tag=rel_10">rel_10</a>,
  541. <a href="./timescale.v?only_with_tag=rel_1">rel_1</a>,
  542. <a href="./timescale.v?only_with_tag=rel_00">rel_00</a>,
  543. <a href="./timescale.v?only_with_tag=asyst_3">asyst_3</a>,
  544. <a href="./timescale.v?only_with_tag=asyst_2">asyst_2</a>,
  545. <a href="./timescale.v?only_with_tag=HEAD">HEAD</a><br />
  546. <pre class="log">
  547. Repaired a few bugs, updated specification, added test bench files and design document
  548. </pre>
  549. </div>
  550. <hr /><pre>
  551. //////////////////////////////////////////////////////////////////////
  552. ////                                                              ////
  553. ////  File name &quot;timescale.v&quot;                                     ////
  554. ////                                                              ////
  555. //////////////////////////////////////////////////////////////////////
  556. //
  557. // CVS Revision History
  558. //
  559. // $Log: timescale.v,v $
  560. // Revision 1.2  2002/02/01 15:25:13  mihad
  561. // Repaired a few bugs, updated specification, added test bench files and design document
  562. //
  563. // Revision 1.1  2001/10/05 08:11:22  mihad
  564. // Updated all files with inclusion of timescale file for simulation purposes.
  565. //
  566. //
  568. // timescale directive is included in all core's modules for simulation purposes
  569. `timescale 1ns/1ps</pre>
  570. <hr />
  571. <address><span style="font-size: smaller">FreeBSD-CVSweb &lt;<a href="mailto:freebsd-cvsweb@FreeBSD.org">freebsd-cvsweb@FreeBSD.org</a>&gt;</span></address>
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