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pci_bridge32(1).v
资源名称：pci_core_verilog.rar　[点击查看]
上传用户：quan1896
上传日期：2014-05-14
资源大小：211k
文件大小：93k
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并行计算

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pci_bridge32(1).v：源码内容
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  516. <a href="./pci_bridge32.v#rev1.19"><img src="/icons/back.gif" alt="[BACK]" border="0" width="20" height="22" /></a><b>Return to <a href="./pci_bridge32.v#rev1.19">pci_bridge32.v</a> CVS log</b> <img src="/icons/text.gif" alt="[TXT]" border="0" width="20" height="22" /></td>  <td style="text-align: right"><img src="/icons/dir.gif" alt="[DIR]" border="0" width="20" height="22" /> <b>Up to  <a href="/cvsweb.shtml/#dirlist">[Official OpenCores CVS Repository]</a> / <a href="/cvsweb.shtml/pci/#dirlist">pci</a> / <a href="/cvsweb.shtml/pci/rtl/#dirlist">rtl</a> / <a href="/cvsweb.shtml/pci/rtl/verilog/#dirlist">verilog</a></b></td>
  517.  </tr>
  518. </table>
  519. <hr />
  520. <div class="log-markup">
  521. File:&nbsp;
  522.  <a href="/cvsweb.shtml/#dirlist">[Official OpenCores CVS Repository]</a> / <a href="/cvsweb.shtml/pci/#dirlist">pci</a> / <a href="/cvsweb.shtml/pci/rtl/#dirlist">rtl</a> / <a href="/cvsweb.shtml/pci/rtl/verilog/#dirlist">verilog</a> / <a href="/cvsweb.shtml/pci/rtl/verilog/pci_bridge32.v">pci_bridge32.v</a><br />
  523. <a name="rev1.19"></a><a name="HEAD"></a>
  524.  Revision <b>1.19</b>: <a href="/cvsweb.cgi/~checkout~/pci/rtl/verilog/pci_bridge32.v?rev=1.19;content-type=text%2Fplain" class="download-link">download</a> - view: <a href="pci_bridge32.v?rev=1.19;content-type=text%2Fplain" class="display-link">text</a>, <a href="pci_bridge32.v?annotate=1.19">annotated</a> - <a href="pci_bridge32.v?r1=1.19#rev1.19">select&nbsp;for&nbsp;diffs</a><br />
  525. <i>Thu Sep 23 13:48:53 2004 UTC</i> (2 years, 7 months ago) by <i>mihad</i><br />
  526. Branches: <a href="./pci_bridge32.v?only_with_tag=MAIN">MAIN</a><br />
  527. CVS tags: <a href="./pci_bridge32.v?only_with_tag=HEAD">HEAD</a><br />
  528. <pre class="log">
  529. The control inputs from PCI are now muxed with control outputs
  530. using output enable state for given signal.
  531. </pre>
  532. </div>
  533. <hr /><pre>
  534. //////////////////////////////////////////////////////////////////////
  535. ////                                                              ////
  536. ////  File name &quot;pci_bridge32.v&quot;                                  ////
  537. ////                                                              ////
  538. ////  This file is part of the &quot;PCI bridge&quot; project               ////
  539. ////  http://www.opencores.org/cores/pci/                         ////
  540. ////                                                              ////
  541. ////  Author(s):                                                  ////
  542. ////      - Miha Dolenc (mihad@opencores.org)                     ////
  543. ////      - Tadej Markovic (tadej@opencores.org)                  ////
  544. ////                                                              ////
  545. ////  All additional information is avaliable in the README       ////
  546. ////  file.                                                       ////
  547. ////                                                              ////
  548. ////                                                              ////
  549. //////////////////////////////////////////////////////////////////////
  550. ////                                                              ////
  551. //// Copyright (C) 2001 Miha Dolenc, mihad@opencores.org          ////
  552. ////                                                              ////
  553. //// This source file may be used and distributed without         ////
  554. //// restriction provided that this copyright statement is not    ////
  555. //// removed from the file and that any derivative work contains  ////
  556. //// the original copyright notice and the associated disclaimer. ////
  557. ////                                                              ////
  558. //// This source file is free software; you can redistribute it   ////
  559. //// and/or modify it under the terms of the GNU Lesser General   ////
  560. //// Public License as published by the Free Software Foundation; ////
  561. //// either version 2.1 of the License, or (at your option) any   ////
  562. //// later version.                                               ////
  563. ////                                                              ////
  564. //// This source is distributed in the hope that it will be       ////
  565. //// useful, but WITHOUT ANY WARRANTY; without even the implied   ////
  566. //// warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR      ////
  567. //// PURPOSE.  See the GNU Lesser General Public License for more ////
  568. //// details.                                                     ////
  569. ////                                                              ////
  570. //// You should have received a copy of the GNU Lesser General    ////
  571. //// Public License along with this source; if not, download it   ////
  572. //// from http://www.opencores.org/lgpl.shtml                     ////
  573. ////                                                              ////
  574. //////////////////////////////////////////////////////////////////////
  575. //
  576. // CVS Revision History
  577. //
  578. // $Log: pci_bridge32.v,v $
  579. // Revision 1.19  2004/09/23 13:48:53  mihad
  580. // The control inputs from PCI are now muxed with control outputs
  581. // using output enable state for given signal.
  582. //
  583. // Revision 1.18  2004/08/19 15:27:34  mihad
  584. // Changed minimum pci image size to 256 bytes because
  585. // of some PC system problems with size of IO images.
  586. //
  587. // Revision 1.17  2004/01/24 11:54:18  mihad
  588. // Update! SPOCI Implemented!
  589. //
  590. // Revision 1.16  2003/12/19 11:11:30  mihad
  591. // Compact PCI Hot Swap support added.
  592. // New testcases added.
  593. // Specification updated.
  594. // Test application changed to support WB B3 cycles.
  595. //
  596. // Revision 1.15  2003/12/10 12:02:54  mihad
  597. // The wbs B3 to B2 translation logic had wrong reset wire connected!
  598. //
  599. // Revision 1.14  2003/12/09 09:33:57  simons
  600. // Some warning cleanup.
  601. //
  602. // Revision 1.13  2003/10/17 09:11:52  markom
  603. // mbist signals updated according to newest convention
  604. //
  605. // Revision 1.12  2003/08/21 20:49:03  tadejm
  606. // Added signals for WB Master B3.
  607. //
  608. // Revision 1.11  2003/08/08 16:36:33  tadejm
  609. // Added 'three_left_out' to pci_pciw_fifo signaling three locations before full. Added comparison between current registered cbe and next unregistered cbe to signal wb_master whether it is allowed to performe burst or not. Due to this, I needed 'three_left_out' so that writing to pci_pciw_fifo can be registered, otherwise timing problems would occure.
  610. //
  611. // Revision 1.10  2003/08/03 18:05:06  mihad
  612. // Added limited WISHBONE B3 support for WISHBONE Slave Unit.
  613. // Doesn't support full speed bursts yet.
  614. //
  615. // Revision 1.9  2003/01/27 16:49:31  mihad
  616. // Changed module and file names. Updated scripts accordingly. FIFO synchronizations changed.
  617. //
  618. // Revision 1.8  2002/10/21 13:04:33  mihad
  619. // Changed BIST signal names etc..
  620. //
  621. // Revision 1.7  2002/10/18 03:36:37  tadejm
  622. // Changed wrong signal name mbist_sen into mbist_ctrl_i.
  623. //
  624. // Revision 1.6  2002/10/17 22:51:50  tadejm
  625. // Changed BIST signals for RAMs.
  626. //
  627. // Revision 1.5  2002/10/11 10:09:01  mihad
  628. // Added additional testcase and changed rst name in BIST to trst
  629. //
  630. // Revision 1.4  2002/10/08 17:17:05  mihad
  631. // Added BIST signals for RAMs.
  632. //
  633. // Revision 1.3  2002/02/01 15:25:12  mihad
  634. // Repaired a few bugs, updated specification, added test bench files and design document
  635. //
  636. // Revision 1.2  2001/10/05 08:14:28  mihad
  637. // Updated all files with inclusion of timescale file for simulation purposes.
  638. //
  639. // Revision 1.1.1.1  2001/10/02 15:33:46  mihad
  640. // New project directory structure
  641. //
  642. //
  644. `include &quot;pci_constants.v&quot;
  646. // synopsys translate_off
  647. `include &quot;timescale.v&quot;
  648. // synopsys translate_on
  650. // this is top level module of pci bridge core
  651. // it instantiates and connects other lower level modules
  652. // check polarity of PCI output enables in file out_reg.v and change it according to IO interface specification
  654. module pci_bridge32
  655. (
  656.     // WISHBONE system signals
  657.     wb_clk_i,
  658.     wb_rst_i,
  659.     wb_rst_o,
  660.     wb_int_i,
  661.     wb_int_o,
  663.     // WISHBONE slave interface
  664.     wbs_adr_i,
  665.     wbs_dat_i,
  666.     wbs_dat_o,
  667.     wbs_sel_i,
  668.     wbs_cyc_i,
  669.     wbs_stb_i,
  670.     wbs_we_i,
  672. `ifdef PCI_WB_REV_B3
  674.     wbs_cti_i,
  675.     wbs_bte_i,
  677. `else
  679.     wbs_cab_i,
  681. `endif
  683.     wbs_ack_o,
  684.     wbs_rty_o,
  685.     wbs_err_o,
  687.     // WISHBONE master interface
  688.     wbm_adr_o,
  689.     wbm_dat_i,
  690.     wbm_dat_o,
  691.     wbm_sel_o,
  692.     wbm_cyc_o,
  693.     wbm_stb_o,
  694.     wbm_we_o,
  695.     wbm_cti_o,
  696.     wbm_bte_o,
  697.     wbm_ack_i,
  698.     wbm_rty_i,
  699.     wbm_err_i,
  701.     // pci interface - system pins
  702.     pci_clk_i,
  703.     pci_rst_i,
  704.     pci_rst_o,
  705.     pci_inta_i,
  706.     pci_inta_o,
  707.     pci_rst_oe_o,
  708.     pci_inta_oe_o,
  710.     // arbitration pins
  711.     pci_req_o,
  712.     pci_req_oe_o,
  714.     pci_gnt_i,
  716.     // protocol pins
  717.     pci_frame_i,
  718.     pci_frame_o,
  720.     pci_frame_oe_o,
  721.     pci_irdy_oe_o,
  722.     pci_devsel_oe_o,
  723.     pci_trdy_oe_o,
  724.     pci_stop_oe_o,
  725.     pci_ad_oe_o,
  726.     pci_cbe_oe_o,
  728.     pci_irdy_i,
  729.     pci_irdy_o,
  731.     pci_idsel_i,
  733.     pci_devsel_i,
  734.     pci_devsel_o,
  736.     pci_trdy_i,
  737.     pci_trdy_o,
  739.     pci_stop_i,
  740.     pci_stop_o          ,
  742.     // data transfer pins
  743.     pci_ad_i,
  744.     pci_ad_o,
  746.     pci_cbe_i,
  747.     pci_cbe_o,
  749.     // parity generation and checking pins
  750.     pci_par_i,
  751.     pci_par_o,
  752.     pci_par_oe_o,
  754.     pci_perr_i,
  755.     pci_perr_o,
  756.     pci_perr_oe_o,
  758.     // system error pin
  759.     pci_serr_o,
  760.     pci_serr_oe_o
  762. `ifdef PCI_BIST
  763.     ,
  764.     // debug chain signals
  765.     mbist_si_i,       // bist scan serial in
  766.     mbist_so_o,       // bist scan serial out
  767.     mbist_ctrl_i        // bist chain shift control
  768. `endif
  770. `ifdef PCI_CPCI_HS_IMPLEMENT
  771.     ,
  772.     // Compact PCI Hot Swap signals
  773.     pci_cpci_hs_enum_o      ,   //  ENUM# output with output enable (open drain)
  774.     pci_cpci_hs_enum_oe_o   ,   //  ENUM# enum output enable
  775.     pci_cpci_hs_led_o       ,   //  LED output with output enable (open drain)
  776.     pci_cpci_hs_led_oe_o    ,   //  LED output enable
  777.     pci_cpci_hs_es_i            //  ejector switch state indicator input
  778. `endif
  780. `ifdef PCI_SPOCI
  781.     ,
  782.     // Serial power on configuration interface
  783.     spoci_scl_o     ,
  784.     spoci_scl_oe_o  ,
  785.     spoci_sda_i     ,
  786.     spoci_sda_o     ,
  787.     spoci_sda_oe_o
  788. `endif
  790. );
  792. `ifdef HOST
  793.     `ifdef NO_CNF_IMAGE
  794.         parameter pci_ba0_width = `PCI_NUM_OF_DEC_ADDR_LINES ;
  795.     `else
  796.         parameter pci_ba0_width = 20    ;
  797.     `endif
  798. `endif
  800. `ifdef GUEST
  801.     parameter pci_ba0_width = 20 ;
  802. `endif
  804. parameter pci_ba1_5_width = `PCI_NUM_OF_DEC_ADDR_LINES ;
  806. // WISHBONE system signals
  807. input   wb_clk_i ;
  808. input   wb_rst_i ;
  809. output  wb_rst_o ;
  810. input   wb_int_i ;
  811. output  wb_int_o ;
  813. // WISHBONE slave interface
  814. input   [31:0]  wbs_adr_i ;
  815. input   [31:0]  wbs_dat_i ;
  816. output  [31:0]  wbs_dat_o ;
  817. input   [3:0]   wbs_sel_i ;
  818. input           wbs_cyc_i ;
  819. input           wbs_stb_i ;
  820. input           wbs_we_i ;
  822. `ifdef PCI_WB_REV_B3
  824. input [2:0] wbs_cti_i ;
  825. input [1:0] wbs_bte_i ;
  827. `else
  829. input wbs_cab_i ;
  831. `endif
  833. output          wbs_ack_o ;
  834. output          wbs_rty_o ;
  835. output          wbs_err_o ;
  837. // WISHBONE master interface
  838. output  [31:0]  wbm_adr_o ;
  839. input   [31:0]  wbm_dat_i ;
  840. output  [31:0]  wbm_dat_o ;
  841. output  [3:0]   wbm_sel_o ;
  842. output          wbm_cyc_o ;
  843. output          wbm_stb_o ;
  844. output          wbm_we_o ;
  845. output  [2:0]   wbm_cti_o ;
  846. output  [1:0]   wbm_bte_o ;
  847. input           wbm_ack_i ;
  848. input           wbm_rty_i ;
  849. input           wbm_err_i ;
  851. // pci interface - system pins
  852. input   pci_clk_i ;
  853. input   pci_rst_i ;
  854. output  pci_rst_o ;
  855. output  pci_rst_oe_o ;
  857. input   pci_inta_i ;
  858. output  pci_inta_o ;
  859. output  pci_inta_oe_o ;
  861. // arbitration pins
  862. output  pci_req_o ;
  863. output  pci_req_oe_o ;
  865. input   pci_gnt_i ;
  867. // protocol pins
  868. input   pci_frame_i ;
  869. output  pci_frame_o ;
  870. output  pci_frame_oe_o ;
  871. output  pci_irdy_oe_o ;
  872. output  pci_devsel_oe_o ;
  873. output  pci_trdy_oe_o ;
  874. output  pci_stop_oe_o ;
  875. output  [31:0] pci_ad_oe_o ;
  876. output  [3:0]  pci_cbe_oe_o ;
  878. input   pci_irdy_i ;
  879. output  pci_irdy_o ;
  881. input   pci_idsel_i ;
  883. input   pci_devsel_i ;
  884. output  pci_devsel_o ;
  886. input   pci_trdy_i ;
  887. output  pci_trdy_o ;
  889. input   pci_stop_i ;
  890. output  pci_stop_o ;
  892. // data transfer pins
  893. input   [31:0]  pci_ad_i ;
  894. output  [31:0]  pci_ad_o ;
  896. input   [3:0]   pci_cbe_i ;
  897. output  [3:0]   pci_cbe_o ;
  899. // parity generation and checking pins
  900. input   pci_par_i ;
  901. output  pci_par_o ;
  902. output  pci_par_oe_o ;
  904. input   pci_perr_i ;
  905. output  pci_perr_o ;
  906. output  pci_perr_oe_o ;
  908. // system error pin
  909. output  pci_serr_o ;
  910. output  pci_serr_oe_o ;
  912. `ifdef PCI_BIST
  913. /*-----------------------------------------------------
  914. BIST debug chain port signals
  915. -----------------------------------------------------*/
  916. input   mbist_si_i;       // bist scan serial in
  917. output  mbist_so_o;       // bist scan serial out
  918. input [`PCI_MBIST_CTRL_WIDTH - 1:0] mbist_ctrl_i;       // bist chain shift control
  919. `endif
  921. `ifdef PCI_CPCI_HS_IMPLEMENT
  922.     // Compact PCI Hot Swap signals
  923. output  pci_cpci_hs_enum_o      ;   //  ENUM# output with output enable (open drain)
  924. output  pci_cpci_hs_enum_oe_o   ;   //  ENUM# enum output enable
  925. output  pci_cpci_hs_led_o       ;   //  LED output with output enable (open drain)
  926. output  pci_cpci_hs_led_oe_o    ;   //  LED output enable
  927. input   pci_cpci_hs_es_i        ;   //  ejector switch state indicator input
  929. assign  pci_cpci_hs_enum_o = 1'b0   ;
  930. assign  pci_cpci_hs_led_o  = 1'b0   ;
  931. `endif
  933. `ifdef PCI_SPOCI
  934. output  spoci_scl_o     ;
  935. output  spoci_scl_oe_o  ;
  936. input   spoci_sda_i     ;
  937. output  spoci_sda_o     ;
  938. output  spoci_sda_oe_o  ;
  940. assign  spoci_scl_o = 1'b0  ;
  941. assign  spoci_sda_o = 1'b0  ;
  942. `endif
  944. // declare clock and reset wires
  945. wire pci_clk = pci_clk_i ;
  946. wire wb_clk  = wb_clk_i ;
  947. wire reset ; // assigned at pci bridge reset and interrupt logic
  949. /*=========================================================================================================
  950. First comes definition of all modules' outputs, so they can be assigned to any other module's input later
  951.   in the file, when module is instantiated
  952. =========================================================================================================*/
  953. // PCI BRIDGE RESET AND INTERRUPT LOGIC OUTPUTS
  954. wire    pci_reso_reset ;
  955. wire    pci_reso_pci_rstn_out ;
  956. wire    pci_reso_pci_rstn_en_out ;
  957. wire    pci_reso_rst_o ;
  958. wire    pci_into_pci_intan_out ;
  959. wire    pci_into_pci_intan_en_out ;
  960. wire    pci_into_int_o ;
  961. wire    pci_into_conf_isr_int_prop_out ;
  963. // assign pci bridge reset interrupt logic outputs to top outputs where possible
  964. assign reset            = pci_reso_reset ;
  965. assign pci_rst_o     = pci_reso_pci_rstn_out ;
  966. assign pci_rst_oe_o  = pci_reso_pci_rstn_en_out ;
  967. assign wb_rst_o         = pci_reso_rst_o ;
  968. assign pci_inta_o    = pci_into_pci_intan_out ;
  969. assign pci_inta_oe_o = pci_into_pci_intan_en_out ;
  970. assign wb_int_o         = pci_into_int_o ;
  972. // WISHBONE SLAVE UNIT OUTPUTS
  973. wire    [31:0]  wbu_sdata_out ;
  974. wire            wbu_ack_out ;
  975. wire            wbu_rty_out ;
  976. wire            wbu_err_out ;
  977. wire            wbu_pciif_req_out ;
  978. wire            wbu_pciif_frame_out ;
  979. wire            wbu_pciif_frame_en_out ;
  980. wire            wbu_pciif_irdy_out ;
  981. wire            wbu_pciif_irdy_en_out ;
  982. wire    [31:0]  wbu_pciif_ad_out ;
  983. wire            wbu_pciif_ad_en_out ;
  984. wire    [3:0]   wbu_pciif_cbe_out ;
  985. wire            wbu_pciif_cbe_en_out ;
  986. wire    [31:0]  wbu_err_addr_out ;
  987. wire    [3:0]   wbu_err_bc_out ;
  988. wire            wbu_err_signal_out ;
  989. wire            wbu_err_source_out ;
  990. wire            wbu_err_rty_exp_out ;
  991. wire            wbu_tabort_rec_out ;
  992. wire            wbu_mabort_rec_out ;
  993. wire    [11:0]  wbu_conf_offset_out ;
  994. wire            wbu_conf_renable_out ;
  995. wire            wbu_conf_wenable_out ;
  996. wire    [3:0]   wbu_conf_be_out ;
  997. wire    [31:0]  wbu_conf_data_out ;
  998. wire            wbu_del_read_comp_pending_out ;
  999. wire            wbu_wbw_fifo_empty_out ;
  1000. wire            wbu_ad_load_out ;
  1001. wire            wbu_ad_load_on_transfer_out ;
  1002. wire            wbu_pciif_frame_load_out ;
  1004. // PCI TARGET UNIT OUTPUTS
  1005. wire    [31:0]  pciu_adr_out ;
  1006. wire    [31:0]  pciu_mdata_out ;
  1007. wire            pciu_cyc_out ;
  1008. wire            pciu_stb_out ;
  1009. wire            pciu_we_out ;
  1010. wire    [2:0]   pciu_cti_out ;
  1011. wire    [1:0]   pciu_bte_out ;
  1012. wire    [3:0]   pciu_sel_out ;
  1013. wire            pciu_pciif_trdy_out ;
  1014. wire            pciu_pciif_stop_out ;
  1015. wire            pciu_pciif_devsel_out ;
  1016. wire            pciu_pciif_trdy_en_out ;
  1017. wire            pciu_pciif_stop_en_out ;
  1018. wire            pciu_pciif_devsel_en_out ;
  1019. wire            pciu_ad_load_out ;
  1020. wire            pciu_ad_load_on_transfer_out ;
  1021. wire   [31:0]   pciu_pciif_ad_out ;
  1022. wire            pciu_pciif_ad_en_out ;
  1023. wire            pciu_pciif_tabort_set_out ;
  1024. wire    [31:0]  pciu_err_addr_out ;
  1025. wire    [3:0]   pciu_err_bc_out ;
  1026. wire    [31:0]  pciu_err_data_out ;
  1027. wire    [3:0]   pciu_err_be_out ;
  1028. wire            pciu_err_signal_out ;
  1029. wire            pciu_err_source_out ;
  1030. wire            pciu_err_rty_exp_out ;
  1031. wire    [11:0]  pciu_conf_offset_out ;
  1032. wire            pciu_conf_renable_out ;
  1033. wire            pciu_conf_wenable_out ;
  1034. wire    [3:0]   pciu_conf_be_out ;
  1035. wire    [31:0]  pciu_conf_data_out ;
  1036. wire            pciu_pci_drcomp_pending_out ;
  1037. wire            pciu_pciw_fifo_empty_out ;
  1039. // assign pci target unit's outputs to top outputs where possible
  1040. assign wbm_adr_o    =   pciu_adr_out ;
  1041. assign wbm_dat_o    =   pciu_mdata_out ;
  1042. assign wbm_cyc_o    =   pciu_cyc_out ;
  1043. assign wbm_stb_o    =   pciu_stb_out ;
  1044. assign wbm_we_o     =   pciu_we_out ;
  1045. assign wbm_cti_o    =   pciu_cti_out ;
  1046. assign wbm_bte_o    =   pciu_bte_out ;
  1047. assign wbm_sel_o    =   pciu_sel_out ;
  1049. // CONFIGURATION SPACE OUTPUTS
  1050. wire    [31:0]  conf_w_data_out ;
  1051. wire    [31:0]  conf_r_data_out ;
  1052. wire            conf_serr_enable_out ;
  1053. wire            conf_perr_response_out ;
  1054. wire            conf_pci_master_enable_out ;
  1055. wire            conf_mem_space_enable_out ;
  1056. wire            conf_io_space_enable_out ;
  1057. wire    [7:0]   conf_cache_line_size_to_pci_out ;
  1058. wire    [7:0]   conf_cache_line_size_to_wb_out ;
  1059. wire            conf_cache_lsize_not_zero_to_wb_out ;
  1060. wire    [7:0]   conf_latency_tim_out ;
  1062. wire    [pci_ba0_width   - 1:0]   conf_pci_ba0_out ;
  1063. wire    [pci_ba1_5_width - 1:0]   conf_pci_ba1_out ;
  1064. wire    [pci_ba1_5_width - 1:0]   conf_pci_ba2_out ;
  1065. wire    [pci_ba1_5_width - 1:0]   conf_pci_ba3_out ;
  1066. wire    [pci_ba1_5_width - 1:0]   conf_pci_ba4_out ;
  1067. wire    [pci_ba1_5_width - 1:0]   conf_pci_ba5_out ;
  1068. wire    [pci_ba1_5_width - 1:0]   conf_pci_ta0_out ;
  1069. wire    [pci_ba1_5_width - 1:0]   conf_pci_ta1_out ;
  1070. wire    [pci_ba1_5_width - 1:0]   conf_pci_ta2_out ;
  1071. wire    [pci_ba1_5_width - 1:0]   conf_pci_ta3_out ;
  1072. wire    [pci_ba1_5_width - 1:0]   conf_pci_ta4_out ;
  1073. wire    [pci_ba1_5_width - 1:0]   conf_pci_ta5_out ;
  1074. wire    [pci_ba1_5_width - 1:0]   conf_pci_am0_out ;
  1075. wire    [pci_ba1_5_width - 1:0]   conf_pci_am1_out ;
  1076. wire    [pci_ba1_5_width - 1:0]   conf_pci_am2_out ;
  1077. wire    [pci_ba1_5_width - 1:0]   conf_pci_am3_out ;
  1078. wire    [pci_ba1_5_width - 1:0]   conf_pci_am4_out ;
  1079. wire    [pci_ba1_5_width - 1:0]   conf_pci_am5_out ;
  1081. wire            conf_pci_mem_io0_out ;
  1082. wire            conf_pci_mem_io1_out ;
  1083. wire            conf_pci_mem_io2_out ;
  1084. wire            conf_pci_mem_io3_out ;
  1085. wire            conf_pci_mem_io4_out ;
  1086. wire            conf_pci_mem_io5_out ;
  1088. wire    [1:0]   conf_pci_img_ctrl0_out ;
  1089. wire    [1:0]   conf_pci_img_ctrl1_out ;
  1090. wire    [1:0]   conf_pci_img_ctrl2_out ;
  1091. wire    [1:0]   conf_pci_img_ctrl3_out ;
  1092. wire    [1:0]   conf_pci_img_ctrl4_out ;
  1093. wire    [1:0]   conf_pci_img_ctrl5_out ;
  1095. wire    [19:(20 - `WB_NUM_OF_DEC_ADDR_LINES)]  conf_wb_ba0_out ;
  1096. wire    [19:(20 - `WB_NUM_OF_DEC_ADDR_LINES)]  conf_wb_ba1_out ;
  1097. wire    [19:(20 - `WB_NUM_OF_DEC_ADDR_LINES)]  conf_wb_ba2_out ;
  1098. wire    [19:(20 - `WB_NUM_OF_DEC_ADDR_LINES)]  conf_wb_ba3_out ;
  1099. wire    [19:(20 - `WB_NUM_OF_DEC_ADDR_LINES)]  conf_wb_ba4_out ;
  1100. wire    [19:(20 - `WB_NUM_OF_DEC_ADDR_LINES)]  conf_wb_ba5_out ;
  1102. wire            conf_wb_mem_io0_out ;
  1103. wire            conf_wb_mem_io1_out ;
  1104. wire            conf_wb_mem_io2_out ;
  1105. wire            conf_wb_mem_io3_out ;
  1106. wire            conf_wb_mem_io4_out ;
  1107. wire            conf_wb_mem_io5_out ;
  1109. wire    [19:(20 - `WB_NUM_OF_DEC_ADDR_LINES)]  conf_wb_am0_out ;
  1110. wire    [19:(20 - `WB_NUM_OF_DEC_ADDR_LINES)]  conf_wb_am1_out ;
  1111. wire    [19:(20 - `WB_NUM_OF_DEC_ADDR_LINES)]  conf_wb_am2_out ;
  1112. wire    [19:(20 - `WB_NUM_OF_DEC_ADDR_LINES)]  conf_wb_am3_out ;
  1113. wire    [19:(20 - `WB_NUM_OF_DEC_ADDR_LINES)]  conf_wb_am4_out ;
  1114. wire    [19:(20 - `WB_NUM_OF_DEC_ADDR_LINES)]  conf_wb_am5_out ;
  1115. wire    [19:(20 - `WB_NUM_OF_DEC_ADDR_LINES)]  conf_wb_ta0_out ;
  1116. wire    [19:(20 - `WB_NUM_OF_DEC_ADDR_LINES)]  conf_wb_ta1_out ;
  1117. wire    [19:(20 - `WB_NUM_OF_DEC_ADDR_LINES)]  conf_wb_ta2_out ;
  1118. wire    [19:(20 - `WB_NUM_OF_DEC_ADDR_LINES)]  conf_wb_ta3_out ;
  1119. wire    [19:(20 - `WB_NUM_OF_DEC_ADDR_LINES)]  conf_wb_ta4_out ;
  1120. wire    [19:(20 - `WB_NUM_OF_DEC_ADDR_LINES)]  conf_wb_ta5_out ;
  1121. wire    [2:0]   conf_wb_img_ctrl0_out ;
  1122. wire    [2:0]   conf_wb_img_ctrl1_out ;
  1123. wire    [2:0]   conf_wb_img_ctrl2_out ;
  1124. wire    [2:0]   conf_wb_img_ctrl3_out ;
  1125. wire    [2:0]   conf_wb_img_ctrl4_out ;
  1126. wire    [2:0]   conf_wb_img_ctrl5_out ;
  1127. wire    [23:0]  conf_ccyc_addr_out ;
  1128. wire            conf_soft_res_out ;
  1129. wire            conf_int_out ;
  1130. wire            conf_wb_init_complete_out  ;
  1131. wire            conf_pci_init_complete_out ;
  1133. // PCI IO MUX OUTPUTS
  1134. wire        pci_mux_frame_out ;
  1135. wire        pci_mux_irdy_out ;
  1136. wire        pci_mux_devsel_out ;
  1137. wire        pci_mux_trdy_out ;
  1138. wire        pci_mux_stop_out ;
  1139. wire [3:0]  pci_mux_cbe_out ;
  1140. wire [31:0] pci_mux_ad_out ;
  1141. wire        pci_mux_ad_load_out ;
  1143. wire [31:0] pci_mux_ad_en_out ;
  1144. wire        pci_mux_ad_en_unregistered_out ;
  1145. wire        pci_mux_frame_en_out ;
  1146. wire        pci_mux_irdy_en_out ;
  1147. wire        pci_mux_devsel_en_out ;
  1148. wire        pci_mux_trdy_en_out ;
  1149. wire        pci_mux_stop_en_out ;
  1150. wire [3:0]  pci_mux_cbe_en_out ;
  1152. wire        pci_mux_par_out ;
  1153. wire        pci_mux_par_en_out ;
  1154. wire        pci_mux_perr_out ;
  1155. wire        pci_mux_perr_en_out ;
  1156. wire        pci_mux_serr_out ;
  1157. wire        pci_mux_serr_en_out ;
  1159. wire        pci_mux_req_out ;
  1160. wire        pci_mux_req_en_out ;
  1162. // assign outputs to top level outputs
  1164. assign pci_ad_oe_o       = pci_mux_ad_en_out ;
  1165. assign pci_frame_oe_o   = pci_mux_frame_en_out ;
  1166. assign pci_irdy_oe_o    = pci_mux_irdy_en_out ;
  1167. assign pci_cbe_oe_o     = pci_mux_cbe_en_out ;
  1169. assign pci_par_o         =   pci_mux_par_out ;
  1170. assign pci_par_oe_o      =   pci_mux_par_en_out ;
  1171. assign pci_perr_o       =   pci_mux_perr_out ;
  1172. assign pci_perr_oe_o    =   pci_mux_perr_en_out ;
  1173. assign pci_serr_o       =   pci_mux_serr_out ;
  1174. assign pci_serr_oe_o    =   pci_mux_serr_en_out ;
  1176. assign pci_req_o        =   pci_mux_req_out ;
  1177. assign pci_req_oe_o     =   pci_mux_req_en_out ;
  1179. assign pci_trdy_oe_o    = pci_mux_trdy_en_out ;
  1180. assign pci_devsel_oe_o  = pci_mux_devsel_en_out ;
  1181. assign pci_stop_oe_o    = pci_mux_stop_en_out ;
  1182. assign pci_trdy_o       =  pci_mux_trdy_out ;
  1183. assign pci_devsel_o     = pci_mux_devsel_out ;
  1184. assign pci_stop_o       = pci_mux_stop_out ;
  1186. assign pci_ad_o          = pci_mux_ad_out ;
  1187. assign pci_frame_o      = pci_mux_frame_out ;
  1188. assign pci_irdy_o       = pci_mux_irdy_out ;
  1189. assign pci_cbe_o        = pci_mux_cbe_out ;
  1191. // duplicate output register's outputs
  1192. wire            out_bckp_frame_out ;
  1193. wire            out_bckp_irdy_out ;
  1194. wire            out_bckp_devsel_out ;
  1195. wire            out_bckp_trdy_out ;
  1196. wire            out_bckp_stop_out ;
  1197. wire    [3:0]   out_bckp_cbe_out ;
  1198. wire            out_bckp_cbe_en_out ;
  1199. wire    [31:0]  out_bckp_ad_out ;
  1200. wire            out_bckp_ad_en_out ;
  1201. wire            out_bckp_irdy_en_out ;
  1202. wire            out_bckp_frame_en_out ;
  1203. wire            out_bckp_tar_ad_en_out ;
  1204. wire            out_bckp_mas_ad_en_out ;
  1205. wire            out_bckp_trdy_en_out ;
  1207. wire            out_bckp_par_out ;
  1208. wire            out_bckp_par_en_out ;
  1209. wire            out_bckp_perr_out ;
  1210. wire            out_bckp_perr_en_out ;
  1211. wire            out_bckp_serr_out ;
  1212. wire            out_bckp_serr_en_out ;
  1214. wire            int_pci_frame   = out_bckp_frame_en_out ? out_bckp_frame_out  : pci_frame_i     ;
  1215. wire            int_pci_irdy    = out_bckp_irdy_en_out  ? out_bckp_irdy_out   : pci_irdy_i      ;
  1216. wire            int_pci_devsel  = out_bckp_trdy_en_out  ? out_bckp_devsel_out : pci_devsel_i    ;
  1217. wire            int_pci_trdy    = out_bckp_trdy_en_out  ? out_bckp_trdy_out   : pci_trdy_i      ;
  1218. wire            int_pci_stop    = out_bckp_trdy_en_out  ? out_bckp_stop_out   : pci_stop_i      ;
  1219. wire    [ 3: 0] int_pci_cbe     = out_bckp_cbe_en_out   ? out_bckp_cbe_out    : pci_cbe_i       ;
  1220. wire            int_pci_par     = out_bckp_par_en_out   ? out_bckp_par_out    : pci_par_i       ;
  1221. wire            int_pci_perr    = out_bckp_perr_en_out  ? out_bckp_perr_out   : pci_perr_i      ;
  1222. // PARITY CHECKER OUTPUTS
  1223. wire    parchk_pci_par_out ;
  1224. wire    parchk_pci_par_en_out ;
  1225. wire    parchk_pci_perr_out ;
  1226. wire    parchk_pci_perr_en_out ;
  1227. wire    parchk_pci_serr_out ;
  1228. wire    parchk_pci_serr_en_out ;
  1229. wire    parchk_par_err_detect_out ;
  1230. wire    parchk_perr_mas_detect_out ;
  1231. wire    parchk_sig_serr_out ;
  1233. // input register outputs
  1234. wire            in_reg_gnt_out ;
  1235. wire            in_reg_frame_out ;
  1236. wire            in_reg_irdy_out ;
  1237. wire            in_reg_trdy_out ;
  1238. wire            in_reg_stop_out ;
  1239. wire            in_reg_devsel_out ;
  1240. wire            in_reg_idsel_out ;
  1241. wire    [31:0]  in_reg_ad_out ;
  1242. wire    [3:0]   in_reg_cbe_out ;
  1244. /*=========================================================================================================
  1245. Now comes definition of all modules' and their appropriate inputs
  1246. =========================================================================================================*/
  1247. // PCI BRIDGE RESET AND INTERRUPT LOGIC INPUTS
  1248. wire    pci_resi_rst_i                  = wb_rst_i ;
  1249. wire    pci_resi_pci_rstn_in            = pci_rst_i ;
  1250. wire    pci_resi_conf_soft_res_in       = conf_soft_res_out ;
  1251. wire    pci_inti_pci_intan_in           = pci_inta_i ;
  1252. wire    pci_inti_conf_int_in            = conf_int_out ;
  1253. wire    pci_inti_int_i                  = wb_int_i ;
  1254. wire    pci_into_init_complete_in       = conf_pci_init_complete_out ;
  1256. pci_rst_int pci_resets_and_interrupts
  1257. (
  1258.     .clk_in                 (pci_clk),
  1259.     .rst_i                  (pci_resi_rst_i),
  1260.     .pci_rstn_in            (pci_resi_pci_rstn_in),
  1261.     .conf_soft_res_in       (pci_resi_conf_soft_res_in),
  1262.     .reset                  (pci_reso_reset),
  1263.     .pci_rstn_out           (pci_reso_pci_rstn_out),
  1264.     .pci_rstn_en_out        (pci_reso_pci_rstn_en_out),
  1265.     .rst_o                  (pci_reso_rst_o),
  1266.     .pci_intan_in           (pci_inti_pci_intan_in),
  1267.     .conf_int_in            (pci_inti_conf_int_in),
  1268.     .int_i                  (pci_inti_int_i),
  1269.     .pci_intan_out          (pci_into_pci_intan_out),
  1270.     .pci_intan_en_out       (pci_into_pci_intan_en_out),
  1271.     .int_o                  (pci_into_int_o),
  1272.     .conf_isr_int_prop_out  (pci_into_conf_isr_int_prop_out),
  1273.     .init_complete_in       (pci_into_init_complete_in)
  1274. );
  1277. `ifdef PCI_WB_REV_B3
  1279. wire            wbs_wbb3_2_wbb2_cyc_o   ;
  1280. wire            wbs_wbb3_2_wbb2_stb_o   ;
  1281. wire    [31:0]  wbs_wbb3_2_wbb2_adr_o   ;
  1282. wire    [31:0]  wbs_wbb3_2_wbb2_dat_i_o ;
  1283. wire    [31:0]  wbs_wbb3_2_wbb2_dat_o_o ;
  1284. wire            wbs_wbb3_2_wbb2_we_o    ;
  1285. wire    [ 3:0]  wbs_wbb3_2_wbb2_sel_o   ;
  1286. wire            wbs_wbb3_2_wbb2_ack_o   ;
  1287. wire            wbs_wbb3_2_wbb2_err_o   ;
  1288. wire            wbs_wbb3_2_wbb2_rty_o   ;
  1289. wire            wbs_wbb3_2_wbb2_cab_o   ;
  1291. // assign wishbone slave unit's outputs to top outputs where possible
  1292. assign wbs_dat_o    =   wbs_wbb3_2_wbb2_dat_o_o ;
  1293. assign wbs_ack_o    =   wbs_wbb3_2_wbb2_ack_o   ;
  1294. assign wbs_rty_o    =   wbs_wbb3_2_wbb2_rty_o   ;
  1295. assign wbs_err_o    =   wbs_wbb3_2_wbb2_err_o       ;
  1297. wire            wbs_wbb3_2_wbb2_cyc_i   =   wbs_cyc_i       ;
  1298. wire            wbs_wbb3_2_wbb2_stb_i   =   wbs_stb_i       ;
  1299. wire            wbs_wbb3_2_wbb2_we_i    =   wbs_we_i        ;
  1300. wire            wbs_wbb3_2_wbb2_ack_i   =   wbu_ack_out     ;
  1301. wire            wbs_wbb3_2_wbb2_err_i   =   wbu_err_out     ;
  1302. wire            wbs_wbb3_2_wbb2_rty_i   =   wbu_rty_out     ;
  1303. wire    [31:0]  wbs_wbb3_2_wbb2_adr_i   =   wbs_adr_i       ;
  1304. wire    [ 3:0]  wbs_wbb3_2_wbb2_sel_i   =   wbs_sel_i       ;
  1305. wire    [31:0]  wbs_wbb3_2_wbb2_dat_i_i =   wbs_dat_i       ;
  1306. wire    [31:0]  wbs_wbb3_2_wbb2_dat_o_i =   wbu_sdata_out   ;
  1307. wire    [ 2:0]  wbs_wbb3_2_wbb2_cti_i   =   wbs_cti_i       ;
  1308. wire    [ 1:0]  wbs_wbb3_2_wbb2_bte_i   =   wbs_bte_i       ;
  1310. pci_wbs_wbb3_2_wbb2 i_pci_wbs_wbb3_2_wbb2
  1311. (
  1312.     .wb_clk_i           (   wb_clk_i    )   ,
  1313.     .wb_rst_i           (   reset       )   ,
  1314.                         
  1315.     .wbs_cyc_i          (   wbs_wbb3_2_wbb2_cyc_i       )   ,
  1316.     .wbs_cyc_o          (   wbs_wbb3_2_wbb2_cyc_o       )   ,
  1317.     .wbs_stb_i          (   wbs_wbb3_2_wbb2_stb_i       )   ,
  1318.     .wbs_stb_o          (   wbs_wbb3_2_wbb2_stb_o       )   ,
  1319.     .wbs_adr_i          (   wbs_wbb3_2_wbb2_adr_i       )   ,
  1320.     .wbs_adr_o          (   wbs_wbb3_2_wbb2_adr_o       )   ,
  1321.     .wbs_dat_i_i        (   wbs_wbb3_2_wbb2_dat_i_i     )   ,
  1322.     .wbs_dat_i_o        (   wbs_wbb3_2_wbb2_dat_i_o     )   ,
  1323.     .wbs_dat_o_i        (   wbs_wbb3_2_wbb2_dat_o_i     )   ,
  1324.     .wbs_dat_o_o        (   wbs_wbb3_2_wbb2_dat_o_o     )   ,
  1325.     .wbs_we_i           (   wbs_wbb3_2_wbb2_we_i        )   ,
  1326.     .wbs_we_o           (   wbs_wbb3_2_wbb2_we_o        )   ,
  1327.     .wbs_sel_i          (   wbs_wbb3_2_wbb2_sel_i       )   ,
  1328.     .wbs_sel_o          (   wbs_wbb3_2_wbb2_sel_o       )   ,
  1329.     .wbs_ack_i          (   wbs_wbb3_2_wbb2_ack_i       )   ,
  1330.     .wbs_ack_o          (   wbs_wbb3_2_wbb2_ack_o       )   ,
  1331.     .wbs_err_i          (   wbs_wbb3_2_wbb2_err_i       )   ,
  1332.     .wbs_err_o          (   wbs_wbb3_2_wbb2_err_o       )   ,
  1333.     .wbs_rty_i          (   wbs_wbb3_2_wbb2_rty_i       )   ,
  1334.     .wbs_rty_o          (   wbs_wbb3_2_wbb2_rty_o       )   ,
  1335.     .wbs_cti_i          (   wbs_wbb3_2_wbb2_cti_i       )   ,
  1336.     .wbs_bte_i          (   wbs_wbb3_2_wbb2_bte_i       )   ,
  1337.     .wbs_cab_o          (   wbs_wbb3_2_wbb2_cab_o       )   ,
  1338.     .wb_init_complete_i (   conf_wb_init_complete_out   )
  1339. ) ;
  1341. // WISHBONE SLAVE UNIT INPUTS
  1342. wire    [31:0]  wbu_addr_in     =   wbs_wbb3_2_wbb2_adr_o   ;
  1343. wire    [31:0]  wbu_sdata_in    =   wbs_wbb3_2_wbb2_dat_i_o ;
  1344. wire            wbu_cyc_in      =   wbs_wbb3_2_wbb2_cyc_o   ;
  1345. wire            wbu_stb_in      =   wbs_wbb3_2_wbb2_stb_o   ;
  1346. wire            wbu_we_in       =   wbs_wbb3_2_wbb2_we_o    ;
  1347. wire    [3:0]   wbu_sel_in      =   wbs_wbb3_2_wbb2_sel_o   ;
  1348. wire            wbu_cab_in      =   wbs_wbb3_2_wbb2_cab_o   ;
  1350. `else
  1352. // WISHBONE SLAVE UNIT INPUTS
  1353. wire    [31:0]  wbu_addr_in                     =   wbs_adr_i ;
  1354. wire    [31:0]  wbu_sdata_in                    =   wbs_dat_i ;
  1355. wire            wbu_cyc_in                      =   wbs_cyc_i ;
  1356. wire            wbu_stb_in                      =   wbs_stb_i ;
  1357. wire            wbu_we_in                       =   wbs_we_i ;
  1358. wire    [3:0]   wbu_sel_in                      =   wbs_sel_i ;
  1359. wire            wbu_cab_in                      =   wbs_cab_i ;
  1361. // assign wishbone slave unit's outputs to top outputs where possible
  1362. assign wbs_dat_o    =   wbu_sdata_out   ;
  1363. assign wbs_ack_o    =   wbu_ack_out     ;
  1364. assign wbs_rty_o    =   wbu_rty_out     ;
  1365. assign wbs_err_o    =   wbu_err_out     ;
  1367. `endif
  1369. wire    [5:0]   wbu_map_in                      =   {
  1370.                                                      conf_wb_mem_io5_out,
  1371.                                                      conf_wb_mem_io4_out,
  1372.                                                      conf_wb_mem_io3_out,
  1373.                                                      conf_wb_mem_io2_out,
  1374.                                                      conf_wb_mem_io1_out,
  1375.                                                      conf_wb_mem_io0_out
  1376.                                                     } ;
  1378. wire    [5:0]   wbu_pref_en_in                  =   {
  1379.                                                      conf_wb_img_ctrl5_out[1],
  1380.                                                      conf_wb_img_ctrl4_out[1],
  1381.                                                      conf_wb_img_ctrl3_out[1],
  1382.                                                      conf_wb_img_ctrl2_out[1],
  1383.                                                      conf_wb_img_ctrl1_out[1],
  1384.                                                      conf_wb_img_ctrl0_out[1]
  1385.                                                     };
  1386. wire    [5:0]   wbu_mrl_en_in                   =   {
  1387.                                                      conf_wb_img_ctrl5_out[0],
  1388.                                                      conf_wb_img_ctrl4_out[0],
  1389.                                                      conf_wb_img_ctrl3_out[0],
  1390.                                                      conf_wb_img_ctrl2_out[0],
  1391.                                                      conf_wb_img_ctrl1_out[0],
  1392.                                                      conf_wb_img_ctrl0_out[0]
  1393.                                                     };
  1395. wire    [5:0]   wbu_at_en_in                    =   {
  1396.                                                      conf_wb_img_ctrl5_out[2],
  1397.                                                      conf_wb_img_ctrl4_out[2],
  1398.                                                      conf_wb_img_ctrl3_out[2],
  1399.                                                      conf_wb_img_ctrl2_out[2],
  1400.                                                      conf_wb_img_ctrl1_out[2],
  1401.                                                      conf_wb_img_ctrl0_out[2]
  1402.                                                     } ;
  1404. wire            wbu_pci_drcomp_pending_in       =   pciu_pci_drcomp_pending_out ;
  1405. wire            wbu_pciw_empty_in               =   pciu_pciw_fifo_empty_out ;
  1407. `ifdef HOST
  1408.     wire    [31:0]  wbu_conf_data_in            =   conf_w_data_out ;
  1409. `else
  1410. `ifdef GUEST
  1411.     wire    [31:0]  wbu_conf_data_in            =   conf_r_data_out ;
  1412. `endif
  1413. `endif
  1415. wire   [(`WB_NUM_OF_DEC_ADDR_LINES - 1):0] wbu_bar0_in  =   conf_wb_ba0_out ;
  1416. wire   [(`WB_NUM_OF_DEC_ADDR_LINES - 1):0] wbu_bar1_in  =   conf_wb_ba1_out ;
  1417. wire   [(`WB_NUM_OF_DEC_ADDR_LINES - 1):0] wbu_bar2_in  =   conf_wb_ba2_out ;
  1418. wire   [(`WB_NUM_OF_DEC_ADDR_LINES - 1):0] wbu_bar3_in  =   conf_wb_ba3_out ;
  1419. wire   [(`WB_NUM_OF_DEC_ADDR_LINES - 1):0] wbu_bar4_in  =   conf_wb_ba4_out ;
  1420. wire   [(`WB_NUM_OF_DEC_ADDR_LINES - 1):0] wbu_bar5_in  =   conf_wb_ba5_out ;
  1421. wire   [(`WB_NUM_OF_DEC_ADDR_LINES - 1):0] wbu_am0_in   =   conf_wb_am0_out ;
  1422. wire   [(`WB_NUM_OF_DEC_ADDR_LINES - 1):0] wbu_am1_in   =   conf_wb_am1_out ;
  1423. wire   [(`WB_NUM_OF_DEC_ADDR_LINES - 1):0] wbu_am2_in   =   conf_wb_am2_out ;
  1424. wire   [(`WB_NUM_OF_DEC_ADDR_LINES - 1):0] wbu_am3_in   =   conf_wb_am3_out ;
  1425. wire   [(`WB_NUM_OF_DEC_ADDR_LINES - 1):0] wbu_am4_in   =   conf_wb_am4_out ;
  1426. wire   [(`WB_NUM_OF_DEC_ADDR_LINES - 1):0] wbu_am5_in   =   conf_wb_am5_out ;
  1427. wire   [(`WB_NUM_OF_DEC_ADDR_LINES - 1):0] wbu_ta0_in   =   conf_wb_ta0_out ;
  1428. wire   [(`WB_NUM_OF_DEC_ADDR_LINES - 1):0] wbu_ta1_in   =   conf_wb_ta1_out ;
  1429. wire   [(`WB_NUM_OF_DEC_ADDR_LINES - 1):0] wbu_ta2_in   =   conf_wb_ta2_out ;
  1430. wire   [(`WB_NUM_OF_DEC_ADDR_LINES - 1):0] wbu_ta3_in   =   conf_wb_ta3_out ;
  1431. wire   [(`WB_NUM_OF_DEC_ADDR_LINES - 1):0] wbu_ta4_in   =   conf_wb_ta4_out ;
  1432. wire   [(`WB_NUM_OF_DEC_ADDR_LINES - 1):0] wbu_ta5_in   =   conf_wb_ta5_out ;
  1434. wire    [23:0]  wbu_ccyc_addr_in                        =   conf_ccyc_addr_out ;
  1435. wire            wbu_master_enable_in                    =   conf_pci_master_enable_out ;
  1436. wire            wbu_cache_line_size_not_zero            =   conf_cache_lsize_not_zero_to_wb_out ;
  1437. wire    [7:0]   wbu_cache_line_size_in                  =   conf_cache_line_size_to_pci_out ;
  1439. wire            wbu_pciif_gnt_in                        = pci_gnt_i ;
  1440. wire            wbu_pciif_frame_in                      = in_reg_frame_out ;
  1441. wire            wbu_pciif_irdy_in                       = in_reg_irdy_out ;
  1442. wire            wbu_pciif_trdy_in                       = int_pci_trdy  ;
  1443. wire            wbu_pciif_stop_in                       = int_pci_stop  ;
  1444. wire            wbu_pciif_devsel_in                     = int_pci_devsel ;
  1445. wire    [31:0]  wbu_pciif_ad_reg_in                     = in_reg_ad_out ;
  1446. wire            wbu_pciif_trdy_reg_in                   = in_reg_trdy_out ;
  1447. wire            wbu_pciif_stop_reg_in                   = in_reg_stop_out ;
  1448. wire            wbu_pciif_devsel_reg_in                 = in_reg_devsel_out ;
  1451. wire    [7:0]   wbu_latency_tim_val_in                  = conf_latency_tim_out ;
  1453. wire            wbu_pciif_frame_en_in                   = out_bckp_frame_en_out ;
  1454. wire            wbu_pciif_frame_out_in                  = out_bckp_frame_out ;
  1455. wire            wbu_wb_init_complete_in                 = conf_wb_init_complete_out ;
  1457. pci_wb_slave_unit wishbone_slave_unit
  1458. (
  1459.     .reset_in                      (reset),
  1460.     .wb_clock_in                   (wb_clk),
  1461.     .pci_clock_in                  (pci_clk),
  1462.     .ADDR_I                        (wbu_addr_in),
  1463.     .SDATA_I                       (wbu_sdata_in),
  1464.     .SDATA_O                       (wbu_sdata_out),
  1465.     .CYC_I                         (wbu_cyc_in),
  1466.     .STB_I                         (wbu_stb_in),
  1467.     .WE_I                          (wbu_we_in),
  1468.     .SEL_I                         (wbu_sel_in),
  1469.     .ACK_O                         (wbu_ack_out),
  1470.     .RTY_O                         (wbu_rty_out),
  1471.     .ERR_O                         (wbu_err_out),
  1472.     .CAB_I                         (wbu_cab_in),
  1473.     .wbu_map_in                    (wbu_map_in),
  1474.     .wbu_pref_en_in                (wbu_pref_en_in),
  1475.     .wbu_mrl_en_in                 (wbu_mrl_en_in),
  1476.     .wbu_pci_drcomp_pending_in     (wbu_pci_drcomp_pending_in),
  1477.     .wbu_conf_data_in              (wbu_conf_data_in),
  1478.     .wbu_pciw_empty_in             (wbu_pciw_empty_in),
  1479.     .wbu_bar0_in                   (wbu_bar0_in),
  1480.     .wbu_bar1_in                   (wbu_bar1_in),
  1481.     .wbu_bar2_in                   (wbu_bar2_in),
  1482.     .wbu_bar3_in                   (wbu_bar3_in),
  1483.     .wbu_bar4_in                   (wbu_bar4_in),
  1484.     .wbu_bar5_in                   (wbu_bar5_in),
  1485.     .wbu_am0_in                    (wbu_am0_in),
  1486.     .wbu_am1_in                    (wbu_am1_in),
  1487.     .wbu_am2_in                    (wbu_am2_in),
  1488.     .wbu_am3_in                    (wbu_am3_in),
  1489.     .wbu_am4_in                    (wbu_am4_in),
  1490.     .wbu_am5_in                    (wbu_am5_in),
  1491.     .wbu_ta0_in                    (wbu_ta0_in),
  1492.     .wbu_ta1_in                    (wbu_ta1_in),
  1493.     .wbu_ta2_in                    (wbu_ta2_in),
  1494.     .wbu_ta3_in                    (wbu_ta3_in),
  1495.     .wbu_ta4_in                    (wbu_ta4_in),
  1496.     .wbu_ta5_in                    (wbu_ta5_in),
  1497.     .wbu_at_en_in                  (wbu_at_en_in),
  1498.     .wbu_ccyc_addr_in              (wbu_ccyc_addr_in),
  1499.     .wbu_master_enable_in          (wbu_master_enable_in),
  1500.     .wb_init_complete_in           (wbu_wb_init_complete_in),
  1501.     .wbu_cache_line_size_not_zero  (wbu_cache_line_size_not_zero),
  1502.     .wbu_cache_line_size_in        (wbu_cache_line_size_in),
  1503.     .wbu_pciif_gnt_in              (wbu_pciif_gnt_in),
  1504.     .wbu_pciif_frame_in            (wbu_pciif_frame_in),
  1505.     .wbu_pciif_frame_en_in         (wbu_pciif_frame_en_in),
  1506.     .wbu_pciif_frame_out_in        (wbu_pciif_frame_out_in),
  1507.     .wbu_pciif_irdy_in             (wbu_pciif_irdy_in),
  1508.     .wbu_pciif_trdy_in             (wbu_pciif_trdy_in),
  1509.     .wbu_pciif_stop_in             (wbu_pciif_stop_in),
  1510.     .wbu_pciif_devsel_in           (wbu_pciif_devsel_in),
  1511.     .wbu_pciif_ad_reg_in           (wbu_pciif_ad_reg_in),
  1512.     .wbu_pciif_req_out             (wbu_pciif_req_out),
  1513.     .wbu_pciif_frame_out           (wbu_pciif_frame_out),
  1514.     .wbu_pciif_frame_en_out        (wbu_pciif_frame_en_out),
  1515.     .wbu_pciif_frame_load_out      (wbu_pciif_frame_load_out),
  1516.     .wbu_pciif_irdy_out            (wbu_pciif_irdy_out),
  1517.     .wbu_pciif_irdy_en_out         (wbu_pciif_irdy_en_out),
  1518.     .wbu_pciif_ad_out              (wbu_pciif_ad_out),
  1519.     .wbu_pciif_ad_en_out           (wbu_pciif_ad_en_out),
  1520.     .wbu_pciif_cbe_out             (wbu_pciif_cbe_out),
  1521.     .wbu_pciif_cbe_en_out          (wbu_pciif_cbe_en_out),
  1522.     .wbu_err_addr_out              (wbu_err_addr_out),
  1523.     .wbu_err_bc_out                (wbu_err_bc_out),
  1524.     .wbu_err_signal_out            (wbu_err_signal_out),
  1525.     .wbu_err_source_out            (wbu_err_source_out),
  1526.     .wbu_err_rty_exp_out           (wbu_err_rty_exp_out),
  1527.     .wbu_tabort_rec_out            (wbu_tabort_rec_out),
  1528.     .wbu_mabort_rec_out            (wbu_mabort_rec_out),
  1529.     .wbu_conf_offset_out           (wbu_conf_offset_out),
  1530.     .wbu_conf_renable_out          (wbu_conf_renable_out),
  1531.     .wbu_conf_wenable_out          (wbu_conf_wenable_out),
  1532.     .wbu_conf_be_out               (wbu_conf_be_out),
  1533.     .wbu_conf_data_out             (wbu_conf_data_out),
  1534.     .wbu_del_read_comp_pending_out (wbu_del_read_comp_pending_out),
  1535.     .wbu_wbw_fifo_empty_out        (wbu_wbw_fifo_empty_out),
  1536.     .wbu_latency_tim_val_in        (wbu_latency_tim_val_in),
  1537.     .wbu_ad_load_out               (wbu_ad_load_out),
  1538.     .wbu_ad_load_on_transfer_out   (wbu_ad_load_on_transfer_out),
  1539.     .wbu_pciif_trdy_reg_in         (wbu_pciif_trdy_reg_in),
  1540.     .wbu_pciif_stop_reg_in         (wbu_pciif_stop_reg_in),
  1541.     .wbu_pciif_devsel_reg_in       (wbu_pciif_devsel_reg_in)
  1543. `ifdef PCI_BIST
  1544.     ,
  1545.     .mbist_si_i       (mbist_si_i),
  1546.     .mbist_so_o       (mbist_so_o_internal),
  1547.     .mbist_ctrl_i       (mbist_ctrl_i)
  1548. `endif
  1549. );
  1551. // PCI TARGET UNIT INPUTS
  1552. wire    [31:0]  pciu_mdata_in                   =   wbm_dat_i ;
  1553. wire            pciu_ack_in                     =   wbm_ack_i ;
  1554. wire            pciu_rty_in                     =   wbm_rty_i ;
  1555. wire            pciu_err_in                     =   wbm_err_i ;
  1557. wire    [5:0]   pciu_map_in                     =   {
  1558.                                                      conf_pci_mem_io5_out,
  1559.                                                      conf_pci_mem_io4_out,
  1560.                                                      conf_pci_mem_io3_out,
  1561.                                                      conf_pci_mem_io2_out,
  1562.                                                      conf_pci_mem_io1_out,
  1563.                                                      conf_pci_mem_io0_out
  1564.                                                     } ;
  1566. wire    [5:0]   pciu_pref_en_in                 =   {
  1567.                                                      conf_pci_img_ctrl5_out[0],
  1568.                                                      conf_pci_img_ctrl4_out[0],
  1569.                                                      conf_pci_img_ctrl3_out[0],
  1570.                                                      conf_pci_img_ctrl2_out[0],
  1571.                                                      conf_pci_img_ctrl1_out[0],
  1572.                                                      conf_pci_img_ctrl0_out[0]
  1573.                                                     };
  1575. wire    [5:0]   pciu_at_en_in                   =   {
  1576.                                                      conf_pci_img_ctrl5_out[1],
  1577.                                                      conf_pci_img_ctrl4_out[1],
  1578.                                                      conf_pci_img_ctrl3_out[1],
  1579.                                                      conf_pci_img_ctrl2_out[1],
  1580.                                                      conf_pci_img_ctrl1_out[1],
  1581.                                                      conf_pci_img_ctrl0_out[1]
  1582.                                                     } ;
  1584. wire            pciu_mem_enable_in              =   conf_mem_space_enable_out ;
  1585. wire            pciu_io_enable_in               =   conf_io_space_enable_out ;
  1587. wire            pciu_wbw_fifo_empty_in          =   wbu_wbw_fifo_empty_out ;
  1588. wire pciu_wbu_del_read_comp_pending_in = wbu_del_read_comp_pending_out ;
  1589. wire            pciu_wbu_frame_en_in            =   out_bckp_frame_en_out ;
  1591. `ifdef HOST
  1592.     wire    [31:0]  pciu_conf_data_in           =   conf_r_data_out ;
  1593. `else
  1594. `ifdef GUEST
  1595.     wire    [31:0]  pciu_conf_data_in           =   conf_w_data_out ;
  1596. `endif
  1597. `endif
  1599. wire    [pci_ba0_width   - 1:0] pciu_bar0_in =   conf_pci_ba0_out    ;
  1600. wire    [pci_ba1_5_width - 1:0] pciu_bar1_in =   conf_pci_ba1_out ;
  1601. wire    [pci_ba1_5_width - 1:0] pciu_bar2_in =   conf_pci_ba2_out ;
  1602. wire    [pci_ba1_5_width - 1:0] pciu_bar3_in =   conf_pci_ba3_out ;
  1603. wire    [pci_ba1_5_width - 1:0] pciu_bar4_in =   conf_pci_ba4_out ;
  1604. wire    [pci_ba1_5_width - 1:0] pciu_bar5_in =   conf_pci_ba5_out ;
  1605. wire    [pci_ba1_5_width - 1:0] pciu_am0_in  =   conf_pci_am0_out ;
  1606. wire    [pci_ba1_5_width - 1:0] pciu_am1_in  =   conf_pci_am1_out ;
  1607. wire    [pci_ba1_5_width - 1:0] pciu_am2_in  =   conf_pci_am2_out ;
  1608. wire    [pci_ba1_5_width - 1:0] pciu_am3_in  =   conf_pci_am3_out ;
  1609. wire    [pci_ba1_5_width - 1:0] pciu_am4_in  =   conf_pci_am4_out ;
  1610. wire    [pci_ba1_5_width - 1:0] pciu_am5_in  =   conf_pci_am5_out ;
  1611. wire    [pci_ba1_5_width - 1:0] pciu_ta0_in  =   conf_pci_ta0_out ;
  1612. wire    [pci_ba1_5_width - 1:0] pciu_ta1_in  =   conf_pci_ta1_out ;
  1613. wire    [pci_ba1_5_width - 1:0] pciu_ta2_in  =   conf_pci_ta2_out ;
  1614. wire    [pci_ba1_5_width - 1:0] pciu_ta3_in  =   conf_pci_ta3_out ;
  1615. wire    [pci_ba1_5_width - 1:0] pciu_ta4_in  =   conf_pci_ta4_out ;
  1616. wire    [pci_ba1_5_width - 1:0] pciu_ta5_in  =   conf_pci_ta5_out ;
  1618. wire    [7:0]   pciu_cache_line_size_in                 =   conf_cache_line_size_to_wb_out ;
  1619. wire            pciu_cache_lsize_not_zero_in            =   conf_cache_lsize_not_zero_to_wb_out ;
  1621. wire            pciu_pciif_frame_in                     =   int_pci_frame   ;
  1622. wire            pciu_pciif_irdy_in                      =   int_pci_irdy    ;
  1623. wire            pciu_pciif_idsel_in                     =   pci_idsel_i ;
  1624. wire            pciu_pciif_frame_reg_in                 =   in_reg_frame_out ;
  1625. wire            pciu_pciif_irdy_reg_in                  =   in_reg_irdy_out ;
  1626. wire            pciu_pciif_idsel_reg_in                 =   in_reg_idsel_out ;
  1627. wire    [31:0]  pciu_pciif_ad_reg_in                    =   in_reg_ad_out ;
  1628. wire    [3:0]   pciu_pciif_cbe_reg_in                   =   in_reg_cbe_out ;
  1629. wire    [3:0]   pciu_pciif_cbe_in                       =   int_pci_cbe ;
  1631. wire            pciu_pciif_bckp_trdy_en_in              =   out_bckp_trdy_en_out ;
  1632. wire            pciu_pciif_bckp_devsel_in               =   out_bckp_devsel_out ;
  1633. wire            pciu_pciif_bckp_trdy_in                 =   out_bckp_trdy_out ;
  1634. wire            pciu_pciif_bckp_stop_in                 =   out_bckp_stop_out ;
  1635. wire            pciu_pciif_trdy_reg_in                  =   in_reg_trdy_out ;
  1636. wire            pciu_pciif_stop_reg_in                  =   in_reg_stop_out ;
  1638. pci_target_unit pci_target_unit
  1639. (
  1640.     .reset_in                       (reset),
  1641.     .wb_clock_in                    (wb_clk),
  1642.     .pci_clock_in                   (pci_clk),
  1643.     .pciu_wbm_adr_o                 (pciu_adr_out),
  1644.     .pciu_wbm_dat_o                 (pciu_mdata_out),
  1645.     .pciu_wbm_dat_i                 (pciu_mdata_in),
  1646.     .pciu_wbm_cyc_o                 (pciu_cyc_out),
  1647.     .pciu_wbm_stb_o                 (pciu_stb_out),
  1648.     .pciu_wbm_we_o                  (pciu_we_out),
  1649.     .pciu_wbm_cti_o                 (pciu_cti_out),
  1650.     .pciu_wbm_bte_o                 (pciu_bte_out),
  1651.     .pciu_wbm_sel_o                 (pciu_sel_out),
  1652.     .pciu_wbm_ack_i                 (pciu_ack_in),
  1653.     .pciu_wbm_rty_i                 (pciu_rty_in),
  1654.     .pciu_wbm_err_i                 (pciu_err_in),
  1655.     .pciu_mem_enable_in             (pciu_mem_enable_in),
  1656.     .pciu_io_enable_in              (pciu_io_enable_in),
  1657.     .pciu_map_in                    (pciu_map_in),
  1658.     .pciu_pref_en_in                (pciu_pref_en_in),
  1659.     .pciu_conf_data_in              (pciu_conf_data_in),
  1660.     .pciu_wbw_fifo_empty_in         (pciu_wbw_fifo_empty_in),
  1661.     .pciu_wbu_del_read_comp_pending_in (pciu_wbu_del_read_comp_pending_in),
  1662.     .pciu_wbu_frame_en_in           (pciu_wbu_frame_en_in),
  1663.     .pciu_bar0_in                   (pciu_bar0_in),
  1664.     .pciu_bar1_in                   (pciu_bar1_in),
  1665.     .pciu_bar2_in                   (pciu_bar2_in),
  1666.     .pciu_bar3_in                   (pciu_bar3_in),
  1667.     .pciu_bar4_in                   (pciu_bar4_in),
  1668.     .pciu_bar5_in                   (pciu_bar5_in),
  1669.     .pciu_am0_in                    (pciu_am0_in),
  1670.     .pciu_am1_in                    (pciu_am1_in),
  1671.     .pciu_am2_in                    (pciu_am2_in),
  1672.     .pciu_am3_in                    (pciu_am3_in),
  1673.     .pciu_am4_in                    (pciu_am4_in),
  1674.     .pciu_am5_in                    (pciu_am5_in),
  1675.     .pciu_ta0_in                    (pciu_ta0_in),
  1676.     .pciu_ta1_in                    (pciu_ta1_in),
  1677.     .pciu_ta2_in                    (pciu_ta2_in),
  1678.     .pciu_ta3_in                    (pciu_ta3_in),
  1679.     .pciu_ta4_in                    (pciu_ta4_in),
  1680.     .pciu_ta5_in                    (pciu_ta5_in),
  1681.     .pciu_at_en_in                  (pciu_at_en_in),
  1682.     .pciu_cache_line_size_in        (pciu_cache_line_size_in),
  1683.     .pciu_cache_lsize_not_zero_in   (pciu_cache_lsize_not_zero_in),
  1684.     .pciu_pciif_frame_in            (pciu_pciif_frame_in),
  1685.     .pciu_pciif_irdy_in             (pciu_pciif_irdy_in),
  1686.     .pciu_pciif_idsel_in            (pciu_pciif_idsel_in),
  1687.     .pciu_pciif_frame_reg_in        (pciu_pciif_frame_reg_in),
  1688.     .pciu_pciif_irdy_reg_in         (pciu_pciif_irdy_reg_in),
  1689.     .pciu_pciif_idsel_reg_in        (pciu_pciif_idsel_reg_in),
  1690.     .pciu_pciif_ad_reg_in           (pciu_pciif_ad_reg_in),
  1691.     .pciu_pciif_cbe_reg_in          (pciu_pciif_cbe_reg_in),
  1692.     .pciu_pciif_cbe_in              (pciu_pciif_cbe_in),
  1693.     .pciu_pciif_bckp_trdy_en_in     (pciu_pciif_bckp_trdy_en_in),
  1694.     .pciu_pciif_bckp_devsel_in      (pciu_pciif_bckp_devsel_in),
  1695.     .pciu_pciif_bckp_trdy_in        (pciu_pciif_bckp_trdy_in),
  1696.     .pciu_pciif_bckp_stop_in        (pciu_pciif_bckp_stop_in),
  1697.     .pciu_pciif_trdy_reg_in         (pciu_pciif_trdy_reg_in),
  1698.     .pciu_pciif_stop_reg_in         (pciu_pciif_stop_reg_in),
  1699.     .pciu_pciif_trdy_out            (pciu_pciif_trdy_out),
  1700.     .pciu_pciif_stop_out            (pciu_pciif_stop_out),
  1701.     .pciu_pciif_devsel_out          (pciu_pciif_devsel_out),
  1702.     .pciu_pciif_trdy_en_out         (pciu_pciif_trdy_en_out),
  1703.     .pciu_pciif_stop_en_out         (pciu_pciif_stop_en_out),
  1704.     .pciu_pciif_devsel_en_out       (pciu_pciif_devsel_en_out),
  1705.     .pciu_ad_load_out               (pciu_ad_load_out),
  1706.     .pciu_ad_load_on_transfer_out   (pciu_ad_load_on_transfer_out),
  1707.     .pciu_pciif_ad_out              (pciu_pciif_ad_out),
  1708.     .pciu_pciif_ad_en_out           (pciu_pciif_ad_en_out),
  1709.     .pciu_pciif_tabort_set_out      (pciu_pciif_tabort_set_out),
  1710.     .pciu_err_addr_out              (pciu_err_addr_out),
  1711.     .pciu_err_bc_out                (pciu_err_bc_out),
  1712.     .pciu_err_data_out              (pciu_err_data_out),
  1713.     .pciu_err_be_out                (pciu_err_be_out),
  1714.     .pciu_err_signal_out            (pciu_err_signal_out),
  1715.     .pciu_err_source_out            (pciu_err_source_out),
  1716.     .pciu_err_rty_exp_out           (pciu_err_rty_exp_out),
  1717.     .pciu_conf_offset_out           (pciu_conf_offset_out),
  1718.     .pciu_conf_renable_out          (pciu_conf_renable_out),
  1719.     .pciu_conf_wenable_out          (pciu_conf_wenable_out),
  1720.     .pciu_conf_be_out               (pciu_conf_be_out),
  1721.     .pciu_conf_data_out             (pciu_conf_data_out),
  1722.     .pciu_pci_drcomp_pending_out    (pciu_pci_drcomp_pending_out),
  1723.     .pciu_pciw_fifo_empty_out       (pciu_pciw_fifo_empty_out)
  1725. `ifdef PCI_BIST
  1726.     ,
  1727.     .mbist_si_i       (mbist_so_o_internal),
  1728.     .mbist_so_o       (mbist_so_o),
  1729.     .mbist_ctrl_i       (mbist_ctrl_i)
  1730. `endif
  1731. );
  1734. // CONFIGURATION SPACE INPUTS
  1735. `ifdef HOST
  1737.     wire    [11:0]  conf_w_addr_in          =       wbu_conf_offset_out ;
  1738.     wire    [31:0]  conf_w_data_in          =       wbu_conf_data_out ;
  1739.     wire            conf_w_we_in            =       wbu_conf_wenable_out ;
  1740.     wire            conf_w_re_in            =       wbu_conf_renable_out ;
  1741.     wire    [3:0]   conf_w_be_in            =       wbu_conf_be_out     ;
  1742.     wire            conf_w_clock            =       wb_clk ;
  1743.     wire    [11:0]  conf_r_addr_in          =       pciu_conf_offset_out ;
  1744.     wire            conf_r_re_in            =       pciu_conf_renable_out ;
  1746. `else
  1747. `ifdef GUEST
  1749.     wire    [11:0]  conf_r_addr_in          =       wbu_conf_offset_out ;
  1750.     wire            conf_r_re_in            =       wbu_conf_renable_out ;
  1751.     wire            conf_w_clock            =       pci_clk ;
  1752.     wire    [11:0]  conf_w_addr_in          =       pciu_conf_offset_out ;
  1753.     wire    [31:0]  conf_w_data_in          =       pciu_conf_data_out ;
  1754.     wire            conf_w_we_in            =       pciu_conf_wenable_out ;
  1755.     wire            conf_w_re_in            =       pciu_conf_renable_out ;
  1756.     wire    [3:0]   conf_w_be_in            =       pciu_conf_be_out ;
  1758. `endif
  1759. `endif
  1762. wire            conf_perr_in                            =   parchk_par_err_detect_out ;
  1763. wire            conf_serr_in                            =   parchk_sig_serr_out ;
  1764. wire            conf_master_abort_recv_in               =   wbu_mabort_rec_out ;
  1765. wire            conf_target_abort_recv_in               =   wbu_tabort_rec_out ;
  1766. wire            conf_target_abort_set_in                =   pciu_pciif_tabort_set_out ;
  1768. wire            conf_master_data_par_err_in             =   parchk_perr_mas_detect_out ;
  1770. wire    [3:0]   conf_pci_err_be_in      = pciu_err_be_out ;
  1771. wire    [3:0]   conf_pci_err_bc_in      = pciu_err_bc_out;
  1772. wire            conf_pci_err_es_in      = pciu_err_source_out ;
  1773. wire            conf_pci_err_rty_exp_in = pciu_err_rty_exp_out ;
  1774. wire            conf_pci_err_sig_in     = pciu_err_signal_out ;
  1775. wire    [31:0]  conf_pci_err_addr_in    = pciu_err_addr_out ;
  1776. wire    [31:0]  conf_pci_err_data_in    = pciu_err_data_out ;
  1778. wire    [3:0]   conf_wb_err_be_in       =   out_bckp_cbe_out ;
  1779. wire    [3:0]   conf_wb_err_bc_in       =   wbu_err_bc_out ;
  1780. wire            conf_wb_err_rty_exp_in  =   wbu_err_rty_exp_out ;
  1781. wire            conf_wb_err_es_in       =   wbu_err_source_out ;
  1782. wire            conf_wb_err_sig_in      =   wbu_err_signal_out ;
  1783. wire    [31:0]  conf_wb_err_addr_in     =   wbu_err_addr_out ;
  1784. wire    [31:0]  conf_wb_err_data_in     =   out_bckp_ad_out ;
  1786. wire            conf_isr_int_prop_in    =   pci_into_conf_isr_int_prop_out ;
  1787. wire            conf_par_err_int_in     =   parchk_perr_mas_detect_out ;
  1788. wire            conf_sys_err_int_in     =   parchk_sig_serr_out ;
  1790. pci_conf_space configuration(
  1791.                                 .reset                      (reset),
  1792.                                 .pci_clk                    (pci_clk),
  1793.                                 .wb_clk                     (wb_clk),
  1794.                                 .w_conf_address_in          (conf_w_addr_in),
  1795.                                 .w_conf_data_in             (conf_w_data_in),
  1796.                                 .w_conf_data_out            (conf_w_data_out),
  1797.                                 .r_conf_address_in          (conf_r_addr_in),
  1798.                                 .r_conf_data_out            (conf_r_data_out),
  1799.                                 .w_we_i                     (conf_w_we_in),
  1800.                                 .w_re                       (conf_w_re_in),
  1801.                                 .r_re                       (conf_r_re_in),
  1802.                                 .w_byte_en_in               (conf_w_be_in),
  1803.                                 .w_clock                    (conf_w_clock),
  1804.                                 .serr_enable                (conf_serr_enable_out),
  1805.                                 .perr_response              (conf_perr_response_out),
  1806.                                 .pci_master_enable          (conf_pci_master_enable_out),
  1807.                                 .memory_space_enable        (conf_mem_space_enable_out),
  1808.                                 .io_space_enable            (conf_io_space_enable_out),
  1809.                                 .perr_in                    (conf_perr_in),
  1810.                                 .serr_in                    (conf_serr_in),
  1811.                                 .master_abort_recv          (conf_master_abort_recv_in),
  1812.                                 .target_abort_recv          (conf_target_abort_recv_in),
  1813.                                 .target_abort_set           (conf_target_abort_set_in),
  1814.                                 .master_data_par_err        (conf_master_data_par_err_in),
  1815.                                 .cache_line_size_to_pci     (conf_cache_line_size_to_pci_out),
  1816.                                 .cache_line_size_to_wb      (conf_cache_line_size_to_wb_out),
  1817.                                 .cache_lsize_not_zero_to_wb (conf_cache_lsize_not_zero_to_wb_out),
  1818.                                 .latency_tim                (conf_latency_tim_out),
  1819.                                 .pci_base_addr0             (conf_pci_ba0_out),
  1820.                                 .pci_base_addr1             (conf_pci_ba1_out),
  1821.                                 .pci_base_addr2             (conf_pci_ba2_out),
  1822.                                 .pci_base_addr3             (conf_pci_ba3_out),
  1823.                                 .pci_base_addr4             (conf_pci_ba4_out),
  1824.                                 .pci_base_addr5             (conf_pci_ba5_out),
  1825.                                 .pci_memory_io0             (conf_pci_mem_io0_out),
  1826.                                 .pci_memory_io1             (conf_pci_mem_io1_out),
  1827.                                 .pci_memory_io2             (conf_pci_mem_io2_out),
  1828.                                 .pci_memory_io3             (conf_pci_mem_io3_out),
  1829.                                 .pci_memory_io4             (conf_pci_mem_io4_out),
  1830.                                 .pci_memory_io5             (conf_pci_mem_io5_out),
  1831.                                 .pci_addr_mask0             (conf_pci_am0_out),
  1832.                                 .pci_addr_mask1             (conf_pci_am1_out),
  1833.                                 .pci_addr_mask2             (conf_pci_am2_out),
  1834.                                 .pci_addr_mask3             (conf_pci_am3_out),
  1835.                                 .pci_addr_mask4             (conf_pci_am4_out),
  1836.                                 .pci_addr_mask5             (conf_pci_am5_out),
  1837.                                 .pci_tran_addr0             (conf_pci_ta0_out),
  1838.                                 .pci_tran_addr1             (conf_pci_ta1_out),
  1839.                                 .pci_tran_addr2             (conf_pci_ta2_out),
  1840.                                 .pci_tran_addr3             (conf_pci_ta3_out),
  1841.                                 .pci_tran_addr4             (conf_pci_ta4_out),
  1842.                                 .pci_tran_addr5             (conf_pci_ta5_out),
  1843.                                 .pci_img_ctrl0              (conf_pci_img_ctrl0_out),
  1844.                                 .pci_img_ctrl1              (conf_pci_img_ctrl1_out),
  1845.                                 .pci_img_ctrl2              (conf_pci_img_ctrl2_out),
  1846.                                 .pci_img_ctrl3              (conf_pci_img_ctrl3_out),
  1847.                                 .pci_img_ctrl4              (conf_pci_img_ctrl4_out),
  1848.                                 .pci_img_ctrl5              (conf_pci_img_ctrl5_out),
  1849.                                 .pci_error_be               (conf_pci_err_be_in),
  1850.                                 .pci_error_bc               (conf_pci_err_bc_in),
  1851.                                 .pci_error_rty_exp          (conf_pci_err_rty_exp_in),
  1852.                                 .pci_error_es               (conf_pci_err_es_in),
  1853.                                 .pci_error_sig              (conf_pci_err_sig_in),
  1854.                                 .pci_error_addr             (conf_pci_err_addr_in),
  1855.                                 .pci_error_data             (conf_pci_err_data_in),
  1856.                                 .wb_base_addr0              (conf_wb_ba0_out),
  1857.                                 .wb_base_addr1              (conf_wb_ba1_out),
  1858.                                 .wb_base_addr2              (conf_wb_ba2_out),
  1859.                                 .wb_base_addr3              (conf_wb_ba3_out),
  1860.                                 .wb_base_addr4              (conf_wb_ba4_out),
  1861.                                 .wb_base_addr5              (conf_wb_ba5_out),
  1862.                                 .wb_memory_io0              (conf_wb_mem_io0_out),
  1863.                                 .wb_memory_io1              (conf_wb_mem_io1_out),
  1864.                                 .wb_memory_io2              (conf_wb_mem_io2_out),
  1865.                                 .wb_memory_io3              (conf_wb_mem_io3_out),
  1866.                                 .wb_memory_io4              (conf_wb_mem_io4_out),
  1867.                                 .wb_memory_io5              (conf_wb_mem_io5_out),
  1868.                                 .wb_addr_mask0              (conf_wb_am0_out),
  1869.                                 .wb_addr_mask1              (conf_wb_am1_out),
  1870.                                 .wb_addr_mask2              (conf_wb_am2_out),
  1871.                                 .wb_addr_mask3              (conf_wb_am3_out),
  1872.                                 .wb_addr_mask4              (conf_wb_am4_out),
  1873.                                 .wb_addr_mask5              (conf_wb_am5_out),
  1874.                                 .wb_tran_addr0              (conf_wb_ta0_out),
  1875.                                 .wb_tran_addr1              (conf_wb_ta1_out),
  1876.                                 .wb_tran_addr2              (conf_wb_ta2_out),
  1877.                                 .wb_tran_addr3              (conf_wb_ta3_out),
  1878.                                 .wb_tran_addr4              (conf_wb_ta4_out),
  1879.                                 .wb_tran_addr5              (conf_wb_ta5_out),
  1880.                                 .wb_img_ctrl0               (conf_wb_img_ctrl0_out),
  1881.                                 .wb_img_ctrl1               (conf_wb_img_ctrl1_out),
  1882.                                 .wb_img_ctrl2               (conf_wb_img_ctrl2_out),
  1883.                                 .wb_img_ctrl3               (conf_wb_img_ctrl3_out),
  1884.                                 .wb_img_ctrl4               (conf_wb_img_ctrl4_out),
  1885.                                 .wb_img_ctrl5               (conf_wb_img_ctrl5_out),
  1886.                                 .wb_error_be                (conf_wb_err_be_in),
  1887.                                 .wb_error_bc                (conf_wb_err_bc_in),
  1888.                                 .wb_error_rty_exp           (conf_wb_err_rty_exp_in),
  1889.                                 .wb_error_es                (conf_wb_err_es_in),
  1890.                                 .wb_error_sig               (conf_wb_err_sig_in),
  1891.                                 .wb_error_addr              (conf_wb_err_addr_in),
  1892.                                 .wb_error_data              (conf_wb_err_data_in),
  1893.                                 .config_addr                (conf_ccyc_addr_out),
  1894.                                 .icr_soft_res               (conf_soft_res_out),
  1895.                                 .int_out                    (conf_int_out),
  1896.                                 .isr_int_prop               (conf_isr_int_prop_in),
  1897.                                 .isr_par_err_int            (conf_par_err_int_in),
  1898.                                 .isr_sys_err_int            (conf_sys_err_int_in),
  1900.                                 .pci_init_complete_out      (conf_pci_init_complete_out),
  1901.                                 .wb_init_complete_out       (conf_wb_init_complete_out)
  1903.                             `ifdef PCI_CPCI_HS_IMPLEMENT
  1904.                                 ,
  1905.                                 .pci_cpci_hs_enum_oe_o      (pci_cpci_hs_enum_oe_o) ,
  1906.                                 .pci_cpci_hs_led_oe_o       (pci_cpci_hs_led_oe_o ) ,
  1907.                                 .pci_cpci_hs_es_i           (pci_cpci_hs_es_i)
  1908.                             `endif
  1909.         
  1910.                             `ifdef PCI_SPOCI
  1911.                                 ,
  1912.                                 // Serial power on configuration interface
  1913.                                 .spoci_scl_oe_o (spoci_scl_oe_o )  ,
  1914.                                 .spoci_sda_i    (spoci_sda_i    )  ,
  1915.                                 .spoci_sda_oe_o (spoci_sda_oe_o )
  1916.                             `endif
  1917.                             ) ;
  1919. // pci data io multiplexer inputs
  1920. wire            pci_mux_tar_ad_en_in            = pciu_pciif_ad_en_out ;
  1921. wire            pci_mux_tar_ad_en_reg_in        = out_bckp_tar_ad_en_out ;
  1922. wire    [31:0]  pci_mux_tar_ad_in               = pciu_pciif_ad_out ;
  1923. wire            pci_mux_devsel_in               = pciu_pciif_devsel_out ;
  1924. wire            pci_mux_devsel_en_in            = pciu_pciif_devsel_en_out ;
  1925. wire            pci_mux_trdy_in                 = pciu_pciif_trdy_out ;
  1926. wire            pci_mux_trdy_en_in              = pciu_pciif_trdy_en_out ;
  1927. wire            pci_mux_stop_in                 = pciu_pciif_stop_out ;
  1928. wire            pci_mux_stop_en_in              = pciu_pciif_stop_en_out ;
  1929. wire            pci_mux_tar_load_in             = pciu_ad_load_out ;
  1930. wire            pci_mux_tar_load_on_transfer_in = pciu_ad_load_on_transfer_out ;
  1932. wire            pci_mux_mas_ad_en_in    = wbu_pciif_ad_en_out ;
  1933. wire    [31:0]  pci_mux_mas_ad_in       = wbu_pciif_ad_out ;
  1935. wire            pci_mux_frame_in                = wbu_pciif_frame_out ;
  1936. wire            pci_mux_frame_en_in             = wbu_pciif_frame_en_out ;
  1937. wire            pci_mux_irdy_in                 = wbu_pciif_irdy_out;
  1938. wire            pci_mux_irdy_en_in              = wbu_pciif_irdy_en_out;
  1939. wire            pci_mux_mas_load_in             = wbu_ad_load_out ;
  1940. wire            pci_mux_mas_load_on_transfer_in = wbu_ad_load_on_transfer_out ;
  1941. wire [3:0]      pci_mux_cbe_in                  = wbu_pciif_cbe_out ;
  1942. wire            pci_mux_cbe_en_in               = wbu_pciif_cbe_en_out ;
  1944. wire            pci_mux_par_in              = parchk_pci_par_out ;
  1945. wire            pci_mux_par_en_in           = parchk_pci_par_en_out ;
  1946. wire            pci_mux_perr_in             = parchk_pci_perr_out ;
  1947. wire            pci_mux_perr_en_in          = parchk_pci_perr_en_out ;
  1948. wire            pci_mux_serr_in             = parchk_pci_serr_out ;
  1949. wire            pci_mux_serr_en_in          = parchk_pci_serr_en_out;
  1951. wire            pci_mux_req_in              =   wbu_pciif_req_out ;
  1952. wire            pci_mux_frame_load_in       =   wbu_pciif_frame_load_out ;
  1954. wire            pci_mux_pci_irdy_in         =   int_pci_irdy    ;
  1955. wire            pci_mux_pci_trdy_in         =   int_pci_trdy    ;
  1956. wire            pci_mux_pci_frame_in        =   int_pci_frame   ;
  1957. wire            pci_mux_pci_stop_in         =   int_pci_stop    ;
  1959. wire            pci_mux_init_complete_in    =   conf_pci_init_complete_out ;
  1961. pci_io_mux pci_io_mux
  1962. (
  1963.     .reset_in                   (reset),
  1964.     .clk_in                     (pci_clk),
  1965.     .frame_in                   (pci_mux_frame_in),
  1966.     .frame_en_in                (pci_mux_frame_en_in),
  1967.     .frame_load_in              (pci_mux_frame_load_in),
  1968.     .irdy_in                    (pci_mux_irdy_in),
  1969.     .irdy_en_in                 (pci_mux_irdy_en_in),
  1970.     .devsel_in                  (pci_mux_devsel_in),
  1971.     .devsel_en_in               (pci_mux_devsel_en_in),
  1972.     .trdy_in                    (pci_mux_trdy_in),
  1973.     .trdy_en_in                 (pci_mux_trdy_en_in),
  1974.     .stop_in                    (pci_mux_stop_in),
  1975.     .stop_en_in                 (pci_mux_stop_en_in),
  1976.     .master_load_in             (pci_mux_mas_load_in),
  1977.     .master_load_on_transfer_in (pci_mux_mas_load_on_transfer_in),
  1978.     .target_load_in             (pci_mux_tar_load_in),
  1979.     .target_load_on_transfer_in (pci_mux_tar_load_on_transfer_in),
  1980.     .cbe_in                     (pci_mux_cbe_in),
  1981.     .cbe_en_in                  (pci_mux_cbe_en_in),
  1982.     .mas_ad_in                  (pci_mux_mas_ad_in),
  1983.     .tar_ad_in                  (pci_mux_tar_ad_in),
  1985.     .mas_ad_en_in               (pci_mux_mas_ad_en_in),
  1986.     .tar_ad_en_in               (pci_mux_tar_ad_en_in),
  1987.     .tar_ad_en_reg_in           (pci_mux_tar_ad_en_reg_in),
  1989.     .par_in                     (pci_mux_par_in),
  1990.     .par_en_in                  (pci_mux_par_en_in),
  1991.     .perr_in                    (pci_mux_perr_in),
  1992.     .perr_en_in                 (pci_mux_perr_en_in),
  1993.     .serr_in                    (pci_mux_serr_in),
  1994.     .serr_en_in                 (pci_mux_serr_en_in),
  1996.     .frame_en_out               (pci_mux_frame_en_out),
  1997.     .irdy_en_out                (pci_mux_irdy_en_out),
  1998.     .devsel_en_out              (pci_mux_devsel_en_out),
  1999.     .trdy_en_out                (pci_mux_trdy_en_out),
  2000.     .stop_en_out                (pci_mux_stop_en_out),
  2001.     .cbe_en_out                 (pci_mux_cbe_en_out),
  2002.     .ad_en_out                  (pci_mux_ad_en_out),
  2004.     .frame_out                  (pci_mux_frame_out),
  2005.     .irdy_out                   (pci_mux_irdy_out),
  2006.     .devsel_out                 (pci_mux_devsel_out),
  2007.     .trdy_out                   (pci_mux_trdy_out),
  2008.     .stop_out                   (pci_mux_stop_out),
  2009.     .cbe_out                    (pci_mux_cbe_out),
  2010.     .ad_out                     (pci_mux_ad_out),
  2011.     .ad_load_out                (pci_mux_ad_load_out),
  2013.     .par_out                    (pci_mux_par_out),
  2014.     .par_en_out                 (pci_mux_par_en_out),
  2015.     .perr_out                   (pci_mux_perr_out),
  2016.     .perr_en_out                (pci_mux_perr_en_out),
  2017.     .serr_out                   (pci_mux_serr_out),
  2018.     .serr_en_out                (pci_mux_serr_en_out),
  2019.     .req_in                     (pci_mux_req_in),
  2020.     .req_out                    (pci_mux_req_out),
  2021.     .req_en_out                 (pci_mux_req_en_out),
  2022.     .pci_irdy_in                (pci_mux_pci_irdy_in),
  2023.     .pci_trdy_in                (pci_mux_pci_trdy_in),
  2024.     .pci_frame_in               (pci_mux_pci_frame_in),
  2025.     .pci_stop_in                (pci_mux_pci_stop_in),
  2026.     .ad_en_unregistered_out     (pci_mux_ad_en_unregistered_out),
  2028.     .init_complete_in           (pci_mux_init_complete_in)
  2029. );
  2031. pci_cur_out_reg output_backup
  2032. (
  2033.     .reset_in               (reset),
  2034.     .clk_in                 (pci_clk),
  2035.     .frame_in               (pci_mux_frame_in),
  2036.     .frame_en_in            (pci_mux_frame_en_in),
  2037.     .frame_load_in          (pci_mux_frame_load_in),
  2038.     .irdy_in                (pci_mux_irdy_in),
  2039.     .irdy_en_in             (pci_mux_irdy_en_in),
  2040.     .devsel_in              (pci_mux_devsel_in),
  2041.     .trdy_in                (pci_mux_trdy_in),
  2042.     .trdy_en_in             (pci_mux_trdy_en_in),
  2043.     .stop_in                (pci_mux_stop_in),
  2044.     .ad_load_in             (pci_mux_ad_load_out),
  2045.     .cbe_in                 (pci_mux_cbe_in),
  2046.     .cbe_en_in              (pci_mux_cbe_en_in),
  2047.     .mas_ad_in              (pci_mux_mas_ad_in),
  2048.     .tar_ad_in              (pci_mux_tar_ad_in),
  2050.     .mas_ad_en_in           (pci_mux_mas_ad_en_in),
  2051.     .tar_ad_en_in           (pci_mux_tar_ad_en_in),
  2052.     .ad_en_unregistered_in  (pci_mux_ad_en_unregistered_out),
  2054.     .par_in                 (pci_mux_par_in),
  2055.     .par_en_in              (pci_mux_par_en_in),
  2056.     .perr_in                (pci_mux_perr_in),
  2057.     .perr_en_in             (pci_mux_perr_en_in),
  2058.     .serr_in                (pci_mux_serr_in),
  2059.     .serr_en_in             (pci_mux_serr_en_in),
  2061.     .frame_out              (out_bckp_frame_out),
  2062.     .frame_en_out           (out_bckp_frame_en_out),
  2063.     .irdy_out               (out_bckp_irdy_out),
  2064.     .irdy_en_out            (out_bckp_irdy_en_out),
  2065.     .devsel_out             (out_bckp_devsel_out),
  2066.     .trdy_out               (out_bckp_trdy_out),
  2067.     .trdy_en_out            (out_bckp_trdy_en_out),
  2068.     .stop_out               (out_bckp_stop_out),
  2069.     .cbe_out                (out_bckp_cbe_out),
  2070.     .ad_out                 (out_bckp_ad_out),
  2071.     .ad_en_out              (out_bckp_ad_en_out),
  2072.     .cbe_en_out             (out_bckp_cbe_en_out),
  2073.     .tar_ad_en_out          (out_bckp_tar_ad_en_out),
  2074.     .mas_ad_en_out          (out_bckp_mas_ad_en_out),
  2076.     .par_out                (out_bckp_par_out),
  2077.     .par_en_out             (out_bckp_par_en_out),
  2078.     .perr_out               (out_bckp_perr_out),
  2079.     .perr_en_out            (out_bckp_perr_en_out),
  2080.     .serr_out               (out_bckp_serr_out),
  2081.     .serr_en_out            (out_bckp_serr_en_out)
  2082. ) ;
  2084. // PARITY CHECKER INPUTS
  2085. wire            parchk_pci_par_in               =   int_pci_par ;
  2086. wire            parchk_pci_perr_in              =   int_pci_perr ;
  2087. wire            parchk_pci_frame_reg_in         =   in_reg_frame_out ;
  2088. wire            parchk_pci_frame_en_in          =   out_bckp_frame_en_out ;
  2089. wire            parchk_pci_irdy_en_in           =   out_bckp_irdy_en_out ;
  2090. wire            parchk_pci_irdy_reg_in          =   in_reg_irdy_out ;
  2091. wire            parchk_pci_trdy_reg_in          =   in_reg_trdy_out ;
  2094. wire            parchk_pci_trdy_en_in           =   out_bckp_trdy_en_out ;
  2097. wire    [31:0]  parchk_pci_ad_out_in            =   out_bckp_ad_out ;
  2098. wire    [31:0]  parchk_pci_ad_reg_in            =   in_reg_ad_out ;
  2099. wire    [3:0]   parchk_pci_cbe_in_in            =   int_pci_cbe   ;
  2100. wire    [3:0]   parchk_pci_cbe_reg_in           =   in_reg_cbe_out ;
  2101. wire    [3:0]   parchk_pci_cbe_out_in           =   out_bckp_cbe_out ;
  2102. wire            parchk_pci_ad_en_in             =   out_bckp_ad_en_out ;
  2103. wire            parchk_par_err_response_in      =   conf_perr_response_out ;
  2104. wire            parchk_serr_enable_in           =   conf_serr_enable_out ;
  2106. wire            parchk_pci_perr_out_in          =   out_bckp_perr_out ;
  2107. wire            parchk_pci_serr_en_in           =   out_bckp_serr_en_out ;
  2108. wire            parchk_pci_serr_out_in          =   out_bckp_serr_out ;
  2109. wire            parchk_pci_cbe_en_in            =   out_bckp_cbe_en_out ;
  2111. wire            parchk_pci_par_en_in            =   out_bckp_par_en_out ;
  2113. pci_parity_check parity_checker
  2114. (
  2115.     .reset_in               (reset),
  2116.     .clk_in                 (pci_clk),
  2117.     .pci_par_in             (parchk_pci_par_in),
  2118.     .pci_par_out            (parchk_pci_par_out),
  2119.     .pci_par_en_out         (parchk_pci_par_en_out),
  2120.     .pci_par_en_in          (parchk_pci_par_en_in),
  2121.     .pci_perr_in            (parchk_pci_perr_in),
  2122.     .pci_perr_out           (parchk_pci_perr_out),
  2123.     .pci_perr_en_out        (parchk_pci_perr_en_out),
  2124.     .pci_perr_out_in        (parchk_pci_perr_out_in),
  2125.     .pci_serr_out           (parchk_pci_serr_out),
  2126.     .pci_serr_out_in        (parchk_pci_serr_out_in),
  2127.     .pci_serr_en_out        (parchk_pci_serr_en_out),
  2128.     .pci_serr_en_in         (parchk_pci_serr_en_in),
  2129.     .pci_frame_reg_in       (parchk_pci_frame_reg_in),
  2130.     .pci_frame_en_in        (parchk_pci_frame_en_in),
  2131.     .pci_irdy_en_in         (parchk_pci_irdy_en_in),
  2132.     .pci_irdy_reg_in        (parchk_pci_irdy_reg_in),
  2133.     .pci_trdy_reg_in        (parchk_pci_trdy_reg_in),
  2134.     .pci_trdy_en_in         (parchk_pci_trdy_en_in),
  2135.     .pci_ad_out_in          (parchk_pci_ad_out_in),
  2136.     .pci_ad_reg_in          (parchk_pci_ad_reg_in),
  2137.     .pci_cbe_in_in          (parchk_pci_cbe_in_in),
  2138.     .pci_cbe_reg_in         (parchk_pci_cbe_reg_in),
  2139.     .pci_cbe_en_in          (parchk_pci_cbe_en_in),
  2140.     .pci_cbe_out_in         (parchk_pci_cbe_out_in),
  2141.     .pci_ad_en_in           (parchk_pci_ad_en_in),
  2142.     .par_err_response_in    (parchk_par_err_response_in),
  2143.     .par_err_detect_out     (parchk_par_err_detect_out),
  2144.     .perr_mas_detect_out    (parchk_perr_mas_detect_out),
  2145.     .serr_enable_in         (parchk_serr_enable_in),
  2146.     .sig_serr_out           (parchk_sig_serr_out)
  2147. );
  2149. wire            in_reg_gnt_in    = pci_gnt_i ;
  2150. wire            in_reg_frame_in  = int_pci_frame ;
  2151. wire            in_reg_irdy_in   = int_pci_irdy  ;
  2152. wire            in_reg_trdy_in   = int_pci_trdy  ;
  2153. wire            in_reg_stop_in   = int_pci_stop  ;
  2154. wire            in_reg_devsel_in = int_pci_devsel ;
  2155. wire            in_reg_idsel_in  = pci_idsel_i ;
  2156. wire    [31:0]  in_reg_ad_in     = pci_ad_i ;
  2157. wire    [3:0]   in_reg_cbe_in    = int_pci_cbe ;
  2159. pci_in_reg input_register
  2160. (
  2161.     .reset_in           (reset),
  2162.     .clk_in             (pci_clk),
  2163.     .init_complete_in   (conf_pci_init_complete_out),
  2165.     .pci_gnt_in     (in_reg_gnt_in),
  2166.     .pci_frame_in   (in_reg_frame_in),
  2167.     .pci_irdy_in    (in_reg_irdy_in),
  2168.     .pci_trdy_in    (in_reg_trdy_in),
  2169.     .pci_stop_in    (in_reg_stop_in),
  2170.     .pci_devsel_in  (in_reg_devsel_in),
  2171.     .pci_idsel_in   (in_reg_idsel_in),
  2172.     .pci_ad_in      (in_reg_ad_in),
  2173.     .pci_cbe_in     (in_reg_cbe_in),
  2175.     .pci_gnt_reg_out    (in_reg_gnt_out),
  2176.     .pci_frame_reg_out  (in_reg_frame_out),
  2177.     .pci_irdy_reg_out   (in_reg_irdy_out),
  2178.     .pci_trdy_reg_out   (in_reg_trdy_out),
  2179.     .pci_stop_reg_out   (in_reg_stop_out),
  2180.     .pci_devsel_reg_out (in_reg_devsel_out),
  2181.     .pci_idsel_reg_out  (in_reg_idsel_out),
  2182.     .pci_ad_reg_out     (in_reg_ad_out),
  2183.     .pci_cbe_reg_out    (in_reg_cbe_out)
  2184. );
  2186. endmodule
  2187. </pre>
  2188. <hr />
  2189. <address><span style="font-size: smaller">FreeBSD-CVSweb &lt;<a href="mailto:freebsd-cvsweb@FreeBSD.org">freebsd-cvsweb@FreeBSD.org</a>&gt;</span></address>
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