saa7105.c
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上传日期:2008-01-29
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文件大小:20k
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DSP编程

开发平台:

C/C++

  1. /*
  2.  *  Copyright 2003 by Texas Instruments Incorporated.
  3.  *  All rights reserved. Property of Texas Instruments Incorporated.
  4.  *  Restricted rights to use, duplicate or disclose this code are
  5.  *  granted through contract.
  6.  *  
  7.  */
  8. /* "@(#) DDK 1.10.00.23 07-02-03 (ddk-b12)" */
  9. /********************************************************************************/
  10. /* saa7105edc.c file */
  11. /********************************************************************************/
  12. #include <std.h>        
  13. #include <csl_stdinc.h>
  14. #include <csl_i2c.h>
  15. #include <edc.h>
  16. #include <saa7105.h>
  17. #include "_iic.h"
  18. #include "_saa7105.h"   
  19.                                                 
  20. /* local functions declaration */
  21. static void clearHDSyncEngine(void);
  22. static void configSAA7105(SAA7105_Mode videoMode, Bool slaveModeEnable, 
  23.     SAA7105_AnalogFormat outMode, SAA7105_InputFormat inFormat, Bool enableBT656Sync);
  24. static void enableColorBars(Bool enable);
  25. static void enableSlaveMode(Bool enable);
  26. static void initSAA7105Def(void);
  27. static void loadCursor(SAA7105_Cursor* cursorTable);
  28. static void loadHDSyncEngine(Uns mode);
  29. static void powerdownSAA7105(Bool powerDownEnable);
  30. static void resetSAA7105(void);
  31. static void setOutputMode(SAA7105_AnalogFormat outMode);
  32. static void setSAA7105SyncMode(SAA7105_Mode displayType,Bool enableBT656Sync); 
  33. static void setVideoDisplay(SAA7105_Mode displayType, 
  34.     SAA7105_AnalogFormat outMode, SAA7105_InputFormat inFormat, Bool enableBT656Sync);
  35. static void startHDSyncEngine(SAA7105_Mode displayType);
  36. static Int SAA7105_close(EDC_Handle handle);
  37. static Int SAA7105_ctrl(EDC_Handle handle, SAA7105_Cmd cmd, Arg param);
  38. static EDC_Handle SAA7105_open(String devName, Arg optArg);
  39. EDC_Fxns SAA7105_Fxns = {
  40.     SAA7105_open,
  41.     SAA7105_close,
  42.     SAA7105_ctrl
  43. };
  44. /* local variables and arrays */
  45. static I2C_Handle hI2C = INV;
  46. static const Int outputModeTbl[3][5] = {
  47.     {1, 1, 0, 0, 1},
  48.     {0, 0, 0, 0, 0},
  49.     {0, 1, 1, 1, 0}
  50. };
  51. static const Int modeTbl[8][9] = {
  52.  /* NTSC */{248, 14, 1715, 720, 242, SAA7105_IFMT_YCBCR422_INTERLACED,
  53.  0, 0, 0x20},
  54.  /* PAL */{232, 19, 1727, 720, 290, SAA7105_IFMT_YCBCR422_INTERLACED,
  55.  0, 0, 0x20},
  56.  /*VGA */{64, 33, 799, 640, 480, SAA7105_IFMT_RGB565,
  57.  0xc3, 0xd4, 0x1d},
  58.  /*SVGA */{64, 23, 1055, 800, 600, SAA7105_IFMT_RGB565,
  59.  0x4b, 0x68, 0x2f},
  60.  /* XGA */{64, 29, 1343, 1024, 768, SAA7105_IFMT_RGB565,
  61.  0x7b, 0x09, 0x4d},  
  62.  /*HD480P */{64, 30, 857, 720, 480, SAA7105_IFMT_YCBCR422_NONEINTERLACED,
  63.  0, 0, 0x20},
  64.  /*HD720P */{64, 20, 1643, 1280, 720, SAA7105_IFMT_YCBCR422_NONEINTERLACED, 
  65.  0, 0, 0x58},
  66.  /*HD1080I*/{64, 10, 2193, 1920, 540, SAA7105_IFMT_YCBCR422_NONEINTERLACED, 
  67.  0, 0, 0x58}
  68. };                                              
  69. /*
  70.  * ======== clearHDSyncEngine ========
  71.  */
  72. static void clearHDSyncEngine(void)
  73. {
  74.     Uint8 *charPtr;
  75.     _SAA7105_hdSyncGen0.lcAddress = 0;
  76.     charPtr = (Uint8 *)&_SAA7105_hdSyncGen0.lcAddress + 3;
  77.     _IIC_write(hI2C, _SAA7105_IICADDR,0xD0,charPtr,31);
  78.     _SAA7105_hdSyncGen0.ltAddress = 0;
  79.     charPtr = (Uint8 *)&_SAA7105_hdSyncGen0.ltAddress + 3;
  80.     _IIC_write(hI2C, _SAA7105_IICADDR,0xD1,charPtr,61);
  81.     _SAA7105_hdSyncGen0.lpAddress = 0;
  82.     charPtr = (Uint8 *)&_SAA7105_hdSyncGen0.lpAddress + 3;
  83.     _IIC_write(hI2C, _SAA7105_IICADDR,0xD2,charPtr,57);
  84.     _SAA7105_hdSyncGen0.svAddress = 0;
  85.     charPtr = (Uint8 *)&_SAA7105_hdSyncGen0.svAddress + 3;
  86.     _IIC_write(hI2C, _SAA7105_IICADDR,0xD3,charPtr,17);
  87.     return;
  88. }
  89. /*
  90.  * ======== configSAA7105 ========
  91.  */
  92. static void configSAA7105(SAA7105_Mode videoMode, Bool slaveModeEnable, 
  93.                SAA7105_AnalogFormat outMode, SAA7105_InputFormat inFormat, Bool enableBT656Sync)
  94. {
  95. /***************************************************************/
  96. /* Enable master/slave mode                                    */
  97. /***************************************************************/    
  98.     enableSlaveMode(slaveModeEnable);
  99.     initSAA7105Def();
  100.     loadCursor(NULL);
  101.     enableColorBars(FALSE);
  102.     setVideoDisplay(videoMode, outMode, inFormat, enableBT656Sync);
  103. }
  104. /*
  105.  * ======== enableColorBars ========
  106.  */
  107. static void enableColorBars(Bool enable)
  108. {
  109.     _SAA7105_Regs *regPtr;
  110.     Uint8 *charPtr;
  111.     
  112.     regPtr = &_SAA7105_settingsDef;
  113.     regPtr->colorBarsEnable = enable;
  114.     charPtr = (Uint8 *)&_SAA7105_settingsDef;
  115.     _IIC_write(hI2C, _SAA7105_IICADDR,0x3A,&charPtr[0x3A],1);
  116.     return;
  117. }
  118. /*
  119.  * ======== enableSlaveMode ========
  120.  */
  121. static void enableSlaveMode(Bool enable)
  122. {
  123.     _SAA7105_Regs *regPtr;
  124.     Uint8 *charPtr;
  125.     
  126.     regPtr = &_SAA7105_settingsDef;
  127.     if(!enable){
  128.         regPtr->masterSlaveMode = FALSE;
  129.         regPtr->vSyncOutput = TRUE;
  130.         regPtr->hSyncOutput = TRUE;     
  131.         regPtr->fieldOutput = TRUE;     
  132.         regPtr->bypassInputFIFO = FALSE;        
  133.     }else{
  134.         regPtr->masterSlaveMode = TRUE;
  135.         regPtr->vSyncOutput = FALSE;
  136.         regPtr->hSyncOutput = FALSE;        
  137.         regPtr->fieldOutput = FALSE;        
  138.         regPtr->bypassInputFIFO = TRUE;
  139.     }
  140.     charPtr = (Uint8 *)&_SAA7105_settingsDef;
  141.     _IIC_write(hI2C, _SAA7105_IICADDR,0x96,&charPtr[0x96],2);
  142.     _IIC_write(hI2C, _SAA7105_IICADDR,0x84,&charPtr[0x84],1);
  143.     return;
  144. }
  145. /*
  146.  * ======== initSAA7105Def ========
  147.  * initialize the SAA7105 in default setup 
  148.  */
  149. static void initSAA7105Def(void)
  150. {
  151.     Uint8 *charPtr,subAddress;
  152.     
  153. /***************************************************************/
  154. /* Load registers from ROM to RAM */
  155. /***************************************************************/
  156.     charPtr = (Uint8 *)&_SAA7105_settingsDef;
  157.     subAddress = 0xD0;
  158.     _IIC_write(hI2C, _SAA7105_IICADDR,subAddress,&charPtr[subAddress],13);
  159.     subAddress = 0xF0;
  160.     _IIC_write(hI2C, _SAA7105_IICADDR,subAddress,&charPtr[subAddress],14);
  161.     return;
  162. }
  163. /*
  164.  * ======== loadCursor ========
  165.  * load Hardware cursor
  166.  */
  167. static void loadCursor(SAA7105_Cursor* cursorTable)
  168. {
  169.     Uns i;
  170. /***************************************************************/
  171. /* Load Hardware Cursor Bit Map with transparency */
  172. /***************************************************************/
  173.     if(cursorTable == NULL){
  174.         cursorTable = &_SAA7105_cursorData;
  175.         cursorTable->address = 0;
  176.         for(i = 0; i < 256; i ++){
  177.             cursorTable->cursorBlock[i] = 0xAA;
  178.         }
  179.     }
  180.     _IIC_write(hI2C, _SAA7105_IICADDR,0xFE, (void *)cursorTable,256+1);
  181.     return;
  182. }
  183. /*
  184.  * ======== loadHDSyncEngine ========
  185.  */
  186. static void loadHDSyncEngine(Uns mode)
  187. {
  188.     _SAA7105_HDSyncGen *ptrHDSyncGen;
  189.     Uint8 *charPtr;
  190.     
  191.     switch(mode)
  192.     {
  193.         case SAA7105_MODE_HD480P60F:
  194.             ptrHDSyncGen = &_SAA7105_hdSyncGen480P;
  195.             break;
  196.         case SAA7105_MODE_HD720P60F:
  197.             ptrHDSyncGen = &_SAA7105_hdSyncGen720P;
  198.             break;
  199.         case SAA7105_MODE_HD1080I30F:
  200.             ptrHDSyncGen = &_SAA7105_hdSyncGen1080I;
  201.             break;
  202.         case SAA7105_MODE_VGA:
  203.             ptrHDSyncGen = &_SAA7105_hdSyncGenVGA;
  204.             break;
  205.         case SAA7105_MODE_SVGA:
  206.             ptrHDSyncGen = &_SAA7105_hdSyncGenSVGA;
  207.             break;
  208.         case SAA7105_MODE_XGA:
  209.             ptrHDSyncGen = &_SAA7105_hdSyncGenXGA;
  210.             break;
  211.             
  212.         default:
  213.             break;
  214.     }
  215.     ptrHDSyncGen->lcAddress = 0;
  216.     charPtr = (Uint8 *)&ptrHDSyncGen->lcAddress + 3;
  217.     _IIC_write(hI2C, _SAA7105_IICADDR,0xD0,charPtr,31);
  218.     ptrHDSyncGen->lpAddress = 0;
  219.     charPtr = (Uint8 *)&ptrHDSyncGen->lpAddress + 3;
  220.     _IIC_write(hI2C, _SAA7105_IICADDR,0xD2,charPtr,57);
  221.     ptrHDSyncGen->ltAddress = 0;
  222.     charPtr = (Uint8 *)&ptrHDSyncGen->ltAddress + 3;
  223.     _IIC_write(hI2C, _SAA7105_IICADDR,0xD1,charPtr,61);
  224.     ptrHDSyncGen->svAddress = 0;
  225.     charPtr = (Uint8 *)&ptrHDSyncGen->svAddress + 3;
  226.     _IIC_write(hI2C, _SAA7105_IICADDR,0xD3,charPtr,17);
  227. }
  228. /*
  229.  * ======== powerdownSAA7105 ========
  230.  */
  231. static void powerdownSAA7105(Bool powerDownEnable)
  232. {
  233.     Uint8 *charPtr = (Uint8 *)&_SAA7105_settingsDef;
  234.     /*Put _SAA7105 in power down mode */
  235.     _SAA7105_settingsDef.downA = powerDownEnable;
  236.     _SAA7105_settingsDef.downD = powerDownEnable;
  237.     _IIC_write(hI2C, _SAA7105_IICADDR,0x61,&charPtr[0x61],1);
  238. }
  239. /*
  240.  * ======== resetSAA7105 ========
  241.  */
  242. static void resetSAA7105(void)
  243. {
  244. /***************************************************************/
  245. /* power-up SAA7105                                            */
  246. /***************************************************************/
  247.     powerdownSAA7105(FALSE);
  248.     return;
  249. }
  250. /*
  251.  * ======== setOutputMode ========
  252.  */
  253. static void setOutputMode(SAA7105_AnalogFormat outMode)
  254. {
  255.     _SAA7105_Regs *regPtr;
  256.     Uint8 *charPtr;
  257.     
  258.     regPtr = &_SAA7105_settingsDef;
  259.     regPtr->vbsEn = outputModeTbl[outMode][0];
  260.     regPtr->cvbsEn0 = outputModeTbl[outMode][1];
  261.     regPtr->cvbsEn1 = outputModeTbl[outMode][2];
  262.     regPtr->cvbsEn2 = outputModeTbl[outMode][3];
  263.     regPtr->cEn = outputModeTbl[outMode][4];    
  264.     charPtr = (Uint8 *)&_SAA7105_settingsDef;
  265.     _IIC_write(hI2C, _SAA7105_IICADDR,0x2D,&charPtr[0x2D],1);
  266.     return;
  267. }
  268. /*
  269.  * ======== setSAA7105SyncMode ========
  270.  */
  271. static void setSAA7105SyncMode(SAA7105_Mode displayType,Bool enableBT656Sync)
  272. {
  273.     Uint8 *charPtr = (Uint8 *)&_SAA7105_settingsDef;
  274.     if(enableBT656Sync) {
  275.         _SAA7105_settingsDef.syncVia656 = 1;
  276.         if(displayType == SAA7105_MODE_PAL720) {
  277.             //_SAA7105_settingsDef.hTriggerMSBs = 0; 
  278.             //_SAA7105_settingsDef.hTrigger = 235;        
  279.         }   
  280.         else {        
  281. //            _SAA7105_settingsDef.hTriggerMSBs = 0; 
  282. //            _SAA7105_settingsDef.hTrigger = 235;  
  283.         }
  284.         _SAA7105_settingsDef.xOfs = 0;
  285.         _SAA7105_settingsDef.xOfsMsb = 0;
  286.     }else {
  287.         _SAA7105_settingsDef.syncVia656 = 0;
  288.     }    
  289.     _IIC_write(hI2C, _SAA7105_IICADDR,0x3A,&charPtr[0x3A],1);       
  290.     _IIC_write(hI2C, _SAA7105_IICADDR,0x99,&charPtr[0x99],1);       
  291.     _IIC_write(hI2C, _SAA7105_IICADDR,0x90,&charPtr[0x90],1);       
  292.     _IIC_write(hI2C, _SAA7105_IICADDR,0x94,&charPtr[0x94],1);       
  293.     _IIC_write(hI2C, _SAA7105_IICADDR,0x6C,&charPtr[0x6C],1);       
  294.     _IIC_write(hI2C, _SAA7105_IICADDR,0x6D,&charPtr[0x6D],1);       
  295. }
  296. /*
  297.  * ======== setVideoDisplay ========
  298.  */
  299. static void setVideoDisplay(SAA7105_Mode displayType, 
  300.     SAA7105_AnalogFormat outMode, SAA7105_InputFormat inFormat, Bool enableBT656Sync)
  301. {                       
  302.     Uint8 *charPtr;
  303.     Uns activePixels,activeLines;     
  304.     Uns hLen;
  305.     Uns hStart,hEnd,fal, lal;
  306.     volatile _SAA7105_Regs *regPtr = (_SAA7105_Regs *)&_SAA7105_settingsDef;    
  307.     Uns yOffset;
  308.     Uns xOffset;
  309.     Uns yInc = 0; 
  310.     Uns ySkip = 0;
  311.     Uns yIWGTO = 100;
  312.     Uns yIWGTE = 100;
  313.     Uns xInc = 0;
  314.     hStart = 272;
  315.     xOffset = modeTbl[displayType][0];      
  316.     yOffset = modeTbl[displayType][1];
  317.     hLen = modeTbl[displayType][2];;
  318.     activePixels = modeTbl[displayType][3];
  319.     activeLines = modeTbl[displayType][4];
  320.     regPtr->inputFormat = modeTbl[displayType][5];
  321.     regPtr->pixClock0 = modeTbl[displayType][6];
  322.     regPtr->pixClock1 = modeTbl[displayType][7];
  323.     regPtr->pixClock2 = modeTbl[displayType][8];
  324.     regPtr->chromaBinary = 1;
  325.     regPtr->compSyncEnable = 0;
  326.     regPtr->encOff = 1;
  327.     regPtr->idel = 1;
  328.     fal = 18;
  329.     if(regPtr->inputFormat == SAA7105_IFMT_YCBCR422_NONEINTERLACED) {
  330.         /* 54MHz input clock (input mode 3) */
  331.         xInc = 0;
  332.         regPtr->edge = 0;
  333.         regPtr->slot = 1;
  334.     } else if(regPtr->inputFormat == SAA7105_IFMT_YCBCR422_INTERLACED){
  335.         /* 27MHz input clock (input mode 4) */
  336.         xInc = 2048;
  337.         regPtr->edge = 1;
  338.         regPtr->slot = 0;
  339.         regPtr->encOff = 0;
  340.         regPtr->idel = 3;  
  341.         regPtr->compSyncEnable = 0;
  342.     } else if(regPtr->inputFormat == SAA7105_IFMT_RGB565) {
  343.         xInc = 0;
  344.         regPtr->edge = 1;
  345.         regPtr->slot = 1;       
  346.         regPtr->chromaBinary = 0;
  347.     }               
  348.     if(displayType == SAA7105_MODE_PAL720) {
  349.         regPtr->palEnable = 1;
  350.         regPtr->fise = 0;
  351.         regPtr->burstStart = 0x21;
  352.         regPtr->burstEnd = 0x1d;
  353.         regPtr->chromaPhase = 0x6b;
  354.         regPtr->burstAmplitude = 0x2d;      
  355.         regPtr->subCarrier0 = 0xCB;
  356.         regPtr->subCarrier1 = 0x8A;
  357.         regPtr->subCarrier2 = 0x09;
  358.         regPtr->subCarrier3 = 0x2A;
  359.         regPtr->hTriggerMSBs = 0;   
  360.         regPtr->hTrigger = 2;   
  361.         if(enableBT656Sync) {
  362.             hStart = 280;
  363.             xOffset = 0;
  364.             regPtr->syncVia656 = 1;
  365.             fal = 21;
  366.             regPtr->vTrigger = 0;   
  367.         }
  368.         else {
  369.             hStart = 284;
  370.             regPtr->syncVia656 = 0;
  371.             fal = 21;             
  372.             regPtr->vTrigger = 2;   
  373.         }        
  374.         regPtr->lumaDelay = 0;  
  375.         regPtr->cbGain = 0x7b;
  376.         regPtr->crGain = 0xAe;
  377.     } else if(displayType == SAA7105_MODE_NTSC720){
  378.         regPtr->hTriggerMSBs = 0;   
  379.         regPtr->hTrigger = 2;
  380.         
  381.         if(enableBT656Sync) {
  382.             regPtr->vTrigNegative = 1;
  383.             regPtr->vTrigger = 4;   
  384.             fal = 13;
  385.             activeLines += 3;
  386.             xOffset = 0;
  387.             regPtr->syncVia656 = 1;
  388.         }
  389.         else {
  390.             regPtr->vTrigNegative = 0;
  391.             regPtr->vTrigger = 0;   
  392.             fal = 17;
  393.             regPtr->syncVia656 = 0;
  394.         }        
  395.         regPtr->lumaDelay = 0;  
  396.         regPtr->chromaPhase = 0x33;
  397.         regPtr->burstAmplitude = 0x3F;
  398.         regPtr->subCarrier0 = 0x1F;
  399.         regPtr->subCarrier1 = 0x7C;
  400.         regPtr->subCarrier2 = 0xF0;
  401.         regPtr->subCarrier3 = 0x21;
  402.         regPtr->cbGain = 0x7b;
  403.         regPtr->crGain = 0xAe;
  404.     }
  405.     regPtr->hLen = hLen;
  406.     regPtr->hLenMsb = hLen >>  8;
  407.     regPtr->xInc = xInc;
  408.     regPtr->xIncMsb = xInc >> 8;
  409.     regPtr->yInc = yInc;
  410.     regPtr->yIncMsb = yInc >> 8;
  411.     regPtr->yIWGTO = yIWGTO;
  412.     regPtr->yIWGTOMsb = yIWGTO >> 8;
  413.     regPtr->yIWGTE = yIWGTE;
  414.     regPtr->yIWGTEMsb = yIWGTE >> 8;
  415.     regPtr->ySkip = ySkip;
  416.     regPtr->ySkipMsb = ySkip >> 8;
  417.     hEnd = hStart + (2 * activePixels);
  418.     regPtr->hStart = hStart; 
  419.     regPtr->hEnd = hEnd;
  420.     regPtr->hStartMSB = hStart >> 8;
  421.     regPtr->hEndMSB = hEnd >> 8;
  422.     
  423.     if(regPtr->inputFormat != SAA7105_IFMT_YCBCR422_INTERLACED){
  424.         activePixels /= 2;
  425.     }
  426.     regPtr->xPix = activePixels;
  427.     regPtr->xPixMsb = activePixels >> 8;
  428.     regPtr->yPix = activeLines;
  429.     regPtr->yPixMsb = activeLines >> 8; 
  430.     
  431.     lal = fal + activeLines;
  432.     regPtr->fal = fal;
  433.     regPtr->falMsb = fal >> 8;
  434.     regPtr->lal = lal;
  435.     regPtr->lalMsb = lal >> 8;
  436.     regPtr->xOfs = xOffset;
  437.     regPtr->xOfsMsb = xOffset >> 8;
  438.     regPtr->yOfsOdd = yOffset;
  439.     regPtr->yOfsOddMsb = yOffset >> 8;
  440.     regPtr->yOfsEven = yOffset;
  441.     regPtr->yOfsEvenMsb = yOffset >> 8; 
  442.     charPtr = (Uint8 *)&_SAA7105_settingsDef;
  443.     _IIC_write(hI2C, _SAA7105_IICADDR,1,&charPtr[1],0xA3);
  444.     _IIC_write(hI2C, _SAA7105_IICADDR,0xfd,&charPtr[0xfd],1);
  445.     if(displayType >= SAA7105_MODE_VGA){
  446.         clearHDSyncEngine();
  447.         loadHDSyncEngine(displayType);
  448.         startHDSyncEngine(displayType);
  449.         setOutputMode(SAA7105_AFMT_RGB);
  450.         /* reset the OSD_FPGA and configure it in approciate mode */
  451.         *(volatile Uint8 *)(0x90080010) = 0x20; // 16-bit mode
  452.     }else{
  453.         setOutputMode(outMode);
  454.         /* reset the OSD_FPGA and configure it in approciate mode */
  455.         *(volatile Uint8 *)(0x90080010) = 0x28; // 8-bit mode
  456.     }
  457.     *(volatile Uint8 *)(0x90080010) &= ~0x20; // un-reset OSD FPGA */
  458.     while(!(*(volatile Uint8 *)(0x90080013) & 0x40));
  459. }
  460.  
  461. /*
  462.  * ======== startHDSyncEngine ========
  463.  */
  464. static void startHDSyncEngine(SAA7105_Mode displayType)
  465. {
  466.     _SAA7105_Regs *regPtr;
  467.     Uint8 *charPtr;
  468.         
  469.     regPtr = &_SAA7105_settingsDef;
  470.     regPtr->hdRGB_YCbCr = 0;
  471.     regPtr->hdFullGain = 1;
  472.     regPtr->hdTriggerPhaseY = 0;
  473.     switch(displayType) {
  474.         case SAA7105_MODE_VGA:
  475.         regPtr->hdLineCounter = 2;
  476.         regPtr->hdTriggerPhaseX = 12;
  477.         break;
  478.         case SAA7105_MODE_SVGA:
  479.         regPtr->hdLineCounter = 4;
  480.         regPtr->hdTriggerPhaseX = 12;
  481.         break;
  482.         case SAA7105_MODE_XGA:
  483.         regPtr->hdLineCounter = 6;
  484.         regPtr->hdTriggerPhaseX = 12;
  485.         break;
  486.         case SAA7105_MODE_HD1080I30F:
  487.         regPtr->hdLineCounter = 2;
  488.         regPtr->hdTriggerPhaseX = 0;
  489.         regPtr->hdRGB_YCbCr = 1;
  490.         regPtr->hdFullGain = 0;
  491.         regPtr->hdTriggerPhaseY = 95;
  492.         break;
  493.         case SAA7105_MODE_HD480P60F:
  494.         regPtr->hdLineCounter = 2;
  495.         regPtr->hdTriggerPhaseX = 5;
  496.         regPtr->hdRGB_YCbCr = 1; 
  497.         regPtr->hdFullGain = 0;
  498.         regPtr->hdTriggerPhaseY = 0;
  499.         break;
  500.         case SAA7105_MODE_HD720P60F:
  501.         regPtr->hdLineCounter = 2;
  502.         regPtr->hdTriggerPhaseX = 15;
  503.         regPtr->hdRGB_YCbCr = 1;
  504.         regPtr->hdFullGain = 0;
  505.         regPtr->hdTriggerPhaseY = 0;
  506.         break;
  507.         default:
  508.         regPtr->hdLineCounter = 2;
  509.         regPtr->hdTriggerPhaseX = 5;
  510.         regPtr->hdRGB_YCbCr = 1;
  511.         regPtr->hdFullGain = 0;
  512.         regPtr->hdTriggerPhaseY = 0;        
  513.         break;
  514.     }       
  515.     
  516.     regPtr->hdLineTypePtr = 0;
  517.     regPtr->hdLinePatternPtr = 0;
  518.     regPtr->hdDurationCtr = 0;
  519.     regPtr->hdEventTypePtr = 0;
  520.     regPtr->hdColorInterpolator = 1;
  521.     regPtr->hdActive = 1;
  522.     charPtr = (Uint8 *)&_SAA7105_settingsDef;
  523.     _IIC_write(hI2C, _SAA7105_IICADDR,0xD4,&charPtr[0xD4],9);
  524.     return;
  525. }
  526. /*
  527.  * ======== SAA7105_close ========
  528.  */
  529. static Int SAA7105_close(EDC_Handle handle) 
  530. {
  531.     Int devId = (Int)handle;
  532.     /*First Check if the Handle is correct */
  533.     if(devId == _SAA7105_IICADDR) {
  534.         /*Put _SAA7105 in power down mode */
  535.         powerdownSAA7105(TRUE);
  536.         return EDC_SUCCESS;    
  537.     } else 
  538.         return EDC_FAILED;
  539. }
  540. /*
  541.  * ======== SAA7105_ctrl ========
  542.  */
  543. static Int SAA7105_ctrl(EDC_Handle handle, SAA7105_Cmd cmd, Arg param)
  544. {
  545.     Int devId = (Int)handle;
  546.     /*First Check if the Handle is correct */
  547.     if(devId != _SAA7105_IICADDR){
  548.         return EDC_FAILED;        
  549.     }
  550.     switch(cmd) {
  551.         case EDC_CONFIG: {
  552.             SAA7105_ConfParams *saa7105Params = (SAA7105_ConfParams *)param;
  553.             hI2C = saa7105Params->hI2C;
  554.             configSAA7105(saa7105Params->mode, saa7105Params->enableSlaveMode, 
  555.                 saa7105Params->aFmt, saa7105Params->iFmt, saa7105Params->enableBT656Sync);
  556.             setSAA7105SyncMode(saa7105Params->mode,
  557.                 saa7105Params->enableBT656Sync);
  558.         }
  559.         break;
  560.         case EDC_RESET:
  561.         resetSAA7105();
  562.         break;
  563.         case SAA7105_POWERDOWN:
  564.         powerdownSAA7105(TRUE);
  565.         break;                 
  566.         case SAA7105_POWERUP:
  567.         powerdownSAA7105(FALSE);
  568.         break;
  569.         case SAA7105_ENABLE_SLAVE_MODE:  
  570.         enableSlaveMode((Bool)param);
  571.         break;
  572.         case SAA7105_ENABLE_COLORBAR:     
  573.         enableColorBars((Bool)param);
  574.         break;
  575.         case SAA7105_LOAD_CURSOR:/* load hardware cursor */
  576.         break;
  577.         case SAA7105_LOAD_LUT: /* load look-up table */
  578.         break;
  579.     }
  580.     return EDC_SUCCESS;        
  581. }
  582. /*
  583.  * ======== SAA7105_open ========
  584.  */
  585. static EDC_Handle SAA7105_open(String devName, Arg optArg)
  586. {
  587.     return (EDC_Handle)_SAA7105_IICADDR;
  588. }
  589. /**************************************************************************/
  590. /* End of file                                                                            */
  591. /**************************************************************************/