- /*
- * Copyright 2003 by Texas Instruments Incorporated.
- * All rights reserved. Property of Texas Instruments Incorporated.
- * Restricted rights to use, duplicate or disclose this code are
- * granted through contract.
- *
- */
- /* "@(#) DDK 1.11.00.00 11-04-03 (ddk-b13)" */
- /*
- * ======== uarthw_evmdm642hal.h ========
- */
- #ifndef UARTHW_EVMDM642HAL_
- #define UARTHW_EVMDM642HAL_
- #ifdef __cplusplus
- extern "C" {
- #endif
- /*
- * Interrupt Enable Register
- * Note that the top 4 bits require the enhanced function mode to be
- * enabled.
- */
- #define UART_IER_RXDATAEN 0x01
- #define UART_IER_THREMPEN 0x02
- #define UART_IER_RXLSTATEN 0x04
- #define UART_IER_MDMSTATEN 0x08
- #define UART_IER_XSLEEPMODE 0x10
- #define UART_IER_XOFFSLEEP 0x20
- #define UART_IER_RTSINTEN 0x40
- #define UART_IER_CSTINTEN 0x80
- /*
- * FIFO Control Register
- * Note that the UART_FCR_TXTRGxx bits only can be used if the enhanced
- * functions are enabled.
- */
- #define UART_FCR_FIFOEN 0x01
- #define UART_FCR_RSTRXFIFO 0x02
- #define UART_FCR_RSTTXFIFO 0x04
- #define UART_FCR_DMAMODE 0x08
- #define UART_FCR_TXTRG8 0x00
- #define UART_FCR_TXTRG16 0x10
- #define UART_FCR_TXTRG32 0x20
- #define UART_FCR_TXTRG56 0x30
- #define UART_FCR_RXTRG8 0x00
- #define UART_FCR_RXTRG16 0x40
- #define UART_FCR_RXTRG56 0x80
- #define UART_FCR_RXTRG60 0xc0
- /*
- * Interrupt Identification Register
- */
- #define UART_IIR_INTSTAT 0x01
- #define UART_INT_NONE 0x01
- #define UART_INT_MSR 0x00
- #define UART_INT_THR 0x02
- #define UART_INT_RHR 0x04
- #define UART_INT_RLSERR 0x06
- #define UART_INT_RXTO 0x0c
- #define UART_INT_XOFF 0x10
- #define UART_INT_CTSRTS 0x20
- /*
- * Line Control Register
- */
- #define UART_LCR_WORDLEN5 0x00
- #define UART_LCR_WORDLEN6 0x01
- #define UART_LCR_WORDLEN7 0x02
- #define UART_LCR_WORDLEN8 0x03
- #define UART_LCR_STOP1 0x00
- #define UART_LCR_STOP2 0x04
- #define UART_LCR_NOPAR 0x00
- #define UART_LCR_PARODD 0x08
- #define UART_LCR_PAREVEN 0x18
- #define UART_LCR_PARMARK 0x28
- #define UART_LCR_PARSPACE 0x38
- #define UART_LCR_BREAKCTL 0x40
- #define UART_LCR_DLTCHEN 0x80
- /*
- * Modem Control Register
- * The top 3 bits are only valid if the enhanced functions are enabled.
- */
- #define UART_MCR_DTR 0x01
- #define UART_MCR_RTS 0x02
- #define UART_MCR_FIFORDYEN 0x04
- #define UART_MCR_IRQENOP 0x08
- #define UART_MCR_LOOPBACK 0x10
- #define UART_MCR_XONANY 0x20
- #define UART_MCR_TCRTLREN 0x40
- #define UART_MCR_CLK4 0x80
- /*
- * Line Status Register
- */
- #define UART_LSR_DATAIN 0x01
- #define UART_LSR_OVERRUN 0x02
- #define UART_LSR_PARERR 0x04
- #define UART_LSR_FRAMERR 0x08
- #define UART_LSR_ERRMASK 0x0e
- #define UART_LSR_BRKINT 0x10
- #define UART_LSR_THREMPTY 0x20
- #define UART_LSR_THRTSREMP 0x40
- #define UART_LSR_RXFIFOERR 0x80
- /*
- * Modem Status Register
- */
- #define UART_MSR_DCTS 0x01
- #define UART_MSR_DDSR 0x02
- #define UART_MSR_DRI 0x04
- #define UART_MSR_DCD 0x08
- #define UART_MSR_CTS 0x10
- #define UART_MSR_DSR 0x20
- #define UART_MSR_RI 0x40
- #define UART_MSR_CD 0x80
- /*
- * Enhanced Feature Register
- */
- #define UART_EFR_RXFCNONE 0x00
- #define UART_EFR_RXFCXO2 0x01
- #define UART_EFR_RXFCXO1 0x02
- #define UART_EFR_RXFCXO12 0x03
- #define UART_EFR_TXFCNONE 0x00
- #define UART_EFR_TXFCXO2 0x04
- #define UART_EFR_TXFCXO1 0x08
- #define UART_EFR_TXFCXO12 0x0c
- #define UART_EFR_ENHFUNCEN 0x10
- #define UART_EFR_SPECCHRDET 0x20
- #define UART_EFR_AUTORTS 0x40
- #define UART_EFR_AUTOCTS 0x80
- /* Note that the _xXC/D bits are only applicable to the TL16C754 (4-port) chip */
- /*
- * FIFO Ready Register
- */
- #define UART_FRDY_TXA 0x01
- #define UART_FRDY_TXB 0x02
- #define UART_FRDY_TXC 0x04
- #define UART_FRDY_TXD 0x08
- #define UART_FRDY_RXA 0x10
- #define UART_FRDY_RXB 0x20
- #define UART_FRDY_RXC 0x40
- #define UART_FRDY_RXD 0x80
- #ifdef __cplusplus
- }
- #endif /* extern "C" */
- #endif /* UARTHW_EVMDM642HAL_ */