开通博客赚积分
发布资源赚积分
分类

源码开发语言/平台
当前位置：首页 > 源码/资料 > 嵌入式/单片机编程 > DSP编程 > 查看源码
evmdm642_vdisparamsSVGA.c
资源名称：DSP-C6000-DM642DEMO.rar　[点击查看]
上传用户：dahaojd
上传日期：2008-01-29
资源大小：14357k
文件大小：5k
源码类别：

DSP编程

开发平台：

C/C++

evmdm642_vdisparamsSVGA.c：源码内容
  1. /*
  2.  *  Copyright 2003 by Texas Instruments Incorporated.
  3.  *  All rights reserved. Property of Texas Instruments Incorporated.
  4.  *  Restricted rights to use, duplicate or disclose this code are
  5.  *  granted through contract.
  6.  *  
  7.  */
  8. /* "@(#) DDK 1.10.00.21 06-26-03 (ddk-b10)" */
  9. #include <vport.h>
  10. #include <vportdis.h>
  11. #include <saa7105.h> 
  12. #include <csl_edma.h>
  14. #include "evmdm642_vdisparams.h"
  16. #define LINE_SZ   800
  17. #define NUM_LINES 600
  19. VPORTDIS_Params EVMDM642_vDisParamsChan = {
  20.     VPORT_MODE_RAW_16BIT, /* dmode:3       */
  21.     VPORT_FLDOP_PROGRESSIVE,/* fldOp:3       */
  23.     VPORT_SCALING_DISABLE,     /* scale:1       */    
  24.     VPORT_RESMPL_DISABLE,      /* resmpl:1      */      
  25.     VPORTDIS_DEFVAL_ENABLE,    /* defValEn:1    */
  26.     VPORTDIS_BPK_10BIT_NORMAL, /*bpk10Bit:1 */
  27.     
  28.     VPORTDIS_VCTL1_HSYNC,  /* vctl1Config:2 */
  29.     VPORTDIS_VCTL2_VSYNC,  /* vctl2Config:2 */
  30.     VPORTDIS_VCTL3_CBLNK,  /* vctl3Config:1 */
  31.     VPORTDIS_EXC_DISABLE,  /* extCtl:3      */
  32.                
  33.     1056,                   /* frmHSize */
  34.     628,                   /* frmVSize */
  36.     0,                     /* imgHOffsetFld1 */
  37.     0,                     /* imgVOffsetFld1 */
  38.     LINE_SZ,               /* imgHSizeFld1   */
  39.     NUM_LINES,             /* imgVSizeFld1   */
  40.     
  41.     0,                     /* imgHOffsetFld2 */
  42.     0,                     /* imgVOffsetFld2 */
  43.     0,                     /* imgHSizeFld2   */
  44.     0,                     /* imgVSizeFld2   */
  46.     800,                   /* hBlnkStart      */                    
  47.     0,                     /* hBlnkStop       */                    
  48.     
  49.     0,                     /* vBlnkXStartFld1 */                    
  50.     1,                     /* vBlnkYStartFld1 */                    
  51.     0,                     /* vBlnkXStopFld1  */                    
  52.     29,                    /* vBlnkYStopFld1  */                    
  53.     
  54.     0,                     /* vBlnkXStartFld2 */                    
  55.     0,                     /* vBlnkYStartFld2 */                    
  56.     0,                     /* vBlnkXStopFld2  */                    
  57.     0,                     /* vBlnkYStopFld2  */                    
  58.     
  59.     0,                     /* xStartFld1 */                         
  60.     1,                     /* yStartFld1 */                         
  61.     
  62.     0,                     /* xStartFld2 */                         
  63.     0,                     /* yStartFld2 */                         
  65.     840-3,                 /* hSyncStart */                         
  66.     968-3,                     /* hSyncStop  */                         
  68.     840-3,                 /* vSyncXStartFld1 */                    
  69.     2,                     /* vSyncYStartFld1 */                    
  70.     840-3,                 /* vSyncXStopFld1  */                    
  71.     6,                     /* vSyncYStopFld1  */                    
  73.     0,                     /* vSyncXStartFld2 */                    
  74.     0,                     /* vSyncYStartFld2 */                    
  75.     0,                     /* vSyncXStopFld2  */                    
  76.     0,                     /* vSyncYStopFld2  */                    
  78.     0x10,                   /* yClipLow        */                    
  79.     0xf0,                   /* yClipHigh       */                    
  80.     
  81.     0x10,                   /* cClipLow        */                    
  82.     0xf0,                   /* cClipHigh       */                    
  83.     
  84.     0x0,                    /*VPDIS_DefVal     */                    
  85.     0x0,
  86.     0x0,
  88.     VPORTDIS_RGBX_DISABLE,  /*rawPk_3_4 disable raw 3/4 packing for RGB output*/
  89.     1,                     /* incPix, for raw mode only */          
  90.     (LINE_SZ>>3),          /*thrld     */
  92.     3,                     /*numFrmBufs*/
  93.     128,                     /*alignment */
  94.     VPORT_FLDS_MERGED,     /*mergeFlds */
  95.     NULL,                  /*segId     */            
  96.     EDMA_OPT_PRI_HIGH,     /*edmaPri   */
  97.     8                      /* irqId    */    
  98. };
  101. VPORT_PortParams EVMDM642_vDisParamsPort = {
  102.     FALSE,                      /*  enableDualChan;     */ 
  103.     VPORT_POLARITY_ACTIVE_HIGH, /* vport control pin 1 polarity    */
  104.     VPORT_POLARITY_ACTIVE_HIGH, /* vport control pin 2 polarity    */
  105.     VPORT_POLARITY_ACTIVE_HIGH, /* vport control pin 3 polarity    */
  106.     &SAA7105_Fxns,
  107.     INV,
  108. };    
  109.           
  110. SAA7105_ConfParams EVMDM642_vDisParamsSAA7105 = {
  111.   SAA7105_AFMT_RGB,
  112.   SAA7105_MODE_SVGA,
  113.   SAA7105_IFMT_RGB565,
  114.   TRUE,
  115.   FALSE,
  116.   INV,                   /*handleI2C */
  117. };