jpegmain.asm
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DSP编程

开发平台:

C/C++

  1. ;******************************************************************************
  2. ;* TMS320C6x C/C++ Codegen                                    PC Version 4.36 *
  3. ;* Date/Time created: Wed Mar 22 15:36:25 2006                                *
  4. ;******************************************************************************
  5. ;******************************************************************************
  6. ;* GLOBAL FILE PARAMETERS                                                     *
  7. ;*                                                                            *
  8. ;*   Architecture      : TMS320C64xx                                          *
  9. ;*   Optimization      : Enabled at level 3                                   *
  10. ;*   Optimizing for    : Speed                                                *
  11. ;*                       Based on options: -o3, no -ms                        *
  12. ;*   Endian            : Little                                               *
  13. ;*   Interrupt Thrshld : Disabled                                             *
  14. ;*   Memory Model      : Large                                                *
  15. ;*   Calls to RTS      : Far                                                  *
  16. ;*   Pipelining        : Enabled                                              *
  17. ;*   Speculative Load  : Enabled                                              *
  18. ;*   Memory Aliases    : Presume not aliases (optimistic)                     *
  19. ;*   Debug Info        : No Debug Info                                        *
  20. ;*                                                                            *
  21. ;******************************************************************************
  22. .asg A15, FP
  23. .asg B14, DP
  24. .asg B15, SP
  25. .global $bss
  26. ; c:tic6000cgtoolsbinopt6x.exe -t -DI0 -v6400 -q -O3 C:DOCUME~1ZHAOQI~1LOCALS~1TempTI2232_2 C:DOCUME~1ZHAOQI~1LOCALS~1TempTI2232_5 -w C:/ICETEK-DM642-C V2.22/jpeg_motion/obj/ 
  27. .sect ".text"
  28. .global _main
  29. ;******************************************************************************
  30. ;* FUNCTION NAME: _main                                                       *
  31. ;*                                                                            *
  32. ;*   Regs Modified     : A0,A1,A2,A3,A4,A5,A6,A7,A8,A9,B0,B1,B2,B3,B4,B5,B6,  *
  33. ;*                           B7,B8,B9,SP,A16,A17,A18,A19,A20,A21,A22,A23,A24, *
  34. ;*                           A25,A26,A27,A28,A29,A30,A31,B16,B17,B18,B19,B20, *
  35. ;*                           B21,B22,B23,B24,B25,B26,B27,B28,B29,B30,B31      *
  36. ;*   Regs Used         : A0,A1,A2,A3,A4,A5,A6,A7,A8,A9,B0,B1,B2,B3,B4,B5,B6,  *
  37. ;*                           B7,B8,B9,SP,A16,A17,A18,A19,A20,A21,A22,A23,A24, *
  38. ;*                           A25,A26,A27,A28,A29,A30,A31,B16,B17,B18,B19,B20, *
  39. ;*                           B21,B22,B23,B24,B25,B26,B27,B28,B29,B30,B31      *
  40. ;*   Local Frame Size  : 8 Args + 0 Auto + 4 Save = 12 byte                   *
  41. ;******************************************************************************
  42. _main:
  43. ;** --------------------------------------------------------------------------*
  44.            MVKL    .S1     _CSLDM642_LIB_,A3 ; |144| 
  45.            MVKH    .S1     _CSLDM642_LIB_,A3 ; |144| 
  46.            STW     .D2T2   B3,*SP--(16)      ; |16| 
  47.            CALL    .S2X    A3                ; |144| 
  48.            ADDKPC  .S2     RL0,B3,4          ; |144| 
  49. RL0:       ; CALL OCCURS                     ; |144| 
  50.            MVKL    .S2     __CSL_init,B4     ; |156| 
  51.            MVKH    .S2     __CSL_init,B4     ; |156| 
  52.            CALL    .S2     B4                ; |156| 
  53.            ADDKPC  .S2     RL1,B3,3          ; |156| 
  54.            MVK     .D1     0xffffffff,A4     ; |156| 
  55. RL1:       ; CALL OCCURS                     ; |156| 
  56.            MVKL    .S1     _CACHE_clean,A3   ; |20| 
  57.            MVKH    .S1     _CACHE_clean,A3   ; |20| 
  58.            ZERO    .S1     A6                ; |20| 
  59.            CALL    .S2X    A3                ; |20| 
  60.            ZERO    .D2     B4                ; |20| 
  61.            MVK     .D1     0x1,A4            ; |20| 
  62.            ADDKPC  .S2     RL2,B3,2          ; |20| 
  63. RL2:       ; CALL OCCURS                     ; |20| 
  64.            MVKL    .S1     _CACHE_setL2Mode,A3 ; |21| 
  65.            MVKH    .S1     _CACHE_setL2Mode,A3 ; |21| 
  66.            MVK     .D1     0x3,A4            ; |21| 
  67.            CALL    .S2X    A3                ; |21| 
  68.            ADDKPC  .S2     RL3,B3,4          ; |21| 
  69. RL3:       ; CALL OCCURS                     ; |21| 
  70.            MVKL    .S1     0x1848200,A3      ; |350| 
  71.            MVKH    .S1     0x1848200,A3      ; |350| 
  72.            LDW     .D1T1   *A3,A3            ; |350| 
  73.            MVKL    .S2     0x1848200,B4      ; |350| 
  74.            MVKL    .S2     0x1848200,B5      ; |351| 
  75.            MVKH    .S2     0x1848200,B4      ; |350| 
  76.            MVKH    .S2     0x1848200,B5      ; |351| 
  77.            OR      .D1     1,A3,A3           ; |350| 
  78.            STW     .D2T1   A3,*B4            ; |350| 
  79.            LDW     .D2T2   *B5,B4            ; |351| 
  80.            NOP             4
  81.            AND     .D2     1,B4,B0           ; |351| 
  82.    [ B0]   B       .S1     L4                ; |351| 
  83.    [!B0]   MVKL    .S1     0x1848200,A3      ; |351| (P) <0,0> 
  84.    [!B0]   MVKH    .S1     0x1848200,A3      ; |351| (P) <0,1> 
  85.    [!B0]   LDW     .D1T1   *A3,A4            ; |351| (P) <0,2>  ^ 
  86. || [ B0]   MVKL    .S1     0x1848204,A3      ; |350| 
  87.    [ B0]   MVKH    .S1     0x1848204,A3      ; |350| 
  88.    [ B0]   LDW     .D1T1   *A3,A3            ; |350| 
  89.            ; BRANCH OCCURS                   ; |351| 
  90. ;** --------------------------------------------------------------------------*
  91.            MVK     .D2     0x1,B0
  92.            NOP             1
  93.            AND     .D1     1,A4,A0           ; |351| (P) <0,7>  ^ 
  94. ||         MVKL    .S1     0x1848200,A3      ; |351| (P) <1,0> 
  95. ;*----------------------------------------------------------------------------*
  96. ;*   SOFTWARE PIPELINE INFORMATION
  97. ;*
  98. ;*      Loop source line                 : 351
  99. ;*      Loop closing brace source line   : 351
  100. ;*      Known Minimum Trip Count         : 1
  101. ;*      Known Max Trip Count Factor      : 1
  102. ;*      Loop Carried Dependency Bound(^) : 7
  103. ;*      Unpartitioned Resource Bound     : 2
  104. ;*      Partitioned Resource Bound(*)    : 2
  105. ;*      Resource Partition:
  106. ;*                                A-side   B-side
  107. ;*      .L units                     0        0     
  108. ;*      .S units                     2*       1     
  109. ;*      .D units                     1        0     
  110. ;*      .M units                     0        0     
  111. ;*      .X cross paths               0        0     
  112. ;*      .T address paths             1        0     
  113. ;*      Long read paths              0        0     
  114. ;*      Long write paths             0        0     
  115. ;*      Logical  ops (.LS)           0        0     (.L or .S unit)
  116. ;*      Addition ops (.LSD)          1        1     (.L or .S or .D unit)
  117. ;*      Bound(.L .S .LS)             1        1     
  118. ;*      Bound(.L .S .D .LS .LSD)     2*       1     
  119. ;*
  120. ;*      Searching for software pipeline schedule at ...
  121. ;*         ii = 7  Schedule found with 3 iterations in parallel
  122. ;*
  123. ;*      Register Usage Table:
  124. ;*          +-----------------------------------------------------------------+
  125. ;*          |AAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAA|BBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBB|
  126. ;*          |00000000001111111111222222222233|00000000001111111111222222222233|
  127. ;*          |01234567890123456789012345678901|01234567890123456789012345678901|
  128. ;*          |--------------------------------+--------------------------------|
  129. ;*       0: |*  **                           |*                               |
  130. ;*       1: |   **                           |*                               |
  131. ;*       2: |    *                           |*                               |
  132. ;*       3: |    *                           |*                               |
  133. ;*       4: |    *                           |*                               |
  134. ;*       5: |    *                           |*                               |
  135. ;*       6: |    *                           |*                               |
  136. ;*          +-----------------------------------------------------------------+
  137. ;*
  138. ;*      Done
  139. ;*
  140. ;*      Loop is interruptible
  141. ;*      Collapsed epilog stages     : 2
  142. ;*      Prolog not removed
  143. ;*      Collapsed prolog stages     : 0
  144. ;*
  145. ;*      Minimum required memory pad : 0 bytes
  146. ;*
  147. ;*      Minimum safe trip count     : 1
  148. ;*----------------------------------------------------------------------------*
  149. ;*       SETUP CODE
  150. ;*
  151. ;*                  MVK             0x1,B0
  152. ;*                  ZERO            A4
  153. ;*
  154. ;*        SINGLE SCHEDULED ITERATION
  155. ;*
  156. ;*        C40:
  157. ;*   0              MVKL    .S1     0x1848200,A3      ; |351| 
  158. ;*   1              MVKH    .S1     0x1848200,A3      ; |351| 
  159. ;*   2      [ B0]   LDW     .D1T1   *A3,A4            ; |351|  ^ 
  160. ;*   3              NOP             4
  161. ;*   7              AND     .D1     1,A4,A0           ; |351|  ^ 
  162. ;*   8      [ A0]   ZERO    .D2     B0                ;  ^ 
  163. ;*   9      [ B0]   B       .S2     C40               ; |351| 
  164. ;*  10              NOP             5
  165. ;*                  ; BRANCH OCCURS                   ; |351| 
  166. ;*----------------------------------------------------------------------------*
  167. L1:    ; PIPED LOOP PROLOG
  168. ;** --------------------------------------------------------------------------*
  169. L2:    ; PIPED LOOP KERNEL
  170.    [ A0]   ZERO    .D2     B0                ; <0,8>  ^ 
  171. ||         MVKH    .S1     0x1848200,A3      ; |351| <1,1> 
  172.    [ B0]   BNOP    .S2     L2,4              ; |351| <0,9> 
  173. || [ B0]   LDW     .D1T1   *A3,A4            ; |351| <1,2>  ^ 
  174.            AND     .D1     1,A4,A0           ; |351| <1,7>  ^ 
  175. ||         MVKL    .S1     0x1848200,A3      ; |351| <2,0> 
  176. ;** --------------------------------------------------------------------------*
  177. L3:    ; PIPED LOOP EPILOG
  178. ;** --------------------------------------------------------------------------*
  179.            MVKL    .S1     0x1848204,A3      ; |350| 
  180.            MVKH    .S1     0x1848204,A3      ; |350| 
  181.            LDW     .D1T1   *A3,A3            ; |350| 
  182. ;** --------------------------------------------------------------------------*
  183. L4:    
  184.            MVKL    .S2     0x1848204,B4      ; |350| 
  185.            MVKL    .S2     0x1848204,B5      ; |351| 
  186.            MVKH    .S2     0x1848204,B4      ; |350| 
  187.            MVKH    .S2     0x1848204,B5      ; |351| 
  188.            OR      .D1     1,A3,A3           ; |350| 
  189.            STW     .D2T1   A3,*B4            ; |350| 
  190.            LDW     .D2T2   *B5,B4            ; |351| 
  191.            NOP             4
  192.            AND     .D2     1,B4,B0           ; |351| 
  193.    [ B0]   B       .S1     L8                ; |351| 
  194.    [ B0]   MVKL    .S2     _DAT_open,B5      ; |25| 
  195. || [!B0]   MVKL    .S1     0x1848204,A3      ; |351| (P) <0,0> 
  196.    [ B0]   MVKH    .S2     _DAT_open,B5      ; |25| 
  197. || [!B0]   MVKH    .S1     0x1848204,A3      ; |351| (P) <0,1> 
  198.    [!B0]   LDW     .D1T1   *A3,A4            ; |351| (P) <0,2>  ^ 
  199.            NOP             2
  200.            ; BRANCH OCCURS                   ; |351| 
  201. ;** --------------------------------------------------------------------------*
  202.            MVK     .D2     0x1,B0
  203.            MVKL    .S1     0x1848204,A3      ; |351| (P) <1,0> 
  204.            AND     .D1     1,A4,A0           ; |351| (P) <0,7>  ^ 
  205. ;*----------------------------------------------------------------------------*
  206. ;*   SOFTWARE PIPELINE INFORMATION
  207. ;*
  208. ;*      Loop source line                 : 351
  209. ;*      Loop closing brace source line   : 351
  210. ;*      Known Minimum Trip Count         : 1
  211. ;*      Known Max Trip Count Factor      : 1
  212. ;*      Loop Carried Dependency Bound(^) : 7
  213. ;*      Unpartitioned Resource Bound     : 2
  214. ;*      Partitioned Resource Bound(*)    : 2
  215. ;*      Resource Partition:
  216. ;*                                A-side   B-side
  217. ;*      .L units                     0        0     
  218. ;*      .S units                     2*       1     
  219. ;*      .D units                     1        0     
  220. ;*      .M units                     0        0     
  221. ;*      .X cross paths               0        0     
  222. ;*      .T address paths             1        0     
  223. ;*      Long read paths              0        0     
  224. ;*      Long write paths             0        0     
  225. ;*      Logical  ops (.LS)           0        0     (.L or .S unit)
  226. ;*      Addition ops (.LSD)          1        1     (.L or .S or .D unit)
  227. ;*      Bound(.L .S .LS)             1        1     
  228. ;*      Bound(.L .S .D .LS .LSD)     2*       1     
  229. ;*
  230. ;*      Searching for software pipeline schedule at ...
  231. ;*         ii = 7  Schedule found with 3 iterations in parallel
  232. ;*
  233. ;*      Register Usage Table:
  234. ;*          +-----------------------------------------------------------------+
  235. ;*          |AAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAA|BBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBB|
  236. ;*          |00000000001111111111222222222233|00000000001111111111222222222233|
  237. ;*          |01234567890123456789012345678901|01234567890123456789012345678901|
  238. ;*          |--------------------------------+--------------------------------|
  239. ;*       0: |*  **                           |*                               |
  240. ;*       1: |   **                           |*                               |
  241. ;*       2: |    *                           |*                               |
  242. ;*       3: |    *                           |*                               |
  243. ;*       4: |    *                           |*                               |
  244. ;*       5: |    *                           |*                               |
  245. ;*       6: |    *                           |*                               |
  246. ;*          +-----------------------------------------------------------------+
  247. ;*
  248. ;*      Done
  249. ;*
  250. ;*      Loop is interruptible
  251. ;*      Collapsed epilog stages     : 2
  252. ;*      Prolog not removed
  253. ;*      Collapsed prolog stages     : 0
  254. ;*
  255. ;*      Minimum required memory pad : 0 bytes
  256. ;*
  257. ;*      Minimum safe trip count     : 1
  258. ;*----------------------------------------------------------------------------*
  259. ;*       SETUP CODE
  260. ;*
  261. ;*                  MVK             0x1,B0
  262. ;*                  ZERO            A4
  263. ;*
  264. ;*        SINGLE SCHEDULED ITERATION
  265. ;*
  266. ;*        C18:
  267. ;*   0              MVKL    .S1     0x1848204,A3      ; |351| 
  268. ;*   1              MVKH    .S1     0x1848204,A3      ; |351| 
  269. ;*   2      [ B0]   LDW     .D1T1   *A3,A4            ; |351|  ^ 
  270. ;*   3              NOP             4
  271. ;*   7              AND     .D1     1,A4,A0           ; |351|  ^ 
  272. ;*   8      [ A0]   ZERO    .D2     B0                ;  ^ 
  273. ;*   9      [ B0]   B       .S2     C18               ; |351| 
  274. ;*  10              NOP             5
  275. ;*                  ; BRANCH OCCURS                   ; |351| 
  276. ;*----------------------------------------------------------------------------*
  277. L5:    ; PIPED LOOP PROLOG
  278. ;** --------------------------------------------------------------------------*
  279. L6:    ; PIPED LOOP KERNEL
  280.    [ A0]   ZERO    .D2     B0                ; <0,8>  ^ 
  281. ||         MVKH    .S1     0x1848204,A3      ; |351| <1,1> 
  282.    [ B0]   BNOP    .S2     L6,4              ; |351| <0,9> 
  283. || [ B0]   LDW     .D1T1   *A3,A4            ; |351| <1,2>  ^ 
  284.            AND     .D1     1,A4,A0           ; |351| <1,7>  ^ 
  285. ||         MVKL    .S1     0x1848204,A3      ; |351| <2,0> 
  286. ;** --------------------------------------------------------------------------*
  287. L7:    ; PIPED LOOP EPILOG
  288. ;** --------------------------------------------------------------------------*
  289.            MVKL    .S2     _DAT_open,B5      ; |25| 
  290.            MVKH    .S2     _DAT_open,B5      ; |25| 
  291. ;** --------------------------------------------------------------------------*
  292. L8:    
  293.            CALL    .S2     B5                ; |25| 
  294.            ADDKPC  .S2     RL4,B3,1          ; |25| 
  295.            MVK     .D1     0x1,A6            ; |25| 
  296.            MVK     .D2     0x3,B4            ; |25| 
  297.            ZERO    .S1     A4                ; |25| 
  298. RL4:       ; CALL OCCURS                     ; |25| 
  299.            MVKL    .S2     0x184200c,B4      ; |368| 
  300.            MVKH    .S2     0x184200c,B4      ; |368| 
  301.            LDW     .D2T2   *B4,B4            ; |368| 
  302.            MVKL    .S1     0x184200c,A3      ; |368| 
  303.            MVKH    .S1     0x184200c,A3      ; |368| 
  304.            ZERO    .D1     A4                ; |360| 
  305.            MVKH    .S1     0x1840000,A4      ; |360| 
  306.            MVKL    .S2     0x1842004,B4      ; |364| 
  307. ||         OR      .D2     7,B4,B5           ; |368| 
  308.            STW     .D1T2   B5,*A3            ; |368| 
  309. ||         MVKH    .S2     0x1842004,B4      ; |364| 
  310.            LDW     .D2T2   *B4,B4            ; |364| 
  311.            NOP             2
  312.            MVKL    .S1     0x1842004,A3      ; |364| 
  313.            MVKH    .S1     0x1842004,A3      ; |364| 
  314.            OR      .D2     7,B4,B4           ; |364| 
  315.            MVKL    .S1     _ACPY2_6X1X_init,A3 ; |32| 
  316. ||         STW     .D1T2   B4,*A3            ; |364| 
  317.            LDW     .D1T1   *A4,A4            ; |360| 
  318. ||         MVKH    .S1     _ACPY2_6X1X_init,A3 ; |32| 
  319.            ZERO    .D2     B4                ; |360| 
  320.            CALL    .S2X    A3                ; |32| 
  321.            MVKH    .S2     0x1840000,B4      ; |360| 
  322.            ADDKPC  .S2     RL5,B3,0          ; |32| 
  323.            EXTU    .S1     A4,3,3,A4         ; |360| 
  324.            SET     .S1     A4,29,29,A4       ; |360| 
  325.            STW     .D2T1   A4,*B4            ; |360| 
  326. RL5:       ; CALL OCCURS                     ; |32| 
  327.            MVKL    .S1     _DMAN_init,A3     ; |33| 
  328.            MVKH    .S1     _DMAN_init,A3     ; |33| 
  329.            NOP             1
  330.            CALL    .S2X    A3                ; |33| 
  331.            ADDKPC  .S2     RL6,B3,4          ; |33| 
  332. RL6:       ; CALL OCCURS                     ; |33| 
  333.            MVKL    .S1     _DMAN_setup,A3    ; |34| 
  334.            MVKH    .S1     _DMAN_setup,A3    ; |34| 
  335.            MVKL    .S1     _intHeap,A4       ; |34| 
  336.            MVKH    .S1     _intHeap,A4       ; |34| 
  337. ||         CALL    .S2X    A3                ; |34| 
  338.            LDW     .D1T1   *A4,A4            ; |34| 
  339.            ADDKPC  .S2     RL7,B3,3          ; |34| 
  340. RL7:       ; CALL OCCURS                     ; |34| 
  341.            MVKL    .S2     _CHAN_init,B4     ; |37| 
  342.            MVKH    .S2     _CHAN_init,B4     ; |37| 
  343.            CALL    .S2     B4                ; |37| 
  344.            ADDKPC  .S2     RL8,B3,4          ; |37| 
  345. RL8:       ; CALL OCCURS                     ; |37| 
  346.            MVKL    .S1     _ICC_init,A3      ; |38| 
  347.            MVKH    .S1     _ICC_init,A3      ; |38| 
  348.            NOP             1
  349.            CALL    .S2X    A3                ; |38| 
  350.            ADDKPC  .S2     RL9,B3,4          ; |38| 
  351. RL9:       ; CALL OCCURS                     ; |38| 
  352.            MVKL    .S1     _SCOM_init,A3     ; |39| 
  353.            MVKH    .S1     _SCOM_init,A3     ; |39| 
  354.            NOP             1
  355.            CALL    .S2X    A3                ; |39| 
  356.            ADDKPC  .S2     RL10,B3,4         ; |39| 
  357. RL10:      ; CALL OCCURS                     ; |39| 
  358.            MVKL    .S2     _intHeap,B4       ; |42| 
  359.            MVKH    .S2     _intHeap,B4       ; |42| 
  360.            MVKL    .S1     _CHAN_setup,A3    ; |42| 
  361. ||         LDW     .D2T2   *B4,B5            ; |42| 
  362.            MVKL    .S2     _extHeap,B4       ; |42| 
  363. ||         MVKH    .S1     _CHAN_setup,A3    ; |42| 
  364.            MVKH    .S2     _extHeap,B4       ; |42| 
  365.            CALL    .S2X    A3                ; |42| 
  366.            LDW     .D2T2   *B4,B4            ; |42| 
  367.            MV      .D1X    B5,A4             ; |42| 
  368.            MVK     .L2     0x1,B6            ; |42| 
  369.            ZERO    .S1     A8                ; |42| 
  370.            ZERO    .D2     B8                ; |42| 
  371. ||         MV      .D1X    B5,A6             ; |42| 
  372. ||         ADDKPC  .S2     RL11,B3,0         ; |42| 
  373. RL11:      ; CALL OCCURS                     ; |42| 
  374.            MVKL    .S1     _UTL_setLogs,A3   ; |45| 
  375.            MVKH    .S1     _UTL_setLogs,A3   ; |45| 
  376.            MVKL    .S1     _trace,A4         ; |45| 
  377.            CALL    .S2X    A3                ; |45| 
  378.            MVKH    .S1     _trace,A4         ; |45| 
  379.            MV      .D1     A4,A6             ; |45| 
  380.            MV      .D2X    A4,B6             ; |45| 
  381.            MV      .D2X    A4,B4             ; |45| 
  382.            ADDKPC  .S2     RL12,B3,0         ; |45| 
  383. RL12:      ; CALL OCCURS                     ; |45| 
  384.            MVKL    .S2     _tskVideoInputInit,B4 ; |47| 
  385.            MVKH    .S2     _tskVideoInputInit,B4 ; |47| 
  386.            CALL    .S2     B4                ; |47| 
  387.            ADDKPC  .S2     RL13,B3,4         ; |47| 
  388. RL13:      ; CALL OCCURS                     ; |47| 
  389.            MVKL    .S2     _tskVideoOutputInit,B4 ; |48| 
  390.            MVKH    .S2     _tskVideoOutputInit,B4 ; |48| 
  391.            CALL    .S2     B4                ; |48| 
  392.            ADDKPC  .S2     RL14,B3,4         ; |48| 
  393. RL14:      ; CALL OCCURS                     ; |48| 
  394. ;** --------------------------------------------------------------------------*
  395.            MVKL    .S1     _tskVideoInputStart,A3 ; |54| 
  396.            MVKH    .S1     _tskVideoInputStart,A3 ; |54| 
  397.            NOP             1
  398.            CALL    .S2X    A3                ; |54| 
  399.            ADDKPC  .S2     RL15,B3,4         ; |54| 
  400. RL15:      ; CALL OCCURS                     ; |54| 
  401.            MVKL    .S1     _tskVideoOutputStart,A3 ; |55| 
  402.            MVKH    .S1     _tskVideoOutputStart,A3 ; |55| 
  403.            NOP             1
  404.            CALL    .S2X    A3                ; |55| 
  405.            ADDKPC  .S2     RL16,B3,4         ; |55| 
  406. RL16:      ; CALL OCCURS                     ; |55| 
  407.            MVKL    .S1     _LOG_printf,A3    ; |56| 
  408.            MVKH    .S1     _LOG_printf,A3    ; |56| 
  409. ||         MVKL    .S2     _UTL_logDebugHandle,B4 ; |56| 
  410.            MVKH    .S2     _UTL_logDebugHandle,B4 ; |56| 
  411.            CALL    .S2X    A3                ; |56| 
  412.            LDW     .D2T1   *B4,A4            ; |56| 
  413.            MVKL    .S2     SL1+0,B5          ; |56| 
  414.            MVKH    .S2     SL1+0,B5          ; |56| 
  415.            ADDKPC  .S2     RL17,B3,0         ; |56| 
  416.            STW     .D2T2   B5,*+SP(4)        ; |56| 
  417. RL17:      ; CALL OCCURS                     ; |56| 
  418.            MVKL    .S1     _tskProcessInit,A3 ; |58| 
  419.            MVKH    .S1     _tskProcessInit,A3 ; |58| 
  420.            NOP             1
  421.            CALL    .S2X    A3                ; |58| 
  422.            ADDKPC  .S2     RL18,B3,4         ; |58| 
  423. RL18:      ; CALL OCCURS                     ; |58| 
  424.            MVKL    .S1     _tskProcessStart,A3 ; |59| 
  425.            MVKH    .S1     _tskProcessStart,A3 ; |59| 
  426.            NOP             1
  427.            CALL    .S2X    A3                ; |59| 
  428.            ADDKPC  .S2     RL19,B3,4         ; |59| 
  429. RL19:      ; CALL OCCURS                     ; |59| 
  430.            MVKL    .S1     _LOG_printf,A3    ; |60| 
  431.            MVKH    .S1     _LOG_printf,A3    ; |60| 
  432. ||         MVKL    .S2     _UTL_logDebugHandle,B4 ; |60| 
  433.            MVKH    .S2     _UTL_logDebugHandle,B4 ; |60| 
  434.            CALL    .S2X    A3                ; |60| 
  435.            LDW     .D2T1   *B4,A4            ; |60| 
  436.            MVKL    .S2     SL2+0,B5          ; |60| 
  437.            MVKH    .S2     SL2+0,B5          ; |60| 
  438.            ADDKPC  .S2     RL20,B3,0         ; |60| 
  439.            STW     .D2T2   B5,*+SP(4)        ; |60| 
  440. RL20:      ; CALL OCCURS                     ; |60| 
  441.            MVKL    .S2     _thrControlInit,B4 ; |62| 
  442.            MVKH    .S2     _thrControlInit,B4 ; |62| 
  443.            CALL    .S2     B4                ; |62| 
  444.            ADDKPC  .S2     RL21,B3,4         ; |62| 
  445. RL21:      ; CALL OCCURS                     ; |62| 
  446.            MVKL    .S1     _thrControlStartup,A3 ; |63| 
  447.            MVKH    .S1     _thrControlStartup,A3 ; |63| 
  448.            NOP             1
  449.            CALL    .S2X    A3                ; |63| 
  450.            ADDKPC  .S2     RL22,B3,4         ; |63| 
  451. RL22:      ; CALL OCCURS                     ; |63| 
  452.            MVKL    .S1     _LOG_printf,A3    ; |64| 
  453.            MVKH    .S1     _LOG_printf,A3    ; |64| 
  454.            MVKL    .S1     _UTL_logDebugHandle,A4 ; |64| 
  455.            MVKH    .S1     _UTL_logDebugHandle,A4 ; |64| 
  456. ||         CALL    .S2X    A3                ; |64| 
  457.            LDW     .D1T1   *A4,A4            ; |64| 
  458.            MVKL    .S2     SL3+0,B4          ; |64| 
  459.            MVKH    .S2     SL3+0,B4          ; |64| 
  460.            STW     .D2T2   B4,*+SP(4)        ; |64| 
  461.            ADDKPC  .S2     RL23,B3,0         ; |64| 
  462. RL23:      ; CALL OCCURS                     ; |64| 
  463.            MVKL    .S2     _SCOM_create,B5   ; |67| 
  464.            MVKH    .S2     _SCOM_create,B5   ; |67| 
  465.            CALL    .S2     B5                ; |67| 
  466.            MVKL    .S1     SL4+0,A4          ; |67| 
  467.            ZERO    .D2     B4                ; |67| 
  468.            MVKH    .S1     SL4+0,A4          ; |67| 
  469.            ADDKPC  .S2     RL24,B3,1         ; |67| 
  470. RL24:      ; CALL OCCURS                     ; |67| 
  471.            MVKL    .S1     _SCOM_create,A3   ; |68| 
  472.            MVKH    .S1     _SCOM_create,A3   ; |68| 
  473.            MVKL    .S1     SL5+0,A4          ; |68| 
  474.            CALL    .S2X    A3                ; |68| 
  475.            ZERO    .D2     B4                ; |68| 
  476.            MVKH    .S1     SL5+0,A4          ; |68| 
  477.            ADDKPC  .S2     RL25,B3,2         ; |68| 
  478. RL25:      ; CALL OCCURS                     ; |68| 
  479. ;** --------------------------------------------------------------------------*
  480.            MVKL    .S2     _SCOM_create,B5   ; |69| 
  481.            MVKH    .S2     _SCOM_create,B5   ; |69| 
  482.            CALL    .S2     B5                ; |69| 
  483.            MVKL    .S1     SL6+0,A4          ; |69| 
  484.            ADDKPC  .S2     RL26,B3,1         ; |69| 
  485.            MVKH    .S1     SL6+0,A4          ; |69| 
  486.            ZERO    .D2     B4                ; |69| 
  487. RL26:      ; CALL OCCURS                     ; |69| 
  488.            MVKL    .S2     _SCOM_create,B5   ; |70| 
  489.            MVKH    .S2     _SCOM_create,B5   ; |70| 
  490.            CALL    .S2     B5                ; |70| 
  491.            MVKL    .S1     SL7+0,A4          ; |70| 
  492.            ZERO    .D2     B4                ; |70| 
  493.            MVKH    .S1     SL7+0,A4          ; |70| 
  494.            ADDKPC  .S2     RL27,B3,1         ; |70| 
  495. RL27:      ; CALL OCCURS                     ; |70| 
  496.            MVKL    .S1     _SCOM_create,A3   ; |71| 
  497.            MVKH    .S1     _SCOM_create,A3   ; |71| 
  498.            MVKL    .S1     SL8+0,A4          ; |71| 
  499.            CALL    .S2X    A3                ; |71| 
  500.            ZERO    .D2     B4                ; |71| 
  501.            MVKH    .S1     SL8+0,A4          ; |71| 
  502.            ADDKPC  .S2     RL28,B3,2         ; |71| 
  503. RL28:      ; CALL OCCURS                     ; |71| 
  504.            MVKL    .S1     _SCOM_create,A3   ; |72| 
  505.            MVKH    .S1     _SCOM_create,A3   ; |72| 
  506.            MVKL    .S1     SL9+0,A4          ; |72| 
  507.            CALL    .S2X    A3                ; |72| 
  508.            ZERO    .D2     B4                ; |72| 
  509.            MVKH    .S1     SL9+0,A4          ; |72| 
  510.            ADDKPC  .S2     RL29,B3,2         ; |72| 
  511. RL29:      ; CALL OCCURS                     ; |72| 
  512.            MVKL    .S2     _LOG_printf,B4    ; |74| 
  513.            MVKH    .S2     _LOG_printf,B4    ; |74| 
  514. ||         MVKL    .S1     _UTL_logDebugHandle,A3 ; |74| 
  515.            MVKH    .S1     _UTL_logDebugHandle,A3 ; |74| 
  516. ||         CALL    .S2     B4                ; |74| 
  517.            LDW     .D1T1   *A3,A4            ; |74| 
  518.            MVKL    .S2     SL10+0,B5         ; |74| 
  519.            MVKH    .S2     SL10+0,B5         ; |74| 
  520.            STW     .D2T2   B5,*+SP(4)        ; |74| 
  521.            ADDKPC  .S2     RL30,B3,0         ; |74| 
  522. RL30:      ; CALL OCCURS                     ; |74| 
  523.            MVKL    .S1     _UTL_showHeapUsageFunc,A3 ; |78| 
  524.            MVKL    .S2     _intHeap,B5       ; |78| 
  525. ||         MVKH    .S1     _UTL_showHeapUsageFunc,A3 ; |78| 
  526.            MVKH    .S2     _intHeap,B5       ; |78| 
  527.            CALL    .S2X    A3                ; |78| 
  528.            LDW     .D2T1   *B5,A4            ; |78| 
  529.            MVKL    .S2     SL11+0,B4         ; |78| 
  530.            MVKH    .S2     SL11+0,B4         ; |78| 
  531.            ADDKPC  .S2     RL31,B3,1         ; |78| 
  532. RL31:      ; CALL OCCURS                     ; |78| 
  533.            MVKL    .S1     _UTL_showHeapUsageFunc,A5 ; |79| 
  534.            MVKH    .S1     _UTL_showHeapUsageFunc,A5 ; |79| 
  535.            MVKL    .S1     _extHeap,A3       ; |79| 
  536.            MVKH    .S1     _extHeap,A3       ; |79| 
  537. ||         CALL    .S2X    A5                ; |79| 
  538.            LDW     .D1T1   *A3,A4            ; |79| 
  539.            MVKL    .S2     SL12+0,B4         ; |79| 
  540.            MVKH    .S2     SL12+0,B4         ; |79| 
  541.            ADDKPC  .S2     RL32,B3,1         ; |79| 
  542. RL32:      ; CALL OCCURS                     ; |79| 
  543.            LDW     .D2T2   *++SP(16),B3      ; |80| 
  544.            NOP             4
  545.            RETNOP  .S2     B3,5              ; |80| 
  546.            ; BRANCH OCCURS                   ; |80| 
  547. ;******************************************************************************
  548. ;* STRINGS                                                                    *
  549. ;******************************************************************************
  550. .sect ".const"
  551. SL1: .string "Video I/O started",0
  552. SL2: .string "Process thread started",0
  553. SL3: .string "Control thread started",0
  554. SL4: .string "INTOPROC",0
  555. SL5: .string "PROCTOIN",0
  556. SL6: .string "PROCTOOUT",0
  557. SL7: .string "OUTTOPROC",0
  558. SL8: .string "PROCTONET",0
  559. SL9: .string "NETTOPROC",0
  560. SL10: .string "Application started",0
  561. SL11: .string "intHeap",0
  562. SL12: .string "extHeap",0
  563. ;******************************************************************************
  564. ;* UNDEFINED EXTERNAL REFERENCES                                              *
  565. ;******************************************************************************
  566. .global __CSL_init
  567. .global _CSLDM642_LIB_
  568. .global _CACHE_setL2Mode
  569. .global _CACHE_clean
  570. .global _DAT_open
  571. .global _ICC_init
  572. .global _CHAN_init
  573. .global _CHAN_setup
  574. .global _SCOM_init
  575. .global _SCOM_create
  576. .global _LOG_printf
  577. .global _UTL_setLogs
  578. .global _UTL_showHeapUsageFunc
  579. .global _tskVideoInputInit
  580. .global _tskVideoOutputInit
  581. .global _tskProcessInit
  582. .global _ACPY2_6X1X_init
  583. .global _DMAN_init
  584. .global _DMAN_setup
  585. .global _tskVideoInputStart
  586. .global _tskVideoOutputStart
  587. .global _tskProcessStart
  588. .global _thrControlInit
  589. .global _thrControlStartup
  590. .global _UTL_logDebugHandle
  591. .global _trace
  592. .global _intHeap
  593. .global _extHeap