os_cpu_a.lst
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上传日期：2017-01-28
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- ARM Macro Assembler Page 1
- 1 00000000 ;*******************************************************
- *************************************************
- 2 00000000 ; uC/OS-II
-
- 3 00000000 ; The Real-Time
- Kernel
- 4 00000000 ;
- 5 00000000 ; (c) Copyright 1992-2006,
- Micrium, Weston, FL
- 6 00000000 ; All Rights Re
- served
- 7 00000000 ;
- 8 00000000 ; Generic ARM
- Port
- 9 00000000 ;
- 10 00000000 ; File : OS_CPU_A.ASM
- 11 00000000 ; Version : V2.86(fix)
- 12 00000000 ; By : Jean J. Labrosse
- 13 00000000 ;
- 14 00000000 ; For : ARMv7M Cortex-M3
- 15 00000000 ; Mode : Thumb2
- 16 00000000 ; Toolchain : RealView Development Suite
- 17 00000000 ; RealView Microcontroller Development Kit (
- MDK)
- 18 00000000 ; ARM Developer Suite (ADS)
- 19 00000000 ; Keil uVision
- 20 00000000 ;*******************************************************
- *************************************************
- 21 00000000
- 22 00000000 ;*******************************************************
- *************************************************
- 23 00000000 ; PUBLIC FUNCT
- IONS
- 24 00000000 ;*******************************************************
- *************************************************
- 25 00000000
- 26 00000000 EXTERN OSRunning ; External referenc
- es
- 27 00000000 EXTERN OSPrioCur
- 28 00000000 EXTERN OSPrioHighRdy
- 29 00000000 EXTERN OSTCBCur
- 30 00000000 EXTERN OSTCBHighRdy
- 31 00000000 EXTERN OSIntNesting
- 32 00000000 EXTERN OSIntExit
- 33 00000000 EXTERN OSTaskSwHook
- 34 00000000
- 35 00000000
- 36 00000000 EXPORT OS_CPU_SR_Save ; Functions decl
- ared in this file
- 37 00000000 EXPORT OS_CPU_SR_Restore
- 38 00000000 EXPORT OSStartHighRdy
- 39 00000000 EXPORT OSCtxSw
- 40 00000000 EXPORT OSIntCtxSw
- 41 00000000 EXPORT OS_CPU_PendSVHandler
- 42 00000000
- 43 00000000 ;*******************************************************
- *************************************************
- 44 00000000 ; EQUATES
-
- ARM Macro Assembler Page 2
- 45 00000000 ;*******************************************************
- *************************************************
- 46 00000000
- 47 00000000 E000ED04
- NVIC_INT_CTRL
- EQU 0xE000ED04 ; Interrupt control
- state register.
- 48 00000000 E000ED20
- NVIC_SYSPRI2
- EQU 0xE000ED20 ; System priority r
- egister (priority 2
- ).
- 49 00000000 0000FFFF
- NVIC_PENDSV_PRI
- EQU 0xFFFF ; PendSV priority v
- alue (lowest).
- 50 00000000 10000000
- NVIC_PENDSVSET
- EQU 0x10000000 ; Value to trigger
- PendSV exception.
- 51 00000000
- 52 00000000 ;*******************************************************
- *************************************************
- 53 00000000 ; CODE GENERATION D
- IRECTIVES
- 54 00000000 ;*******************************************************
- *************************************************
- 55 00000000
- 56 00000000 AREA |.text|, CODE, READONLY, ALIGN=
- 2
- 57 00000000 THUMB
- 58 00000000 REQUIRE8
- 59 00000000 PRESERVE8
- 60 00000000
- 61 00000000 ;*******************************************************
- *************************************************
- 62 00000000 ; CRITICAL SECTION MET
- HOD 3 FUNCTIONS
- 63 00000000 ;
- 64 00000000 ; Description: Disable/Enable interrupts by preserving t
- he state of interrupts. Generally speaking you
- 65 00000000 ; would store the state of the interrupt di
- sable flag in the local variable 'cpu_sr' and then
- 66 00000000 ; disable interrupts. 'cpu_sr' is allocate
- d in all of uC/OS-II's functions that need to
- 67 00000000 ; disable interrupts. You would restore th
- e interrupt disable state by copying back 'cpu_sr'
- 68 00000000 ; into the CPU's status register.
- 69 00000000 ;
- 70 00000000 ; Prototypes : OS_CPU_SR OS_CPU_SR_Save(void);
- 71 00000000 ; void OS_CPU_SR_Restore(OS_CPU_S
- R cpu_sr);
- 72 00000000 ;
- 73 00000000 ;
- 74 00000000 ; Note(s) : 1) These functions are used in general li
- ke this:
- 75 00000000 ;
- 76 00000000 ; void Task (void *p_arg)
- 77 00000000 ; {
- ARM Macro Assembler Page 3
- 78 00000000 ; #if OS_CRITICAL_METHOD == 3 /
- * Allocate storage for CPU status register */
- 79 00000000 ; OS_CPU_SR cpu_sr;
- 80 00000000 ; #endif
- 81 00000000 ;
- 82 00000000 ; :
- 83 00000000 ; :
- 84 00000000 ; OS_ENTER_CRITICAL(); /
- * cpu_sr = OS_CPU_SaveSR(); */
- 85 00000000 ; :
- 86 00000000 ; :
- 87 00000000 ; OS_EXIT_CRITICAL(); /
- * OS_CPU_RestoreSR(cpu_sr); */
- 88 00000000 ; :
- 89 00000000 ; :
- 90 00000000 ; }
- 91 00000000 ;*******************************************************
- *************************************************
- 92 00000000
- 93 00000000 OS_CPU_SR_Save
- 94 00000000 F3EF 8010 MRS R0, PRIMASK ; Set prio int mask
- to mask all (excep
- t faults)
- 95 00000004 B672 CPSID I
- 96 00000006 4770 BX LR
- 97 00000008
- 98 00000008 OS_CPU_SR_Restore
- 99 00000008 F380 8810 MSR PRIMASK, R0
- 100 0000000C 4770 BX LR
- 101 0000000E
- 102 0000000E ;*******************************************************
- *************************************************
- 103 0000000E ; START MULTITA
- SKING
- 104 0000000E ; void OSStartHigh
- Rdy(void)
- 105 0000000E ;
- 106 0000000E ; Note(s) : 1) This function triggers a PendSV exception
- (essentially, causes a context switch) to cause
- 107 0000000E ; the first task to start.
- 108 0000000E ;
- 109 0000000E ; 2) OSStartHighRdy() MUST:
- 110 0000000E ; a) Setup PendSV exception priority to low
- est;
- 111 0000000E ; b) Set initial PSP to 0, to tell context
- switcher this is first run;
- 112 0000000E ; c) Set OSRunning to TRUE;
- 113 0000000E ; d) Trigger PendSV exception;
- 114 0000000E ; e) Enable interrupts (tasks will run with
- interrupts enabled).
- 115 0000000E ;*******************************************************
- *************************************************
- 116 0000000E
- 117 0000000E OSStartHighRdy
- 118 0000000E 481D LDR R0, =NVIC_SYSPRI2 ; Set the Pen
- dSV exception prior
- ity
- 119 00000010 F64F 71FF LDR R1, =NVIC_PENDSV_PRI
- 120 00000014 7001 STRB R1, [R0]
- ARM Macro Assembler Page 4
- 121 00000016
- 122 00000016 2000 MOVS R0, #0 ; Set the PSP to 0
- for initial context
- switch call
- 123 00000018 F380 8809 MSR PSP, R0
- 124 0000001C
- 125 0000001C 481A LDR R0, =OSRunning
- ; OSRunning = TRUE
- 126 0000001E 2101 MOVS R1, #1
- 127 00000020 7001 STRB R1, [R0]
- 128 00000022
- 129 00000022 481A LDR R0, =NVIC_INT_CTRL ; Trigger th
- e PendSV exception
- (causes context swi
- tch)
- 130 00000024 F04F 5180 LDR R1, =NVIC_PENDSVSET
- 131 00000028 6001 STR R1, [R0]
- 132 0000002A
- 133 0000002A B662 CPSIE I ; Enable interrupts
- at processor level
-
- 134 0000002C
- 135 0000002C OSStartHang
- 136 0000002C E7FE B OSStartHang ; Should never get
- here
- 137 0000002E
- 138 0000002E
- 139 0000002E ;*******************************************************
- *************************************************
- 140 0000002E ; PERFORM A CONTEXT SWITCH
- (From task level)
- 141 0000002E ; void OSCtxSw
- (void)
- 142 0000002E ;
- 143 0000002E ; Note(s) : 1) OSCtxSw() is called when OS wants to perf
- orm a task context switch. This function
- 144 0000002E ; triggers the PendSV exception which is wh
- ere the real work is done.
- 145 0000002E ;*******************************************************
- *************************************************
- 146 0000002E
- 147 0000002E OSCtxSw
- 148 0000002E 4817 LDR R0, =NVIC_INT_CTRL ; Trigger th
- e PendSV exception
- (causes context swi
- tch)
- 149 00000030 F04F 5180 LDR R1, =NVIC_PENDSVSET
- 150 00000034 6001 STR R1, [R0]
- 151 00000036 4770 BX LR
- 152 00000038
- 153 00000038 ;*******************************************************
- *************************************************
- 154 00000038 ; PERFORM A CONTEXT SWITCH (
- From interrupt level)
- 155 00000038 ; void OSIntCtxS
- w(void)
- 156 00000038 ;
- 157 00000038 ; Notes: 1) OSIntCtxSw() is called by OSIntExit() whe
- n it determines a context switch is needed as
- ARM Macro Assembler Page 5
- 158 00000038 ; the result of an interrupt. This functio
- n simply triggers a PendSV exception which will
- 159 00000038 ; be handled when there are no more interru
- pts active and interrupts are enabled.
- 160 00000038 ;*******************************************************
- *************************************************
- 161 00000038
- 162 00000038 OSIntCtxSw
- 163 00000038 4814 LDR R0, =NVIC_INT_CTRL ; Trigger th
- e PendSV exception
- (causes context swi
- tch)
- 164 0000003A F04F 5180 LDR R1, =NVIC_PENDSVSET
- 165 0000003E 6001 STR R1, [R0]
- 166 00000040 4770 BX LR
- 167 00000042
- 168 00000042 ;*******************************************************
- *************************************************
- 169 00000042 ; HANDLE PendSV
- EXCEPTION
- 170 00000042 ; void OS_CPU_PendSV
- Handler(void)
- 171 00000042 ;
- 172 00000042 ; Note(s) : 1) PendSV is used to cause a context switch.
- This is a recommended method for performing
- 173 00000042 ; context switches with Cortex-M3. This is
- because the Cortex-M3 auto-saves half of the
- 174 00000042 ; processor context on any exception, and r
- estores same on return from exception. So only
- 175 00000042 ; saving of R4-R11 is required and fixing u
- p the stack pointers. Using the PendSV exception
- 176 00000042 ; this way means that context saving and re
- storing is identical whether it is initiated from
- 177 00000042 ; a thread or occurs due to an interrupt or
- exception.
- 178 00000042 ;
- 179 00000042 ; 2) Pseudo-code is:
- 180 00000042 ; a) Get the process SP, if 0 then skip (go
- to d) the saving part (first context switch);
- 181 00000042 ; b) Save remaining regs r4-r11 on process
- stack;
- 182 00000042 ; c) Save the process SP in its TCB, OSTCBC
- ur->OSTCBStkPtr = SP;
- 183 00000042 ; d) Call OSTaskSwHook();
- 184 00000042 ; e) Get current high priority, OSPrioCur =
- OSPrioHighRdy;
- 185 00000042 ; f) Get current ready thread TCB, OSTCBCur
- = OSTCBHighRdy;
- 186 00000042 ; g) Get new process SP from TCB, SP = OSTC
- BHighRdy->OSTCBStkPtr;
- 187 00000042 ; h) Restore R4-R11 from new process stack;
-
- 188 00000042 ; i) Perform exception return which will re
- store remaining context.
- 189 00000042 ;
- 190 00000042 ; 3) On entry into PendSV handler:
- 191 00000042 ; a) The following have been saved on the p
- rocess stack (by processor):
- 192 00000042 ; xPSR, PC, LR, R12, R0-R3
- ARM Macro Assembler Page 6
- 193 00000042 ; b) Processor mode is switched to Handler
- mode (from Thread mode)
- 194 00000042 ; c) Stack is Main stack (switched from Pro
- cess stack)
- 195 00000042 ; d) OSTCBCur points to the OS_TCB of
- the task to suspend
- 196 00000042 ; OSTCBHighRdy points to the OS_TCB of
- the task to resume
- 197 00000042 ;
- 198 00000042 ; 4) Since PendSV is set to lowest priority in
- the system (by OSStartHighRdy() above), we
- 199 00000042 ; know that it will only be run when no oth
- er exception or interrupt is active, and
- 200 00000042 ; therefore safe to assume that context bei
- ng switched out was using the process stack (PSP).
- 201 00000042 ;*******************************************************
- *************************************************
- 202 00000042
- 203 00000042 OS_CPU_PendSVHandler
- 204 00000042 B672 CPSID I ; Prevent interrupt
- ion during context
- switch
- 205 00000044 F3EF 8009 MRS R0, PSP ; PSP is process st
- ack pointer
- 206 00000048 B128 CBZ R0, OS_CPU_PendSVHandler_nosave
-
- ; Skip register sav
- e the first time
- 207 0000004A
- 208 0000004A 3820 SUBS R0, R0, #0x20 ; Save remaining
- regs r4-11 on proce
- ss stack
- 209 0000004C E880 0FF0 STM R0, {R4-R11}
- 210 00000050
- 211 00000050 490F LDR R1, =OSTCBCur ; OSTCBCur->OSTCB
- StkPtr = SP;
- 212 00000052 6809 LDR R1, [R1]
- 213 00000054 6008 STR R0, [R1] ; R0 is SP of proce
- ss being switched o
- ut
- 214 00000056
- 215 00000056 ; At this point, entire context of process has been save
- d
- 216 00000056 OS_CPU_PendSVHandler_nosave
- 217 00000056 B500 PUSH {R14} ; Save LR exc_retur
- n value
- 218 00000058 480E LDR R0, =OSTaskSwHook
- ; OSTaskSwHook();
- 219 0000005A 4780 BLX R0
- 220 0000005C F85D EB04 POP {R14}
- 221 00000060
- 222 00000060 480D LDR R0, =OSPrioCur ; OSPrioCur = OS
- PrioHighRdy;
- 223 00000062 490E LDR R1, =OSPrioHighRdy
- 224 00000064 780A LDRB R2, [R1]
- 225 00000066 7002 STRB R2, [R0]
- 226 00000068
- 227 00000068 4809 LDR R0, =OSTCBCur ; OSTCBCur = OST
- CBHighRdy;
- ARM Macro Assembler Page 7
- 228 0000006A 490D LDR R1, =OSTCBHighRdy
- 229 0000006C 680A LDR R2, [R1]
- 230 0000006E 6002 STR R2, [R0]
- 231 00000070
- 232 00000070 6810 LDR R0, [R2] ; R0 is new process
- SP; SP = OSTCBHigh
- Rdy->OSTCBStkPtr;
- 233 00000072 E890 0FF0 LDM R0, {R4-R11} ; Restore r4-11 fr
- om new process stac
- k
- 234 00000076 3020 ADDS R0, R0, #0x20
- 235 00000078 F380 8809 MSR PSP, R0 ; Load PSP with new
- process SP
- 236 0000007C F04E 0E04 ORR LR, LR, #0x04 ; Ensure exceptio
- n return uses proce
- ss stack
- 237 00000080 B662 CPSIE I
- 238 00000082 4770 BX LR ; Exception return
- will restore remain
- ing context
- 239 00000084
- 240 00000084 END
- E000ED20
- 00000000
- E000ED04
- 00000000
- 00000000
- 00000000
- 00000000
- 00000000
- Command Line: --debug --xref --device=DARMSTM --apcs=interwork -o.Outputos_cp
- u_a.o -IC:KeilARMINCSTSTM32F10x --list=.Outputos_cpu_a.lst uCOS-IIPorts
- os_cpu_a.asm
- ARM Macro Assembler Page 1 Alphabetic symbol ordering
- Relocatable symbols
- .text 00000000
- Symbol: .text
- Definitions
- At line 56 in file uCOS-IIPortsos_cpu_a.asm
- Uses
- None
- Comment: .text unused
- OSCtxSw 0000002E
- Symbol: OSCtxSw
- Definitions
- At line 147 in file uCOS-IIPortsos_cpu_a.asm
- Uses
- At line 39 in file uCOS-IIPortsos_cpu_a.asm
- Comment: OSCtxSw used once
- OSIntCtxSw 00000038
- Symbol: OSIntCtxSw
- Definitions
- At line 162 in file uCOS-IIPortsos_cpu_a.asm
- Uses
- At line 40 in file uCOS-IIPortsos_cpu_a.asm
- Comment: OSIntCtxSw used once
- OSStartHang 0000002C
- Symbol: OSStartHang
- Definitions
- At line 135 in file uCOS-IIPortsos_cpu_a.asm
- Uses
- At line 136 in file uCOS-IIPortsos_cpu_a.asm
- Comment: OSStartHang used once
- OSStartHighRdy 0000000E
- Symbol: OSStartHighRdy
- Definitions
- At line 117 in file uCOS-IIPortsos_cpu_a.asm
- Uses
- At line 38 in file uCOS-IIPortsos_cpu_a.asm
- Comment: OSStartHighRdy used once
- OS_CPU_PendSVHandler 00000042
- Symbol: OS_CPU_PendSVHandler
- Definitions
- At line 203 in file uCOS-IIPortsos_cpu_a.asm
- Uses
- At line 41 in file uCOS-IIPortsos_cpu_a.asm
- Comment: OS_CPU_PendSVHandler used once
- OS_CPU_PendSVHandler_nosave 00000056
- Symbol: OS_CPU_PendSVHandler_nosave
- Definitions
- At line 216 in file uCOS-IIPortsos_cpu_a.asm
- Uses
- At line 206 in file uCOS-IIPortsos_cpu_a.asm
- Comment: OS_CPU_PendSVHandler_nosave used once
- OS_CPU_SR_Restore 00000008
- Symbol: OS_CPU_SR_Restore
- ARM Macro Assembler Page 2 Alphabetic symbol ordering
- Relocatable symbols
- Definitions
- At line 98 in file uCOS-IIPortsos_cpu_a.asm
- Uses
- At line 37 in file uCOS-IIPortsos_cpu_a.asm
- Comment: OS_CPU_SR_Restore used once
- OS_CPU_SR_Save 00000000
- Symbol: OS_CPU_SR_Save
- Definitions
- At line 93 in file uCOS-IIPortsos_cpu_a.asm
- Uses
- At line 36 in file uCOS-IIPortsos_cpu_a.asm
- Comment: OS_CPU_SR_Save used once
- 9 symbols
- ARM Macro Assembler Page 1 Alphabetic symbol ordering
- Relocatable symbols
- .debug_info$$$.text 00000000
- Symbol: .debug_info$$$.text
- Definitions
- None
- Uses
- None
- Warning: .debug_info$$$.text undefinedComment: .debug_info$$$.text unused
- 1 symbol
- ARM Macro Assembler Page 1 Alphabetic symbol ordering
- Relocatable symbols
- .debug_line$$$.text 00000000
- Symbol: .debug_line$$$.text
- Definitions
- None
- Uses
- None
- Warning: .debug_line$$$.text undefinedComment: .debug_line$$$.text unused
- 1 symbol
- ARM Macro Assembler Page 1 Alphabetic symbol ordering
- Relocatable symbols
- .debug_abbrev 00000000
- Symbol: .debug_abbrev
- Definitions
- None
- Uses
- None
- Warning: .debug_abbrev undefinedComment: .debug_abbrev unused
- __ARM_asm.debug_abbrev 00000000
- Symbol: __ARM_asm.debug_abbrev
- Definitions
- None
- Uses
- None
- Warning: __ARM_asm.debug_abbrev undefinedComment: __ARM_asm.debug_abbrev unused
- 2 symbols
- ARM Macro Assembler Page 1 Alphabetic symbol ordering
- Absolute symbols
- NVIC_INT_CTRL E000ED04
- Symbol: NVIC_INT_CTRL
- Definitions
- At line 47 in file uCOS-IIPortsos_cpu_a.asm
- Uses
- At line 129 in file uCOS-IIPortsos_cpu_a.asm
- At line 148 in file uCOS-IIPortsos_cpu_a.asm
- At line 163 in file uCOS-IIPortsos_cpu_a.asm
- NVIC_PENDSVSET 10000000
- Symbol: NVIC_PENDSVSET
- Definitions
- At line 50 in file uCOS-IIPortsos_cpu_a.asm
- Uses
- At line 130 in file uCOS-IIPortsos_cpu_a.asm
- At line 149 in file uCOS-IIPortsos_cpu_a.asm
- At line 164 in file uCOS-IIPortsos_cpu_a.asm
- NVIC_PENDSV_PRI 0000FFFF
- Symbol: NVIC_PENDSV_PRI
- Definitions
- At line 49 in file uCOS-IIPortsos_cpu_a.asm
- Uses
- At line 119 in file uCOS-IIPortsos_cpu_a.asm
- Comment: NVIC_PENDSV_PRI used once
- NVIC_SYSPRI2 E000ED20
- Symbol: NVIC_SYSPRI2
- Definitions
- At line 48 in file uCOS-IIPortsos_cpu_a.asm
- Uses
- At line 118 in file uCOS-IIPortsos_cpu_a.asm
- Comment: NVIC_SYSPRI2 used once
- 4 symbols
- ARM Macro Assembler Page 1 Alphabetic symbol ordering
- External symbols
- OSIntExit 00000000
- Symbol: OSIntExit
- Definitions
- At line 32 in file uCOS-IIPortsos_cpu_a.asm
- Uses
- None
- Comment: OSIntExit unused
- OSIntNesting 00000000
- Symbol: OSIntNesting
- Definitions
- At line 31 in file uCOS-IIPortsos_cpu_a.asm
- Uses
- None
- Comment: OSIntNesting unused
- OSPrioCur 00000000
- Symbol: OSPrioCur
- Definitions
- At line 27 in file uCOS-IIPortsos_cpu_a.asm
- Uses
- At line 222 in file uCOS-IIPortsos_cpu_a.asm
- Comment: OSPrioCur used once
- OSPrioHighRdy 00000000
- Symbol: OSPrioHighRdy
- Definitions
- At line 28 in file uCOS-IIPortsos_cpu_a.asm
- Uses
- At line 223 in file uCOS-IIPortsos_cpu_a.asm
- Comment: OSPrioHighRdy used once
- OSRunning 00000000
- Symbol: OSRunning
- Definitions
- At line 26 in file uCOS-IIPortsos_cpu_a.asm
- Uses
- At line 125 in file uCOS-IIPortsos_cpu_a.asm
- Comment: OSRunning used once
- OSTCBCur 00000000
- Symbol: OSTCBCur
- Definitions
- At line 29 in file uCOS-IIPortsos_cpu_a.asm
- Uses
- At line 211 in file uCOS-IIPortsos_cpu_a.asm
- At line 227 in file uCOS-IIPortsos_cpu_a.asm
- OSTCBHighRdy 00000000
- Symbol: OSTCBHighRdy
- Definitions
- At line 30 in file uCOS-IIPortsos_cpu_a.asm
- Uses
- At line 228 in file uCOS-IIPortsos_cpu_a.asm
- Comment: OSTCBHighRdy used once
- OSTaskSwHook 00000000
- ARM Macro Assembler Page 2 Alphabetic symbol ordering
- External symbols
- Symbol: OSTaskSwHook
- Definitions
- At line 33 in file uCOS-IIPortsos_cpu_a.asm
- Uses
- At line 218 in file uCOS-IIPortsos_cpu_a.asm
- Comment: OSTaskSwHook used once
- 8 symbols
- 346 symbols in table
English
