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- /*
- *********************************************************************************************************
- * uC/OS-II
- * The Real-Time Kernel
- *
- * (c) Copyright 1992-2003, Jean J. Labrosse, Weston, FL
- * All Rights Reserved
- *
- * File : OS_CPU.H
- *********************************************************************************************************
- */
- #ifndef OS_CPU_H
- #define OS_CPU_H
- /*
- *********************************************************************************************************
- * DATA TYPES
- * (Compiler Specific)
- *********************************************************************************************************
- */
- typedef unsigned char BOOLEAN; /* 布尔变量 */
- typedef unsigned char INT8U; /* 无符号8位整型变量 */
- typedef signed char INT8S; /* 有符号8位整型变量 */
- typedef unsigned short INT16U; /* 无符号16位整型变量 */
- typedef signed short INT16S; /* 有符号16位整型变量 */
- typedef unsigned int INT32U; /* 无符号32位整型变量 */
- typedef signed int INT32S; /* 有符号32位整型变量 */
- typedef float FP32; /* 单精度浮点数（32位长度） */
- typedef double FP64; /* 双精度浮点数（64位长度） */
- typedef INT32U OS_STK; /* 堆栈是32位宽度 */
- /* 以下是兼容UC/OS V1.XX的数据类型，在uC/OS-II没有使用 */
- #define BYTE INT8S
- #define UBYTE INT8U
- #define WORD INT16S
- #define UWORD INT16U
- #define LONG INT32S
- #define ULONG INT32U
- typedef INT32U OS_CPU_SR; /* Define size of CPU status register (PSR = 32 bits) */
- /*
- *********************************************************************************************************
- * ARM
- *
- * Method #1: NOT IMPLEMENTED
- * Disable/Enable interrupts using simple instructions. After critical section, interrupts
- * will be enabled even if they were disabled before entering the critical section.
- *
- * Method #2: NOT IMPLEMENTED
- * Disable/Enable interrupts by preserving the state of interrupts. In other words, if
- * interrupts were disabled before entering the critical section, they will be disabled when
- * leaving the critical section.
- * NOT IMPLEMENTED
- *
- * Method #3: Disable/Enable interrupts by preserving the state of interrupts. Generally speaking you
- * would store the state of the interrupt disable flag in the local variable 'cpu_sr' and then
- * disable interrupts. 'cpu_sr' is allocated in all of uC/OS-II's functions that need to
- * disable interrupts. You would restore the interrupt disable state by copying back 'cpu_sr'
- * into the CPU's status register. This is the prefered method to disable interrupts.
- *********************************************************************************************************
- */
- #define OS_CRITICAL_METHOD 3
- #if OS_CRITICAL_METHOD == 3
- #define OS_ENTER_CRITICAL() (cpu_sr = OSCPUSaveSR()) /* Disable interrupts */
- #define OS_EXIT_CRITICAL() (OSCPURestoreSR(cpu_sr)) /* Restore interrupts */
- #endif
- /*
- *********************************************************************************************************
- * ARM Miscellaneous
- *********************************************************************************************************
- */
- #define OS_STK_GROWTH 1 /* Stack grows from HIGH to LOW memory on ARM */
- #define OS_TASK_SW() OSCtxSw()
- /*
- *********************************************************************************************************
- * GLOBAL VARIABLES
- *********************************************************************************************************
- */
- /*
- *********************************************************************************************************
- * PROTOTYPES
- *********************************************************************************************************
- */
- #if OS_CRITICAL_METHOD == 3 /* Allocate storage for CPU status register */
- OS_CPU_SR OSCPUSaveSR(void);
- void OSCPURestoreSR(OS_CPU_SR cpu_sr);
- #endif
- #endif
