config.h
资源名称:ixp425BSP.rar [点击查看]
上传用户:luoyougen
上传日期:2008-05-12
资源大小:23136k
文件大小:17k
源码类别:
VxWorks
开发平台:
C/C++
- /* config.h - IXP425 Eval board configuration header */
- /* Copyright 2002 Wind River Systems, Inc. */
- /*
- modification history
- --------------------
- 01j,14nov02,jb3 bump decimalrev
- 01i,17oct02,jb Bump rev
- 01h,07oct02,jb Remove IP address size change
- 01g,18sep02,jb Increasing ixEth block counts
- 01f,18sep02,jb Enable ixEthAccEnd
- 01e,14aug02,jb Continuing End support and changing sdram from 128MB to 256MB
- 01d,26jun02,jb Adding ixp425 End support
- 01c,18jun02,jb Changing BOARD_DESC
- 01b,12jun02,jb Continuing restructure
- 01a,05jun02,jb initial version...
- */
- /*
- This module contains the configuration parameters for ixp425 IXDP425 platform.
- */
- #ifndef INCconfigh
- #define INCconfigh
- /** BSP version/revision identification, before configAll.h **/
- #define BSP_VER_1_2 1 /* 1.2 is backward compatible with 1.1 */
- #define BSP_VER_1_1 1
- #define BSP_VERSION "1.3" /* Version string */
- #define BSP_REV "/2" /* 0 for first revision */
- #define BOARD_DESC "Intel IXP425 - IXDP425 BE"
- #include "configAll.h" /* Include the default configurations */
- #include "ixp425.h"
- #ifdef INCLUDE_IXETH
- #ifndef _ASMLANGUAGE
- /* Detect invalid CSR_BASE early */
- #include "IxTypes.h"
- #endif /* _ASMLANGUAGE */
- #endif /* INCLUDE_IXETH */
- /*
- * STANDALONE_NET must be defined for network debug with
- * standalone vxWorks.st
- */
- #define STANDALONE_NET
- /*
- * make use of data cache for fast DRAM
- */
- #undef INCLUDE_FAST_DRAM
- #ifdef INCLUDE_FAST_DRAM
- #define FD_CACHELINE 8 /* 8 UINT32's in a cache line (32-bytes) */
- #define FD_LINESPERSET 28 /* 28 available cache lines per set */
- #define FD_SETS 32 /* 32 sets in data cache */
- #define FD_MAX_LINES (FD_LINESPERSET * FD_SETS) /* Max number of lines one can allocate (28 x 32) */
- /*
- * Location of virtual address just above SDRAM. This must be outside everybody else's
- * address to avoid colision issues.
- */
- #define FD_ORIGIN 0x10000000
- #define FD_MAX_SIZE 0x7000 /* Max size for MMU table description, 28Kbytes */
- /* modify based on the number of cache lines you want to use as data ram... */
- #define FD_NUMLINES FD_MAX_LINES /* set for max 28Kbytes */
- #endif /* INCLUDE_FAST_DRAM */
- /*
- * Support network devices.
- */
- #define INCLUDE_NETWORK
- /*
- * First line below indicates host (xx.xx.xx.xx) and path of image
- * (c:vxWorks). The parameters that follow are:
- * h = Internet address of host (xx.xx.xx.xx)
- * e = Internet address of target (xx.xx.xx.xx)
- * tn = Name of target machine
- * u = user name used to access host
- * pw = password for user
- */
- #define DEFAULT_BOOT_LINE
- "flash(0,0)host:vxWorks "
- "h=10.0.26.1 e=10.0.26.188 u=12 tn=targetname f=0x80 o=ixe0"
- /** Selection Macros, which might have affect later **/
- #define INCLUDE_SYS_HW_INIT_0
- #ifdef INCLUDE_SYS_HW_INIT_0
- #ifndef _ASMLANGUAGE
- IMPORT void sysHwInit0 (void);
- #endif /* _ASMLANGUAGE */
- #define SYS_HW_INIT_0() sysHwInit0 ()
- #endif /* INCLUDE_SYS_HW_INIT_0 */
- #define INCLUDE_TIMESTAMP
- #define INCLUDE_USER_TIMESTAMP
- #ifdef INCLUDE_USER_TIMESTAMP
- #define USER_TIMESTAMP sysTimestamp
- #define USER_TIMESTAMPLOCK sysTimestampLock
- #define USER_TIMEENABLE sysTimestampEnable
- #define USER_TIMEDISABLE sysTimestampDisable
- #define USER_TIMECONNECT sysTimestampConnect
- #define USER_TIMEPERIOD sysTimestampPeriod
- #define USER_TIMEFREQ sysTimestampFreq
- #endif /* INCLUDE_USER_TIMESTAMP */
- #define INCLUDE_EXC_HANDLING
- #define INCLUDE_EXC_TASK
- #define INCLUDE_RAM_PAGE_TABLE
- #undef INCLUDE_IXP425_UART_DEBUG /* Turn off very low level debug */
- #define INCLUDE_UART1_SUPPORT /* Include Uart 1 console support */
- #define INCLUDE_UART2_SUPPORT /* Include Uart 2 console support */
- #define INCLUDE_WDB
- /*** UART ***/
- /*
- * Since there are two UARTs. The default UART defs like NUM_TTY, CONSOLE_TTY
- * and CONSOLE_BAUD_RATE in configAll.h should work fine. If you change any
- * defaults, it might affect the WDB defs also, so cross check with WDB defs.
- *
- */
- #define N_UARTS 2 /* Enable both uarts */
- #undef NUM_TTY
- #define NUM_TTY N_UARTS
- #define DEFAULT_BAUD 115200
- #define UART_DEFAULT_BAUD 115200
- #undef CONSOLE_TTY
- #define CONSOLE_TTY 0
- #undef CONSOLE_BAUD_RATE
- #define CONSOLE_BAUD_RATE DEFAULT_BAUD
- /*
- * Define SERIAL_DEBUG to enable Windriver debugging
- * via the serial ports.
- */
- #undef SERIAL_DEBUG
- #ifdef INCLUDE_WDB
- #ifdef SERIAL_DEBUG
- #define WDB_NO_BAUD_AUTO_CONFIG
- #undef WDB_COMM_TYPE
- #undef WDB_TTY_BAUD
- #undef WDB_TTY_CHANNEL
- #undef WDB_TTY_DEV_NAME
- #define WDB_COMM_TYPE WDB_COMM_SERIAL /* WDB in Serial mode */
- #define WDB_TTY_BAUD 115200 /* Baud rate for WDB Connection */
- #define WDB_TTY_CHANNEL 0 /* COM PORT #2 */
- #define WDB_TTY_DEV_NAME "/tyCo/1" /* default TYCODRV_5_2 device name */
- #else /* SERIAL_DEBUG */
- /* Network WDB engine. */
- #endif /* SERIAL_DEBUG */
- #endif /* INCLUDE_WDB */
- /*** MMU ***/
- #define INCLUDE_MMU_BASIC
- #ifdef INCLUDE_MMU_FULL /* Full MMU Configuration */
- #undef INCLUDE_MMU_BASIC
- #endif /* INCLUDE_MMU_FULL */
- #ifdef INCLUDE_MMU_BASIC /* Basic MMU Configuration */
- #undef INCLUDE_MMU_FULL
- #endif /* INCLUDE_MMU_BASIC */
- #if defined(INCLUDE_MMU_FULL) || defined(INCLUDE_MMU_BASIC)
- #define INCLUDE_MMU_VIRTUAL_MEM_EQUAL_PHY_MEM /* Provide BSP mmuPhysToVirt,mmuVirtToPhys linear 1:1 mapping */
- #endif /* INCLUDE_MMU_FULL || INCLUDE_MMU_BASIC */
- /*****************************
- * Cache support
- ******************************/
- #define INCLUDE_CACHE_SUPPORT
- /* StrongARM I-cache mode is a bit of an inappropriate concept, but use this */
- #undef USER_I_CACHE_MODE
- #define USER_I_CACHE_MODE CACHE_WRITETHROUGH
- /* StrongARM has to be this, as it does not support writethrough */
- #undef USER_D_CACHE_MODE
- #define USER_D_CACHE_MODE CACHE_COPYBACK
- /* If ROM code enables MMU then define ROM_ENABLES_MMU */
- #undef ROM_ENABLES_MMU
- #ifdef ROM_ENABLES_MMU
- /*
- * if you def/undef the SECOND_LEVEL_PAGE_TABLE, you need to change the
- * ROM_TEXT_ADRS in the Makefile. see #define ROM_TEXT_ADRS
- */
- #undef SECOND_LEVEL_PAGE_TABLE /* selected the two level table */
- /* Location of the translation table base, it needs to be 16k aligned */
- #define MMU_TRANSLATION_BASE 0x00004000
- #if defined(SECOND_LEVEL_PAGE_TABLE)
- #define MMU_TABLE_SIZE 0x4800
- #else
- #define MMU_TABLE_SIZE 0x4000
- #endif /* SECOND_LEVEL_PAGE_TABLE */
- #else
- /* MMU not enabled */
- #define MMU_TRANSLATION_BASE 0x1000
- #define MMU_TABLE_SIZE 0x0000
- #endif /* ROM_ENABLES_MMU */
- #if defined(INCLUDE_MMU_BASIC) || defined(INCLUDE_MMU_FULL)
- #define INCLUDE_MMU
- #endif /* NCLUDE_MMU_BASIC || INCLUDE_MMU_FULL */
- #undef VM_PAGE_SIZE
- #define VM_PAGE_SIZE 4096
- /* Memory configuration */
- #undef LOCAL_MEM_AUTOSIZE /* NO run-time memory sizing */
- #define LOCAL_MEM_LOCAL_ADRS 0x00000000 /* The start of on board memory area */
- #define LOCAL_MEM_SIZE (128 * 0x00100000) /* 128Meg - amout of memory for VxWorks - all */
- #define USER_RESERVED_MEM (4 * 0x00100000) /* 4Meg for now */
- /*** RAM Information ***/
- /* Link Address: To where the bootrom image will be decompressed into reserved memory at top of memory*/
- #define RAM_HIGH_ADRS 0x04000000 /* 128MB - This must be the same as in Makefile */
- /* RAM starting address, RAM Size */
- #define RAM_LOW_ADRS 0x00020000 /* VxWorks image entry point */
- /*
- * Boot ROM is an image written into Flash ROM and started
- * at address 0. Due to the remapping of memory by the internal BUS
- * controller , the Flash memory appears at an address of 0x50000000.
- *
- * The following parameters are defined here and in the Makefile.
- * They must be kept synchronized; effectively config.h depends on
- * Makefile. Any changes made here must be made in the Makefile and vice
- * versa.
- *
- * ROM_BASE_ADRS is the base of the Flash ROM
- * ROM_TEXT_ADRS is the entry point of the VxWorks image
- * ROM_SIZE is the size of the part of the Flash ROM allocated to the VxWorks
- * image (block size - size of headers - NVRAM allocation)
- *
- * Two other constants are used:
- * ROM_COPY_SIZE is the size of the part of the ROM to be copied into RAM
- * (uncompressed bootrom)
- * ROM_SIZE_TOTAL is the size of the entire Flash ROM (used in sysPhysMemDesc)
- *
- * The boot ROM image starts at an offset of 0 into the n'th block of flash
- * to give the diagnostics and other RTOS's room to live in.
- *
- * So the calculation for ROM_TEXT_ADRS is:
- * Virtual Physical
- * Address of Flash: 0x50000000 0x50000000
- * Offset of nth block: 0x00000000 0x00000000 - Currently putting Bootrom at offset zero into flash
- * Sum: 0x50000000 0x50000000
- *
- * Note also that the addresses given here are virtual addresses after
- * the MMU is turned on. The physical addresses will be based on zero.
- *
- * The values are given as literals here to make it easier to ensure
- * that they are the same as those in the Makefile. The build of the bootrom
- * will check that it does not overflow the space allocated.
- */
- #if 0
- #define ROM_FLASH_BASE (0x50000000) /* Base address of CS0 in boot position */
- #define ROM_FLASH_ALT_BASE (0x50000000) /* Base address of CS0 in alternate position */
- #define ROM_FLASH_OFFSET (0x0) /* Offset in Flash dedicated to VxWorks BSP */
- /*#define ROM_FLASH_RESERVED (0 * 0x00100000)*/ /* Size of Flash dev reserved from top */
- #define ROM_ACTUAL_FLASH_SIZE (8 * 0x00100000) /* Real size of Flash */
- #define ROM_BASE_ADRS 0x50000000 /* base of writable Flash */
- #define ROM_SIZE 0x00800000 /* size - start */
- #define ROM_COPY_SIZE ((ROM_SIZE - 0x2000) / 4)
- #define ROM_SIZE_TOTAL ROM_SIZE /* total size of Flash ROM */
- #define BOOT_ROM_RELOCATE_SIZE (0x00200000)
- /*
- * The size must be big enough so that
- * (ROM_BASE_ADRS + ROM_SIZE - ROM_TEXT_ADRS) >= size of boot image
- * We allow up to an arbitrary 128K for the image.
- */
- #if (ROM_BASE_ADRS + ROM_SIZE - ROM_TEXT_ADRS) < 0x20000
- #error ROM_ values need checking in config.h/Makefile
- #endif /* (ROM_BASE_ADRS + ROM_SIZE - ROM_TEXT_ADRS) < 0x20000 */
- #endif
- #if WITH_REDBOOT==1
- #define FLASH_SIZE (ROM_SIZE - 0x40000 - 0x40000)
- #define ROM_TEXT_ADRS 0x50041000
- #define FLASH_ADRS 0x50040000
- #else
- #define FLASH_SIZE (ROM_SIZE)
- #define ROM_TEXT_ADRS 0x50001000
- #undef ETHROM
- #ifdef ETHROM
- #define FLASH_ADRS 0x52000000
- #else
- #define FLASH_ADRS 0x50000000
- #endif
- #endif
- #define BOOTROM_IMAGE_MAX_SIZE (512 * 1024)
- #define LOAD_IMAGE_MAX_SIZE (6 * 1024 * 1024)
- /*
- * Where the text starts in ROM, (address of _romInit), normally it will be,
- * MMU_TRANSLATION_BASE + 16K + additional 1K if we are using second level
- * translation tables.
- *
- * ROM_TEXT_ADRS = MMU_TRANSLATION_BASE + 0x4000 (+ 0x400 if second level page
- * table used)
- */
- /*
- * ISR_STACK_SIZE is defined here rather than in ../all/configAll.h (as is
- * more usual) because the stack size depends on the interrupt structure of the
- * BSP.
- */
- #define ISR_STACK_SIZE 0x1000 /* ISR Stack Size 16 */
- #undef STACK_SAVE
- #define STACK_SAVE 1024 /* maximum size of stack preserved */
- #define SIZE_OF_IP_ADDRESS 24
- #define SIZE_OF_MAC_ADDRESS 6
- #define NV_BOOT_LINE_SIZE (0x100)
- #define NV_GENERIC_STORAGE_AREA_SIZE (0x100)
- /*
- * These defines specify where the vxWorks bootline and end device information
- * for the board is to be stored. They are mutually exclusive and should not be
- * defined together.
- */
- #undef USE_EEPROM_STORAGE /* Define this to enable eeprom as NVRAM - See ixdp425.html */
- /*
- *
- * The diagram below shows the EEPROM when used as NVRAM storage.
- *
- +----+ Top of 512byte EEPROM.
- | |
- | | MAC address storage.
- |____|_ EEPROM + 256 Bytes -- NV_GENERIC_STORAGE_AREA
- | |
- | | Boot Line Storage
- | |
- +----+ Bottom of EEPROM -- sysNvRamGet/sysNvRamGet - Allows access to here to
- *
- */
- #define INCLUDE_FLASH
- #ifdef INCLUDE_FLASH
- #define FLASH_WIDTH 2
- #define FLASH_WIDTH_SPECIAL_2 /* Special definition for Word based flash devices */
- #define SYS_FLASH_TYPE FLASH_28F128J3A /* Specify 16 bit 28F part */
- #define FLASH_SEGMENT_SIZE (128 * 1024) /* sector size of E28F128J3 */
- #define FLASH_PARAM_BASE (FLASH_ADRS + FLASH_SIZE - FLASH_SEGMENT_SIZE)
- #define USE_FLASH_STORAGE
- #ifdef USE_FLASH_STORAGE
- #define NV_RAM_SIZE FLASH_SEGMENT_SIZE
- #undef NV_BOOT_OFFSET
- #define NV_BOOT_SEGMENT (FLASH_ADRS + FLASH_SIZE - FLASH_SEGMENT_SIZE)
- #define NV_BOOT_OFFSET (FLASH_SEGMENT_SIZE - NV_BOOT_LINE_SIZE - NV_GENERIC_STORAGE_AREA_SIZE) /* BootLine Support */
- #endif /* USE_FLASH_STORAGE */
- #define BOOTROM_IMAGE_BASE FLASH_ADRS
- #define VXWORKS_IMAGE_BASE (BOOTROM_IMAGE_BASE + BOOTROM_IMAGE_MAX_SIZE)
- #undef SYS_FLASH_WRITE
- #undef FLASH_NO_OVERLAY
- #else /* INCLUDE_FLASH */
- #define NV_RAM_SIZE NONE
- #endif /* INCLUDE_FLASH */
- #undef INCLUDE_EEPROM
- #ifdef INCLUDE_EEPROM
- #ifdef USE_EEPROM_STORAGE
- #define NV_RAM_SIZE (0x200)
- #endif /* USE_EEPROM_STORAGE */
- #endif /* INCLUDE_EEPROM */
- /* Allocation of Generic NV storage area */
- #if defined(INCLUDE_FLASH) || defined(INCLUDE_EEPROM)
- #define NV_RAM_IF_START_OFFSET (NV_GENERIC_STORAGE_AREA_SIZE)
- #define NV_MAC_ADDR_POOL (NV_GENERIC_STORAGE_AREA_SIZE) /* Used as offset of sysNvRamGet/Set */
- #define NV_MAC_ADRS_NPE1 (NV_MAC_ADDR_POOL)
- #define NV_MAC_ADRS_NPE2 (NV_MAC_ADRS_NPE1 + SIZE_OF_MAC_ADDRESS)
- /*
- * Most PCI NICS will store their own MAC address but we include room for them
- * here in case they don't.
- */
- #define NV_MAC_ADRS_PCIEND1 (NV_MAC_ADRS_NPE2 + SIZE_OF_MAC_ADDRESS)
- #define NV_MAC_ADRS_PCIEND2 (NV_MAC_ADRS_PCIEND1 + SIZE_OF_MAC_ADDRESS)
- #define NV_MAC_ADRS_PCIEND3 (NV_MAC_ADRS_PCIEND2 + SIZE_OF_MAC_ADDRESS)
- #define NV_MAC_ADRS_PCIEND4 (NV_MAC_ADRS_PCIEND3 + SIZE_OF_MAC_ADDRESS)
- #define NV_IP_ADRS_RESERVED (NV_MAC_ADRS_PCIEND4 + SIZE_OF_MAC_ADDRESS)
- #define NV_IP_ADRS_NPE1 (NV_IP_ADRS_RESERVED + SIZE_OF_IP_ADDRESS)
- #define NV_IP_ADRS_NPE2 (NV_IP_ADRS_NPE1 + SIZE_OF_IP_ADDRESS)
- #define NV_IP_ADRS_PCIEND1 (NV_IP_ADRS_NPE2 + SIZE_OF_IP_ADDRESS)
- #define NV_IP_ADRS_PCIEND2 (NV_IP_ADRS_PCIEND1 + SIZE_OF_IP_ADDRESS)
- #define NV_IP_ADRS_PCIEND3 (NV_IP_ADRS_PCIEND2 + SIZE_OF_IP_ADDRESS)
- #define NV_IP_ADRS_PCIEND4 (NV_IP_ADRS_PCIEND3 + SIZE_OF_IP_ADDRESS)
- #define NV_RAM_IF_END_OFFSET (NV_IP_ADRS_PCIEND4 + SIZE_OF_IP_ADDRESS)
- #define NV_RAM_IF_SIZE (NV_RAM_IF_END_OFFSET - NV_RAM_IF_START_OFFSET)
- #endif /* defined(INCLUDE_FLASH) || defined(INCLUDE_EEPROM) */
- #define INCLUDE_END /* Enable END drivers */
- #define INCLUDE_PCI /* enable PCI Bus */
- #ifdef INCLUDE_PCI
- #define INCLUDE_PCI_DMA
- #endif /* INCLUDE_PCI */
- #ifdef INCLUDE_END /* If END drivers are enabled */
- #if HAVE_82559==1
- #define INCLUDE_FEI82557END /* Enable Intel PCI based 8255x driver */
- #else
- #undef INCLUDE_FEI82557END
- #endif
- #ifdef INCLUDE_FEI82557END
- #ifndef INCLUDE_PCI /* Cannot have fei without pci */
- #undef INCLUDE_FEI82557END
- #endif /* INCLUDE_PCI */
- #define IXDP_FEIEND_USE_NVRAM_IP /* Get unassigned FEI IP addresses from NVRAM/EEPROM */
- #define IXP425_MAX_FEI_DEVS 1
- #define IXDP_FEI557_IP0_DEFAULT "192.168.10.1" /* Default address for PORT0 */
- #define IXDP_FEI557_IP1_DEFAULT "192.168.20.1" /* Default address for PORT0 */
- #define IXDP_FEI557_IP2_DEFAULT "192.168.30.1" /* Default address for PORT0 */
- #define IXDP_FEI557_IP3_DEFAULT "192.168.40.1" /* Default address for PORT0 */
- #endif /* INCLUDE_FEI82557END */
- /* define this to include IxEthAcc support */
- #define INCLUDE_IXETHACCEND
- #ifdef INCLUDE_IXETHACCEND
- #define INCLUDE_IXETHACC_PORT0_END /* enable eth phys port 0 */
- #define INCLUDE_IXETHACC_PORT1_END /* enable eth phys port 1 */
- #define IXDP_ETHACC_USE_NVRAM_MAC /* Get MAC addresses via NVRAM/EEPROM */
- #define IXDP_ETHACC_IP0_DEFAULT "192.168.50.1" /* Default address for PORT0 */
- #define IXDP_ETHACC_IP1_DEFAULT "192.168.60.1" /* Default address for PORT1 */
- /* The following IXETH and EthAcc defines are always defined */
- #define IXETHACC_MBLKS 128 /* Number of allocated mBlks per IxEth */
- #define IXETHACC_CLSTS 128 /* Number of allocated cLists per IxEth */
- #endif /* INCLUDE_IXETHACCEND */
- /* Define INCLUDE_USER_APPL to enable Init of all network devices */
- #define INCLUDE_USER_APPL
- /* This is the entry point into the IXP425 Application software */
- #define USER_APPL_INIT {void ixdp425AppInit(); ixdp425AppInit();}
- #endif /* INCLUDE_END */
- /*
- * Strictly optional components which can be removed at will
- */
- #define INCLUDE_SHELL
- #define INCLUDE_NET_INIT
- #define INCLUDE_SHOW_ROUTINES
- #define INCLUDE_NET_SHOW
- #define INCLUDE_ARP_API
- #define INCLUDE_BSD
- #define INCLUDE_PING
- #define INCLUDE_DEBUG
- #define INCLUDE_LOADER
- #define INCLUDE_UNLOADER
- #define INCLUDE_NET_REM_IO /* network remote file i/o driver */
- #define INCLUDE_MCAST_ROUTING
- #define INCLUDE_IP_FILTER
- #define INCLUDE_TELNET
- #define INCLUDE_NET_HOST_SETUP
- #define INCLUDE_NET_SYM_TBL
- #define INCLUDE_STAT_SYM_TBL
- #define INCLUDE_SYM_TBL
- #define INCLUDE_TFFS
- #define INCLUDE_SHOW_ROUTINES
- #define INCLUDE_DOSFS
- #define CLED(value)
- do {
- volatile unsigned int *p;
- unsigned int a;
- p = (unsigned int *)IXP425_GPIO_GPOUTR;
- a = *p;
- *p = (~((value << 4) & 0x70)) & (a|0x70);
- }while (0)
- #endif /* INCconfigh */
- #if defined(PRJ_BUILD)
- #include "prjParams.h"
- #endif