fc68165.h
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上传用户:luoyougen
上传日期:2008-05-12
资源大小:23136k
文件大小:12k
源码类别:
VxWorks
开发平台:
C/C++
- /* fc68165.h - Force FC68165 (IOC) chip header file */
- /*
- modification history
- --------------------
- 01b,22sep92,rrr added support for c++
- 01a,19jul92,caf initial WRS version. added check for _ASMLANGUAGE macro.
- originally from Mike McCrary (Force).
- */
- /*
- This file contains the definitions for the IOC chip and IOC structure.
- */
- #ifndef __INCfc68165h
- #define __INCfc68165h
- #ifdef __cplusplus
- extern "C" {
- #endif
- #ifndef _ASMLANGUAGE
- typedef struct
- {
- unsigned long base_address; /* IOC_BASE */
- unsigned long general_control; /* IOC_GEN */
- unsigned long supplementary_control; /* IOC_SUPCTL */
- unsigned long timebase; /* IOC_TBASE */
- unsigned long timer [4]; /* IOC_TIMER */
- unsigned long spare1 [8]; /* IOC_SPARE1 */
- unsigned long cs_range [8]; /* IOC_CSRNG */
- unsigned long cs_config [8]; /* IOC_CSCFG */
- unsigned long int_intrq [8]; /* IOC_INTIRQ */
- unsigned long ext_intrq [8]; /* IOC_EXTIRQ */
- unsigned long dma_memory_address [4]; /* IOC_DMADDR */
- unsigned long dma_attribute [4]; /* IOC_DMATTR */
- unsigned long dma_control [4]; /* IOC_DMACTRL */
- unsigned long spare2 [4]; /* IOC_SPARE2 */
- unsigned char remnant [0x100];
- } FC68165;
- #endif /* _ASMLANGUAGE */
- /*
- * The following are the bit mask definitions, etc.
- */
- /* IOC_BASE */
- #define IOC_BASE_PGM 0x00000001
- /* IOC_GEN */
- #define IOC_GEN_IACK74_MASK 0xf0000000
- #define IOC_GEN_IACK118_MASK 0x0f000000
- #define IOC_GEN_IACKCODE_MASK 0x00f00000
- #define IOC_GEN_BG 0x00080000
- #define IOC_GEN_FIACK 0x00040000
- #define IOC_GEN_EPARITY 0x00020000
- #define IOC_GEN_GBERR 0x00010000
- #define IOC_GEN_IACKBERR_MASK 0x0000C000
- #define IOC_GEN_IACKBERR_DISAB 0x00000000
- #define IOC_GEN_IACKBERR_3us 0x00004000
- #define IOC_GEN_IACKBERR_400ns 0x00008000
- #define IOC_GEN_IACKBERR_0 0x0000C000
- #define IOC_GEN_FLXWAIT_MASK 0x00003000
- #define IOC_GEN_FLXWAIT_0 0x00000000
- #define IOC_GEN_FLXWAIT_40ns 0x00001000
- #define IOC_GEN_FLXWAIT_70ns 0x00002000
- #define IOC_GEN_FLXWAIT_100ns 0x00003000
- #define IOC_GEN_FLXBERR_MASK 0x00000c00
- #define IOC_GEN_FLXBERR_750us 0x00000000
- #define IOC_GEN_FLXBERR_50us 0x00000400
- #define IOC_GEN_FLXBERR_3us 0x00000800
- #define IOC_GEN_FLXBERR_750ns 0x00000C00
- #define IOC_GEN_BERRLOC_MASK 0x00000300
- #define IOC_GEN_BERRLOC_750us 0x00000000
- #define IOC_GEN_BERRLOC_50us 0x00000100
- #define IOC_GEN_BERRLOC_6us 0x00000200
- #define IOC_GEN_BERRLOC_1_5us 0x00000300
- #define IOC_GEN_ENAIACK 0x00000080
- #define IOC_GEN_DEBOUNCEIRQ0 0x00000020
- #define IOC_GEN_TACH_START 0x00000010
- #define IOC_GEN_SUP_ONLY 0x00000008
- #define IOC_GEN_FAIR_ARB 0x00000004
- #define IOC_GEN_BOOT_DECODE 0x00000002
- /* IOC_SUPCTL */
- #define IOC_SUPCTL_BRIDGE_MASK 0xff000000
- #define IOC_SUPCTL_BRIDGE_NORMAL 0x00000000
- #define IOC_SUPCTL_WATCHDOG_ENABLE 0x00800000 /* 1 = enabled */
- #define IOC_SUPCTL_FC_MASK 0x007f0000
- #define IOC_SUPCTL_FC_6 0x00400000
- #define IOC_SUPCTL_FC_5 0x00200000
- #define IOC_SUPCTL_FC_4 0x00100000
- #define IOC_SUPCTL_FC_3 0x00080000
- #define IOC_SUPCTL_FC_2 0x00040000
- #define IOC_SUPCTL_FC_1 0x00020000
- #define IOC_SUPCTL_FC_0 0x00010000
- #define IOC_SUPCTL_GBERR_TRAP 0x00008000 /* 1 = error occurred */
- #define IOC_SUPCTL_WATCHDOG_TRAP 0x00004000 /* 1 = watchdog occurred */
- #define IOC_SUPCTL_POWERUP_MASK 0x00002000 /* 0 = powerup occurred */
- #define IOC_SUPCTL_tacho_mask 0x000000ff
- /* IOC_TBASE */
- #define IOC_TBASE_MASK 0xffffffff /* 1 tic per us */
- /* IOC_TIMER */
- #define IOC_TIMER__MASK 0xffffffff
- /* IOC_CSRNG */
- #define IOC_CSRNG_ADDR_MASK 0xffffffc0
- #define IOC_CSRNG_CMP 0x00000020
- #define IOC_CSRNG_FLXI 0x00000010 /* 0 = local */
- #define IOC_CSRNG_SELCODE_MASK 0x0000000c
- #define IOC_CSRNG_SELCODE_DISABLED 0x00000000
- #define IOC_CSRNG_SELCODE_SUPRONLY 0x00000004
- #define IOC_CSRNG_SELCODE_SUPANDUSR 0x00000008
- #define IOC_CSRNG_SELCODE_COPROCESS 0x0000000C
- #define IOC_CSRNG_READONLY 0x00000002
- #define IOC_CSRNG_CACHEINHIB 0x00000001
- /* IOC_CSCFG */
- #define IOC_CSCFG_LOCAL_CSDEV_MASK 0xc000
- #define IOC_CSCFG_LOCAL_CSDEV_4 0x0000
- #define IOC_CSCFG_LOCAL_CSDEV_3 0x4000
- #define IOC_CSCFG_LOCAL_CSDEV_2 0x8000
- #define IOC_CSCFG_LOCAL_CSDEV_1 0xC000
- #define IOC_CSCFG_LOCAL_RDWR_MASK 0x3000
- #define IOC_CSCFG_LOCAL_RDWR_4 0x0000
- #define IOC_CSCFG_LOCAL_RDWR_3 0x1000
- #define IOC_CSCFG_LOCAL_RDWR_2 0x2000
- #define IOC_CSCFG_LOCAL_RDWR_1 0x3000
- #define IOC_CSCFG_LOCAL_DTACK_MASK 0x0e00
- #define IOC_CSCFG_LOCAL_DTACK_12 0x0000
- #define IOC_CSCFG_LOCAL_DTACK_9 0x0200
- #define IOC_CSCFG_LOCAL_DTACK_6 0x0400
- #define IOC_CSCFG_LOCAL_DTACK_4 0x0600
- #define IOC_CSCFG_LOCAL_DTACK_3 0x0800
- #define IOC_CSCFG_LOCAL_DTACK_2 0x0a00
- #define IOC_CSCFG_LOCAL_DTACK_1 0x0c00
- #define IOC_CSCFG_LOCAL_DTACK_NEVER 0x0e00
- #define IOC_CSCFG_LOCAL_RDWRN_MASK 0x0180
- #define IOC_CSCFG_LOCAL_RDWRN_5 0x0000
- #define IOC_CSCFG_LOCAL_RDWRN_3 0x0080
- #define IOC_CSCFG_LOCAL_RDWRN_2 0x0100
- #define IOC_CSCFG_LOCAL_RDWRN_1 0x0180
- #define IOC_CSCFG_LOCAL_CSDEVN_MASK 0x0060
- #define IOC_CSCFG_LOCAL_CSDEVN_4 0x0000
- #define IOC_CSCFG_LOCAL_CSDEVN_2 0x0020
- #define IOC_CSCFG_LOCAL_CSDEVN_1 0x0040
- #define IOC_CSCFG_LOCAL_CSDEVN_0 0x0060
- #define IOC_CSCFG_LOCAL_CYLHOLD_MASK 0x0018
- #define IOC_CSCFG_LOCAL_CYLHOLD_3 0x0000
- #define IOC_CSCFG_LOCAL_CYLHOLD_2 0x0008
- #define IOC_CSCFG_LOCAL_CYLHOLD_1 0x0010
- #define IOC_CSCFG_LOCAL_CYLHOLD_0 0x0018
- #define IOC_CSCFG_LOCAL_DEVDESEL_MASK 0x0006
- #define IOC_CSCFG_LOCAL_DEVDESEL_12 0x0000
- #define IOC_CSCFG_LOCAL_DEVDESEL_5 0x0002
- #define IOC_CSCFG_LOCAL_DEVDESEL_3 0x0004
- #define IOC_CSCFG_LOCAL_DEVDESEL_1 0x0006
- #define IOC_CSCFG_LOCAL_FASTCONT 0x0001
- #define IOC_CSCFG_FLXI_ASYNCCSDEV 0x8000
- #define IOC_CSCFG_FLXI_ASYNCBYTE 0x4000
- #define IOC_CSCFG_FLXI_ENADSACK 0x2000
- #define IOC_CSCFG_FLXI_SCS 0x1000
- #define IOC_CSCFG_FLXI_SBS 0x0800
- #define IOC_CSCFG_FLXI_BRDA 0x0400
- #define IOC_CSCFG_FLXI_BRDE 0x0200
- #define IOC_CSCFG_FLXI_CSRD 0x0100
- #define IOC_CSCFG_FLXI_WAITS_MASK 0x00f0
- #define IOC_CSCFG_FLXI_WAITS_0 0x0000 /* 35 ns */
- #define IOC_CSCFG_FLXI_WAITS_1 0x0010 /* 70 ns */
- #define IOC_CSCFG_FLXI_WAITS_2 0x0020 /* 100 ns */
- #define IOC_CSCFG_FLXI_WAITS_3 0x0030 /* 135 ns */
- #define IOC_CSCFG_FLXI_WAITS_4 0x0040 /* 170 ns */
- #define IOC_CSCFG_FLXI_WAITS_5 0x0050 /* 200 ns */
- #define IOC_CSCFG_FLXI_WAITS_6 0x0060 /* 235 ns */
- #define IOC_CSCFG_FLXI_WAITS_7 0x0070 /* 270 ns */
- #define IOC_CSCFG_FLXI_WAITS_8 0x0080 /* 300 ns */
- #define IOC_CSCFG_FLXI_WAITS_9 0x0090 /* 335 ns */
- #define IOC_CSCFG_FLXI_WAITS_10 0x00a0 /* 370 ns */
- #define IOC_CSCFG_FLXI_WAITS_11 0x00b0 /* 400 ns */
- #define IOC_CSCFG_FLXI_WAITS_12 0x00c0 /* 435 ns */
- #define IOC_CSCFG_FLXI_WAITS_13 0x00d0 /* 470 ns */
- #define IOC_CSCFG_FLXI_WAITS_14 0x00e0 /* 500 ns */
- #define IOC_CSCFG_FLXI_WAITS_15 0x00f0 /* 535 ns */
- #define IOC_CSCFG_FLXI_STROBE_MASK 0x000c
- #define IOC_CSCFG_FLXI_STROBE_NONE 0x0000
- #define IOC_CSCFG_FLXI_STROBE_BYTE 0x0004
- #define IOC_CSCFG_FLXI_STROBE_WORD 0x0008
- #define IOC_CSCFG_FLXI_STROBE_LONG 0x000c
- #define IOC_CSCFG_FLXI_DSACK_MASK 0x0003
- #define IOC_CSCFG_FLXI_DSACK_LONG 0x0000
- #define IOC_CSCFG_FLXI_DSACK_WORD 0x0001
- #define IOC_CSCFG_FLXI_DSACK_BYTE 0x0002
- #define IOC_CSCFG_FLXI_DSACK_NONE 0x0003
- /* IOC_INTIRQ */
- #define IOC_INTIRQ_IRQENABLE 0x08000000
- #define IOC_INTIRQ_IRQLEVEL_MASK 0x07000000
- #define IOC_INTIRQ_IRQLEVEL_0 0x00000000
- #define IOC_INTIRQ_IRQLEVEL_1 0x01000000
- #define IOC_INTIRQ_IRQLEVEL_2 0x02000000
- #define IOC_INTIRQ_IRQLEVEL_3 0x03000000
- #define IOC_INTIRQ_IRQLEVEL_4 0x04000000
- #define IOC_INTIRQ_IRQLEVEL_5 0x05000000
- #define IOC_INTIRQ_IRQLEVEL_6 0x06000000
- #define IOC_INTIRQ_IRQLEVEL_7 0x07000000
- #define IOC_INTIRQ_IRQSTAT 0x00800000
- #define IOC_INTIRQ_IRQMAIL 0x00400000
- #define IOC_INTIRQ_TDENABLE 0x00000200
- #define IOC_INTIRQ_NOAUTOCLEAR 0x00000100
- /* IOC_EXTIRQ */
- #define IOC_EXTIRQ_IRQENABLE 0x08000000
- #define IOC_EXTIRQ_IRQLEVEL_MASK 0x07000000
- #define IOC_EXTIRQ_IRQLEVEL_0 0x00000000
- #define IOC_EXTIRQ_IRQLEVEL_1 0x01000000
- #define IOC_EXTIRQ_IRQLEVEL_2 0x02000000
- #define IOC_EXTIRQ_IRQLEVEL_3 0x03000000
- #define IOC_EXTIRQ_IRQLEVEL_4 0x04000000
- #define IOC_EXTIRQ_IRQLEVEL_5 0x05000000
- #define IOC_EXTIRQ_IRQLEVEL_6 0x06000000
- #define IOC_EXTIRQ_IRQLEVEL_7 0x07000000
- #define IOC_EXTIRQ_IRQSTAT 0x00800000
- #define IOC_EXTIRQ_EXTVECTOR 0x00000800
- #define IOC_EXTIRQ_EDGE 0x00000400
- #define IOC_EXTIRQ_ACTHIGH 0x00000200
- #define IOC_EXTIRQ_AUTOCLEAR 0x00000100
- #define IOC_EXTIRQ_DISABLEIACK 0x00000008
- #define IOC_EXTIRQ_CSTIMING_MASK 0x00000007
- #define IOC_EXTIRQ_CSTIMING_0 0x00000000
- #define IOC_EXTIRQ_CSTIMING_1 0x00000001
- #define IOC_EXTIRQ_CSTIMING_2 0x00000002
- #define IOC_EXTIRQ_CSTIMING_3 0x00000003
- #define IOC_EXTIRQ_CSTIMING_4 0x00000004
- #define IOC_EXTIRQ_CSTIMING_5 0x00000005
- #define IOC_EXTIRQ_CSTIMING_6 0x00000006
- #define IOC_EXTIRQ_CSTIMING_7 0x00000007
- /* IOC_DMATTR */
- #define IOC_DMATTR_LCLSIZE_MASK 0xc0000000
- #define IOC_DMATTR_LCLSIZE_LONG 0x00000000
- #define IOC_DMATTR_LCLSIZE_BYTE 0x40000000
- #define IOC_DMATTR_LCLSIZE_WORD 0x80000000
- #define IOC_DMATTR_LCLSIZE_BAD 0xc0000000
- #define IOC_DMATTR_LCLADDR_MASK 0x3f000000
- #define IOC_DMATTR_DSTFLXI 0x00800000 /* otherwise dst is local */
- #define IOC_DMATTR_FC_MASK 0x00700000
- #define IOC_DMATTR_FC_SUP_BT 0x00700000
- #define IOC_DMATTR_FC_SUP_PGM 0x00600000
- #define IOC_DMATTR_FC_SUP_DATA 0x00500000
- #define IOC_DMATTR_FC_USR_BT 0x00300000
- #define IOC_DMATTR_FC_USR_PGM 0x00200000
- #define IOC_DMATTR_FC_USR_DATA 0x00100000
- #define IOC_DMATTR_XFERCNT_MASK 0x000fffff /* 1 - 1 megabyte */
- /* IOC_DMACTRL */
- #define IOC_DMACTRL_NT 0x80000000 /* normal termination */
- #define IOC_DMACTRL_ET 0x40000000 /* error termination */
- #define IOC_DMACTRL_ENABLE 0x00010000 /* enables DMA controller */
- #define IOC_DMACTRL_RQ_MASK 0x00000e00
- #define IOC_DMACTRL_RQ_DISABLED 0x00000000
- #define IOC_DMACTRL_IFACTENABLED 0x00000800 /* if DMAREQ only */
- #define IOC_DMACTRL_AUTOENABLED 0x00000a00 /* DMAREQ always active */
- #define IOC_DMACTRL_1SHOTAUTOENABLED 0x00000c00 /* first AUTO, then IFACT */
- #define IOC_DMACTRL_EDGE 0x00000100 /* else LEVEL sensitive */
- #define IOC_DMACTRL_RQIGNORETIME_MASK 0x000000f0
- #define IOC_DMACTRL_RQIGNORETIME_465 0x00000000 /* 465 ns */
- #define IOC_DMACTRL_RQIGNORETIME_434 0x00000010
- #define IOC_DMACTRL_RQIGNORETIME_403 0x00000020
- #define IOC_DMACTRL_RQIGNORETIME_372 0x00000030
- #define IOC_DMACTRL_RQIGNORETIME_341 0x00000040
- #define IOC_DMACTRL_RQIGNORETIME_310 0x00000050
- #define IOC_DMACTRL_RQIGNORETIME_279 0x00000060
- #define IOC_DMACTRL_RQIGNORETIME_248 0x00000070
- #define IOC_DMACTRL_RQIGNORETIME_217 0x00000080
- #define IOC_DMACTRL_RQIGNORETIME_186 0x00000090
- #define IOC_DMACTRL_RQIGNORETIME_155 0x000000a0
- #define IOC_DMACTRL_RQIGNORETIME_124 0x000000b0
- #define IOC_DMACTRL_RQIGNORETIME_93 0x000000c0
- #define IOC_DMACTRL_RQIGNORETIME_62 0x000000d0
- #define IOC_DMACTRL_RQIGNORETIME_31 0x000000e0
- #define IOC_DMACTRL_RQIGNORETIME_0 0x000000f0 /* 0 ns */
- #define IOC_DMACTRL_HRQ 0x00000008 /* high active request */
- #define IOC_DMACTRL_LOCALPORT_MASK 0x00000007 /* CSDEV of DMA */
- #define IOC_DMACTRL_LOCALPROT_0 0x00000000
- #define IOC_DMACTRL_LOCALPROT_1 0x00000001
- #define IOC_DMACTRL_LOCALPROT_2 0x00000002
- #define IOC_DMACTRL_LOCALPROT_3 0x00000003
- #define IOC_DMACTRL_LOCALPROT_4 0x00000004
- #define IOC_DMACTRL_LOCALPROT_5 0x00000005
- #define IOC_DMACTRL_LOCALPROT_6 0x00000006
- #define IOC_DMACTRL_LOCALPROT_7 0x00000007
- #ifdef __cplusplus
- }
- #endif
- #endif /* __INCfc68165h */