examp1.map.qmsg
资源名称:gtt2.rar [点击查看]
上传用户:jinxingdao
上传日期:2021-04-27
资源大小:415k
文件大小:12k
源码类别:
扫描程序
开发平台:
VHDL
- { "Info" "IQEXE_SEPARATOR" "" "Info: *******************************************************************" { } { } 3 0 "*******************************************************************" 0 0 "" 0}
- { "Info" "IQEXE_START_BANNER_PRODUCT" "Analysis & Synthesis Quartus II " "Info: Running Quartus II Analysis & Synthesis" { { "Info" "IQEXE_START_BANNER_VERSION" "Version 7.2 Build 151 09/26/2007 SJ Full Version " "Info: Version 7.2 Build 151 09/26/2007 SJ Full Version" { } { } 0 0 "%1!s!" 0 0 "" 0} { "Info" "IQEXE_START_BANNER_TIME" "Fri Jan 22 09:53:17 2010 " "Info: Processing started: Fri Jan 22 09:53:17 2010" { } { } 0 0 "Processing started: %1!s!" 0 0 "" 0} } { } 4 0 "Running %2!s! %1!s!" 0 0 "" 0}
- { "Info" "IQEXE_START_BANNER_COMMANDLINE" "quartus_map --read_settings_files=on --write_settings_files=off examp1 -c examp1 " "Info: Command: quartus_map --read_settings_files=on --write_settings_files=off examp1 -c examp1" { } { } 0 0 "Command: %1!s!" 0 0 "" 0}
- { "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "examp1.bdf 1 1 " "Info: Found 1 design units, including 1 entities, in source file examp1.bdf" { { "Info" "ISGN_ENTITY_NAME" "1 examp1 " "Info: Found entity 1: examp1" { } { { "examp1.bdf" "" { Schematic "F:/gtt2/examp1.bdf" { } } } } 0 0 "Found entity %1!d!: %2!s!" 0 0 "" 0} } { } 0 0 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "" 0}
- { "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "xh.vhd 2 1 " "Info: Found 2 design units, including 1 entities, in source file xh.vhd" { { "Info" "ISGN_DESIGN_UNIT_NAME" "1 xh-shuchu " "Info: Found design unit 1: xh-shuchu" { } { { "xh.vhd" "" { Text "F:/gtt2/xh.vhd" 12 -1 0 } } } 0 0 "Found design unit %1!d!: %2!s!" 0 0 "" 0} { "Info" "ISGN_ENTITY_NAME" "1 xh " "Info: Found entity 1: xh" { } { { "xh.vhd" "" { Text "F:/gtt2/xh.vhd" 5 -1 0 } } } 0 0 "Found entity %1!d!: %2!s!" 0 0 "" 0} } { } 0 0 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "" 0}
- { "Info" "ISGN_START_ELABORATION_TOP" "examp1 " "Info: Elaborating entity "examp1" for the top level hierarchy" { } { } 0 0 "Elaborating entity "%1!s!" for the top level hierarchy" 0 0 "" 0}
- { "Warning" "WGDFX_PROCESSING_LEGACY_SCHEMATIC_WITH_MAXPLUS_II_NAMING" "examp1 " "Warning: Processing legacy GDF or BDF entity "examp1" with Max+Plus II bus and instance naming rules" { } { { "examp1.bdf" "" { Schematic "F:/gtt2/examp1.bdf" { } } } } 0 0 "Processing legacy GDF or BDF entity "%1!s!" with Max+Plus II bus and instance naming rules" 0 0 "" 0}
- { "Warning" "WGDFX_SYMBOLS_OVERLAP_WARNING" "74160 inst6 " "Warning: Block or symbol "74160" of instance "inst6" overlaps another block or symbol" { } { { "examp1.bdf" "" { Schematic "F:/gtt2/examp1.bdf" { { -80 1224 1344 104 "inst6" "" } } } } } 0 0 "Block or symbol "%1!s!" of instance "%2!s!" overlaps another block or symbol" 0 0 "" 0}
- { "Warning" "WGDFX_SYMBOLS_OVERLAP_WARNING" "74160 inst10 " "Warning: Block or symbol "74160" of instance "inst10" overlaps another block or symbol" { } { { "examp1.bdf" "" { Schematic "F:/gtt2/examp1.bdf" { { 200 472 592 384 "inst10" "" } } } } } 0 0 "Block or symbol "%1!s!" of instance "%2!s!" overlaps another block or symbol" 0 0 "" 0}
- { "Warning" "WGDFX_SYMBOLS_OVERLAP_WARNING" "74160 inst13 " "Warning: Block or symbol "74160" of instance "inst13" overlaps another block or symbol" { } { { "examp1.bdf" "" { Schematic "F:/gtt2/examp1.bdf" { { 256 1216 1336 440 "inst13" "" } } } } } 0 0 "Block or symbol "%1!s!" of instance "%2!s!" overlaps another block or symbol" 0 0 "" 0}
- { "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "d:/quratus/quartus/libraries/others/maxplus2/74160.bdf 1 1 " "Info: Found 1 design units, including 1 entities, in source file d:/quratus/quartus/libraries/others/maxplus2/74160.bdf" { { "Info" "ISGN_ENTITY_NAME" "1 74160 " "Info: Found entity 1: 74160" { } { { "74160.bdf" "" { Schematic "d:/quratus/quartus/libraries/others/maxplus2/74160.bdf" { } } } } 0 0 "Found entity %1!d!: %2!s!" 0 0 "" 0} } { } 0 0 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "" 0}
- { "Info" "ISGN_START_ELABORATION_HIERARCHY" "74160 74160:inst " "Info: Elaborating entity "74160" for hierarchy "74160:inst"" { } { { "examp1.bdf" "inst" { Schematic "F:/gtt2/examp1.bdf" { { -112 96 216 72 "inst" "" } } } } } 0 0 "Elaborating entity "%1!s!" for hierarchy "%2!s!"" 0 0 "" 0}
- { "Warning" "WGDFX_PROCESSING_LEGACY_SCHEMATIC_WITH_MAXPLUS_II_NAMING" "74160 " "Warning: Processing legacy GDF or BDF entity "74160" with Max+Plus II bus and instance naming rules" { } { { "74160.bdf" "" { Schematic "d:/quratus/quartus/libraries/others/maxplus2/74160.bdf" { } } } } 0 0 "Processing legacy GDF or BDF entity "%1!s!" with Max+Plus II bus and instance naming rules" 0 0 "" 0}
- { "Info" "ISGN_ELABORATION_HEADER" "74160:inst " "Info: Elaborated megafunction instantiation "74160:inst"" { } { { "examp1.bdf" "" { Schematic "F:/gtt2/examp1.bdf" { { -112 96 216 72 "inst" "" } } } } } 0 0 "Elaborated megafunction instantiation "%1!s!"" 0 0 "" 0}
- { "Info" "ISGN_START_ELABORATION_HIERARCHY" "xh xh:inst16 " "Info: Elaborating entity "xh" for hierarchy "xh:inst16"" { } { { "examp1.bdf" "inst16" { Schematic "F:/gtt2/examp1.bdf" { { 648 1424 1576 808 "inst16" "" } } } } } 0 0 "Elaborating entity "%1!s!" for hierarchy "%2!s!"" 0 0 "" 0}
- { "Warning" "WVRFX_VHDL_SHOULD_BE_ON_THE_PROCESSES_SENSITIVITY_LIST" "D1 xh.vhd(30) " "Warning (10492): VHDL Process Statement warning at xh.vhd(30): signal "D1" is read inside the Process Statement but isn't in the Process Statement's sensitivity list" { } { { "xh.vhd" "" { Text "F:/gtt2/xh.vhd" 30 0 0 } } } 0 10492 "VHDL Process Statement warning at %2!s!: signal "%1!s!" is read inside the Process Statement but isn't in the Process Statement's sensitivity list" 0 0 "" 0}
- { "Warning" "WVRFX_VHDL_SHOULD_BE_ON_THE_PROCESSES_SENSITIVITY_LIST" "D2 xh.vhd(31) " "Warning (10492): VHDL Process Statement warning at xh.vhd(31): signal "D2" is read inside the Process Statement but isn't in the Process Statement's sensitivity list" { } { { "xh.vhd" "" { Text "F:/gtt2/xh.vhd" 31 0 0 } } } 0 10492 "VHDL Process Statement warning at %2!s!: signal "%1!s!" is read inside the Process Statement but isn't in the Process Statement's sensitivity list" 0 0 "" 0}
- { "Warning" "WVRFX_VHDL_SHOULD_BE_ON_THE_PROCESSES_SENSITIVITY_LIST" "D3 xh.vhd(32) " "Warning (10492): VHDL Process Statement warning at xh.vhd(32): signal "D3" is read inside the Process Statement but isn't in the Process Statement's sensitivity list" { } { { "xh.vhd" "" { Text "F:/gtt2/xh.vhd" 32 0 0 } } } 0 10492 "VHDL Process Statement warning at %2!s!: signal "%1!s!" is read inside the Process Statement but isn't in the Process Statement's sensitivity list" 0 0 "" 0}
- { "Warning" "WVRFX_VHDL_SHOULD_BE_ON_THE_PROCESSES_SENSITIVITY_LIST" "D4 xh.vhd(33) " "Warning (10492): VHDL Process Statement warning at xh.vhd(33): signal "D4" is read inside the Process Statement but isn't in the Process Statement's sensitivity list" { } { { "xh.vhd" "" { Text "F:/gtt2/xh.vhd" 33 0 0 } } } 0 10492 "VHDL Process Statement warning at %2!s!: signal "%1!s!" is read inside the Process Statement but isn't in the Process Statement's sensitivity list" 0 0 "" 0}
- { "Warning" "WVRFX_VHDL_SHOULD_BE_ON_THE_PROCESSES_SENSITIVITY_LIST" "data_out xh.vhd(37) " "Warning (10492): VHDL Process Statement warning at xh.vhd(37): signal "data_out" is read inside the Process Statement but isn't in the Process Statement's sensitivity list" { } { { "xh.vhd" "" { Text "F:/gtt2/xh.vhd" 37 0 0 } } } 0 10492 "VHDL Process Statement warning at %2!s!: signal "%1!s!" is read inside the Process Statement but isn't in the Process Statement's sensitivity list" 0 0 "" 0}
- { "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "d:/quratus/quartus/libraries/others/maxplus2/74273.bdf 1 1 " "Info: Found 1 design units, including 1 entities, in source file d:/quratus/quartus/libraries/others/maxplus2/74273.bdf" { { "Info" "ISGN_ENTITY_NAME" "1 74273 " "Info: Found entity 1: 74273" { } { { "74273.bdf" "" { Schematic "d:/quratus/quartus/libraries/others/maxplus2/74273.bdf" { } } } } 0 0 "Found entity %1!d!: %2!s!" 0 0 "" 0} } { } 0 0 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "" 0}
- { "Info" "ISGN_START_ELABORATION_HIERARCHY" "74273 74273:6 " "Info: Elaborating entity "74273" for hierarchy "74273:6"" { } { { "examp1.bdf" "6" { Schematic "F:/gtt2/examp1.bdf" { { 504 368 488 696 "6" "" } } } } } 0 0 "Elaborating entity "%1!s!" for hierarchy "%2!s!"" 0 0 "" 0}
- { "Warning" "WGDFX_PROCESSING_LEGACY_SCHEMATIC_WITH_MAXPLUS_II_NAMING" "74273 " "Warning: Processing legacy GDF or BDF entity "74273" with Max+Plus II bus and instance naming rules" { } { { "74273.bdf" "" { Schematic "d:/quratus/quartus/libraries/others/maxplus2/74273.bdf" { } } } } 0 0 "Processing legacy GDF or BDF entity "%1!s!" with Max+Plus II bus and instance naming rules" 0 0 "" 0}
- { "Info" "ISGN_ELABORATION_HEADER" "74273:6 " "Info: Elaborated megafunction instantiation "74273:6"" { } { { "examp1.bdf" "" { Schematic "F:/gtt2/examp1.bdf" { { 504 368 488 696 "6" "" } } } } } 0 0 "Elaborated megafunction instantiation "%1!s!"" 0 0 "" 0}
- { "Info" "IOPT_MLS_DUP_REG_INFO_HDR" "" "Info: Duplicate registers merged to single register" { { "Info" "IOPT_MLS_DUP_REG_INFO" "xh:inst18|STATE[0] xh:inst16|STATE[0] " "Info: Duplicate register "xh:inst18|STATE[0]" merged to single register "xh:inst16|STATE[0]"" { } { { "xh.vhd" "" { Text "F:/gtt2/xh.vhd" 18 -1 0 } } } 0 0 "Duplicate register "%1!s!" merged to single register "%2!s!"" 0 0 "" 0} { "Info" "IOPT_MLS_DUP_REG_INFO" "xh:inst17|STATE[0] xh:inst16|STATE[0] " "Info: Duplicate register "xh:inst17|STATE[0]" merged to single register "xh:inst16|STATE[0]"" { } { { "xh.vhd" "" { Text "F:/gtt2/xh.vhd" 18 -1 0 } } } 0 0 "Duplicate register "%1!s!" merged to single register "%2!s!"" 0 0 "" 0} { "Info" "IOPT_MLS_DUP_REG_INFO" "xh:inst17|STATE[1] xh:inst16|STATE[1] " "Info: Duplicate register "xh:inst17|STATE[1]" merged to single register "xh:inst16|STATE[1]"" { } { { "xh.vhd" "" { Text "F:/gtt2/xh.vhd" 18 -1 0 } } } 0 0 "Duplicate register "%1!s!" merged to single register "%2!s!"" 0 0 "" 0} { "Info" "IOPT_MLS_DUP_REG_INFO" "xh:inst18|STATE[1] xh:inst16|STATE[1] " "Info: Duplicate register "xh:inst18|STATE[1]" merged to single register "xh:inst16|STATE[1]"" { } { { "xh.vhd" "" { Text "F:/gtt2/xh.vhd" 18 -1 0 } } } 0 0 "Duplicate register "%1!s!" merged to single register "%2!s!"" 0 0 "" 0} } { } 0 0 "Duplicate registers merged to single register" 0 0 "" 0}
- { "Info" "ICUT_CUT_TM_SUMMARY" "312 " "Info: Implemented 312 device resources after synthesis - the final resource count might be different" { { "Info" "ICUT_CUT_TM_IPINS" "3 " "Info: Implemented 3 input pins" { } { } 0 0 "Implemented %1!d! input pins" 0 0 "" 0} { "Info" "ICUT_CUT_TM_OPINS" "121 " "Info: Implemented 121 output pins" { } { } 0 0 "Implemented %1!d! output pins" 0 0 "" 0} { "Info" "ICUT_CUT_TM_LCELLS" "188 " "Info: Implemented 188 logic cells" { } { } 0 0 "Implemented %1!d! logic cells" 0 0 "" 0} } { } 0 0 "Implemented %1!d! device resources after synthesis - the final resource count might be different" 0 0 "" 0}
- { "Info" "IQEXE_ERROR_COUNT" "Analysis & Synthesis 0 s 11 s Quartus II " "Info: Quartus II Analysis & Synthesis was successful. 0 errors, 11 warnings" { { "Info" "IQEXE_END_PEAK_VSIZE_MEMORY" "158 " "Info: Allocated 158 megabytes of memory during processing" { } { } 0 0 "Allocated %1!s! megabytes of memory during processing" 0 0 "" 0} { "Info" "IQEXE_END_BANNER_TIME" "Fri Jan 22 09:53:19 2010 " "Info: Processing ended: Fri Jan 22 09:53:19 2010" { } { } 0 0 "Processing ended: %1!s!" 0 0 "" 0} { "Info" "IQEXE_ELAPSED_TIME" "00:00:02 " "Info: Elapsed time: 00:00:02" { } { } 0 0 "Elapsed time: %1!s!" 0 0 "" 0} } { } 0 0 "%6!s! %1!s! was successful. %2!d! error%3!s!, %4!d! warning%5!s!" 0 0 "" 0}