examp1.sim.rpt
上传用户:jinxingdao
上传日期:2021-04-27
资源大小:415k
文件大小:45k
源码类别:

扫描程序

开发平台:

VHDL

  1. Simulator report for examp1
  2. Mon Apr 19 09:55:36 2010
  3. Quartus II Version 7.2 Build 151 09/26/2007 SJ Full Version
  4. ---------------------
  5. ; Table of Contents ;
  6. ---------------------
  7.   1. Legal Notice
  8.   2. Simulator Summary
  9.   3. Simulator Settings
  10.   4. Simulation Waveforms
  11.   5. Coverage Summary
  12.   6. Complete 1/0-Value Coverage
  13.   7. Missing 1-Value Coverage
  14.   8. Missing 0-Value Coverage
  15.   9. Simulator INI Usage
  16.  10. Simulator Messages
  17. ----------------
  18. ; Legal Notice ;
  19. ----------------
  20. Copyright (C) 1991-2007 Altera Corporation
  21. Your use of Altera Corporation's design tools, logic functions 
  22. and other software and tools, and its AMPP partner logic 
  23. functions, and any output files from any of the foregoing 
  24. (including device programming or simulation files), and any 
  25. associated documentation or information are expressly subject 
  26. to the terms and conditions of the Altera Program License 
  27. Subscription Agreement, Altera MegaCore Function License 
  28. Agreement, or other applicable license agreement, including, 
  29. without limitation, that your use is for the sole purpose of 
  30. programming logic devices manufactured by Altera and sold by 
  31. Altera or its authorized distributors.  Please refer to the 
  32. applicable agreement for further details.
  33. +-----------------------------------------------+
  34. ; Simulator Summary                             ;
  35. +-----------------------------+-----------------+
  36. ; Type                        ; Value           ;
  37. +-----------------------------+-----------------+
  38. ; Simulation Start Time       ; 0 ps            ;
  39. ; Simulation End Time         ; 100.0 us        ;
  40. ; Simulation Netlist Size     ; 320 nodes       ;
  41. ; Simulation Coverage         ;      42.18 %    ;
  42. ; Total Number of Transitions ; 90176           ;
  43. ; Simulation Breakpoints      ; 0               ;
  44. ; Family                      ; FLEX10K         ;
  45. ; Device                      ; EPF10K10QI208-4 ;
  46. +-----------------------------+-----------------+
  47. +-------------------------------------------------------------------------------------------------------------------------+
  48. ; Simulator Settings                                                                                                      ;
  49. +--------------------------------------------------------------------------------------------+------------+---------------+
  50. ; Option                                                                                     ; Setting    ; Default Value ;
  51. +--------------------------------------------------------------------------------------------+------------+---------------+
  52. ; Simulation mode                                                                            ; Timing     ; Timing        ;
  53. ; Start time                                                                                 ; 0 ns       ; 0 ns          ;
  54. ; Simulation results format                                                                  ; CVWF       ;               ;
  55. ; Add pins automatically to simulation output waveforms                                      ; On         ; On            ;
  56. ; Check outputs                                                                              ; Off        ; Off           ;
  57. ; Report simulation coverage                                                                 ; On         ; On            ;
  58. ; Display complete 1/0 value coverage report                                                 ; On         ; On            ;
  59. ; Display missing 1-value coverage report                                                    ; On         ; On            ;
  60. ; Display missing 0-value coverage report                                                    ; On         ; On            ;
  61. ; Detect setup and hold time violations                                                      ; Off        ; Off           ;
  62. ; Detect glitches                                                                            ; Off        ; Off           ;
  63. ; Disable timing delays in Timing Simulation                                                 ; Off        ; Off           ;
  64. ; Generate Signal Activity File                                                              ; Off        ; Off           ;
  65. ; Generate VCD File for PowerPlay Power Analyzer                                             ; Off        ; Off           ;
  66. ; Group bus channels in simulation results                                                   ; Off        ; Off           ;
  67. ; Preserve fewer signal transitions to reduce memory requirements                            ; On         ; On            ;
  68. ; Trigger vector comparison with the specified mode                                          ; INPUT_EDGE ; INPUT_EDGE    ;
  69. ; Disable setup and hold time violations detection in input registers of bi-directional pins ; Off        ; Off           ;
  70. ; Overwrite Waveform Inputs With Simulation Outputs                                          ; Off        ;               ;
  71. ; Perform Glitch Filtering in Timing Simulation                                              ; Auto       ; Auto          ;
  72. +--------------------------------------------------------------------------------------------+------------+---------------+
  73. +----------------------+
  74. ; Simulation Waveforms ;
  75. +----------------------+
  76. Waveform report data cannot be output to ASCII.
  77. Please use Quartus II to view the waveform report data.
  78. +--------------------------------------------------------------------+
  79. ; Coverage Summary                                                   ;
  80. +-----------------------------------------------------+--------------+
  81. ; Type                                                ; Value        ;
  82. +-----------------------------------------------------+--------------+
  83. ; Total coverage as a percentage                      ;      42.18 % ;
  84. ; Total nodes checked                                 ; 320          ;
  85. ; Total output ports checked                          ; 294          ;
  86. ; Total output ports with complete 1/0-value coverage ; 124          ;
  87. ; Total output ports with no 1/0-value coverage       ; 166          ;
  88. ; Total output ports with no 1-value coverage         ; 166          ;
  89. ; Total output ports with no 0-value coverage         ; 170          ;
  90. +-----------------------------------------------------+--------------+
  91. The following table displays output ports that toggle between 1 and 0 during simulation.
  92. +----------------------------------------------------------------------------+
  93. ; Complete 1/0-Value Coverage                                                ;
  94. +----------------------------+----------------------------+------------------+
  95. ; Node Name                  ; Output Port Name           ; Output Port Type ;
  96. +----------------------------+----------------------------+------------------+
  97. ; |examp1|74160:inst|49~22   ; |examp1|74160:inst|49~22   ; data_out0        ;
  98. ; |examp1|xh:inst16|Mux1~45  ; |examp1|xh:inst16|Mux1~45  ; data_out0        ;
  99. ; |examp1|xh:inst16|Mux1~46  ; |examp1|xh:inst16|Mux1~46  ; data_out0        ;
  100. ; |examp1|xh:inst16|Mux1~47  ; |examp1|xh:inst16|Mux1~47  ; data_out0        ;
  101. ; |examp1|xh:inst16|Mux1~48  ; |examp1|xh:inst16|Mux1~48  ; data_out0        ;
  102. ; |examp1|74273:6|16         ; |examp1|74273:6|16         ; data_out0        ;
  103. ; |examp1|74273:6|17         ; |examp1|74273:6|17         ; data_out0        ;
  104. ; |examp1|74273:6|18         ; |examp1|74273:6|18         ; data_out0        ;
  105. ; |examp1|74273:6|19         ; |examp1|74273:6|19         ; data_out0        ;
  106. ; |examp1|74160:inst|8       ; |examp1|74160:inst|8       ; data_out0        ;
  107. ; |examp1|74160:inst|7       ; |examp1|74160:inst|7       ; data_out0        ;
  108. ; |examp1|74273:7|18         ; |examp1|74273:7|18         ; data_out0        ;
  109. ; |examp1|74273:7|19         ; |examp1|74273:7|19         ; data_out0        ;
  110. ; |examp1|74160:inst2|7      ; |examp1|74160:inst2|7      ; data_out0        ;
  111. ; |examp1|inst4              ; |examp1|inst4              ; data_out0        ;
  112. ; |examp1|13                 ; |examp1|13                 ; data_out0        ;
  113. ; |examp1|74160:inst|28      ; |examp1|74160:inst|28      ; data_out0        ;
  114. ; |examp1|74160:inst|49~23   ; |examp1|74160:inst|49~23   ; data_out0        ;
  115. ; |examp1|74160:inst2|28     ; |examp1|74160:inst2|28     ; data_out0        ;
  116. ; |examp1|74160:inst2|49~23  ; |examp1|74160:inst2|49~23  ; data_out0        ;
  117. ; |examp1|xh:inst16|Mux8~9   ; |examp1|xh:inst16|Mux8~9   ; data_out0        ;
  118. ; |examp1|xh:inst16|Mux8~10  ; |examp1|xh:inst16|Mux8~10  ; data_out0        ;
  119. ; |examp1|xh:inst16|Mux7~6   ; |examp1|xh:inst16|Mux7~6   ; data_out0        ;
  120. ; |examp1|xh:inst16|Mux7~7   ; |examp1|xh:inst16|Mux7~7   ; data_out0        ;
  121. ; |examp1|xh:inst16|Mux6~16  ; |examp1|xh:inst16|Mux6~16  ; data_out0        ;
  122. ; |examp1|xh:inst16|Mux6~17  ; |examp1|xh:inst16|Mux6~17  ; data_out0        ;
  123. ; |examp1|xh:inst16|Mux5~9   ; |examp1|xh:inst16|Mux5~9   ; data_out0        ;
  124. ; |examp1|xh:inst16|Mux5~10  ; |examp1|xh:inst16|Mux5~10  ; data_out0        ;
  125. ; |examp1|xh:inst16|Mux14~8  ; |examp1|xh:inst16|Mux14~8  ; data_out0        ;
  126. ; |examp1|xh:inst16|Mux15~15 ; |examp1|xh:inst16|Mux15~15 ; data_out0        ;
  127. ; |examp1|xh:inst16|Mux13~9  ; |examp1|xh:inst16|Mux13~9  ; data_out0        ;
  128. ; |examp1|xh:inst16|Mux12~14 ; |examp1|xh:inst16|Mux12~14 ; data_out0        ;
  129. ; |examp1|xh:inst16|Mux11~9  ; |examp1|xh:inst16|Mux11~9  ; data_out0        ;
  130. ; |examp1|xh:inst16|Mux10~30 ; |examp1|xh:inst16|Mux10~30 ; data_out0        ;
  131. ; |examp1|xh:inst16|Mux9~25  ; |examp1|xh:inst16|Mux9~25  ; data_out0        ;
  132. ; |examp1|xh:inst16|Mux0~9   ; |examp1|xh:inst16|Mux0~9   ; data_out0        ;
  133. ; |examp1|xh:inst17|Mux8~9   ; |examp1|xh:inst17|Mux8~9   ; data_out0        ;
  134. ; |examp1|xh:inst17|Mux8~10  ; |examp1|xh:inst17|Mux8~10  ; data_out0        ;
  135. ; |examp1|xh:inst17|Mux7~6   ; |examp1|xh:inst17|Mux7~6   ; data_out0        ;
  136. ; |examp1|xh:inst17|Mux7~7   ; |examp1|xh:inst17|Mux7~7   ; data_out0        ;
  137. ; |examp1|xh:inst17|Mux6~16  ; |examp1|xh:inst17|Mux6~16  ; data_out0        ;
  138. ; |examp1|xh:inst17|Mux6~17  ; |examp1|xh:inst17|Mux6~17  ; data_out0        ;
  139. ; |examp1|xh:inst17|Mux5~9   ; |examp1|xh:inst17|Mux5~9   ; data_out0        ;
  140. ; |examp1|xh:inst17|Mux5~10  ; |examp1|xh:inst17|Mux5~10  ; data_out0        ;
  141. ; |examp1|xh:inst17|Mux14~8  ; |examp1|xh:inst17|Mux14~8  ; data_out0        ;
  142. ; |examp1|xh:inst17|Mux15~15 ; |examp1|xh:inst17|Mux15~15 ; data_out0        ;
  143. ; |examp1|xh:inst17|Mux13~9  ; |examp1|xh:inst17|Mux13~9  ; data_out0        ;
  144. ; |examp1|xh:inst17|Mux12~14 ; |examp1|xh:inst17|Mux12~14 ; data_out0        ;
  145. ; |examp1|xh:inst17|Mux11~9  ; |examp1|xh:inst17|Mux11~9  ; data_out0        ;
  146. ; |examp1|xh:inst17|Mux10~30 ; |examp1|xh:inst17|Mux10~30 ; data_out0        ;
  147. ; |examp1|xh:inst17|Mux9~25  ; |examp1|xh:inst17|Mux9~25  ; data_out0        ;
  148. ; |examp1|xh:inst17|Mux0~9   ; |examp1|xh:inst17|Mux0~9   ; data_out0        ;
  149. ; |examp1|xh:inst18|Mux8~9   ; |examp1|xh:inst18|Mux8~9   ; data_out0        ;
  150. ; |examp1|xh:inst18|Mux8~10  ; |examp1|xh:inst18|Mux8~10  ; data_out0        ;
  151. ; |examp1|xh:inst18|Mux7~6   ; |examp1|xh:inst18|Mux7~6   ; data_out0        ;
  152. ; |examp1|xh:inst18|Mux7~7   ; |examp1|xh:inst18|Mux7~7   ; data_out0        ;
  153. ; |examp1|xh:inst18|Mux6~16  ; |examp1|xh:inst18|Mux6~16  ; data_out0        ;
  154. ; |examp1|xh:inst18|Mux6~17  ; |examp1|xh:inst18|Mux6~17  ; data_out0        ;
  155. ; |examp1|xh:inst18|Mux5~9   ; |examp1|xh:inst18|Mux5~9   ; data_out0        ;
  156. ; |examp1|xh:inst18|Mux5~10  ; |examp1|xh:inst18|Mux5~10  ; data_out0        ;
  157. ; |examp1|xh:inst18|Mux14~8  ; |examp1|xh:inst18|Mux14~8  ; data_out0        ;
  158. ; |examp1|xh:inst18|Mux15~15 ; |examp1|xh:inst18|Mux15~15 ; data_out0        ;
  159. ; |examp1|xh:inst18|Mux13~9  ; |examp1|xh:inst18|Mux13~9  ; data_out0        ;
  160. ; |examp1|xh:inst18|Mux12~14 ; |examp1|xh:inst18|Mux12~14 ; data_out0        ;
  161. ; |examp1|xh:inst18|Mux11~9  ; |examp1|xh:inst18|Mux11~9  ; data_out0        ;
  162. ; |examp1|xh:inst18|Mux10~30 ; |examp1|xh:inst18|Mux10~30 ; data_out0        ;
  163. ; |examp1|xh:inst18|Mux9~25  ; |examp1|xh:inst18|Mux9~25  ; data_out0        ;
  164. ; |examp1|xh:inst18|Mux0~9   ; |examp1|xh:inst18|Mux0~9   ; data_out0        ;
  165. ; |examp1|CLK                ; |examp1|CLK~corein         ; dataout          ;
  166. ; |examp1|SIGNAL             ; |examp1|SIGNAL~corein      ; dataout          ;
  167. ; |examp1|co1                ; |examp1|co1                ; padio            ;
  168. ; |examp1|BT1[3]             ; |examp1|BT1[3]             ; padio            ;
  169. ; |examp1|BT1[2]             ; |examp1|BT1[2]             ; padio            ;
  170. ; |examp1|BT1[1]             ; |examp1|BT1[1]             ; padio            ;
  171. ; |examp1|BT1[0]             ; |examp1|BT1[0]             ; padio            ;
  172. ; |examp1|OUT1[3]            ; |examp1|OUT1[3]            ; padio            ;
  173. ; |examp1|OUT1[2]            ; |examp1|OUT1[2]            ; padio            ;
  174. ; |examp1|OUT1[1]            ; |examp1|OUT1[1]            ; padio            ;
  175. ; |examp1|OUT1[0]            ; |examp1|OUT1[0]            ; padio            ;
  176. ; |examp1|Q1[3]              ; |examp1|Q1[3]              ; padio            ;
  177. ; |examp1|Q1[2]              ; |examp1|Q1[2]              ; padio            ;
  178. ; |examp1|Q1[1]              ; |examp1|Q1[1]              ; padio            ;
  179. ; |examp1|Q1[0]              ; |examp1|Q1[0]              ; padio            ;
  180. ; |examp1|OUT2[1]            ; |examp1|OUT2[1]            ; padio            ;
  181. ; |examp1|OUT2[0]            ; |examp1|OUT2[0]            ; padio            ;
  182. ; |examp1|Q2[1]              ; |examp1|Q2[1]              ; padio            ;
  183. ; |examp1|Q2[0]              ; |examp1|Q2[0]              ; padio            ;
  184. ; |examp1|BT2[3]             ; |examp1|BT2[3]             ; padio            ;
  185. ; |examp1|BT2[2]             ; |examp1|BT2[2]             ; padio            ;
  186. ; |examp1|BT2[1]             ; |examp1|BT2[1]             ; padio            ;
  187. ; |examp1|BT2[0]             ; |examp1|BT2[0]             ; padio            ;
  188. ; |examp1|BT3[3]             ; |examp1|BT3[3]             ; padio            ;
  189. ; |examp1|BT3[2]             ; |examp1|BT3[2]             ; padio            ;
  190. ; |examp1|BT3[1]             ; |examp1|BT3[1]             ; padio            ;
  191. ; |examp1|BT3[0]             ; |examp1|BT3[0]             ; padio            ;
  192. ; |examp1|DOUT1[6]           ; |examp1|DOUT1[6]           ; padio            ;
  193. ; |examp1|DOUT1[5]           ; |examp1|DOUT1[5]           ; padio            ;
  194. ; |examp1|DOUT1[4]           ; |examp1|DOUT1[4]           ; padio            ;
  195. ; |examp1|DOUT1[3]           ; |examp1|DOUT1[3]           ; padio            ;
  196. ; |examp1|DOUT1[2]           ; |examp1|DOUT1[2]           ; padio            ;
  197. ; |examp1|DOUT1[1]           ; |examp1|DOUT1[1]           ; padio            ;
  198. ; |examp1|DOUT1[0]           ; |examp1|DOUT1[0]           ; padio            ;
  199. ; |examp1|DOUT2[6]           ; |examp1|DOUT2[6]           ; padio            ;
  200. ; |examp1|DOUT2[5]           ; |examp1|DOUT2[5]           ; padio            ;
  201. ; |examp1|DOUT2[4]           ; |examp1|DOUT2[4]           ; padio            ;
  202. ; |examp1|DOUT2[3]           ; |examp1|DOUT2[3]           ; padio            ;
  203. ; |examp1|DOUT2[2]           ; |examp1|DOUT2[2]           ; padio            ;
  204. ; |examp1|DOUT2[1]           ; |examp1|DOUT2[1]           ; padio            ;
  205. ; |examp1|DOUT2[0]           ; |examp1|DOUT2[0]           ; padio            ;
  206. ; |examp1|DOUT3[6]           ; |examp1|DOUT3[6]           ; padio            ;
  207. ; |examp1|DOUT3[5]           ; |examp1|DOUT3[5]           ; padio            ;
  208. ; |examp1|DOUT3[4]           ; |examp1|DOUT3[4]           ; padio            ;
  209. ; |examp1|DOUT3[3]           ; |examp1|DOUT3[3]           ; padio            ;
  210. ; |examp1|DOUT3[2]           ; |examp1|DOUT3[2]           ; padio            ;
  211. ; |examp1|DOUT3[1]           ; |examp1|DOUT3[1]           ; padio            ;
  212. ; |examp1|DOUT3[0]           ; |examp1|DOUT3[0]           ; padio            ;
  213. ; |examp1|xh:inst16|Mux1~53  ; |examp1|xh:inst16|Mux1~53  ; data_out0        ;
  214. ; |examp1|xh:inst16|Mux1~54  ; |examp1|xh:inst16|Mux1~54  ; data_out0        ;
  215. ; |examp1|xh:inst16|Mux1~55  ; |examp1|xh:inst16|Mux1~55  ; data_out0        ;
  216. ; |examp1|xh:inst16|Mux1~56  ; |examp1|xh:inst16|Mux1~56  ; data_out0        ;
  217. ; |examp1|xh:inst16|Mux1~57  ; |examp1|xh:inst16|Mux1~57  ; data_out0        ;
  218. ; |examp1|xh:inst16|Mux1~58  ; |examp1|xh:inst16|Mux1~58  ; data_out0        ;
  219. ; |examp1|xh:inst16|Mux1~59  ; |examp1|xh:inst16|Mux1~59  ; data_out0        ;
  220. ; |examp1|xh:inst16|Mux1~60  ; |examp1|xh:inst16|Mux1~60  ; data_out0        ;
  221. +----------------------------+----------------------------+------------------+
  222. The following table displays output ports that do not toggle to 1 during simulation.
  223. +----------------------------------------------------------------------------+
  224. ; Missing 1-Value Coverage                                                   ;
  225. +----------------------------+----------------------------+------------------+
  226. ; Node Name                  ; Output Port Name           ; Output Port Type ;
  227. +----------------------------+----------------------------+------------------+
  228. ; |examp1|74160:inst2|49~22  ; |examp1|74160:inst2|49~22  ; data_out0        ;
  229. ; |examp1|74160:inst3|49~22  ; |examp1|74160:inst3|49~22  ; data_out0        ;
  230. ; |examp1|74160:inst6|49~22  ; |examp1|74160:inst6|49~22  ; data_out0        ;
  231. ; |examp1|74160:inst7|49~22  ; |examp1|74160:inst7|49~22  ; data_out0        ;
  232. ; |examp1|74160:inst8|49~22  ; |examp1|74160:inst8|49~22  ; data_out0        ;
  233. ; |examp1|74160:inst9|49~22  ; |examp1|74160:inst9|49~22  ; data_out0        ;
  234. ; |examp1|74160:inst10|49~22 ; |examp1|74160:inst10|49~22 ; data_out0        ;
  235. ; |examp1|74160:inst12|49~22 ; |examp1|74160:inst12|49~22 ; data_out0        ;
  236. ; |examp1|74160:inst13|49~22 ; |examp1|74160:inst13|49~22 ; data_out0        ;
  237. ; |examp1|74160:inst14|49~22 ; |examp1|74160:inst14|49~22 ; data_out0        ;
  238. ; |examp1|74160:inst15|49~22 ; |examp1|74160:inst15|49~22 ; data_out0        ;
  239. ; |examp1|74273:7|16         ; |examp1|74273:7|16         ; data_out0        ;
  240. ; |examp1|74273:8|16         ; |examp1|74273:8|16         ; data_out0        ;
  241. ; |examp1|74273:8|17         ; |examp1|74273:8|17         ; data_out0        ;
  242. ; |examp1|74273:8|18         ; |examp1|74273:8|18         ; data_out0        ;
  243. ; |examp1|74273:8|19         ; |examp1|74273:8|19         ; data_out0        ;
  244. ; |examp1|74160:inst3|8      ; |examp1|74160:inst3|8      ; data_out0        ;
  245. ; |examp1|74160:inst3|7      ; |examp1|74160:inst3|7      ; data_out0        ;
  246. ; |examp1|74273:10|16        ; |examp1|74273:10|16        ; data_out0        ;
  247. ; |examp1|74273:10|17        ; |examp1|74273:10|17        ; data_out0        ;
  248. ; |examp1|74273:10|18        ; |examp1|74273:10|18        ; data_out0        ;
  249. ; |examp1|74273:10|19        ; |examp1|74273:10|19        ; data_out0        ;
  250. ; |examp1|74160:inst6|8      ; |examp1|74160:inst6|8      ; data_out0        ;
  251. ; |examp1|74160:inst6|7      ; |examp1|74160:inst6|7      ; data_out0        ;
  252. ; |examp1|74273:11|16        ; |examp1|74273:11|16        ; data_out0        ;
  253. ; |examp1|74273:11|17        ; |examp1|74273:11|17        ; data_out0        ;
  254. ; |examp1|74273:11|18        ; |examp1|74273:11|18        ; data_out0        ;
  255. ; |examp1|74273:11|19        ; |examp1|74273:11|19        ; data_out0        ;
  256. ; |examp1|74160:inst7|8      ; |examp1|74160:inst7|8      ; data_out0        ;
  257. ; |examp1|74160:inst7|7      ; |examp1|74160:inst7|7      ; data_out0        ;
  258. ; |examp1|74273:12|16        ; |examp1|74273:12|16        ; data_out0        ;
  259. ; |examp1|74273:12|17        ; |examp1|74273:12|17        ; data_out0        ;
  260. ; |examp1|74273:12|18        ; |examp1|74273:12|18        ; data_out0        ;
  261. ; |examp1|74273:12|19        ; |examp1|74273:12|19        ; data_out0        ;
  262. ; |examp1|74160:inst8|8      ; |examp1|74160:inst8|8      ; data_out0        ;
  263. ; |examp1|74160:inst8|7      ; |examp1|74160:inst8|7      ; data_out0        ;
  264. ; |examp1|74160:inst9|8      ; |examp1|74160:inst9|8      ; data_out0        ;
  265. ; |examp1|74160:inst9|7      ; |examp1|74160:inst9|7      ; data_out0        ;
  266. ; |examp1|74160:inst10|8     ; |examp1|74160:inst10|8     ; data_out0        ;
  267. ; |examp1|74160:inst10|7     ; |examp1|74160:inst10|7     ; data_out0        ;
  268. ; |examp1|74160:inst12|8     ; |examp1|74160:inst12|8     ; data_out0        ;
  269. ; |examp1|74160:inst12|7     ; |examp1|74160:inst12|7     ; data_out0        ;
  270. ; |examp1|74160:inst13|8     ; |examp1|74160:inst13|8     ; data_out0        ;
  271. ; |examp1|74160:inst13|7     ; |examp1|74160:inst13|7     ; data_out0        ;
  272. ; |examp1|74160:inst14|8     ; |examp1|74160:inst14|8     ; data_out0        ;
  273. ; |examp1|74160:inst14|7     ; |examp1|74160:inst14|7     ; data_out0        ;
  274. ; |examp1|74273:19|16        ; |examp1|74273:19|16        ; data_out0        ;
  275. ; |examp1|74273:19|17        ; |examp1|74273:19|17        ; data_out0        ;
  276. ; |examp1|74273:19|18        ; |examp1|74273:19|18        ; data_out0        ;
  277. ; |examp1|74273:19|19        ; |examp1|74273:19|19        ; data_out0        ;
  278. ; |examp1|74160:inst15|8     ; |examp1|74160:inst15|8     ; data_out0        ;
  279. ; |examp1|74160:inst15|7     ; |examp1|74160:inst15|7     ; data_out0        ;
  280. ; |examp1|74160:inst3|28     ; |examp1|74160:inst3|28     ; data_out0        ;
  281. ; |examp1|74160:inst3|49~23  ; |examp1|74160:inst3|49~23  ; data_out0        ;
  282. ; |examp1|74160:inst6|28     ; |examp1|74160:inst6|28     ; data_out0        ;
  283. ; |examp1|74160:inst6|49~23  ; |examp1|74160:inst6|49~23  ; data_out0        ;
  284. ; |examp1|74160:inst7|28     ; |examp1|74160:inst7|28     ; data_out0        ;
  285. ; |examp1|74160:inst7|49~23  ; |examp1|74160:inst7|49~23  ; data_out0        ;
  286. ; |examp1|74160:inst8|28     ; |examp1|74160:inst8|28     ; data_out0        ;
  287. ; |examp1|74160:inst8|49~23  ; |examp1|74160:inst8|49~23  ; data_out0        ;
  288. ; |examp1|74160:inst9|28     ; |examp1|74160:inst9|28     ; data_out0        ;
  289. ; |examp1|74160:inst9|49~23  ; |examp1|74160:inst9|49~23  ; data_out0        ;
  290. ; |examp1|74160:inst10|28    ; |examp1|74160:inst10|28    ; data_out0        ;
  291. ; |examp1|74160:inst10|49~23 ; |examp1|74160:inst10|49~23 ; data_out0        ;
  292. ; |examp1|74160:inst12|28    ; |examp1|74160:inst12|28    ; data_out0        ;
  293. ; |examp1|74160:inst12|49~23 ; |examp1|74160:inst12|49~23 ; data_out0        ;
  294. ; |examp1|74160:inst13|28    ; |examp1|74160:inst13|28    ; data_out0        ;
  295. ; |examp1|74160:inst13|49~23 ; |examp1|74160:inst13|49~23 ; data_out0        ;
  296. ; |examp1|74160:inst14|28    ; |examp1|74160:inst14|28    ; data_out0        ;
  297. ; |examp1|74160:inst14|49~23 ; |examp1|74160:inst14|49~23 ; data_out0        ;
  298. ; |examp1|74160:inst15|28    ; |examp1|74160:inst15|28    ; data_out0        ;
  299. ; |examp1|74160:inst15|49~23 ; |examp1|74160:inst15|49~23 ; data_out0        ;
  300. ; |examp1|74273:14|19        ; |examp1|74273:14|19        ; data_out0        ;
  301. ; |examp1|74273:15|19        ; |examp1|74273:15|19        ; data_out0        ;
  302. ; |examp1|74273:14|18        ; |examp1|74273:14|18        ; data_out0        ;
  303. ; |examp1|74273:15|18        ; |examp1|74273:15|18        ; data_out0        ;
  304. ; |examp1|74273:14|17        ; |examp1|74273:14|17        ; data_out0        ;
  305. ; |examp1|74273:15|17        ; |examp1|74273:15|17        ; data_out0        ;
  306. ; |examp1|74273:14|16        ; |examp1|74273:14|16        ; data_out0        ;
  307. ; |examp1|74273:15|16        ; |examp1|74273:15|16        ; data_out0        ;
  308. ; |examp1|74273:18|19        ; |examp1|74273:18|19        ; data_out0        ;
  309. ; |examp1|74273:17|19        ; |examp1|74273:17|19        ; data_out0        ;
  310. ; |examp1|74273:16|19        ; |examp1|74273:16|19        ; data_out0        ;
  311. ; |examp1|74273:17|18        ; |examp1|74273:17|18        ; data_out0        ;
  312. ; |examp1|74273:18|18        ; |examp1|74273:18|18        ; data_out0        ;
  313. ; |examp1|74273:16|18        ; |examp1|74273:16|18        ; data_out0        ;
  314. ; |examp1|74273:18|17        ; |examp1|74273:18|17        ; data_out0        ;
  315. ; |examp1|74273:17|17        ; |examp1|74273:17|17        ; data_out0        ;
  316. ; |examp1|74273:16|17        ; |examp1|74273:16|17        ; data_out0        ;
  317. ; |examp1|74273:18|16        ; |examp1|74273:18|16        ; data_out0        ;
  318. ; |examp1|74273:17|16        ; |examp1|74273:17|16        ; data_out0        ;
  319. ; |examp1|74273:16|16        ; |examp1|74273:16|16        ; data_out0        ;
  320. ; |examp1|CLR                ; |examp1|CLR~corein         ; dataout          ;
  321. ; |examp1|co2                ; |examp1|co2                ; padio            ;
  322. ; |examp1|co3                ; |examp1|co3                ; padio            ;
  323. ; |examp1|co4                ; |examp1|co4                ; padio            ;
  324. ; |examp1|co5                ; |examp1|co5                ; padio            ;
  325. ; |examp1|co6                ; |examp1|co6                ; padio            ;
  326. ; |examp1|co7                ; |examp1|co7                ; padio            ;
  327. ; |examp1|co8                ; |examp1|co8                ; padio            ;
  328. ; |examp1|co9                ; |examp1|co9                ; padio            ;
  329. ; |examp1|co10               ; |examp1|co10               ; padio            ;
  330. ; |examp1|co11               ; |examp1|co11               ; padio            ;
  331. ; |examp1|co12               ; |examp1|co12               ; padio            ;
  332. ; |examp1|OUT2[3]            ; |examp1|OUT2[3]            ; padio            ;
  333. ; |examp1|Q2[3]              ; |examp1|Q2[3]              ; padio            ;
  334. ; |examp1|OUT3[3]            ; |examp1|OUT3[3]            ; padio            ;
  335. ; |examp1|OUT3[2]            ; |examp1|OUT3[2]            ; padio            ;
  336. ; |examp1|OUT3[1]            ; |examp1|OUT3[1]            ; padio            ;
  337. ; |examp1|OUT3[0]            ; |examp1|OUT3[0]            ; padio            ;
  338. ; |examp1|Q3[3]              ; |examp1|Q3[3]              ; padio            ;
  339. ; |examp1|Q3[2]              ; |examp1|Q3[2]              ; padio            ;
  340. ; |examp1|Q3[1]              ; |examp1|Q3[1]              ; padio            ;
  341. ; |examp1|Q3[0]              ; |examp1|Q3[0]              ; padio            ;
  342. ; |examp1|OUT4[3]            ; |examp1|OUT4[3]            ; padio            ;
  343. ; |examp1|OUT4[2]            ; |examp1|OUT4[2]            ; padio            ;
  344. ; |examp1|OUT4[1]            ; |examp1|OUT4[1]            ; padio            ;
  345. ; |examp1|OUT4[0]            ; |examp1|OUT4[0]            ; padio            ;
  346. ; |examp1|Q4[3]              ; |examp1|Q4[3]              ; padio            ;
  347. ; |examp1|Q4[2]              ; |examp1|Q4[2]              ; padio            ;
  348. ; |examp1|Q4[1]              ; |examp1|Q4[1]              ; padio            ;
  349. ; |examp1|Q4[0]              ; |examp1|Q4[0]              ; padio            ;
  350. ; |examp1|OUT5[3]            ; |examp1|OUT5[3]            ; padio            ;
  351. ; |examp1|OUT5[2]            ; |examp1|OUT5[2]            ; padio            ;
  352. ; |examp1|OUT5[1]            ; |examp1|OUT5[1]            ; padio            ;
  353. ; |examp1|OUT5[0]            ; |examp1|OUT5[0]            ; padio            ;
  354. ; |examp1|Q5[3]              ; |examp1|Q5[3]              ; padio            ;
  355. ; |examp1|Q5[2]              ; |examp1|Q5[2]              ; padio            ;
  356. ; |examp1|Q5[1]              ; |examp1|Q5[1]              ; padio            ;
  357. ; |examp1|Q5[0]              ; |examp1|Q5[0]              ; padio            ;
  358. ; |examp1|OUT6[3]            ; |examp1|OUT6[3]            ; padio            ;
  359. ; |examp1|OUT6[2]            ; |examp1|OUT6[2]            ; padio            ;
  360. ; |examp1|OUT6[1]            ; |examp1|OUT6[1]            ; padio            ;
  361. ; |examp1|OUT6[0]            ; |examp1|OUT6[0]            ; padio            ;
  362. ; |examp1|Q6[3]              ; |examp1|Q6[3]              ; padio            ;
  363. ; |examp1|Q6[2]              ; |examp1|Q6[2]              ; padio            ;
  364. ; |examp1|Q6[1]              ; |examp1|Q6[1]              ; padio            ;
  365. ; |examp1|Q6[0]              ; |examp1|Q6[0]              ; padio            ;
  366. ; |examp1|Q7[3]              ; |examp1|Q7[3]              ; padio            ;
  367. ; |examp1|Q7[2]              ; |examp1|Q7[2]              ; padio            ;
  368. ; |examp1|Q7[1]              ; |examp1|Q7[1]              ; padio            ;
  369. ; |examp1|Q7[0]              ; |examp1|Q7[0]              ; padio            ;
  370. ; |examp1|Q8[3]              ; |examp1|Q8[3]              ; padio            ;
  371. ; |examp1|Q8[2]              ; |examp1|Q8[2]              ; padio            ;
  372. ; |examp1|Q8[1]              ; |examp1|Q8[1]              ; padio            ;
  373. ; |examp1|Q8[0]              ; |examp1|Q8[0]              ; padio            ;
  374. ; |examp1|Q9[3]              ; |examp1|Q9[3]              ; padio            ;
  375. ; |examp1|Q9[2]              ; |examp1|Q9[2]              ; padio            ;
  376. ; |examp1|Q9[1]              ; |examp1|Q9[1]              ; padio            ;
  377. ; |examp1|Q9[0]              ; |examp1|Q9[0]              ; padio            ;
  378. ; |examp1|QA[3]              ; |examp1|QA[3]              ; padio            ;
  379. ; |examp1|QA[2]              ; |examp1|QA[2]              ; padio            ;
  380. ; |examp1|QA[1]              ; |examp1|QA[1]              ; padio            ;
  381. ; |examp1|QA[0]              ; |examp1|QA[0]              ; padio            ;
  382. ; |examp1|QB[3]              ; |examp1|QB[3]              ; padio            ;
  383. ; |examp1|QB[2]              ; |examp1|QB[2]              ; padio            ;
  384. ; |examp1|QB[1]              ; |examp1|QB[1]              ; padio            ;
  385. ; |examp1|QB[0]              ; |examp1|QB[0]              ; padio            ;
  386. ; |examp1|OUTC[3]            ; |examp1|OUTC[3]            ; padio            ;
  387. ; |examp1|OUTC[2]            ; |examp1|OUTC[2]            ; padio            ;
  388. ; |examp1|OUTC[1]            ; |examp1|OUTC[1]            ; padio            ;
  389. ; |examp1|OUTC[0]            ; |examp1|OUTC[0]            ; padio            ;
  390. ; |examp1|QC[3]              ; |examp1|QC[3]              ; padio            ;
  391. ; |examp1|QC[2]              ; |examp1|QC[2]              ; padio            ;
  392. ; |examp1|QC[1]              ; |examp1|QC[1]              ; padio            ;
  393. ; |examp1|QC[0]              ; |examp1|QC[0]              ; padio            ;
  394. +----------------------------+----------------------------+------------------+
  395. The following table displays output ports that do not toggle to 0 during simulation.
  396. +----------------------------------------------------------------------------+
  397. ; Missing 0-Value Coverage                                                   ;
  398. +----------------------------+----------------------------+------------------+
  399. ; Node Name                  ; Output Port Name           ; Output Port Type ;
  400. +----------------------------+----------------------------+------------------+
  401. ; |examp1|74160:inst2|49~22  ; |examp1|74160:inst2|49~22  ; data_out0        ;
  402. ; |examp1|74160:inst3|49~22  ; |examp1|74160:inst3|49~22  ; data_out0        ;
  403. ; |examp1|74160:inst6|49~22  ; |examp1|74160:inst6|49~22  ; data_out0        ;
  404. ; |examp1|74160:inst7|49~22  ; |examp1|74160:inst7|49~22  ; data_out0        ;
  405. ; |examp1|74160:inst8|49~22  ; |examp1|74160:inst8|49~22  ; data_out0        ;
  406. ; |examp1|74160:inst9|49~22  ; |examp1|74160:inst9|49~22  ; data_out0        ;
  407. ; |examp1|74160:inst10|49~22 ; |examp1|74160:inst10|49~22 ; data_out0        ;
  408. ; |examp1|74160:inst12|49~22 ; |examp1|74160:inst12|49~22 ; data_out0        ;
  409. ; |examp1|74160:inst13|49~22 ; |examp1|74160:inst13|49~22 ; data_out0        ;
  410. ; |examp1|74160:inst14|49~22 ; |examp1|74160:inst14|49~22 ; data_out0        ;
  411. ; |examp1|74160:inst15|49~22 ; |examp1|74160:inst15|49~22 ; data_out0        ;
  412. ; |examp1|74273:7|16         ; |examp1|74273:7|16         ; data_out0        ;
  413. ; |examp1|74273:7|17         ; |examp1|74273:7|17         ; data_out0        ;
  414. ; |examp1|74160:inst2|8      ; |examp1|74160:inst2|8      ; data_out0        ;
  415. ; |examp1|74273:8|16         ; |examp1|74273:8|16         ; data_out0        ;
  416. ; |examp1|74273:8|17         ; |examp1|74273:8|17         ; data_out0        ;
  417. ; |examp1|74273:8|18         ; |examp1|74273:8|18         ; data_out0        ;
  418. ; |examp1|74273:8|19         ; |examp1|74273:8|19         ; data_out0        ;
  419. ; |examp1|74160:inst3|8      ; |examp1|74160:inst3|8      ; data_out0        ;
  420. ; |examp1|74160:inst3|7      ; |examp1|74160:inst3|7      ; data_out0        ;
  421. ; |examp1|74273:10|16        ; |examp1|74273:10|16        ; data_out0        ;
  422. ; |examp1|74273:10|17        ; |examp1|74273:10|17        ; data_out0        ;
  423. ; |examp1|74273:10|18        ; |examp1|74273:10|18        ; data_out0        ;
  424. ; |examp1|74273:10|19        ; |examp1|74273:10|19        ; data_out0        ;
  425. ; |examp1|74160:inst6|8      ; |examp1|74160:inst6|8      ; data_out0        ;
  426. ; |examp1|74160:inst6|7      ; |examp1|74160:inst6|7      ; data_out0        ;
  427. ; |examp1|74273:11|16        ; |examp1|74273:11|16        ; data_out0        ;
  428. ; |examp1|74273:11|17        ; |examp1|74273:11|17        ; data_out0        ;
  429. ; |examp1|74273:11|18        ; |examp1|74273:11|18        ; data_out0        ;
  430. ; |examp1|74273:11|19        ; |examp1|74273:11|19        ; data_out0        ;
  431. ; |examp1|74160:inst7|8      ; |examp1|74160:inst7|8      ; data_out0        ;
  432. ; |examp1|74160:inst7|7      ; |examp1|74160:inst7|7      ; data_out0        ;
  433. ; |examp1|74273:12|16        ; |examp1|74273:12|16        ; data_out0        ;
  434. ; |examp1|74273:12|17        ; |examp1|74273:12|17        ; data_out0        ;
  435. ; |examp1|74273:12|18        ; |examp1|74273:12|18        ; data_out0        ;
  436. ; |examp1|74273:12|19        ; |examp1|74273:12|19        ; data_out0        ;
  437. ; |examp1|74160:inst8|8      ; |examp1|74160:inst8|8      ; data_out0        ;
  438. ; |examp1|74160:inst8|7      ; |examp1|74160:inst8|7      ; data_out0        ;
  439. ; |examp1|74160:inst9|8      ; |examp1|74160:inst9|8      ; data_out0        ;
  440. ; |examp1|74160:inst9|7      ; |examp1|74160:inst9|7      ; data_out0        ;
  441. ; |examp1|74160:inst10|8     ; |examp1|74160:inst10|8     ; data_out0        ;
  442. ; |examp1|74160:inst10|7     ; |examp1|74160:inst10|7     ; data_out0        ;
  443. ; |examp1|74160:inst12|8     ; |examp1|74160:inst12|8     ; data_out0        ;
  444. ; |examp1|74160:inst12|7     ; |examp1|74160:inst12|7     ; data_out0        ;
  445. ; |examp1|74160:inst13|8     ; |examp1|74160:inst13|8     ; data_out0        ;
  446. ; |examp1|74160:inst13|7     ; |examp1|74160:inst13|7     ; data_out0        ;
  447. ; |examp1|74160:inst14|8     ; |examp1|74160:inst14|8     ; data_out0        ;
  448. ; |examp1|74160:inst14|7     ; |examp1|74160:inst14|7     ; data_out0        ;
  449. ; |examp1|74273:19|16        ; |examp1|74273:19|16        ; data_out0        ;
  450. ; |examp1|74273:19|17        ; |examp1|74273:19|17        ; data_out0        ;
  451. ; |examp1|74273:19|18        ; |examp1|74273:19|18        ; data_out0        ;
  452. ; |examp1|74273:19|19        ; |examp1|74273:19|19        ; data_out0        ;
  453. ; |examp1|74160:inst15|8     ; |examp1|74160:inst15|8     ; data_out0        ;
  454. ; |examp1|74160:inst15|7     ; |examp1|74160:inst15|7     ; data_out0        ;
  455. ; |examp1|74160:inst3|28     ; |examp1|74160:inst3|28     ; data_out0        ;
  456. ; |examp1|74160:inst3|49~23  ; |examp1|74160:inst3|49~23  ; data_out0        ;
  457. ; |examp1|74160:inst6|28     ; |examp1|74160:inst6|28     ; data_out0        ;
  458. ; |examp1|74160:inst6|49~23  ; |examp1|74160:inst6|49~23  ; data_out0        ;
  459. ; |examp1|74160:inst7|28     ; |examp1|74160:inst7|28     ; data_out0        ;
  460. ; |examp1|74160:inst7|49~23  ; |examp1|74160:inst7|49~23  ; data_out0        ;
  461. ; |examp1|74160:inst8|28     ; |examp1|74160:inst8|28     ; data_out0        ;
  462. ; |examp1|74160:inst8|49~23  ; |examp1|74160:inst8|49~23  ; data_out0        ;
  463. ; |examp1|74160:inst9|28     ; |examp1|74160:inst9|28     ; data_out0        ;
  464. ; |examp1|74160:inst9|49~23  ; |examp1|74160:inst9|49~23  ; data_out0        ;
  465. ; |examp1|74160:inst10|28    ; |examp1|74160:inst10|28    ; data_out0        ;
  466. ; |examp1|74160:inst10|49~23 ; |examp1|74160:inst10|49~23 ; data_out0        ;
  467. ; |examp1|74160:inst12|28    ; |examp1|74160:inst12|28    ; data_out0        ;
  468. ; |examp1|74160:inst12|49~23 ; |examp1|74160:inst12|49~23 ; data_out0        ;
  469. ; |examp1|74160:inst13|28    ; |examp1|74160:inst13|28    ; data_out0        ;
  470. ; |examp1|74160:inst13|49~23 ; |examp1|74160:inst13|49~23 ; data_out0        ;
  471. ; |examp1|74160:inst14|28    ; |examp1|74160:inst14|28    ; data_out0        ;
  472. ; |examp1|74160:inst14|49~23 ; |examp1|74160:inst14|49~23 ; data_out0        ;
  473. ; |examp1|74160:inst15|28    ; |examp1|74160:inst15|28    ; data_out0        ;
  474. ; |examp1|74160:inst15|49~23 ; |examp1|74160:inst15|49~23 ; data_out0        ;
  475. ; |examp1|74273:14|19        ; |examp1|74273:14|19        ; data_out0        ;
  476. ; |examp1|74273:15|19        ; |examp1|74273:15|19        ; data_out0        ;
  477. ; |examp1|74273:14|18        ; |examp1|74273:14|18        ; data_out0        ;
  478. ; |examp1|74273:15|18        ; |examp1|74273:15|18        ; data_out0        ;
  479. ; |examp1|74273:14|17        ; |examp1|74273:14|17        ; data_out0        ;
  480. ; |examp1|74273:15|17        ; |examp1|74273:15|17        ; data_out0        ;
  481. ; |examp1|74273:14|16        ; |examp1|74273:14|16        ; data_out0        ;
  482. ; |examp1|74273:15|16        ; |examp1|74273:15|16        ; data_out0        ;
  483. ; |examp1|74273:18|19        ; |examp1|74273:18|19        ; data_out0        ;
  484. ; |examp1|74273:17|19        ; |examp1|74273:17|19        ; data_out0        ;
  485. ; |examp1|74273:16|19        ; |examp1|74273:16|19        ; data_out0        ;
  486. ; |examp1|74273:17|18        ; |examp1|74273:17|18        ; data_out0        ;
  487. ; |examp1|74273:18|18        ; |examp1|74273:18|18        ; data_out0        ;
  488. ; |examp1|74273:16|18        ; |examp1|74273:16|18        ; data_out0        ;
  489. ; |examp1|74273:18|17        ; |examp1|74273:18|17        ; data_out0        ;
  490. ; |examp1|74273:17|17        ; |examp1|74273:17|17        ; data_out0        ;
  491. ; |examp1|74273:16|17        ; |examp1|74273:16|17        ; data_out0        ;
  492. ; |examp1|74273:18|16        ; |examp1|74273:18|16        ; data_out0        ;
  493. ; |examp1|74273:17|16        ; |examp1|74273:17|16        ; data_out0        ;
  494. ; |examp1|74273:16|16        ; |examp1|74273:16|16        ; data_out0        ;
  495. ; |examp1|CLR                ; |examp1|CLR~corein         ; dataout          ;
  496. ; |examp1|co2                ; |examp1|co2                ; padio            ;
  497. ; |examp1|co3                ; |examp1|co3                ; padio            ;
  498. ; |examp1|co4                ; |examp1|co4                ; padio            ;
  499. ; |examp1|co5                ; |examp1|co5                ; padio            ;
  500. ; |examp1|co6                ; |examp1|co6                ; padio            ;
  501. ; |examp1|co7                ; |examp1|co7                ; padio            ;
  502. ; |examp1|co8                ; |examp1|co8                ; padio            ;
  503. ; |examp1|co9                ; |examp1|co9                ; padio            ;
  504. ; |examp1|co10               ; |examp1|co10               ; padio            ;
  505. ; |examp1|co11               ; |examp1|co11               ; padio            ;
  506. ; |examp1|co12               ; |examp1|co12               ; padio            ;
  507. ; |examp1|OUT2[3]            ; |examp1|OUT2[3]            ; padio            ;
  508. ; |examp1|OUT2[2]            ; |examp1|OUT2[2]            ; padio            ;
  509. ; |examp1|Q2[3]              ; |examp1|Q2[3]              ; padio            ;
  510. ; |examp1|Q2[2]              ; |examp1|Q2[2]              ; padio            ;
  511. ; |examp1|OUT3[3]            ; |examp1|OUT3[3]            ; padio            ;
  512. ; |examp1|OUT3[2]            ; |examp1|OUT3[2]            ; padio            ;
  513. ; |examp1|OUT3[1]            ; |examp1|OUT3[1]            ; padio            ;
  514. ; |examp1|OUT3[0]            ; |examp1|OUT3[0]            ; padio            ;
  515. ; |examp1|Q3[3]              ; |examp1|Q3[3]              ; padio            ;
  516. ; |examp1|Q3[2]              ; |examp1|Q3[2]              ; padio            ;
  517. ; |examp1|Q3[1]              ; |examp1|Q3[1]              ; padio            ;
  518. ; |examp1|Q3[0]              ; |examp1|Q3[0]              ; padio            ;
  519. ; |examp1|OUT4[3]            ; |examp1|OUT4[3]            ; padio            ;
  520. ; |examp1|OUT4[2]            ; |examp1|OUT4[2]            ; padio            ;
  521. ; |examp1|OUT4[1]            ; |examp1|OUT4[1]            ; padio            ;
  522. ; |examp1|OUT4[0]            ; |examp1|OUT4[0]            ; padio            ;
  523. ; |examp1|Q4[3]              ; |examp1|Q4[3]              ; padio            ;
  524. ; |examp1|Q4[2]              ; |examp1|Q4[2]              ; padio            ;
  525. ; |examp1|Q4[1]              ; |examp1|Q4[1]              ; padio            ;
  526. ; |examp1|Q4[0]              ; |examp1|Q4[0]              ; padio            ;
  527. ; |examp1|OUT5[3]            ; |examp1|OUT5[3]            ; padio            ;
  528. ; |examp1|OUT5[2]            ; |examp1|OUT5[2]            ; padio            ;
  529. ; |examp1|OUT5[1]            ; |examp1|OUT5[1]            ; padio            ;
  530. ; |examp1|OUT5[0]            ; |examp1|OUT5[0]            ; padio            ;
  531. ; |examp1|Q5[3]              ; |examp1|Q5[3]              ; padio            ;
  532. ; |examp1|Q5[2]              ; |examp1|Q5[2]              ; padio            ;
  533. ; |examp1|Q5[1]              ; |examp1|Q5[1]              ; padio            ;
  534. ; |examp1|Q5[0]              ; |examp1|Q5[0]              ; padio            ;
  535. ; |examp1|OUT6[3]            ; |examp1|OUT6[3]            ; padio            ;
  536. ; |examp1|OUT6[2]            ; |examp1|OUT6[2]            ; padio            ;
  537. ; |examp1|OUT6[1]            ; |examp1|OUT6[1]            ; padio            ;
  538. ; |examp1|OUT6[0]            ; |examp1|OUT6[0]            ; padio            ;
  539. ; |examp1|Q6[3]              ; |examp1|Q6[3]              ; padio            ;
  540. ; |examp1|Q6[2]              ; |examp1|Q6[2]              ; padio            ;
  541. ; |examp1|Q6[1]              ; |examp1|Q6[1]              ; padio            ;
  542. ; |examp1|Q6[0]              ; |examp1|Q6[0]              ; padio            ;
  543. ; |examp1|Q7[3]              ; |examp1|Q7[3]              ; padio            ;
  544. ; |examp1|Q7[2]              ; |examp1|Q7[2]              ; padio            ;
  545. ; |examp1|Q7[1]              ; |examp1|Q7[1]              ; padio            ;
  546. ; |examp1|Q7[0]              ; |examp1|Q7[0]              ; padio            ;
  547. ; |examp1|Q8[3]              ; |examp1|Q8[3]              ; padio            ;
  548. ; |examp1|Q8[2]              ; |examp1|Q8[2]              ; padio            ;
  549. ; |examp1|Q8[1]              ; |examp1|Q8[1]              ; padio            ;
  550. ; |examp1|Q8[0]              ; |examp1|Q8[0]              ; padio            ;
  551. ; |examp1|Q9[3]              ; |examp1|Q9[3]              ; padio            ;
  552. ; |examp1|Q9[2]              ; |examp1|Q9[2]              ; padio            ;
  553. ; |examp1|Q9[1]              ; |examp1|Q9[1]              ; padio            ;
  554. ; |examp1|Q9[0]              ; |examp1|Q9[0]              ; padio            ;
  555. ; |examp1|QA[3]              ; |examp1|QA[3]              ; padio            ;
  556. ; |examp1|QA[2]              ; |examp1|QA[2]              ; padio            ;
  557. ; |examp1|QA[1]              ; |examp1|QA[1]              ; padio            ;
  558. ; |examp1|QA[0]              ; |examp1|QA[0]              ; padio            ;
  559. ; |examp1|QB[3]              ; |examp1|QB[3]              ; padio            ;
  560. ; |examp1|QB[2]              ; |examp1|QB[2]              ; padio            ;
  561. ; |examp1|QB[1]              ; |examp1|QB[1]              ; padio            ;
  562. ; |examp1|QB[0]              ; |examp1|QB[0]              ; padio            ;
  563. ; |examp1|OUTC[3]            ; |examp1|OUTC[3]            ; padio            ;
  564. ; |examp1|OUTC[2]            ; |examp1|OUTC[2]            ; padio            ;
  565. ; |examp1|OUTC[1]            ; |examp1|OUTC[1]            ; padio            ;
  566. ; |examp1|OUTC[0]            ; |examp1|OUTC[0]            ; padio            ;
  567. ; |examp1|QC[3]              ; |examp1|QC[3]              ; padio            ;
  568. ; |examp1|QC[2]              ; |examp1|QC[2]              ; padio            ;
  569. ; |examp1|QC[1]              ; |examp1|QC[1]              ; padio            ;
  570. ; |examp1|QC[0]              ; |examp1|QC[0]              ; padio            ;
  571. +----------------------------+----------------------------+------------------+
  572. +---------------------+
  573. ; Simulator INI Usage ;
  574. +--------+------------+
  575. ; Option ; Usage      ;
  576. +--------+------------+
  577. +--------------------+
  578. ; Simulator Messages ;
  579. +--------------------+
  580. Info: *******************************************************************
  581. Info: Running Quartus II Simulator
  582.     Info: Version 7.2 Build 151 09/26/2007 SJ Full Version
  583.     Info: Processing started: Mon Apr 19 09:55:34 2010
  584. Info: Command: quartus_sim --read_settings_files=on --write_settings_files=off examp1 -c examp1
  585. Info: Using vector source file "F:/gtt2/examp1.vwf"
  586. Info: Option to preserve fewer signal transitions to reduce memory requirements is enabled
  587.     Info: Simulation has been partitioned into sub-simulations according to the maximum transition count determined by the engine. Transitions from memory will be flushed out to disk at the end of each sub-simulation to reduce memory requirements.
  588. Info: Simulation partitioned into 1 sub-simulations
  589. Info: Simulation coverage is      42.18 %
  590. Info: Number of transitions in simulation is 90176
  591. Info: Quartus II Simulator was successful. 0 errors, 0 warnings
  592.     Info: Allocated 99 megabytes of memory during processing
  593.     Info: Processing ended: Mon Apr 19 09:55:36 2010
  594.     Info: Elapsed time: 00:00:02