English
os_cpu_a.lst
资源名称：uCOS-II.rar [点击查看]
上传用户：jinguanrq
上传日期：2022-06-04
资源大小：724k
文件大小：27k
源码类别：
uCOS
开发平台：
C/C++
- ARM Macro Assembler Page 1
- 1 00000000 ;#------------------------------------------------------
- ------------------------
- 2 00000000 ;#- File: os_cpu_a.s
- 3 00000000 ;#------------------------------------------------------
- ------------------------
- 4 00000000 ;#- (c) Copyright ARM Limited 1999. All righ
- ts reserved.
- 5 00000000 ;#-
- 6 00000000 ;#- ARM Specific code
- 7 00000000 ;#------------------------------------------------------
- ------------------------
- 8 00000000 ;#-
- 9 00000000 ;#-
- 10 00000000 ;#- Functions defined in this module:
- 11 00000000 ;#-
- 12 00000000 ;#- void ARMDisableInt(void) disable interrupts when in
- SVC
- 13 00000000 ;#- void ARMEnableInt(void) enable interrupts when in S
- VC
- 14 00000000 ;#- void OS_TASK_SWAP(void) context switch
- 15 00000000 ;#- void OSStartHighRdy(void) start highest priority tas
- k
- 16 00000000
- 17 00000000
- 18 00000000 PRESERVE8
- 19 00000000 AREA |subr|, CODE, READONLY
- 20 00000000
- 21 00000000 00000008
- SwiV EQU 0x08
- 22 00000000 00000018
- IrqV EQU 0x18
- 23 00000000 0000001C
- FiqV EQU 0x1C
- 24 00000000 00000080
- NoInt EQU 0x80
- 25 00000000
- 26 00000000 00000013
- SVC32Mode
- EQU 0x13
- 27 00000000 00000012
- IRQ32Mode
- EQU 0x12
- 28 00000000 00000011
- FIQ32Mode
- EQU 0x11
- 29 00000000
- 30 00000000 00000000
- OSEnterSWI
- EQU 0x00
- 31 00000000
- 32 00000000 00002000
- BIT_TIMER0
- EQU (0x1<<13)
- 33 00000000 01E00024
- I_ISPC EQU 0x1e00024
- 34 00000000 01E0000C
- INTMSK EQU 0x1e0000c
- 35 00000000
- 36 00000000
- ARM Macro Assembler Page 2
- 37 00000000 ;# External symbols we need the addresses of
- 38 00000000 import OSTCBCur
- 39 00000000 ;addr_OSTCBCur DCW OSTCBCur
- 40 00000000 import OSTCBHighRdy
- 41 00000000 ;addr_OSTCBHighRdy DCW OSTCBHighRdy
- 42 00000000 import OSPrioCur
- 43 00000000 ;addr_OSPrioCur DCW OSPrioCur
- 44 00000000 import OSPrioHighRdy
- 45 00000000 ;addr_OSPrioHighRdy DCW OSPrioHighRdy
- 46 00000000
- 47 00000000 import OSRunning
- 48 00000000 import SysENInterrupt
- 49 00000000 import OSTaskSwHook
- 50 00000000 import need_to_swap_context
- 51 00000000 import IrqStart
- 52 00000000 import OSTimeTick
- 53 00000000 import IrqFinish
- 54 00000000 import SysDISInterrupt
- 55 00000000
- 56 00000000 export IRQContextSwap
- 57 00000000 export TickHandler
- 58 00000000 export RunNewTask
- 59 00000000
- 60 00000000 IRQContextSwap
- 61 00000000 E3A00001 MOV a1, #1
- 62 00000004 E1A0E00F MOV lr, pc
- 63 00000008
- 64 00000008 TickHandler
- 65 00000008 E92D4FFF STMDB sp!,{r0-r11,lr}
- 66 0000000C
- 67 0000000C ; #interrupt disable(not nessary)
- 68 0000000C E10F0000 mrs r0, CPSR
- 69 00000010 E3800080 orr r0, r0, #0x80 ; @ and set IRQ d
- isable flag
- 70 00000014 E12FF000 msr CPSR_cxsf, r0
- 71 00000018
- 72 00000018 E3A00301 ldr r0,=0x4000000
- 73 0000001C EBFFFFFE BL SysDISInterrupt
- 74 00000020
- 75 00000020 ; #End of interrupt
- 76 00000020 ; #(Clear pending bit of INTPEND that don't accessed it.
- )
- 77 00000020 ; # rI_ISPC= BIT_TIMER0;
- 78 00000020 E59F017C LDR r0, =I_ISPC
- 79 00000024 E3A01A02 LDR r1, =BIT_TIMER0
- 80 00000028 E5801000 STR r1, [r0]
- 81 0000002C
- 82 0000002C EBFFFFFE BL IrqStart
- 83 00000030
- 84 00000030 EBFFFFFE BL OSTimeTick
- 85 00000034
- 86 00000034 EBFFFFFE BL IrqFinish ;@a1= return value
- 0:not context switc
- h, otherwise:contex
- t switch
- 87 00000038
- 88 00000038 E3500000 CMP a1, #0
- 89 0000003C 159FF164 LDRNE pc, =_CON_SWAP
- 90 00000040
- ARM Macro Assembler Page 3
- 91 00000040
- 92 00000040 _NOT_CON_SWAP
- 93 00000040 ; #not context switching
- 94 00000040 E3A00301 ldr r0,=0x4000000
- 95 00000044 EBFFFFFE BL SysENInterrupt
- 96 00000048 E8BD4FFF LDMIA sp!,{r0-r11, lr}
- 97 0000004C E25EF004 SUBS pc, lr, #4
- 98 00000050
- 99 00000050
- 100 00000050 _CON_SWAP
- 101 00000050 ; #now context switching
- 102 00000050 E8BD4FFF LDMIA sp!,{r0-r11,lr}
- 103 00000054 RunNewTask
- 104 00000054 E24EE004 SUB lr, lr, #4
- 105 00000058 E58FE080 STR lr, SAVED_LR ; @STR lr, [pc, #S
- AVED_LR-.-8]
- 106 0000005C
- 107 0000005C
- 108 0000005C ; #;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
- 109 0000005C ; #Change Supervisor mode
- 110 0000005C ; #!!!r12 register don't preserved. (r12 that PC of task
- )
- 111 0000005C
- 112 0000005C E14FE000 MRS lr, SPSR
- 113 00000060 E3CEE01F AND lr, lr, #0xFFFFFFE0
- 114 00000064 E38EE013 ORR lr, lr, #0x13
- 115 00000068 E12FF00E MSR CPSR_cxsf, lr
- 116 0000006C
- 117 0000006C
- 118 0000006C ; #;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
- 119 0000006C ; #Now Supervisor mode
- 120 0000006C ; #;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
- 121 0000006C E50DC008 STR r12, [sp, #-8] ;@ saved r12
- 122 00000070 E59FC068 LDR r12, SAVED_LR ;@LDR r12, [pc, #
- SAVED_LR-.-8]
- 123 00000074 E92D1000 STMFD sp!, {r12} ;@ r12 that PC of t
- ask
- 124 00000078 E24DD004 SUB sp, sp, #4 ;@ inclease stack p
- oint
- 125 0000007C E8BD1000 LDMIA sp!, {r12} ;@ restore r12
- 126 00000080 E92D4000 STMFD sp!, {lr} ;@ save lr
- 127 00000084 E92D1FFF STMFD sp!, {r0-r12} ;@ save register
- file and ret addres
- s
- 128 00000088 E10F4000 MRS r4, CPSR
- 129 0000008C E92D0010 STMFD sp!, {r4} ;@ save current PSR
- 130 00000090 E14F4000 MRS r4, SPSR ;@ YYY+
- 131 00000094 E92D0010 STMFD sp!, {r4} ;@ YYY+ save SPSR
- 132 00000098
- 133 00000098
- 134 00000098 ; # OSPrioCur = OSPrioHighRdy
- 135 00000098 E59F410C LDR r4, =OSPrioCur
- 136 0000009C E59F510C LDR r5, =OSPrioHighRdy
- 137 000000A0 E5D56000 LDRB r6, [r5]
- 138 000000A4 E5C46000 STRB r6, [r4]
- 139 000000A8
- 140 000000A8 ; # Get current task TCB address
- 141 000000A8 E59F4104 LDR r4, =OSTCBCur
- ARM Macro Assembler Page 4
- 142 000000AC E5945000 LDR r5, [r4]
- 143 000000B0 E585D000 STR sp, [r5] ;@ store sp in pree
- mpted tasks's TCB
- 144 000000B4
- 145 000000B4 ; # Get highest priority task TCB address
- 146 000000B4 E59F60FC LDR r6, =OSTCBHighRdy
- 147 000000B8 E5966000 LDR r6, [r6]
- 148 000000BC E596D000 LDR sp, [r6] ;@ get new task's s
- tack pointer
- 149 000000C0
- 150 000000C0 ; # OSTCBCur = OSTCBHighRdy
- 151 000000C0 E5846000 STR r6, [r4] ;@ set new current
- task TCB address
- 152 000000C4
- 153 000000C4 E8BD0010 LDMFD sp!, {r4} ;@ YYY+
- 154 000000C8 ;# AND r4, r4, #0xFFFFFF20
- 155 000000C8 ;# ORR r4, r4, #0x13
- 156 000000C8 E16FF004 MSR SPSR_cxsf, r4 ;@ YYY+
- 157 000000CC E8BD0010 LDMFD sp!, {r4} ;@ YYY+
- 158 000000D0 ;# AND r4, r4, #0xFFFFFF20
- 159 000000D0 ;# ORR r4, r4, #0x13
- 160 000000D0 E12FF004 MSR CPSR_cxsf, r4 ;@ YYY+
- 161 000000D4 E3A00301 ldr r0,=0x4000000
- 162 000000D8 EBFFFFFE BL SysENInterrupt
- 163 000000DC E8BDDFFF LDMFD sp!, {r0-r12, lr, pc} ;@ YYY+
- 164 000000E0
- 165 000000E0
- 166 000000E0 SAVED_LR ;.LONG 0
- 167 000000E0
- 168 000000E0
- 169 000000E0 ;# void DisableInt(void)
- 170 000000E0 ;# void EnableInt(void)
- 171 000000E0 ;#
- 172 000000E0 ;# Disable and enable IRQ and FIQ preserving current CPU
- mode.
- 173 000000E0 ;#
- 174 000000E0 export ARMDisableInt
- 175 000000E0 ARMDisableInt
- 176 000000E0 E92D4001 STMDB sp!, {r0,lr}
- 177 000000E4 E10F0000 MRS r0, CPSR
- 178 000000E8 E3800080 ORR r0, r0, #NoInt
- 179 000000EC E12FF000 MSR CPSR_cxsf, r0
- 180 000000F0 E8BD8001 LDMIA sp!, {r0,pc}
- 181 000000F4 ;# MOV pc, lr
- 182 000000F4
- 183 000000F4
- 184 000000F4 export ARMEnableInt
- 185 000000F4 ARMEnableInt
- 186 000000F4 E92D4001 STMDB sp!, {r0,lr}
- 187 000000F8 E10F0000 MRS r0, CPSR
- 188 000000FC E3C00080 BIC r0, r0, #NoInt
- 189 00000100 E12FF000 MSR CPSR_cxsf, r0
- 190 00000104 E8BD8001 LDMIA sp!, {r0,pc}
- 191 00000108 ;# MOV pc, lr
- 192 00000108
- 193 00000108 export ARMIsDisableInt
- 194 00000108 ARMIsDisableInt ;@return value [dis
- able: 1 enable
- : 0]
- ARM Macro Assembler Page 5
- 195 00000108 E10F0000 MRS a1, CPSR
- 196 0000010C E2000080 AND a1, a1, #NoInt
- 197 00000110 ; bx lr
- 198 00000110
- 199 00000110
- 200 00000110 ;# void OS_TASK_SW(void)
- 201 00000110 ;#
- 202 00000110 ;# Perform a context switch.
- 203 00000110 ;#
- 204 00000110 ;# On entry, OSTCBCur and OSPrioCur hold the current TCB
- and priority
- 205 00000110 ;# and OSTCBHighRdy and OSPrioHighRdy contain the same f
- or the task
- 206 00000110 ;# to be switched to.
- 207 00000110 ;#
- 208 00000110 ;# The following code assumes that the virtual memory is
- directly
- 209 00000110 ;# mapped into physical memory. If this is not true, th
- e cache must
- 210 00000110 ;# be flushed at context switch to avoid address aliasin
- g.
- 211 00000110 export OS_TASK_SW
- 212 00000110 OS_TASK_SW
- 213 00000110 E92D4000 STMFD sp!, {lr} ;@ save pc
- 214 00000114 E92D4000 STMFD sp!, {lr} ;@ save lr
- 215 00000118 E92D1FFF STMFD sp!, {r0-r12} ;@ save register
- file and ret addres
- s
- 216 0000011C E10F4000 MRS r4, CPSR
- 217 00000120 E92D0010 STMFD sp!, {r4} ;@ save current PSR
- 218 00000124 E14F4000 MRS r4, SPSR ;@ YYY+
- 219 00000128 E92D0010 STMFD sp!, {r4} ;@ YYY+ save SPSR
- 220 0000012C
- 221 0000012C ; # OSPrioCur = OSPrioHighRdy
- 222 0000012C E59F4078 LDR r4, =OSPrioCur
- 223 00000130 E59F5078 LDR r5, =OSPrioHighRdy
- 224 00000134 E5D56000 LDRB r6, [r5]
- 225 00000138 E5C46000 STRB r6, [r4]
- 226 0000013C
- 227 0000013C ; @ Get current task TCB address
- 228 0000013C E59F4070 LDR r4, =OSTCBCur
- 229 00000140 E5945000 LDR r5, [r4]
- 230 00000144 E585D000 STR sp, [r5] ;@ store sp in pree
- mpted tasks's TCB
- 231 00000148
- 232 00000148 ; # Get highest priority task TCB address
- 233 00000148 E59F6068 LDR r6, =OSTCBHighRdy
- 234 0000014C E5966000 LDR r6, [r6]
- 235 00000150 E596D000 LDR sp, [r6] ;@ get new task's s
- tack pointer
- 236 00000154
- 237 00000154 ; # OSTCBCur = OSTCBHighRdy
- 238 00000154 E5846000 STR r6, [r4] ;@ set new current
- task TCB address
- 239 00000158
- 240 00000158 E8BD0010 LDMFD sp!, {r4} ;@ YYY+
- 241 0000015C E16FF004 MSR SPSR_cxsf, r4 ;@ YYY+
- 242 00000160 E8BD0010 LDMFD sp!, {r4} ;@ YYY+
- ARM Macro Assembler Page 6
- 243 00000164 E12FF004 MSR CPSR_cxsf, r4 ;@ YYY+
- 244 00000168 E8BDDFFF LDMFD sp!, {r0-r12, lr, pc} ;@ YYY+
- 245 0000016C
- 246 0000016C
- 247 0000016C
- 248 0000016C ;# void OSStartHighRdy(void)
- 249 0000016C ;#
- 250 0000016C ;# Start the task with the highest priority;
- 251 0000016C ;#
- 252 0000016C export OSStartHighRdy
- 253 0000016C OSStartHighRdy
- 254 0000016C EBFFFFFE BL OSTaskSwHook
- 255 00000170 E3A00001 MOV R0,#1
- 256 00000174 E59F1040 LDR R1,=OSRunning
- 257 00000178 E5C10000 STRB R0,[R1]
- 258 0000017C
- 259 0000017C E59F4030 LDR r4, =OSTCBCur ;@ Get current ta
- sk TCB address
- 260 00000180 E59F5030 LDR r5, =OSTCBHighRdy ;@ Get highes
- t priority task TCB
- address
- 261 00000184
- 262 00000184 E5955000 LDR r5, [r5] ;@ get stack pointe
- r
- 263 00000188 E595D000 LDR sp, [r5] ;@ switch to the ne
- w stack
- 264 0000018C
- 265 0000018C E5845000 STR r5, [r4] ;@ set new current
- task TCB address
- 266 00000190
- 267 00000190 E8BD0010 LDMFD sp!, {r4} ;@ YYY
- 268 00000194 E16FF004 MSR SPSR_cxsf, r4
- 269 00000198 E8BD0010 LDMFD sp!, {r4} ;@ get new state fr
- om top of the stack
- 270 0000019C E12FF004 MSR CPSR_cxsf, r4 ;@ CPSR should be
- SVC32Mode
- 271 000001A0 E8BDDFFF LDMFD sp!, {r0-r12, lr, pc } ;@ start
- the new task
- 272 000001A4
- 273 000001A4 END
- 01E00024
- 00000000
- 00000000
- 00000000
- 00000000
- 00000000
- 00000000
- Command Line: --debug --xref --device=DARMS --apcs=interwork -o.Run_In_Ramos_
- cpu_a.o -I..srcs3c44b0ucos-II -IC:KeilARMINCSamsung --list=.Listos_cpu
- _a.lst ..srcs3c44b0ucos-IIos_cpu_a.s
- ARM Macro Assembler Page 1 Alphabetic symbol ordering
- Relocatable symbols
- ARMDisableInt 000000E0
- Symbol: ARMDisableInt
- Definitions
- At line 175 in file ..srcs3c44b0ucos-IIos_cpu_a.s
- Uses
- At line 174 in file ..srcs3c44b0ucos-IIos_cpu_a.s
- Comment: ARMDisableInt used once
- ARMEnableInt 000000F4
- Symbol: ARMEnableInt
- Definitions
- At line 185 in file ..srcs3c44b0ucos-IIos_cpu_a.s
- Uses
- At line 184 in file ..srcs3c44b0ucos-IIos_cpu_a.s
- Comment: ARMEnableInt used once
- ARMIsDisableInt 00000108
- Symbol: ARMIsDisableInt
- Definitions
- At line 194 in file ..srcs3c44b0ucos-IIos_cpu_a.s
- Uses
- At line 193 in file ..srcs3c44b0ucos-IIos_cpu_a.s
- Comment: ARMIsDisableInt used once
- IRQContextSwap 00000000
- Symbol: IRQContextSwap
- Definitions
- At line 60 in file ..srcs3c44b0ucos-IIos_cpu_a.s
- Uses
- At line 56 in file ..srcs3c44b0ucos-IIos_cpu_a.s
- Comment: IRQContextSwap used once
- OSStartHighRdy 0000016C
- Symbol: OSStartHighRdy
- Definitions
- At line 253 in file ..srcs3c44b0ucos-IIos_cpu_a.s
- Uses
- At line 252 in file ..srcs3c44b0ucos-IIos_cpu_a.s
- Comment: OSStartHighRdy used once
- OS_TASK_SW 00000110
- Symbol: OS_TASK_SW
- Definitions
- At line 212 in file ..srcs3c44b0ucos-IIos_cpu_a.s
- Uses
- At line 211 in file ..srcs3c44b0ucos-IIos_cpu_a.s
- Comment: OS_TASK_SW used once
- RunNewTask 00000054
- Symbol: RunNewTask
- Definitions
- At line 103 in file ..srcs3c44b0ucos-IIos_cpu_a.s
- Uses
- At line 58 in file ..srcs3c44b0ucos-IIos_cpu_a.s
- Comment: RunNewTask used once
- SAVED_LR 000000E0
- Symbol: SAVED_LR
- ARM Macro Assembler Page 2 Alphabetic symbol ordering
- Relocatable symbols
- Definitions
- At line 166 in file ..srcs3c44b0ucos-IIos_cpu_a.s
- Uses
- At line 105 in file ..srcs3c44b0ucos-IIos_cpu_a.s
- At line 122 in file ..srcs3c44b0ucos-IIos_cpu_a.s
- TickHandler 00000008
- Symbol: TickHandler
- Definitions
- At line 64 in file ..srcs3c44b0ucos-IIos_cpu_a.s
- Uses
- At line 57 in file ..srcs3c44b0ucos-IIos_cpu_a.s
- Comment: TickHandler used once
- _CON_SWAP 00000050
- Symbol: _CON_SWAP
- Definitions
- At line 100 in file ..srcs3c44b0ucos-IIos_cpu_a.s
- Uses
- At line 89 in file ..srcs3c44b0ucos-IIos_cpu_a.s
- Comment: _CON_SWAP used once
- _NOT_CON_SWAP 00000040
- Symbol: _NOT_CON_SWAP
- Definitions
- At line 92 in file ..srcs3c44b0ucos-IIos_cpu_a.s
- Uses
- None
- Comment: _NOT_CON_SWAP unused
- subr 00000000
- Symbol: subr
- Definitions
- At line 19 in file ..srcs3c44b0ucos-IIos_cpu_a.s
- Uses
- None
- Comment: subr unused
- 12 symbols
- ARM Macro Assembler Page 1 Alphabetic symbol ordering
- Relocatable symbols
- .debug_info$$$subr 00000000
- Symbol: .debug_info$$$subr
- Definitions
- None
- Uses
- None
- Warning: .debug_info$$$subr undefinedComment: .debug_info$$$subr unused
- 1 symbol
- ARM Macro Assembler Page 1 Alphabetic symbol ordering
- Relocatable symbols
- .debug_line$$$subr 00000000
- Symbol: .debug_line$$$subr
- Definitions
- None
- Uses
- None
- Warning: .debug_line$$$subr undefinedComment: .debug_line$$$subr unused
- 1 symbol
- ARM Macro Assembler Page 1 Alphabetic symbol ordering
- Relocatable symbols
- .debug_abbrev 00000000
- Symbol: .debug_abbrev
- Definitions
- None
- Uses
- None
- Warning: .debug_abbrev undefinedComment: .debug_abbrev unused
- __ARM_asm.debug_abbrev 00000000
- Symbol: __ARM_asm.debug_abbrev
- Definitions
- None
- Uses
- None
- Warning: __ARM_asm.debug_abbrev undefinedComment: __ARM_asm.debug_abbrev unused
- 2 symbols
- ARM Macro Assembler Page 1 Alphabetic symbol ordering
- Absolute symbols
- BIT_TIMER0 00002000
- Symbol: BIT_TIMER0
- Definitions
- At line 32 in file ..srcs3c44b0ucos-IIos_cpu_a.s
- Uses
- At line 79 in file ..srcs3c44b0ucos-IIos_cpu_a.s
- Comment: BIT_TIMER0 used once
- FIQ32Mode 00000011
- Symbol: FIQ32Mode
- Definitions
- At line 28 in file ..srcs3c44b0ucos-IIos_cpu_a.s
- Uses
- None
- Comment: FIQ32Mode unused
- FiqV 0000001C
- Symbol: FiqV
- Definitions
- At line 23 in file ..srcs3c44b0ucos-IIos_cpu_a.s
- Uses
- None
- Comment: FiqV unused
- INTMSK 01E0000C
- Symbol: INTMSK
- Definitions
- At line 34 in file ..srcs3c44b0ucos-IIos_cpu_a.s
- Uses
- None
- Comment: INTMSK unused
- IRQ32Mode 00000012
- Symbol: IRQ32Mode
- Definitions
- At line 27 in file ..srcs3c44b0ucos-IIos_cpu_a.s
- Uses
- None
- Comment: IRQ32Mode unused
- I_ISPC 01E00024
- Symbol: I_ISPC
- Definitions
- At line 33 in file ..srcs3c44b0ucos-IIos_cpu_a.s
- Uses
- At line 78 in file ..srcs3c44b0ucos-IIos_cpu_a.s
- Comment: I_ISPC used once
- IrqV 00000018
- Symbol: IrqV
- Definitions
- At line 22 in file ..srcs3c44b0ucos-IIos_cpu_a.s
- Uses
- None
- Comment: IrqV unused
- NoInt 00000080
- Symbol: NoInt
- ARM Macro Assembler Page 2 Alphabetic symbol ordering
- Absolute symbols
- Definitions
- At line 24 in file ..srcs3c44b0ucos-IIos_cpu_a.s
- Uses
- At line 178 in file ..srcs3c44b0ucos-IIos_cpu_a.s
- At line 188 in file ..srcs3c44b0ucos-IIos_cpu_a.s
- At line 196 in file ..srcs3c44b0ucos-IIos_cpu_a.s
- OSEnterSWI 00000000
- Symbol: OSEnterSWI
- Definitions
- At line 30 in file ..srcs3c44b0ucos-IIos_cpu_a.s
- Uses
- None
- Comment: OSEnterSWI unused
- SVC32Mode 00000013
- Symbol: SVC32Mode
- Definitions
- At line 26 in file ..srcs3c44b0ucos-IIos_cpu_a.s
- Uses
- None
- Comment: SVC32Mode unused
- SwiV 00000008
- Symbol: SwiV
- Definitions
- At line 21 in file ..srcs3c44b0ucos-IIos_cpu_a.s
- Uses
- None
- Comment: SwiV unused
- 11 symbols
- ARM Macro Assembler Page 1 Alphabetic symbol ordering
- External symbols
- IrqFinish 00000000
- Symbol: IrqFinish
- Definitions
- At line 53 in file ..srcs3c44b0ucos-IIos_cpu_a.s
- Uses
- At line 86 in file ..srcs3c44b0ucos-IIos_cpu_a.s
- Comment: IrqFinish used once
- IrqStart 00000000
- Symbol: IrqStart
- Definitions
- At line 51 in file ..srcs3c44b0ucos-IIos_cpu_a.s
- Uses
- At line 82 in file ..srcs3c44b0ucos-IIos_cpu_a.s
- Comment: IrqStart used once
- OSPrioCur 00000000
- Symbol: OSPrioCur
- Definitions
- At line 42 in file ..srcs3c44b0ucos-IIos_cpu_a.s
- Uses
- At line 135 in file ..srcs3c44b0ucos-IIos_cpu_a.s
- At line 222 in file ..srcs3c44b0ucos-IIos_cpu_a.s
- OSPrioHighRdy 00000000
- Symbol: OSPrioHighRdy
- Definitions
- At line 44 in file ..srcs3c44b0ucos-IIos_cpu_a.s
- Uses
- At line 136 in file ..srcs3c44b0ucos-IIos_cpu_a.s
- At line 223 in file ..srcs3c44b0ucos-IIos_cpu_a.s
- OSRunning 00000000
- Symbol: OSRunning
- Definitions
- At line 47 in file ..srcs3c44b0ucos-IIos_cpu_a.s
- Uses
- At line 256 in file ..srcs3c44b0ucos-IIos_cpu_a.s
- Comment: OSRunning used once
- OSTCBCur 00000000
- Symbol: OSTCBCur
- Definitions
- At line 38 in file ..srcs3c44b0ucos-IIos_cpu_a.s
- Uses
- At line 141 in file ..srcs3c44b0ucos-IIos_cpu_a.s
- At line 228 in file ..srcs3c44b0ucos-IIos_cpu_a.s
- At line 259 in file ..srcs3c44b0ucos-IIos_cpu_a.s
- OSTCBHighRdy 00000000
- Symbol: OSTCBHighRdy
- Definitions
- At line 40 in file ..srcs3c44b0ucos-IIos_cpu_a.s
- Uses
- At line 146 in file ..srcs3c44b0ucos-IIos_cpu_a.s
- ARM Macro Assembler Page 2 Alphabetic symbol ordering
- External symbols
- At line 233 in file ..srcs3c44b0ucos-IIos_cpu_a.s
- At line 260 in file ..srcs3c44b0ucos-IIos_cpu_a.s
- OSTaskSwHook 00000000
- Symbol: OSTaskSwHook
- Definitions
- At line 49 in file ..srcs3c44b0ucos-IIos_cpu_a.s
- Uses
- At line 254 in file ..srcs3c44b0ucos-IIos_cpu_a.s
- Comment: OSTaskSwHook used once
- OSTimeTick 00000000
- Symbol: OSTimeTick
- Definitions
- At line 52 in file ..srcs3c44b0ucos-IIos_cpu_a.s
- Uses
- At line 84 in file ..srcs3c44b0ucos-IIos_cpu_a.s
- Comment: OSTimeTick used once
- SysDISInterrupt 00000000
- Symbol: SysDISInterrupt
- Definitions
- At line 54 in file ..srcs3c44b0ucos-IIos_cpu_a.s
- Uses
- At line 73 in file ..srcs3c44b0ucos-IIos_cpu_a.s
- Comment: SysDISInterrupt used once
- SysENInterrupt 00000000
- Symbol: SysENInterrupt
- Definitions
- At line 48 in file ..srcs3c44b0ucos-IIos_cpu_a.s
- Uses
- At line 95 in file ..srcs3c44b0ucos-IIos_cpu_a.s
- At line 162 in file ..srcs3c44b0ucos-IIos_cpu_a.s
- need_to_swap_context 00000000
- Symbol: need_to_swap_context
- Definitions
- At line 50 in file ..srcs3c44b0ucos-IIos_cpu_a.s
- Uses
- None
- Comment: need_to_swap_context unused
- 12 symbols
- 360 symbols in table
