sysALib.s
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上传日期:2022-06-26
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VxWorks

开发平台:

C/C++

  1. /*
  2.     Copyright 2001, Broadcom Corporation
  3.     All Rights Reserved.
  4.     
  5.     This is UNPUBLISHED PROPRIETARY SOURCE CODE of Broadcom Corporation;
  6.     the contents of this file may not be disclosed to third parties, copied or
  7.     duplicated in any form, in whole or in part, without the prior written
  8.     permission of Broadcom Corporation.
  9. */
  10. /* $Id: sysALib.s,v 1.1 Broadcom SDK $ */
  11. /* sysALib.s - IDT S134 system-dependent assembly routines */
  12. /* Copyright 1984-1996 Wind River Systems, Inc. */
  13.         .data
  14.         .globl  copyright_wind_river
  15. /*
  16. modification history
  17. --------------------
  18. 01b,12nov99,hsm    cleaned
  19. 01a,17june99,hsm   created.
  20. */
  21. /*
  22. DESCRIPTION
  23. This module contains system-dependent routines written in assembly
  24. language.
  25. This module must be the first specified in the f3ldf1 command used to
  26. build the system.  The sysInit() routine is the system start-up code.
  27. */ 
  28. #define _ASMLANGUAGE
  29. #include "vxWorks.h"
  30. #include "arch/mips/ivMips.h"
  31. #include "arch/mips/asmMips.h"
  32. #include "arch/mips/esfMips.h"
  33. #include "arch/mips/archMips.h"
  34. #include "sysLib.h"
  35. #include "config.h"
  36. #include "cacheLib.h"             /* where CACHE_DISABLED, etc are defined; very
  37.                                    * important for #if expression evaluation!
  38.                                    */
  39. /* internals */
  40. .globl sysInit /* start of system code */
  41. .globl sysGpInit /* initialize global pointer */
  42. .globl sysClearTlbEntry /* clear entry in tlb */
  43. .globl sysWbFlush /* flush write buffers */
  44. .globl  sysSetCompare
  45. .globl  sysGetCompare
  46. .globl  sysSetCount
  47. .globl  sysGetCount
  48. .globl sysGetPrid
  49.         .globl  sysGetConfig
  50. /*        .globl  setTlbEntry */
  51.         .globl  setPageSize
  52.         .globl  sysinbyte
  53.         .globl  sysinword
  54.         .globl  sysinlong
  55.         .globl  sysoutbyte
  56.         .globl  sysoutword
  57.         .globl  sysoutlong
  58.         .globl EnableCache
  59. .globl DisableCache
  60.    /*     .globl _writeasm */
  61.         .globl ReadCP0_16
  62.         .globl ReadCP0_22
  63.         .globl ReadSR
  64.         .globl SetSR
  65.         .globl  vxSpGet
  66.         .globl  vxPcGet
  67. /* externals */
  68. .globl usrInit /* system initialization routine */
  69. .text
  70. /*******************************************************************************
  71. *
  72. * sysInit - start after boot
  73. *
  74. * This routine is the system start-up entry point for VxWorks in RAM, the
  75. * first code executed after booting.  It disables interrupts, sets up the
  76. * stack, and jumps to the C routine usrInit() in usrConfig.c.
  77. *
  78. * The initial stack is set to grow down from the address of sysInit().  This
  79. * stack is used only by usrInit() and is never used again.  Memory for the
  80. * stack must be accounted for when determining the system load address.
  81. *
  82. * NOTE: This routine should not be called by the user.
  83. *
  84. * RETURNS: N/A
  85. * sysInit (void) /@ THIS IS NOT A CALLABLE ROUTINE @/
  86. */
  87. .ent sysInit
  88. sysInit:
  89.                 
  90. la gp,_gp /* set global ptr from cmplr */
  91. /* disable all interrupts */
  92. li t0, SR_CU0              /* |SR_IE */
  93.         li      t1, ~SR_IE
  94.         and     t0, t1       
  95. or t0, SR_DE /* disable cache errors on R4200 rev1.1 */
  96. mtc0 t0, C0_SR /* put on processor */
  97. la sp, sysInit-32 /* set stack to grow down from code,
  98.    leave room for four parameters */
  99.               
  100. /* give us as long as possible before a clock interrupt */
  101. li v0,1
  102. mtc0 v0,C0_COUNT
  103. mtc0 zero,C0_COMPARE
  104. li a0, BOOT_WARM_AUTOBOOT  /* push start type arg = WARM_BOOT */
  105. jal usrInit /* never returns - starts up kernel */
  106. li ra, R_VEC /* load prom reset address */
  107. j ra /* just in case */
  108. .end sysInit
  109. /*******************************************************************************
  110. *
  111. * sysGpInit - initialize the MIPS global pointer
  112. *
  113. * The purpose of this routine is to initialize the global pointer (gp).
  114. * It is required in order support compressed ROMs.
  115. *
  116. * RETURNS: N/A
  117. *
  118. * NOMANUAL
  119. */
  120. .ent sysGpInit
  121. sysGpInit:
  122. la gp, _gp /* set global pointer from compiler */
  123. j ra
  124. .end sysGpInit
  125. /*******************************************************************************
  126. *
  127. * sysWbFlush - flush the write buffer
  128. *
  129. * This routine flushes the write buffers, making certain all subsequent
  130. * memory writes have occurred.  It is used during critical periods only, e.g.,
  131. * after memory-mapped I/O register access.
  132. *
  133. * RETURNS: N/A
  134. * sysWbFlush (void)
  135. */
  136. .ent sysWbFlush
  137. sysWbFlush:
  138. .set noreorder
  139. nop
  140.         la      v0,sysWbFlush
  141.         or      v0,K1BASE
  142.         sw      zero,0(v0)
  143.         lw      v0,0(v0)
  144.         j       ra
  145. nop
  146. .set reorder
  147. .end sysWbFlush
  148. /*******************************************************************************
  149. *
  150. * sysSetCompare - set the RC32364 timer compare register
  151. *
  152. * RETURNS: N/A
  153. * int sysSetCompare (void)
  154. */
  155. .ent sysSetCompare
  156. sysSetCompare:
  157. mtc0 a0,C0_COMPARE
  158. j ra
  159. .end sysSetCompare
  160. /*******************************************************************************
  161. *
  162. * sysGetCompare - get the RC32364 timer compare register
  163. *
  164. * RETURNS: N/A
  165. * int sysGetCompare (void)
  166. */
  167. .ent sysGetCompare
  168. sysGetCompare:
  169. mfc0 v0,C0_COMPARE
  170. j ra
  171. .end sysGetCompare
  172. /*******************************************************************************
  173. *
  174. * sysSetCount - set the RC32364 timer count register
  175. *
  176. * RETURNS: N/A
  177. * int sysSetCount (void)
  178. */
  179. .ent sysSetCount
  180. sysSetCount:
  181. mtc0 a0,C0_COUNT
  182. j ra
  183. .end sysSetCount
  184. /*******************************************************************************
  185. *
  186. * sysGetCount - get the RC32364 timer count register
  187. *
  188. * RETURNS: N/A
  189. * int sysGetCount (void)
  190. */
  191. .ent sysGetCount
  192. sysGetCount:
  193. mfc0 v0,C0_COUNT
  194. j ra
  195. .end sysGetCount
  196. /*******************************************************************************
  197. *
  198. * sysGetPrid - get the RC32364 processor ID register
  199. *
  200. * RETURNS: N/A
  201. * int sysGetPrid (void)
  202. */
  203. .ent sysGetPrid
  204. sysGetPrid:
  205. mfc0 v0,C0_PRID
  206. j ra
  207. .end sysGetPrid
  208. #define DELAY1 300000
  209. #define DELAY2 600000
  210. /* Tlb Related functions */
  211. /*****************************************************
  212. * setPageSize      - Sets the MMU page size
  213. *
  214. * Input parameters -
  215. *               a0 - PageSize
  216. */
  217.         .ent setPageSize
  218. setPageSize:
  219.         .set noreorder
  220.          nop
  221.          nop
  222.          mtc0  a0,C0_PAGEMASK
  223.          nop
  224.          nop
  225.         .set reorder
  226.          j    ra
  227.          nop
  228.         .end setPageSize
  229.          
  230. /***************************************************
  231. * setTlbEntry      - sets one MMU entry
  232. *
  233. * Input parameters -
  234. *                a0- Tlb_Inx
  235. *                a1- Tlb_Hi
  236. *                a2- Tlb_Lo0
  237. *                a3- Tlb_Lo1
  238. */
  239.          .ent setTlbEntry
  240. setTlbEntry:
  241.          .set noreorder
  242.           nop
  243.           nop
  244.           mtc0 a0,C0_INX
  245.           nop
  246.           nop
  247.           mtc0 a1,C0_TLBHI
  248.           nop
  249.           nop
  250.           mtc0 a2,C0_TLBLO0
  251.           nop
  252.           nop
  253.           mtc0 a3,C0_TLBLO1
  254.           nop
  255.           nop
  256.           nop
  257.           nop
  258.           nop
  259.           nop
  260.           tlbwi
  261.           nop
  262.           nop
  263.           nop
  264.           .set reorder
  265.  
  266.          j      ra
  267.          nop
  268.          .end setTlbEntry
  269. /*******************************************************************************
  270. *
  271. * sysInByte - input one byte from I/O space
  272. *
  273. * RETURNS: Byte data from the I/O port.
  274.  
  275. * UCHAR sysInByte (address)
  276. *     int address;      /@ I/O port address @/
  277.  
  278. */
  279.           .ent sysinbyte
  280. sysinbyte:
  281.           .set noreorder
  282.            lb   v0, 0x0(a0)
  283.            nop
  284.            j    ra
  285.            nop
  286.           .set reorder
  287.           .end sysinbyte
  288. /*******************************************************************************
  289. *
  290. * sysInWord - input one word from I/O space
  291. *
  292. * RETURNS: Word data from the I/O port.
  293.  
  294. * USHORT sysInWord (address)
  295. *     int address;      /@ I/O port address @/
  296.  
  297. */
  298.            .ent  sysinword
  299. sysinword:
  300.           .set noreorder
  301.            lh   v0,0x0(a0)
  302.            j    ra
  303.            nop
  304.           .set reorder
  305.           .end sysinword
  306. /*******************************************************************************
  307. *
  308. * sysInLong - input one long-word from I/O space
  309. *
  310. * RETURNS: Long-Word data from the I/O port.
  311.  
  312. * USHORT sysInLong (address)
  313. *     int address;      /@ I/O port address @/
  314.  
  315. */
  316.            .ent sysinlong
  317. sysinlong:
  318.            .set noreorder
  319.             lw  v0 ,0(a0)
  320.             nop
  321.             j   ra
  322.             nop
  323.            .set reorder
  324.            .end sysinlong
  325. /*******************************************************************************
  326. *
  327. * sysoutByte - output one byte to I/O space
  328. *
  329. * RETURNS: N/A
  330.  
  331. * void sysOutByte (address, data)
  332. *     int address;      /@ I/O port address @/
  333. *     char data;        /@ data written to the port @/
  334.  
  335. */
  336.             .ent sysoutbyte
  337. sysoutbyte: 
  338.              .set noreorder
  339.              li   t0, 0x3
  340.              xor  a0, t0
  341.              sb   a1,0(a0)
  342.              nop
  343.              j    ra
  344.              nop
  345.             .set reorder
  346.             .end sysoutbyte
  347. /*******************************************************************************
  348. *
  349. * sysoutWord - output one word to I/O space
  350. *
  351. * RETURNS: N/A
  352.  
  353. * void sysOutWord (address, data)
  354. *     int address;      /@ I/O port address @/
  355. *     short data;       /@ data written to the port @/
  356.  
  357. */
  358.              .ent sysoutword
  359. sysoutword:
  360.              .set noreorder
  361.               sh  a1,0(a0)
  362.               nop
  363.               j   ra
  364.               nop
  365.              .set reorder
  366.              .end sysoutword
  367. /*******************************************************************************
  368. *
  369. * sysOutLong - output one long-word to I/O space
  370. *
  371. * RETURNS: N/A
  372.  
  373. * void sysOutLong (address, data)
  374. *     int address;      /@ I/O port address @/
  375. *     long data;        /@ data written to the port @/
  376.  
  377. */
  378.              .ent sysoutlong
  379. sysoutlong:
  380.              .set noreorder
  381.               sw  a1,0(a0)
  382.               nop
  383.               j   ra
  384.               nop
  385.              .set reorder
  386.              .end sysoutlong
  387. /*****************************************************************************
  388. *
  389. * sysgetConfig - Returns the Config register contents
  390. *
  391. *
  392. */
  393.              .ent sysGetConfig
  394. sysGetConfig:
  395.              .set noreorder
  396.               mfc0 v0,C0_CONFIG
  397.               nop
  398.               nop
  399.               j   ra
  400.               nop
  401.              .set reorder
  402.              .end sysGetConfig
  403.              
  404. /************************************************************************/
  405. /*     ReadCP0_16 :                                                     */
  406. /*                                                                      */
  407. /*      SYNTAX: unsigned long ReadCP0_16(void);                         */
  408. /*     RETURNS: CP0 value                                               */
  409. /*                                                                      */
  410. /************************************************************************/
  411. .ent ReadCP0_16
  412. ReadCP0_16:
  413. .set noreorder
  414. mfc0 v0, $16
  415. nop
  416. j ra
  417. nop
  418. .set reorder
  419. .end ReadCP0_16
  420. /************************************************************************
  421. */
  422. /*     ReadCP0_22 :
  423. /*                                                                      *
  424. */
  425. /*      SYNTAX: unsigned long ReadCP0_22(void);                         *
  426. */
  427. /*     RETURNS: CP0 value                                               *
  428. */
  429. /*                                                                      *
  430. */
  431. /************************************************************************
  432. */
  433. .ent ReadCP0_22
  434. ReadCP0_22:
  435. .set noreorder
  436. mfc0 v0, $22
  437. nop
  438. j ra
  439. nop
  440. .set reorder
  441. .end ReadCP0_22
  442.         
  443. /************************************************************************ */
  444. /*     ReadSR : Read the SR (Status Register)                           * */
  445. /*                                                                      * */
  446. /*      SYNTAX: unsigned long ReadSR(void);                             * */
  447. /*     RETURNS: SR value                                                * */
  448. /*                                                                      * */
  449. /************************************************************************ */
  450. .ent ReadSR
  451. ReadSR:
  452. .set noreorder
  453. mfc0 v0, C0_SR
  454. nop
  455. j ra
  456. nop
  457. .set reorder
  458. .end ReadSR
  459. /************************************************************************ */
  460. /*     SetSR  : Set the SR (Status Register)                            * */
  461. /*                                                                      * */
  462. /*      SYNTAX: unsigned long ReadSR(unsigned long);                    * */
  463. /*     RETURNS: SR value                                                * */
  464. /*                                                                      * */
  465. /************************************************************************ */
  466. .ent SetSR
  467. SetSR:
  468. .set    noreorder
  469. mfc0    v0, C0_SR
  470. nop
  471. mtc0    a0, C0_SR
  472. nop
  473. j       ra
  474. nop
  475. .set    reorder
  476. .end SetSR
  477.         
  478. #define CACHEBITS       3
  479. #define WRITETHROUGH    0
  480. #define CACHEDISABLE    2
  481. #define CACHEWRITEBACK  3  
  482. /***********************************************************************/
  483. /*                                                                     */
  484. /*     EnableCache: enable the caches        */
  485. /*                                                                     */
  486. /***********************************************************************/
  487. .ent EnableCache
  488. EnableCache:
  489. .set noreorder
  490.         /* Caches must be enabled from KSEG1 */        
  491.         la      t0, 1f
  492.         li      t1, K1BASE             
  493.         or      t0, t1                 
  494.         j       t0
  495.         nop
  496. 1:
  497. mfc0 t1, $16
  498. nop
  499.         and t1, t1, ~(CACHEBITS)
  500.         
  501. #if USER_D_CACHE_MODE == CACHE_DISABLED
  502.         or t1, t1, CACHEDISABLE
  503. #else        
  504. #if USER_D_CACHE_MODE == CACHE_COPYBACK
  505. or     t1, t1, CACHEWRITEBACK 
  506. #endif
  507. #endif
  508. mtc0 t1, $16 # enable D Cache
  509.         nop
  510. j ra
  511. nop
  512. .set reorder
  513. .end EnableCache
  514.                   
  515. /************************************************************************/
  516. /*                                                                      */
  517. /*     DisableCache: disable the caches         */
  518. /*                                                                      */
  519. /************************************************************************/
  520. .ent DisableCache
  521. DisableCache:
  522. .set noreorder
  523. mfc0 t1, $16
  524. nop
  525.         and t1, t1, ~(CACHEBITS)
  526.         or      t1, t1, CACHEDISABLE
  527. mtc0 t1, $16  # disable D Cache
  528. j ra
  529. nop
  530. .set reorder
  531. .end DisableCache
  532.         
  533. /* Some performance and debug tools */
  534.         
  535.         .globl readCount
  536.         .globl readInstr
  537. .globl readStatus
  538. .globl readConfig
  539.         
  540. #define MFC0_SEL_OPCODE(dst, src, sel)
  541.    .word (0x40000000 | ((dst)<<16) | ((src)<<11) | (sel))
  542. #define MTC0_SEL_OPCODE(dst, src, sel)
  543.    .word (0x40800000 | ((dst)<<16) | ((src)<<11) | (sel))
  544.                 
  545. #define INSTR      4
  546.         .set    noreorder
  547.                 
  548.         .ent    readCount
  549. readCount:
  550. mfc0 v0, C0_COUNT
  551.         nop
  552.         
  553.         jr      ra
  554.         nop
  555.         
  556.         .end    readCount        
  557.         
  558.         .ent    readInstr
  559. readInstr:
  560.         MFC0_SEL_OPCODE(2, 25, INSTR)
  561.         nop
  562.         
  563.         jr      ra
  564.         nop
  565.         
  566.         .end    readInstr
  567. .ent readStatus
  568. readStatus:
  569. mfc0 v0, $12
  570. nop
  571. jr ra
  572. nop
  573. .end readStatus
  574. .ent readConfig
  575. readConfig:
  576. mfc0 v0, $16
  577. nop
  578. jr ra
  579. nop
  580. .end readConfig
  581. /*************************************************************
  582. *
  583. * Support functions for sysBackTrace
  584. *
  585. */
  586.         
  587.              .ent vxSpGet
  588. vxSpGet:
  589.               .set noreorder
  590.                j ra
  591.                or v0,sp,sp
  592.                .set reorder
  593.                .end vxSpGet
  594.               .ent vxPcGet
  595. vxPcGet:
  596.               .set noreorder
  597.                or v0,ra,ra
  598.                j ra
  599.                nop
  600.                .set reorder
  601.                .end vxPcGet