sysPci.c
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上传用户:yingyi0918
上传日期:2022-06-26
资源大小:214k
文件大小:12k
源码类别:
VxWorks
开发平台:
C/C++
- /* sysBusPci.c - IDT 79RC32438 PCI autoconfig support. */
- /* Copyright 1984-2002 Wind River Systems, Inc. */
- #include "copyright_wrs.h"
- /*
- * This file has been developed or significantly modified by the
- * MIPS Center of Excellence Dedicated Engineering Staff.
- * This notice is as per the MIPS Center of Excellence Master Partner
- * Agreement, do not remove this notice without checking first with
- * WR/Platforms MIPS Center of Excellence engineering management.
- */
- /*
- modification history
- --------------------
- 01a,12jun02,krao written
- */
- /*
- DESCRIPTION
- This module contains the "non-generic" or "board specific" PCI
- initialization code, including initializing the PCI Host bridge, re-mapping
- PCI access regions with the TLB, and initiating PCI auto-config.
- It is assumed that this file is include by sysLib.c.
- */
- /* includes */
- #include "vxWorks.h"
- #include "logLib.h"
- #include "taskLib.h"
- #include "config.h"
- #include "drv/pci/pciAutoConfigLib.h"
- /* defines */
- /* typedefs */
- /* globals */
- /* externals */
- IMPORT void sysSetPageSize () ;
- IMPORT void sysSetTlbEntry () ;
- /* locals */
- LOCAL PCI_SYSTEM sysParams;
- /* forward declarations */
- LOCAL void sysPciTlbInit ();
- LOCAL void sysPciHostBridgeInit ();
- /* subroutines */
- /***************************************************************************
- *
- * sysPciTlbInit - Initialize the TLB for the PCI->CPU Memory Windows
- *
- * The RC32334 has fixed physical memory windows for CPU->PCI memory and I/O
- * access. Two of the memory windows are in kuseg (4000_0000 and 6000_0000).
- * To better support vxWorks AE in the future, the TLB is employed to map
- * these regions into kseg2 virtual addresses.
- *
- * RETURNS: N/A
- */
- LOCAL void sysPciTlbInit (void)
- {
- UINT32 tlbAttrib; /* TLB page attribute */
- UINT32 tlbHi; /* TLB Hi register value */
- UINT32 tlbLo0; /* TLB Lo0 register value */
- UINT32 tlbLo1; /* TLB Lo1 register value */
- UINT32 pageSize; /* Page size of mapped memory */
- UINT32 pageFrame; /* Page frame portion of TLB Lo regs */
- UINT32 tlbInx; /* TLB index */
- /* Set Page size to 16 Mb. */
- pageSize = PCI_MMU_PAGEMASK;
- pageSize = (pageSize << (PAGEMASK_SHIFT));
- sysSetPageSize (pageSize);
- /* Uncached, Dirty, Global and Valid MMU page */
- tlbAttrib = PCI_MMU_PAGEATTRIB;
- /*
- * MMU mapping for PCI_MEMORY_SPACE1
- * Map 16MB pages
- * Virtual 0xE0000000-0xE0ffffff to Physical 0x40000000 - 0x40ffffff
- * Virtual 0xE1000000-0xE1ffffff to Physical 0x41000000 - 0x41ffffff
- */
- tlbHi = PCI_MEMORY_SPACE1_VIRT ; /* VPN2:VirtualPageframeNumber%2 */
- tlbHi = (tlbHi & TLB_HI_MASK);
- pageFrame = PCI_MEMORY_SPACE1_PHYS;
- pageFrame = pageFrame >> TLB_LO_SHIFT; /* Even PFN:Page Frame Number */
- tlbLo0 = pageFrame;
- tlbLo0 = (tlbLo0 | tlbAttrib);
- tlbLo0 = (tlbLo0 & TLB_LO_MASK);
- pageFrame = (PCI_MEMORY_SPACE1_PHYS | PCI_TLB_PAGE_SIZE);
- pageFrame = pageFrame >> TLB_LO_SHIFT ; /* Odd PFN:Page Frame Number */
- tlbLo1 = pageFrame;
- tlbLo1 = (tlbLo1 | tlbAttrib);
- tlbLo1 = (tlbLo1 & TLB_LO_MASK);
- tlbInx = 0;
- sysSetTlbEntry (tlbInx, tlbHi, tlbLo0, tlbLo1);
- /*
- * MMU mapping for PCI_MEMORY_SPACE2
- * Virtual 0xF0000000-0xF0ffffff to Physical 0x60000000 - 0x60ffffff
- * Virtual 0xF1000000-0xF1ffffff to Physical 0x61000000 - 0x61ffffff
- */
- tlbHi = PCI_MEMORY_SPACE2_VIRT; /* VPN2 */
- tlbHi = (tlbHi & TLB_HI_MASK);
- pageFrame = PCI_MEMORY_SPACE2_PHYS;
- pageFrame = pageFrame >> TLB_LO_SHIFT; /* Even PFN */
- tlbLo0 = pageFrame;
- tlbLo0 = (tlbLo0 | tlbAttrib);
- tlbLo0 = (tlbLo0 & TLB_LO_MASK);
- pageFrame = (PCI_MEMORY_SPACE2_PHYS | PCI_TLB_PAGE_SIZE );
- pageFrame = pageFrame >> TLB_LO_SHIFT; /* Odd PFN */
- tlbLo1 = pageFrame;
- tlbLo1 = (tlbLo1 | tlbAttrib);
- tlbLo1 = (tlbLo1 & TLB_LO_MASK);
- tlbInx = 1;
- sysSetTlbEntry (tlbInx, tlbHi, tlbLo0, tlbLo1);
- }
- /***************************************************************************
- *
- * sysPciHostBridgeInit - Initialize RC32438 PCI host bridge
- *
- * RETURNS: N/A
- */
- LOCAL void sysPciHostBridgeInit (void)
- {
- int loopCount = 0;
- volatile UINT32 pcicValue = 0;
- volatile UINT32 pcicData = 0;
- volatile UINT32 dummyRead = 0;
- volatile UINT32 pciCntlVal;
- volatile UINT32 pciConfigAddr;
- unsigned int IDT32438CnfgRegs[25] = {
- IDT32438_CNFG0,
- IDT32438_CNFG1,
- IDT32438_CNFG2,
- IDT32438_CNFG3,
- IDT32438_CNFG4,
- IDT32438_CNFG5,
- IDT32438_CNFG6,
- IDT32438_CNFG7,
- IDT32438_CNFG8,
- IDT32438_CNFG9,
- IDT32438_CNFG10,
- IDT32438_CNFG11,
- IDT32438_CNFG12,
- IDT32438_CNFG13,
- IDT32438_CNFG14,
- IDT32438_CNFG15,
- IDT32438_CNFG16,
- IDT32438_CNFG17,
- IDT32438_CNFG18,
- IDT32438_CNFG19,
- IDT32438_CNFG20,
- IDT32438_CNFG21,
- IDT32438_CNFG22,
- IDT32438_CNFG23,
- IDT32438_CNFG24
- };
- pcicValue = PCI.pcic;
- pcicValue = (pcicValue >> PCIM_SHFT) & PCIM_BIT_LEN;
- if (!((pcicValue == PCIM_H_EA) ||
- (pcicValue == PCIM_H_IA_FIX) ||
- (pcicValue == PCIM_H_IA_RR)))
- {
- /* Not in Host mode, return ERROR */
- }
- /*
- * Enable the PCI, while doing so also enable the Idle Grant mode & Enable
- * Arbiter Parking
- */
- pcicData = PCI.pcic;
- pcicData |= (PCIC_IGM |PCIC_EAP |PCIC_EN);
- PCI.pcic = pcicData;
- /*
- * Check if the reset is done by looking at the PCI status Reset in Progress */
- for( ; ; )
- {
- pcicData = PCI.pcis ;
- if( !(pcicData & PCIS_RIP) )
- break ;
- }
- /* Zero out the PCI status */
- PCI.pcis = 0;
- PCI.pcism = 0xFFFFFFFF;
- PCI.pcidac = 0; /* disable PCI decoupled accesses at */
- /* initialization */
- PCI.pcidas = 0; /* clear the status */
- PCI.pcidasm = 0x0000007F; /* Mask all the interrupts */
- PCI_MSG.pciiic = 0;
- PCI_MSG.pciiim = 0xFFFFFFFF;
- PCI_MSG.pcioic = 0;
- PCI_MSG.pcioim = 0;
- /* Setup PCILB0 as Memory Window */
- PCI.pcilba0 = (UINT32)PCI_MEMORY_SPACE1_PHYS;
- /* flush the CPU write Buffers */
- /* setup the PCI map address as same as the local address */
- PCI.pcilba0m = (UINT32)(CPU_TO_PCI_MEM_BASE1);
- /* flush the CPU write Buffers */
- /* setup the PCI address window */
- /* Setup PCILBA1 as MEM Window */
- PCI.pcilba0c = (PCILBAXC_SB|PCILBAXC_SIZE(SIZE_128MB));
- dummyRead = PCI.pcilba0c; /* flush the CPU write Buffers */
- PCI.pcilba1 = (UINT32) PCI_MEMORY_SPACE2_PHYS;
- PCI.pcilba1m = (UINT32) ( PCI_MEMORY_SPACE2_VIRT);
- PCI.pcilba1c = (PCILBAXC_SIZE(SIZE_1MB) | PCILBAXC_SB );
- dummyRead = PCI.pcilba1c; /* flush the CPU write Buffers */
- /* Setup PCILBA2 as IO */
- PCI.pcilba2 = (UINT32) 0x0;
- PCI.pcilba2m = (UINT32) 0x0;
- PCI.pcilba2c = (UINT32) 0x0;
- dummyRead = PCI.pcilba2c; /* flush the CPU write Buffers */
- /* Setup PCILBA3 as IO Window */
- PCI.pcilba3 = (UINT32) (PCI_IO_SPACE1_PHYS);
- PCI.pcilba3m = (UINT32) (PCI_IO_SPACE1_VIRT);;
- PCI.pcilba3c = (PCILBAXC_SIZE(SIZE_1MB) | PCILBAXC_MSI | PCILBAXC_SB);
- dummyRead = PCI.pcilba3c; /* flush the CPU write Buffers */
- /* Proceed with Host Bridge PCI Configuration register setting */
- pciConfigAddr = (UINT32)IDT32438_CONFIG0_ADDR;
- for (loopCount = 0; loopCount < 25; loopCount++)
- {
- PCI.pcicfga = pciConfigAddr;
- dummyRead = PCI.pcicfga;
- PCI.pcicfgd = IDT32438CnfgRegs[loopCount];
- dummyRead = PCI.pcicfgd;
- pciConfigAddr += 4;
- }
- /* Reset the target not ready bit in the PCI control register */
- pciCntlVal = PCI.pcic;
- pciCntlVal &= ~(PCIC_TNR);
- PCI.pcic = pciCntlVal;
- }
- /******************************************************************************
- *
- * sysPciAutoConfigInclude - Determine if function is to be autoConfigured
- *
- * This function is called with PCI bus, device, function, and vendor
- * information. It returns an indication of whether or not the particular
- * function should be included in the automatic configuration process.
- * This capability is useful if it is desired that a particular function
- * NOT be automatically configured. Of course, if the device is not
- * included in automatic configuration, it will be unusable unless the
- * user's code made provisions to configure the function outside of the
- * the automatic process.
- *
- * RETURNS: OK if device is to be included in automatic configuration,
- * ERROR otherwise.
- */
- LOCAL STATUS sysPciAutoConfigInclude
- (
- PCI_SYSTEM *pSys, /* input: AutoConfig system information */
- PCI_LOC *pciLoc, /* input: PCI address of this function */
- UINT devVend /* input: Device/vendor ID number */
- )
- {
- BOOL retVal = OK; /* default to included */
- switch (devVend)
- {
- /* Exclude the RC32438 host bridge from auto-config */
- case IDT32438_DEV_VEND:
- retVal = ERROR;
- break;
- default:
- retVal = OK;
- break;
- }
- return retVal;
- }
- /*******************************************************************************
- * sysPciAutoConfig - PCI autoConfig support routine
- *
- * This routine instantiates the PCI_SYSTEM structure needed to configure
- * the system, calls pciAutoConfig to perform the configuration, and
- * then calls device-specific PCI initialization routines.
- *
- * RETURNS: N/A
- */
- void sysPciAutoConfig (void)
- {
- /* Configuration space parameters */
- sysParams.cacheSize = IDT32438_CACHE_LINE_SIZE;
- sysParams.maxLatency = PCI_MAX_LATENCY;
- sysParams.autoIntRouting = TRUE;
- sysParams.includeRtn = sysPciAutoConfigInclude;
- sysParams.intAssignRtn = NULL;
- sysParams.bridgePreConfigInit = NULL;
- sysParams.bridgePostConfigInit = NULL;
- /* Configure the memory ranges for the PCI spaces */
- /* 32-bit Non-prefetchable Memory Space */
- sysParams.pciMemIo32 = CPU_TO_PCI_MEM_BASE1;
- sysParams.pciMemIo32Size = CPU_TO_PCI_MEM_SIZE1;
- /* 32-bit Prefetchable Memory Space
- * From the CPU's perspective, this memory area has the same
- * attributes as the "non-prefectable", above. (see sysPciTlbInit()).
- * No caching is enabled, and no prefetching actually occurs.
- * The initialization of these fields in the parameter structure
- * is simply to allow PCI auto-config to utilize this memory.
- */
- sysParams.pciMem32 = CPU_TO_PCI_MEM_BASE2;
- sysParams.pciMem32Size = CPU_TO_PCI_MEM_SIZE2;
- /* 16-bit ISA I/O Space - First block of memory in the I/O space */
- sysParams.pciIo16 = CPU_TO_PCI_IO_BASE;
- sysParams.pciIo16Size = CPU_TO_PCI_IO16_SIZE;
- /* 32-bit PCI I/O Space - Remaining memory in the I/O space */
- sysParams.pciIo32 = CPU_TO_PCI_IO_BASE + CPU_TO_PCI_IO16_SIZE;
- sysParams.pciIo32Size = CPU_TO_PCI_IO_SIZE - CPU_TO_PCI_IO16_SIZE;
- /* Perform autoconfiguration */
- sysPciBusErrDisable ();
- pciAutoConfig (&sysParams);
- sysPciBusErrEnable ();
- /* Now configure devices that were exposed by the autoconfig... */
- #if defined (INCLUDE_FEI_END)
- sys557PciInit ();
- #endif
- }