LED_7scan.vhd
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上传日期：2022-07-03
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-- Company:
-- Engineer:
--
-- Create Date: 09:47:37 03/11/2010
-- Design Name:
-- Module Name: saomiao - Behavioral
-- Project Name:
-- Target Devices:
-- Tool versions:
-- Description:
--
-- Dependencies:
--
-- Revision:
-- Revision 0.01 - File Created
-- Additional Comments:
--
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library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.STD_LOGIC_ARITH.ALL;
use IEEE.STD_LOGIC_UNSIGNED.ALL;
---- Uncomment the following library declaration if instantiating
---- any Xilinx primitives in this code.
--library UNISIM;
--use UNISIM.VComponents.all;
entity LED_7scan is
Port (
i_led0 : in STD_LOGIC_VECTOR (7 downto 0);
i_led1 : in STD_LOGIC_VECTOR (7 downto 0);
i_led2 : in STD_LOGIC_VECTOR (7 downto 0);
i_led3 : in STD_LOGIC_VECTOR (7 downto 0);
clk: in STD_LOGIC;
ledout : out STD_LOGIC_VECTOR (7 downto 0);
sel : out STD_LOGIC_VECTOR (3 downto 0));
end LED_7scan;
architecture Behavioral of LED_7scan is
signal m: integer range 0 to 3;
signal num: STD_LOGIC_VECTOR(7 DOWNTO 0);
signal num_wo_dp: STD_LOGIC_VECTOR(7 DOWNTO 0);
-- signal led_now: STD_LOGIC_VECTOR(7 DOWNTO 0);
signal led_now_wo_dp: STD_LOGIC_VECTOR(6 DOWNTO 0);
signal dp: STD_LOGIC;
begin
s1: process(clk)
begin
if(clk'event and clk='1') then
case m is
when 0=> m<=1;
when 1=> m<=2;
when 2=> m<=3;
when 3=> m<=0;
when others => m<=0;
end case;
end if;
end process;
s2: process(m)
begin
case m is
when 0=> sel<="0001";
when 1=> sel<="0010";
when 2=> sel<="0100";
when 3=> sel<="1000";
when others => sel<="0000";
end case;
end process;
s3:process(m)
begin
case m is
when 0=> num<=i_led0;
when 1=> num<=i_led1;
when 2=> num<=i_led2;
when 3=> num<=i_led3;
when others=> num<="00000000";
end case;
end process;
s4:process(num)
begin
num_wo_dp <= num and "01111111";
- if led_now_wo_dp="0000000" then
dp <= '0';
- else dp <= num(7);
end if;
end process;
s5: process(num_wo_dp)
begin
case num_wo_dp is
when "00000000" =>
led_now_wo_dp<="0111111" ;
when "00000001" =>
led_now_wo_dp<="0000110" ;
when "00000010" =>
led_now_wo_dp<="1011011" ;
when "00000011" =>
led_now_wo_dp<="1001111" ;
when "00000100" =>
led_now_wo_dp<="1100110" ;
when "00000101" =>
led_now_wo_dp<="1101101" ;
when "00000110" =>
led_now_wo_dp<="1111101" ;
when "00000111" =>
led_now_wo_dp<="0000111" ;
when "00001000" =>
led_now_wo_dp<="1111111" ;
when "00001001" =>
led_now_wo_dp<="1101111" ;
when others =>
led_now_wo_dp<="0000000" ;
end case;
end process;
s6:process(led_now_wo_dp,dp)
begin
ledout<= dp & led_now_wo_dp;
end process;
end Behavioral;
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