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at91sam9g20-ek-sdram.ini：源码内容
							// ----------------------------------------------------------------------------
//         ATMEL Microcontroller Software Support 
// ----------------------------------------------------------------------------
// Copyright (c) 2008, Atmel Corporation
//
// All rights reserved.
//
// Redistribution and use in source and binary forms, with or without
// modification, are permitted provided that the following conditions are met:
//
// - Redistributions of source code must retain the above copyright notice,
// this list of conditions and the disclaimer below.
//
// Atmel's name may not be used to endorse or promote products derived from
// this software without specific prior written permission.
//
// DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
// IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
// MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
// DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
// INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
// OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
// LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
// NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
// EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
// ----------------------------------------------------------------------------
//----------------------------------------------------------------------------
//  File Name           : at91sam9260-ek-sdram.ini
//  Object              : Generic Macro File for KEIL
//----------------------------------------------------------------------------
//----------------------------------------------------------------------------
// MapRamAt0()
// Function description: Maps RAM at 0.
//----------------------------------------------------------------------------
FUNC void MapRamAt0(){
	
    printf ("Changing mapping: RAM mapped to 0 n");
    _WDWORD(0xFFFFEF00,0x03);
}
//----------------------------------------------------------------------------
// InitRSTC()
// Function description
//   Initializes the RSTC (Reset controller).
//   This makes sense since the default is to not allow user resets, which makes it impossible to
//   apply a second RESET via J-Link
//----------------------------------------------------------------------------
FUNC void InitRSTC() {
    _WDWORD(0xA5000001,0xFFFFFD08);    // Allow user reset
}
//------------------------------------------------------------------------------
// Configures the master clock at the best possible frequency.
//------------------------------------------------------------------------------
FUNC void ConfigureMck()
{
    __message "------------------------------- PLL @133MHz ----------------------------------";
    // If clock is already configured, reset settings
    if ((__readMemory32(0xFFFFFC30") & 0x3) != 0) {
        // Disable interrupts and clocks
        _WDWORD(0xFFFFFC64,0xFFFFFFFF); // PMC_IDR
        _WDWORD(0xFFFFFC14,0xFFFFFFFF); // PMC_PCDR
        _WDWORD(0xFFFFFC04,0xFFFFFFFE); // PMC_SCDR
        // Switch to main oscillator
        _WDWORD(0xFFFFFC30,0x00000001); // PMC_MCKR
        _sleep_(10);
        // Set default PLL settings
        _WDWORD(0xFFFFFC28, 0x00003F00); // PMC_PLLAR
        _WDWORD(0xFFFFFC2C,0x00003F00); // PMC_PLLBR
        _sleep_(10);
    }
    // Enable mainosc
    _WDWORD(0xFFFFFC20,0x00004001);
    _sleep_(10);
    // Switch to mainosc
    _WDWORD(0xFFFFFC30,0x00000001);
    _sleep_(10);
    // Configure PLLA
    _WDWORD(0xFFFFFC28,0x202A3F01);
    _sleep_(10);
    // Configure PLLB
    _WDWORD(0xFFFFFC2C,0x10193F05);
    _sleep_(10);
    // Switch main oscillator + prescaler
    _WDWORD(0xFFFFFC30,0x00001300);
    _sleep_(10);
    
    // Switch to PLL + prescaler
    _WDWORD(0xFFFFFC30,0x00001302);
    _sleep_(10);
}
//------------------------------------------------------------------------------
// Configures the SDRAM controller.
//------------------------------------------------------------------------------
FUNC void ConfigureSdram()
{
    // Enable EBI chip select
    _WDWORD(0xFFFFEF1C,0x00000002);
    
    // Enable PC16-PC31 pins
    _WDWORD(0xFFFFF870,0xFFFF0000);
    _WDWORD(0xFFFFF874,0x00000000);
    _WDWORD(0xFFFFF804,0xFFFF0000);
    
    // Load SDRAM configuration
    _WDWORD(0xFFFFEA08,0x96338379);
    // Initialize SDRAM
    _WDWORD(0xFFFFEA00,0x00000001);
    _WDWORD(0x20000000,0x00000000);
    _WDWORD(0xFFFFEA00,0x00000002);
    _WDWORD(0x20000000,0x00000000);
    _WDWORD(0xFFFFEA00,0x00000004);
    _WDWORD(0x20000000,0x00000000);
    _WDWORD(0xFFFFEA00,0x00000004);
    _WDWORD(0x20000000,0x00000000);
    _WDWORD(0xFFFFEA00,0x00000004);
    _WDWORD(0x20000000,0x00000000);
    _WDWORD(0xFFFFEA00,0x00000004);
    _WDWORD(0x20000000,0x00000000);
    _WDWORD(0xFFFFEA00,0x00000004);
    _WDWORD(0x20000000,0x00000000);
    _WDWORD(0xFFFFEA00,0x00000004);
    _WDWORD(0x20000000,0x00000000);
    _WDWORD(0xFFFFEA00,0x00000004);
    _WDWORD(0x20000000,0x00000000);
    _WDWORD(0xFFFFEA00,0x00000004);
    _WDWORD(0x20000000,0x00000000);
    _WDWORD(0xFFFFEA00,0x00000003);
    _WDWORD(0x20000000,0x00000000);
    _WDWORD(0xFFFFEA00,0x00000000);
    _WDWORD(0x20000000,0x00000000);
    // Set refresh rate
    _WDWORD(0xFFFFEA04,0x0000039D);
}
// Remap
    MapRamAt0();
//  Configure clock
    ConfigureMck();
// Configure the SDRAM
    ConfigureSdram();
// Enable user reset    
    InitRSTC();  
     
LOAD at91sam9g20-sdram\at91sam9g20-sdram.axf INCREMENTAL
PC = 0x20000000;
g,main

						