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SPCE061A.inc
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上传用户：sdjqgc
上传日期：2022-08-06
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文件大小：13k
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嵌入式/单片机编程

开发平台：

Asm

SPCE061A.inc：源码内容
  1. // ========================================================================= //
  2. // File Name   : SPCE061A.inc  //
  3. // Description : SPCE061A register definitions  //
  4. // Processor   : SPCE061A  //
  5. // Revision    : v1.00, 2005-10-19  //
  6. // ========================================================================= //
  8. //***************************************************************************//
  9. // Register definitions  //
  10. //***************************************************************************//
  12. // IO port control registers
  13. .DEFINE P_IOA_Data 0x7000
  14. .DEFINE P_IOA_Buffer 0x7001
  15. .DEFINE P_IOA_Dir 0x7002
  16. .DEFINE P_IOA_Attrib 0x7003
  17. .DEFINE P_IOA_Latch 0x7004
  19. .DEFINE P_IOB_Data 0x7005
  20. .DEFINE P_IOB_Buffer 0x7006
  21. .DEFINE P_IOB_Dir 0x7007
  22. .DEFINE P_IOB_Attrib 0x7008
  24. // Timer control registers
  25. .DEFINE P_TimerA_Data 0x700A
  26. .DEFINE P_TimerA_Ctrl 0x700B
  27. .DEFINE P_TimerB_Data 0x700C
  28. .DEFINE P_TimerB_Ctrl 0x700D
  30. // Timebase control registers
  31. .DEFINE P_TimeBase_Setup 0x700E
  32. .DEFINE P_Timebase_Setup 0x700E // Same as P_TimeBase_Setup
  33. .DEFINE P_TimeBase_Clear 0x700F
  34. .DEFINE P_Timebase_Clear 0x700F // Same as P_TimeBase_Clear
  36. // Interrupt control registers
  37. .DEFINE P_INT_Ctrl 0x7010
  38. .DEFINE P_INT_Clear 0x7011
  39. .DEFINE P_INT_Mask 0x702D
  40. .DEFINE P_INT_Ctrl_New 0x702D // Same as P_INT_Mask
  42. // Analog functions control registers
  43. .DEFINE P_ADC 0x7014
  44. .DEFINE P_ADC_Ctrl 0x7015
  45. .DEFINE P_ADC_MUX_Ctrl 0x702B
  46. .DEFINE P_ADC_MUX_Data 0x702C
  47. .DEFINE P_ADC_LINEIN_Data 0x702C // Same as P_ADC_MUX_Data
  48. .DEFINE P_ADC_LineIn_Data 0x702C // Same as P_ADC_MUX_Data
  50. .DEFINE P_DAC_Ctrl 0x702A
  51. .DEFINE P_DAC1 0x7017
  52. .DEFINE P_DAC2 0x7016
  54. // Serial functions control registers
  55. .DEFINE P_SIO_Data 0x701A
  56. .DEFINE P_SIO_Addr_Low 0x701B
  57. .DEFINE P_SIO_Addr_Mid 0x701C
  58. .DEFINE P_SIO_Addr_High 0x701D
  59. .DEFINE P_SIO_Ctrl 0x701E
  60. .DEFINE P_SIO_Start 0x701F
  61. .DEFINE P_SIO_Stop 0x7020
  63. .DEFINE P_UART_Command1 0x7021
  64. .DEFINE P_UART_Command2 0x7022
  65. .DEFINE P_UART_Data 0x7023
  66. .DEFINE P_UART_BaudScalarLow 0x7024
  67. .DEFINE P_UART_BaudScalarHigh 0x7025
  69. // Other control registers
  70. .DEFINE P_Feedback 0x7009
  71. .DEFINE P_SystemClock 0x7013
  72. .DEFINE P_Watchdog_Clear 0x7012
  73. .DEFINE P_LVD_Ctrl 0x7019
  74. .DEFINE P_Flash_Ctrl 0x7555
  77. //***************************************************************************//
  78. // Constant definitions  //
  79. //***************************************************************************//
  80. // Constants for interrupt
  81. .DEFINE C_FIQ_PWM 0x8000 // P_INT_Ctrl
  82. .DEFINE C_FIQ_TMA 0x2000 // P_INT_Ctrl
  83. .DEFINE C_FIQ_TMB 0x0800 // P_INT_Ctrl
  84. .DEFINE C_IRQ0_PWM 0x4000 // P_INT_Ctrl
  85. .DEFINE C_IRQ1_TMA 0x1000 // P_INT_Ctrl
  86. .DEFINE C_IRQ2_TMB 0x0400 // P_INT_Ctrl
  87. .DEFINE C_IRQ3_KEY 0x0080 // P_INT_Ctrl
  88. .DEFINE C_IRQ3_EXT1 0x0100 // P_INT_Ctrl
  89. .DEFINE C_IRQ3_EXT2 0x0200 // P_INT_Ctrl
  90. .DEFINE C_IRQ4_1KHz 0x0010 // P_INT_Ctrl
  91. .DEFINE C_IRQ4_2KHz 0x0020 // P_INT_Ctrl
  92. .DEFINE C_IRQ4_4KHz 0x0040 // P_INT_Ctrl
  93. .DEFINE C_IRQ5_2Hz 0x0004 // P_INT_Ctrl
  94. .DEFINE C_IRQ5_4Hz 0x0008 // P_INT_Ctrl
  95. .DEFINE C_IRQ6_TMB1 0x0002 // P_INT_Ctrl
  96. .DEFINE C_IRQ6_TMB2 0x0001 // P_INT_Ctrl
  98. // Constants for TimerA & TimerB
  99. .DEFINE C_TMA1_FOSC_2 0x0000 // P_TimerA_Ctrl
  100. .DEFINE C_TMA1_FOSC_256 0x0001 // P_TimerA_Ctrl
  101. .DEFINE C_TMA1_32KHz 0x0002 // P_TimerA_Ctrl
  102. .DEFINE C_TMA1_8KHz 0x0003 // P_TimerA_Ctrl
  103. .DEFINE C_TMA1_4KHz 0x0004 // P_TimerA_Ctrl
  104. .DEFINE C_TMA1_1 0x0005 // P_TimerA_Ctrl
  105. .DEFINE C_TMA1_0 0x0006 // P_TimerA_Ctrl
  106. .DEFINE C_TMA1_EXT1 0x0007 // P_TimerA_Ctrl
  107. .DEFINE C_TMA2_2KHz 0x0000 // P_TimerA_Ctrl
  108. .DEFINE C_TMA2_1KHz 0x0008 // P_TimerA_Ctrl
  109. .DEFINE C_TMA2_256Hz 0x0010 // P_TimerA_Ctrl
  110. .DEFINE C_TMA2_TMB1 0x0018 // P_TimerA_Ctrl
  111. .DEFINE C_TMA2_4Hz 0x0020 // P_TimerA_Ctrl
  112. .DEFINE C_TMA2_2Hz 0x0028 // P_TimerA_Ctrl
  113. .DEFINE C_TMA2_1 0x0030 // P_TimerA_Ctrl
  114. .DEFINE C_TMA2_EXT2 0x0038 // P_TimerA_Ctrl
  115. .DEFINE C_TMA_PWM_OFF 0x0000 // P_TimerA_Ctrl
  116. .DEFINE C_TMA_PWM_D1 0x0040 // P_TimerA_Ctrl
  117. .DEFINE C_TMA_PWM_D2 0x0080 // P_TimerA_Ctrl
  118. .DEFINE C_TMA_PWM_D3 0x00C0 // P_TimerA_Ctrl
  119. .DEFINE C_TMA_PWM_D4 0x0100 // P_TimerA_Ctrl
  120. .DEFINE C_TMA_PWM_D5 0x0140 // P_TimerA_Ctrl
  121. .DEFINE C_TMA_PWM_D6 0x0180 // P_TimerA_Ctrl
  122. .DEFINE C_TMA_PWM_D7 0x01C0 // P_TimerA_Ctrl
  123. .DEFINE C_TMA_PWM_D8 0x0200 // P_TimerA_Ctrl
  124. .DEFINE C_TMA_PWM_D9 0x0240 // P_TimerA_Ctrl
  125. .DEFINE C_TMA_PWM_D10 0x0280 // P_TimerA_Ctrl
  126. .DEFINE C_TMA_PWM_D11 0x02C0 // P_TimerA_Ctrl
  127. .DEFINE C_TMA_PWM_D12 0x0300 // P_TimerA_Ctrl
  128. .DEFINE C_TMA_PWM_D13 0x0340 // P_TimerA_Ctrl
  129. .DEFINE C_TMA_PWM_D14 0x0380 // P_TimerA_Ctrl
  130. .DEFINE C_TMA_PWM_TA 0x03C0 // P_TimerA_Ctrl
  131.     
  132. .DEFINE C_TMB_FOSC_2 0x0000 // P_TimerB_Ctrl
  133. .DEFINE C_TMB_FOSC_256 0x0001 // P_TimerB_Ctrl
  134. .DEFINE C_TMB_32KHz 0x0002 // P_TimerB_Ctrl
  135. .DEFINE C_TMB_8KHz 0x0003 // P_TimerB_Ctrl
  136. .DEFINE C_TMB_4KHz 0x0004 // P_TimerB_Ctrl
  137. .DEFINE C_TMB_1 0x0005 // P_TimerB_Ctrl
  138. .DEFINE C_TMB_0 0x0006 // P_TimerB_Ctrl
  139. .DEFINE C_TMB_EXT1 0x0007 // P_TimerB_Ctrl
  140. .DEFINE C_TMB_PWM_OFF 0x0000 // P_TimerB_Ctrl
  141. .DEFINE C_TMB_PWM_D1 0x0040 // P_TimerB_Ctrl
  142. .DEFINE C_TMB_PWM_D2 0x0080 // P_TimerB_Ctrl
  143. .DEFINE C_TMB_PWM_D3 0x00C0 // P_TimerB_Ctrl
  144. .DEFINE C_TMB_PWM_D4 0x0100 // P_TimerB_Ctrl
  145. .DEFINE C_TMB_PWM_D5 0x0140 // P_TimerB_Ctrl
  146. .DEFINE C_TMB_PWM_D6 0x0180 // P_TimerB_Ctrl
  147. .DEFINE C_TMB_PWM_D7 0x01C0 // P_TimerB_Ctrl
  148. .DEFINE C_TMB_PWM_D8 0x0200 // P_TimerB_Ctrl
  149. .DEFINE C_TMB_PWM_D9 0x0240 // P_TimerB_Ctrl
  150. .DEFINE C_TMB_PWM_D10 0x0280 // P_TimerB_Ctrl
  151. .DEFINE C_TMB_PWM_D11 0x02C0 // P_TimerB_Ctrl
  152. .DEFINE C_TMB_PWM_D12 0x0300 // P_TimerB_Ctrl
  153. .DEFINE C_TMB_PWM_D13 0x0340 // P_TimerB_Ctrl
  154. .DEFINE C_TMB_PWM_D14 0x0380 // P_TimerB_Ctrl
  155. .DEFINE C_TMB_PWM_TB 0x03C0 // P_TimerB_Ctrl
  157. // Constants for TimeBase
  158. .DEFINE C_TMB1_8Hz 0x0000 // P_Timebase_Setup
  159. .DEFINE C_TMB1_16Hz 0x0001 // P_Timebase_Setup
  160. .DEFINE C_TMB1_32Hz 0x0002 // P_Timebase_Setup
  161. .DEFINE C_TMB1_64Hz 0x0003 // P_Timebase_Setup
  162. .DEFINE C_TMB2_128Hz 0x0000 // P_Timebase_Setup
  163. .DEFINE C_TMB2_256Hz 0x0004 // P_Timebase_Setup
  164. .DEFINE C_TMB2_512Hz 0x0008 // P_Timebase_Setup
  165. .DEFINE C_TMB2_1024Hz 0x000c // P_Timebase_Setup
  167. // Constants for system clock
  168. .DEFINE C_Fosc_49M 0x0080 // P_SystemClock
  169. .DEFINE C_Fosc_40M 0x0060 // P_SystemClock
  170. .DEFINE C_Fosc_32M 0x0040 // P_SystemClock
  171. .DEFINE C_Fosc_24M 0x0000 // P_SystemClock
  172. .DEFINE C_Fosc_20M 0x0020 // P_SystemClock
  173.     
  174. .DEFINE C_Fosc 0x0000 // P_SystemClock
  175. .DEFINE C_Fosc_Div_2 0x0001 // P_SystemClock
  176. .DEFINE C_Fosc_Div_4 0x0002 // P_SystemClock
  177. .DEFINE C_Fosc_Div_8 0x0003 // P_SystemClock
  178. .DEFINE C_Fosc_Div_16 0x0004 // P_SystemClock
  179. .DEFINE C_Fosc_Div_32 0x0005 // P_SystemClock
  180. .DEFINE C_Fosc_Div_64 0x0006 // P_SystemClock
  181. .DEFINE C_Sleep 0x0007 // P_SystemClock
  183. .DEFINE C_StrongMode 0x0008 // P_SystemClock
  184. .DEFINE C_AutoMode 0x0000 // P_SystemClock
  185. .DEFINE C_32K_Work 0x0010 // P_SystemClock
  186. .DEFINE C_32K_Off 0x0000 // P_SystemClock
  188. // Constants for ADC & DAC
  189. .DEFINE C_ADC_EN 0x0001 // P_ADC_Ctrl
  190. .DEFINE C_ADC_DIS 0x0000 // P_ADC_Ctrl
  191. .DEFINE C_MIC_RDY 0x8000 // P_ADC_Ctrl
  192. .DEFINE C_MIC_EN 0x0000 // P_ADC_Ctrl
  193. .DEFINE C_MIC_DIS 0x0002 // P_ADC_Ctrl
  194. .DEFINE C_MIC_AGC_EN 0x0000 // P_ADC_Ctrl
  195. .DEFINE C_MIC_AGC_DIS 0x0000 // P_ADC_Ctrl
  196. .DEFINE C_VEXTREF_EN 0x0080 // P_ADC_Ctrl
  197. .DEFINE C_VEXTREF_DIS 0x0000 // P_ADC_Ctrl
  198. .DEFINE C_2V_EN 0x0100 // P_ADC_Ctrl
  199. .DEFINE C_2V_DIS 0x0000 // P_ADC_Ctrl
  200. .DEFINE C_DAC_3mA 0x0040 // P_ADC_Ctrl
  201. .DEFINE C_DAC_2mA 0x0000 // P_ADC_Ctrl
  203. .DEFINE C_ADC_MUX_MIC 0x0000 // P_ADC_MUX_Ctrl
  204. .DEFINE C_ADC_MUX_IOA0 0x0001 // P_ADC_MUX_Ctrl
  205. .DEFINE C_ADC_MUX_IOA1 0x0002 // P_ADC_MUX_Ctrl
  206. .DEFINE C_ADC_MUX_IOA2 0x0003 // P_ADC_MUX_Ctrl
  207. .DEFINE C_ADC_MUX_IOA3 0x0004 // P_ADC_MUX_Ctrl
  208. .DEFINE C_ADC_MUX_IOA4 0x0005 // P_ADC_MUX_Ctrl
  209. .DEFINE C_ADC_MUX_IOA5 0x0006 // P_ADC_MUX_Ctrl
  210. .DEFINE C_ADC_MUX_IOA6 0x0007 // P_ADC_MUX_Ctrl
  211. .DEFINE C_LINEIN_FAIL 0x4000 // P_ADC_MUX_Ctrl
  212. .DEFINE C_LINEIN_RDY 0x8000 // P_ADC_MUX_Ctrl
  214. .DEFINE C_DAC1_DIRECT 0x0000 // P_DAC_Ctrl
  215. .DEFINE C_DAC1_LATCH_A 0x0080 // P_DAC_Ctrl
  216. .DEFINE C_DAC1_LATCH_B 0x0100 // P_DAC_Ctrl
  217. .DEFINE C_DAC1_LATCH_AB 0x0180 // P_DAC_Ctrl
  218. .DEFINE C_DAC2_DIRECT 0x0000 // P_DAC_Ctrl
  219. .DEFINE C_DAC2_LATCH_A 0x0020 // P_DAC_Ctrl
  220. .DEFINE C_DAC2_LATCH_B 0x0040 // P_DAC_Ctrl
  221. .DEFINE C_DAC2_LATCH_AB 0x0060 // P_DAC_Ctrl
  222. .DEFINE C_MIC_DIRECT 0x0000 // P_DAC_Ctrl
  223. .DEFINE C_MIC_LATCH_A 0x0008 // P_DAC_Ctrl
  224. .DEFINE C_MIC_LATCH_B 0x0010 // P_DAC_Ctrl
  225. .DEFINE C_MIC_LATCH_AB 0x0018 // P_DAC_Ctrl
  226. .DEFINE C_DAC_DIS 0x0002 // P_DAC_Ctrl
  228. // Constants for SIO
  229. .DEFINE C_SIO_CONFIG 0x0080 // P_SIO_Ctrl
  230. .DEFINE C_SIO_READ 0x0000 // P_SIO_Ctrl
  231. .DEFINE C_SIO_WRITE 0x0040 // P_SIO_Ctrl
  232. .DEFINE C_SIO_CLOCK_32 0x0018 // P_SIO_Ctrl
  233. .DEFINE C_SIO_CLOCK_16 0x0000 // P_SIO_Ctrl
  234. .DEFINE C_SIO_CLOCK_8 0x0010 // P_SIO_Ctrl
  235. .DEFINE C_SIO_ADDR_24 0x0003 // P_SIO_Ctrl
  236. .DEFINE C_SIO_ADDR_16 0x0000 // P_SIO_Ctrl
  237. .DEFINE C_SIO_ADDR_8 0x0002 // P_SIO_Ctrl
  238. .DEFINE C_SIO_ADDR_NO 0x0001 // P_SIO_Ctrl
  240. .DEFINE C_SIO_BUSY 0x0080 // P_SIO_Start
  242. // Constants for UART
  243. .DEFINE C_UART_RX_INT 0x0080 // P_UART_Command1
  244. .DEFINE C_UART_TX_INT 0x0040 // P_UART_Command1
  245. .DEFINE C_UART_RESET 0x0020 // P_UART_Command1
  246. .DEFINE C_UART_PARITY_EVEN 0x0008 // P_UART_Command1
  247. .DEFINE C_UART_PARITY_ODD 0x0000 // P_UART_Command1
  248. .DEFINE C_UART_PARITY_EN 0x0004 // P_UART_Command1
  249. .DEFINE C_UART_PARITY_DIS 0x0000 // P_UART_Command1
  251. .DEFINE C_UART_RX_RDY 0x0080 // P_UART_Command2
  252. .DEFINE C_UART_TX_RDY 0x0040 // P_UART_Command2
  253. .DEFINE C_UART_RX_EN 0x0080 // P_UART_Command2
  254. .DEFINE C_UART_TX_EN 0x0040 // P_UART_Command2
  255. .DEFINE C_UART_PE 0x0008 // P_UART_Command2
  256. .DEFINE C_UART_OE 0x0010 // P_UART_Command2
  257. .DEFINE C_UART_FE 0x0020 // P_UART_Command2
  259. // Constants for Feedback
  260. .DEFINE C_FEEDBACK1_EN 0x0004 // P_Feedback
  261. .DEFINE C_FEEDBACK2_EN 0x0008 // P_Feedback
  262. .DEFINE C_IRTX_EN 0x0001 // P_Feedback
  264. // Constants for LVD
  265. .DEFINE C_LVD33V 0x0002 // P_LVD_Ctrl
  266. .DEFINE C_LVD29V 0x0001 // P_LVD_Ctrl
  268. // Other Constants
  269. .DEFINE C_WDTCLR 0x0001 // P_Watchdog_Clear
  271. ///////////////////////////////////////////////////////////////////
  272. // Old definitions for LVD @'hardware.inc'
  273. .DEFINE C_LVD24V 0x0000 // P_LVD_Ctrl
  274. .DEFINE C_LVD28V 0x0001 // P_LVD_Ctrl
  275. .DEFINE C_LVD32V 0x0002 // P_LVD_Ctrl
  276. .DEFINE C_LVD36V 0x0003 // P_LVD_Ctrl
  278. // Old definitions for TimerA & TimerB @'hardware.inc'
  279. .DEFINE C_Fosc_2 0x0000 // P_TimerA_Ctrl
  280. .DEFINE C_Fosc_256      0x0001 // P_TimerA_Ctrl
  281. .DEFINE C_32768Hz 0x0002 // P_TimerA_Ctrl
  282. .DEFINE C_8192Hz 0x0003 // P_TimerA_Ctrl
  283. .DEFINE C_4096Hz 0x0004 // P_TimerA_Ctrl
  284. .DEFINE C_A1 0x0005 // P_TimerA_Ctrl
  285. .DEFINE C_A0 0x0006 // P_TimerA_Ctrl
  286. .DEFINE C_Ext1 0x0007 // P_TimerA_Ctrl
  288. .DEFINE C_2048Hz 0x0000 // P_TimerA_Ctrl, P_TimerB_Ctrl
  289. .DEFINE C_1024Hz 0x0008 // P_TimerA_Ctrl, P_TimerB_Ctrl
  290. .DEFINE C_256Hz 0x0010 // P_TimerA_Ctrl, P_TimerB_Ctrl
  291. .DEFINE C_TMB1Hz 0x0018 // P_TimerA_Ctrl, P_TimerB_Ctrl
  292. .DEFINE C_4Hz 0x0020 // P_TimerA_Ctrl, P_TimerB_Ctrl
  293. .DEFINE C_2Hz 0x0028 // P_TimerA_Ctrl, P_TimerB_Ctrl
  294. .DEFINE C_B1 0x0030 // P_TimerA_Ctrl, P_TimerB_Ctrl
  295. .DEFINE C_Ext2 0x0038 // P_TimerA_Ctrl, P_TimerB_Ctrl
  297. .DEFINE C_Off 0x0000 // P_TimerA_Ctrl, P_TimerB_Ctrl
  298. .DEFINE C_D1 0x0040 // P_TimerA_Ctrl, P_TimerB_Ctrl
  299. .DEFINE C_D2 0x0080 // P_TimerA_Ctrl, P_TimerB_Ctrl
  300. .DEFINE C_D3 0x00C0 // P_TimerA_Ctrl, P_TimerB_Ctrl
  301. .DEFINE C_D4 0x0100 // P_TimerA_Ctrl, P_TimerB_Ctrl
  302. .DEFINE C_D5 0x0140 // P_TimerA_Ctrl, P_TimerB_Ctrl
  303. .DEFINE C_D6 0x0180 // P_TimerA_Ctrl, P_TimerB_Ctrl
  304. .DEFINE C_D7 0x01C0 // P_TimerA_Ctrl, P_TimerB_Ctrl
  305. .DEFINE C_D8 0x0200 // P_TimerA_Ctrl, P_TimerB_Ctrl
  306. .DEFINE C_D9 0x0240 // P_TimerA_Ctrl, P_TimerB_Ctrl
  307. .DEFINE C_D10 0x0280 // P_TimerA_Ctrl, P_TimerB_Ctrl
  308. .DEFINE C_D11 0x02C0 // P_TimerA_Ctrl, P_TimerB_Ctrl
  309. .DEFINE C_D12 0x0300 // P_TimerA_Ctrl, P_TimerB_Ctrl
  310. .DEFINE C_D13 0x0340 // P_TimerA_Ctrl, P_TimerB_Ctrl
  311. .DEFINE C_D14 0x0380 // P_TimerA_Ctrl, P_TimerB_Ctrl
  312. .DEFINE C_TA_Div_2 0x03C0 // P_TimerA_Ctrl
  313. .DEFINE C_TB_Div_2 0x03C0 // P_TimerB_Ctrl
  315. //========================================================================================
  316. // End of SPCE061A.inc
  317. //========================================================================================