KeyBoard.map.eqn
资源名称:KeyBoard.rar [点击查看]
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上传日期:2022-08-09
资源大小:328k
文件大小:29k
源码类别:
VHDL/FPGA/Verilog
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- -- Copyright (C) 1991-2005 Altera Corporation
- -- Your use of Altera Corporation's design tools, logic functions
- -- and other software and tools, and its AMPP partner logic
- -- functions, and any output files any of the foregoing
- -- (including device programming or simulation files), and any
- -- associated documentation or information are expressly subject
- -- to the terms and conditions of the Altera Program License
- -- Subscription Agreement, Altera MegaCore Function License
- -- Agreement, or other applicable license agreement, including,
- -- without limitation, that your use is for the sole purpose of
- -- programming logic devices manufactured by Altera and sold by
- -- Altera or its authorized distributors. Please refer to the
- -- applicable agreement for further details.
- --B1_state[0] is key44:inst|state[0]
- --operation mode is normal
- B1_state[0]_lut_out = !B1L45 & (B1_state[3] # !B1L47 # !B1_state[0]);
- B1_state[0] = DFFEAS(B1_state[0]_lut_out, B1_clk4, RESET, , , , , , );
- --B1_state[1] is key44:inst|state[1]
- --operation mode is normal
- B1_state[1]_lut_out = B1L44 & B1_S_row & !B1_state[0] & !B1_state[3];
- B1_state[1] = DFFEAS(B1_state[1]_lut_out, B1_clk4, RESET, , , , , , );
- --B1_state[2] is key44:inst|state[2]
- --operation mode is normal
- B1_state[2]_lut_out = !B1_state[2] & (B1_state[1] & B1L48);
- B1_state[2] = DFFEAS(B1_state[2]_lut_out, B1_clk4, RESET, , , , , , );
- --B1_state[3] is key44:inst|state[3]
- --operation mode is normal
- B1_state[3]_lut_out = !B1_state[1] & (B1_state[2] & B1L48);
- B1_state[3] = DFFEAS(B1_state[3]_lut_out, B1_clk4, RESET, , , , , , );
- --B1L27 is key44:inst|col[3]~376
- --operation mode is normal
- B1L27 = B1_state[0] & (B1_state[1] & !B1_state[2] & !B1_state[3] # !B1_state[1] & (B1_state[2] $ B1_state[3]));
- --B1_state[4] is key44:inst|state[4]
- --operation mode is normal
- B1_state[4]_lut_out = A1L34 & B1_state[0] & B1_state[3] & B1L44;
- B1_state[4] = DFFEAS(B1_state[4]_lut_out, B1_clk4, RESET, , , , , , );
- --B1_state[5] is key44:inst|state[5]
- --operation mode is normal
- B1_state[5]_lut_out = !A1L34 & (B1L50 # B1L13 & B1L51);
- B1_state[5] = DFFEAS(B1_state[5]_lut_out, B1_clk4, RESET, , , , , , );
- --B1L28 is key44:inst|col[3]~377
- --operation mode is normal
- B1L28 = B1L27 & (!B1_state[4] & !B1_state[5]);
- --B1L25 is key44:inst|col[2]~378
- --operation mode is normal
- B1L25 = B1_state[0] & (B1_state[1] & !B1_state[2] & !B1_state[4] # !B1_state[1] & (B1_state[2] $ B1_state[4]));
- --B1L26 is key44:inst|col[2]~379
- --operation mode is normal
- B1L26 = B1L25 & (!B1_state[3] & !B1_state[5]);
- --B1L23 is key44:inst|col[1]~380
- --operation mode is normal
- B1L23 = B1_state[0] & (B1_state[1] & !B1_state[4] & !B1_state[3] # !B1_state[1] & (B1_state[4] $ B1_state[3]));
- --B1L24 is key44:inst|col[1]~381
- --operation mode is normal
- B1L24 = B1L23 & (!B1_state[2] & !B1_state[5]);
- --B1L21 is key44:inst|col[0]~382
- --operation mode is normal
- B1L21 = B1_state[0] & (B1_state[4] & !B1_state[2] & !B1_state[3] # !B1_state[4] & (B1_state[2] $ B1_state[3]));
- --B1L22 is key44:inst|col[0]~383
- --operation mode is normal
- B1L22 = B1L21 & (!B1_state[1] & !B1_state[5]);
- --C1L9 is LED4:inst3|LEDOut[6]~191
- --operation mode is normal
- C1L9 = B1_code[0] & (B1_code[3] # B1_code[1] $ B1_code[2]) # !B1_code[0] & (B1_code[1] # B1_code[2] $ B1_code[3]);
- --C1L8 is LED4:inst3|LEDOut[5]~192
- --operation mode is normal
- C1L8 = B1_code[0] & (B1_code[3] $ (B1_code[1] # !B1_code[2])) # !B1_code[0] & B1_code[1] & !B1_code[2] & !B1_code[3];
- --C1L7 is LED4:inst3|LEDOut[4]~193
- --operation mode is normal
- C1L7 = B1_code[1] & B1_code[0] & (!B1_code[3]) # !B1_code[1] & (B1_code[2] & (!B1_code[3]) # !B1_code[2] & B1_code[0]);
- --C1L6 is LED4:inst3|LEDOut[3]~194
- --operation mode is normal
- C1L6 = B1_code[1] & (B1_code[0] & B1_code[2] # !B1_code[0] & !B1_code[2] & B1_code[3]) # !B1_code[1] & !B1_code[3] & (B1_code[0] $ B1_code[2]);
- --C1L5 is LED4:inst3|LEDOut[2]~195
- --operation mode is normal
- C1L5 = B1_code[2] & B1_code[3] & (B1_code[1] # !B1_code[0]) # !B1_code[2] & !B1_code[0] & B1_code[1] & !B1_code[3];
- --C1L4 is LED4:inst3|LEDOut[1]~196
- --operation mode is normal
- C1L4 = B1_code[1] & (B1_code[0] & (B1_code[3]) # !B1_code[0] & B1_code[2]) # !B1_code[1] & B1_code[2] & (B1_code[0] $ B1_code[3]);
- --C1L3 is LED4:inst3|LEDOut[0]~197
- --operation mode is normal
- C1L3 = B1_code[2] & !B1_code[1] & (B1_code[0] $ !B1_code[3]) # !B1_code[2] & B1_code[0] & (B1_code[1] $ !B1_code[3]);
- --C1_Refresh[1] is LED4:inst3|Refresh[1]
- --operation mode is normal
- C1_Refresh[1]_lut_out = C1_Refresh[1] $ C1_Refresh[0];
- C1_Refresh[1] = DFFEAS(C1_Refresh[1]_lut_out, D1_CLK:Count2[1], VCC, , , , , , );
- --C1_Refresh[0] is LED4:inst3|Refresh[0]
- --operation mode is normal
- C1_Refresh[0]_lut_out = !C1_Refresh[0];
- C1_Refresh[0] = DFFEAS(C1_Refresh[0]_lut_out, D1_CLK:Count2[1], VCC, , , , , , );
- --C1L2 is LED4:inst3|DigitSelect[3]~31
- --operation mode is normal
- C1L2 = !C1_Refresh[0] # !C1_Refresh[1];
- --C1L1 is LED4:inst3|DigitSelect[2]~32
- --operation mode is normal
- C1L1 = C1_Refresh[0] # !C1_Refresh[1];
- --A1L32 is rtl~81
- --operation mode is normal
- A1L32 = C1_Refresh[0] & (!C1_Refresh[1]);
- --A1L33 is rtl~82
- --operation mode is normal
- A1L33 = C1_Refresh[1] # C1_Refresh[0];
- --B1_S_row is key44:inst|S_row
- --operation mode is normal
- B1_S_row_lut_out = A1L34 & B1_S_row & B1L13 # !A1L34 & (B1_S_row # B1L1);
- B1_S_row = DFFEAS(B1_S_row_lut_out, B1_clk4, RESET, , , , , , );
- --B1L44 is key44:inst|next_state[0]~1082
- --operation mode is normal
- B1L44 = !B1_state[1] & !B1_state[2] & !B1_state[4] & !B1_state[5];
- --B1L45 is key44:inst|next_state[0]~1083
- --operation mode is normal
- B1L45 = B1_state[3] & (!B1_state[0] # !B1L44) # !B1_state[3] & !B1_state[0] & (!B1L44 # !B1_S_row);
- --A1L34 is rtl~83
- --operation mode is normal
- A1L34 = ROW[3] & ROW[1] & ROW[2] & ROW[0];
- --B1L46 is key44:inst|next_state[0]~1084
- --operation mode is normal
- B1L46 = B1_state[2] # A1L34 # B1_state[4] $ !B1_state[5];
- --B1L29 is key44:inst|col[3]~384
- --operation mode is normal
- B1L29 = !B1_state[4] & !B1_state[5];
- --B1L47 is key44:inst|next_state[0]~1085
- --operation mode is normal
- B1L47 = B1L46 & (B1_state[1] $ !B1_state[2] # !B1L29) # !B1L46 & !B1L29 & (B1_state[1] $ B1_state[2]);
- --B1_clk4 is key44:inst|clk4
- --operation mode is normal
- B1_clk4_lut_out = !B1_clk4;
- B1_clk4 = DFFEAS(B1_clk4_lut_out, B1_clk2, VCC, , , , , , );
- --B1L48 is key44:inst|next_state[2]~1088
- --operation mode is normal
- B1L48 = B1_state[0] & B1L29 & !B1_state[3] & A1L34;
- --B1L49 is key44:inst|next_state[5]~1092
- --operation mode is normal
- B1L49 = B1_state[5] & !B1_state[1] & !B1_state[2] & !B1_state[3] # !B1_state[5] & (B1_state[1] & !B1_state[2] & !B1_state[3] # !B1_state[1] & (B1_state[2] $ B1_state[3]));
- --B1L50 is key44:inst|next_state[5]~1093
- --operation mode is normal
- B1L50 = B1_state[0] & B1L49 & (!B1_state[4]);
- --B1L13 is key44:inst|S_row~135
- --operation mode is normal
- B1L13 = B1_state[0] & (!B1_state[5]);
- --B1L51 is key44:inst|next_state[5]~1094
- --operation mode is normal
- B1L51 = B1_state[4] & !B1_state[1] & !B1_state[2] & !B1_state[3];
- --B1_row_reg[3] is key44:inst|row_reg[3]
- --operation mode is normal
- B1_row_reg[3]_lut_out = ROW[3];
- B1_row_reg[3] = DFFEAS(B1_row_reg[3]_lut_out, !B1_Mega_cnt[4], VCC, , B1L87, , , , );
- --B1_row_reg[1] is key44:inst|row_reg[1]
- --operation mode is normal
- B1_row_reg[1]_lut_out = ROW[1];
- B1_row_reg[1] = DFFEAS(B1_row_reg[1]_lut_out, !B1_Mega_cnt[4], VCC, , B1L87, , , , );
- --B1_row_reg[0] is key44:inst|row_reg[0]
- --operation mode is normal
- B1_row_reg[0]_lut_out = ROW[0];
- B1_row_reg[0] = DFFEAS(B1_row_reg[0]_lut_out, !B1_Mega_cnt[4], VCC, , B1L87, , , , );
- --B1_row_reg[2] is key44:inst|row_reg[2]
- --operation mode is normal
- B1_row_reg[2]_lut_out = ROW[2];
- B1_row_reg[2] = DFFEAS(B1_row_reg[2]_lut_out, !B1_Mega_cnt[4], VCC, , B1L87, , , , );
- --B1L52 is key44:inst|reduce_or~2173
- --operation mode is normal
- B1L52 = B1_row_reg[0] & B1_row_reg[2];
- --B1_col_reg[0] is key44:inst|col_reg[0]
- --operation mode is normal
- B1_col_reg[0]_lut_out = B1L22;
- B1_col_reg[0] = DFFEAS(B1_col_reg[0]_lut_out, !B1_Mega_cnt[4], VCC, , B1L87, , , , );
- --B1_col_reg[1] is key44:inst|col_reg[1]
- --operation mode is normal
- B1_col_reg[1]_lut_out = B1L24;
- B1_col_reg[1] = DFFEAS(B1_col_reg[1]_lut_out, !B1_Mega_cnt[4], VCC, , B1L87, , , , );
- --B1_col_reg[3] is key44:inst|col_reg[3]
- --operation mode is normal
- B1_col_reg[3]_lut_out = B1L28;
- B1_col_reg[3] = DFFEAS(B1_col_reg[3]_lut_out, !B1_Mega_cnt[4], VCC, , B1L87, , , , );
- --B1_col_reg[2] is key44:inst|col_reg[2]
- --operation mode is normal
- B1_col_reg[2]_lut_out = B1L26;
- B1_col_reg[2] = DFFEAS(B1_col_reg[2]_lut_out, !B1_Mega_cnt[4], VCC, , B1L87, , , , );
- --B1L53 is key44:inst|reduce_or~2174
- --operation mode is normal
- B1L53 = B1_col_reg[3] & B1_col_reg[2];
- --B1L54 is key44:inst|reduce_or~2175
- --operation mode is normal
- B1L54 = B1_col_reg[3] $ B1_col_reg[2];
- --B1L55 is key44:inst|reduce_or~2176
- --operation mode is normal
- B1L55 = B1_col_reg[0] & (B1_col_reg[1] & (B1L54) # !B1_col_reg[1] & B1L53) # !B1_col_reg[0] & B1_col_reg[1] & B1L53;
- --B1L56 is key44:inst|reduce_or~2177
- --operation mode is normal
- B1L56 = B1L52 & B1L55 & (B1_row_reg[3] $ B1_row_reg[1]);
- --B1L57 is key44:inst|reduce_or~2178
- --operation mode is normal
- B1L57 = B1_col_reg[0] & !B1_col_reg[1] & (B1_row_reg[0] $ B1_row_reg[1]) # !B1_col_reg[0] & B1_col_reg[1] & (B1_row_reg[0] $ B1_row_reg[1]);
- --B1L58 is key44:inst|reduce_or~2179
- --operation mode is normal
- B1L58 = B1_row_reg[2] & B1_row_reg[3] & B1L53 & B1L57;
- --B1L59 is key44:inst|reduce_or~2180
- --operation mode is normal
- B1L59 = B1_col_reg[0] & B1_col_reg[1] & (B1_row_reg[0] $ B1_row_reg[1]);
- --B1L60 is key44:inst|reduce_or~2181
- --operation mode is normal
- B1L60 = B1_row_reg[2] & B1L54 & B1_row_reg[3] & B1L59;
- --B1L61 is key44:inst|reduce_or~2182
- --operation mode is normal
- B1L61 = B1_row_reg[0] & B1_row_reg[1] & (B1_row_reg[2] $ B1_row_reg[3]);
- --B1L62 is key44:inst|reduce_or~2183
- --operation mode is normal
- B1L62 = B1_col_reg[0] & (B1_col_reg[1] & (B1_col_reg[2] $ B1_col_reg[3]) # !B1_col_reg[1] & B1_col_reg[2] & B1_col_reg[3]) # !B1_col_reg[0] & B1_col_reg[1] & B1_col_reg[2] & B1_col_reg[3];
- --B1L63 is key44:inst|reduce_or~2184
- --operation mode is normal
- B1L63 = B1L58 # B1L60 # B1L61 & B1L62;
- --B1L64 is key44:inst|reduce_or~2185
- --operation mode is normal
- B1L64 = B1_row_reg[0] & B1_row_reg[3];
- --B1L65 is key44:inst|reduce_or~2186
- --operation mode is normal
- B1L65 = B1L64 & B1L55 & (B1_row_reg[2] $ B1_row_reg[1]);
- --B1L66 is key44:inst|reduce_or~2187
- --operation mode is normal
- B1L66 = B1L73 & (B1_col_reg[3] $ B1_col_reg[1]);
- --B1L67 is key44:inst|reduce_or~2188
- --operation mode is normal
- B1L67 = B1L52 & B1_col_reg[1] & B1_row_reg[1] & !B1_row_reg[3];
- --B1L68 is key44:inst|reduce_or~2189
- --operation mode is normal
- B1L68 = B1L67 & (B1_col_reg[3]);
- --B1L69 is key44:inst|reduce_or~2190
- --operation mode is normal
- B1L69 = B1_col_reg[2] & (B1_col_reg[0] & B1L66 # !B1_col_reg[0] & (B1L68)) # !B1_col_reg[2] & (B1_col_reg[0] & B1L68);
- --B1L70 is key44:inst|reduce_or~2191
- --operation mode is normal
- B1L70 = B1_col_reg[1] & B1_col_reg[3] & (B1_col_reg[2] $ B1_col_reg[0]) # !B1_col_reg[1] & B1_col_reg[2] & (B1_col_reg[3] $ B1_col_reg[0]);
- --B1L71 is key44:inst|reduce_or~2192
- --operation mode is normal
- B1L71 = B1_col_reg[0] & B1_col_reg[1] & (B1_col_reg[2] $ B1_col_reg[3]);
- --B1L72 is key44:inst|reduce_or~2193
- --operation mode is normal
- B1L72 = B1L71 & (B1L73 # B1L67 & !B1L70) # !B1L71 & B1L67 & (B1L70);
- --D1_CLK:Count2[1] is Frequency:inst5|CLK:Count2[1]
- --operation mode is arithmetic
- D1_CLK:Count2[1]_carry_eqn = D1L21;
- D1_CLK:Count2[1]_lut_out = D1_CLK:Count2[1] $ (D1_CLK:Count2[1]_carry_eqn);
- D1_CLK:Count2[1] = DFFEAS(D1_CLK:Count2[1]_lut_out, D1_CLK:Count1[9], VCC, , , , , D1L44, );
- --D1L23 is Frequency:inst5|CLK:Count2[1]~8
- --operation mode is arithmetic
- D1L23 = CARRY(!D1L21 # !D1_CLK:Count2[1]);
- --B1_count[2] is key44:inst|count[2]
- --operation mode is arithmetic
- B1_count[2]_carry_eqn = B1L40;
- B1_count[2]_lut_out = B1_count[2] $ (!B1_count[2]_carry_eqn);
- B1_count[2] = DFFEAS(B1_count[2]_lut_out, B1_clk4, RESET, , B1L38, , , A1L34, );
- --B1L42 is key44:inst|count[2]~87
- --operation mode is arithmetic
- B1L42 = CARRY(B1_count[2] & (!B1L40));
- --B1_count[3] is key44:inst|count[3]
- --operation mode is normal
- B1_count[3]_carry_eqn = B1L42;
- B1_count[3]_lut_out = B1_count[3] $ (B1_count[3]_carry_eqn);
- B1_count[3] = DFFEAS(B1_count[3]_lut_out, B1_clk4, RESET, , B1L38, , , A1L34, );
- --B1L1 is key44:inst|LessThan~35
- --operation mode is normal
- B1L1 = B1_count[2] # B1_count[3];
- --B1_clk2 is key44:inst|clk2
- --operation mode is normal
- B1_clk2_lut_out = !B1_clk2;
- B1_clk2 = DFFEAS(B1_clk2_lut_out, B1_Mega_cnt[4], VCC, , , , , , );
- --B1_Mega_cnt[4] is key44:inst|Mega_cnt[4]
- --operation mode is normal
- B1_Mega_cnt[4]_carry_eqn = B1L10;
- B1_Mega_cnt[4]_lut_out = B1_Mega_cnt[4] $ (!B1_Mega_cnt[4]_carry_eqn);
- B1_Mega_cnt[4] = DFFEAS(B1_Mega_cnt[4]_lut_out, GCLKP, RESET, , , , , , );
- --B1L86 is key44:inst|valid~277
- --operation mode is normal
- B1L86 = B1_state[1] & !B1_state[2] & !B1_state[3] & !B1_state[4] # !B1_state[1] & (B1_state[2] & !B1_state[3] & !B1_state[4] # !B1_state[2] & (B1_state[3] $ B1_state[4]));
- --D1_CLK:Count1[9] is Frequency:inst5|CLK:Count1[9]
- --operation mode is normal
- D1_CLK:Count1[9]_carry_eqn = D1L18;
- D1_CLK:Count1[9]_lut_out = D1_CLK:Count1[9] $ (D1_CLK:Count1[9]_carry_eqn);
- D1_CLK:Count1[9] = DFFEAS(D1_CLK:Count1[9]_lut_out, D1_Period1uS, VCC, , , , , D1L47, );
- --D1_CLK:Count2[9] is Frequency:inst5|CLK:Count2[9]
- --operation mode is normal
- D1_CLK:Count2[9]_carry_eqn = D1L37;
- D1_CLK:Count2[9]_lut_out = D1_CLK:Count2[9] $ (D1_CLK:Count2[9]_carry_eqn);
- D1_CLK:Count2[9] = DFFEAS(D1_CLK:Count2[9]_lut_out, D1_CLK:Count1[9], VCC, , , , , D1L44, );
- --D1_CLK:Count2[5] is Frequency:inst5|CLK:Count2[5]
- --operation mode is arithmetic
- D1_CLK:Count2[5]_carry_eqn = D1L29;
- D1_CLK:Count2[5]_lut_out = D1_CLK:Count2[5] $ (D1_CLK:Count2[5]_carry_eqn);
- D1_CLK:Count2[5] = DFFEAS(D1_CLK:Count2[5]_lut_out, D1_CLK:Count1[9], VCC, , , , , D1L44, );
- --D1L31 is Frequency:inst5|CLK:Count2[5]~8
- --operation mode is arithmetic
- D1L31 = CARRY(!D1L29 # !D1_CLK:Count2[5]);
- --D1_CLK:Count2[6] is Frequency:inst5|CLK:Count2[6]
- --operation mode is arithmetic
- D1_CLK:Count2[6]_carry_eqn = D1L31;
- D1_CLK:Count2[6]_lut_out = D1_CLK:Count2[6] $ (!D1_CLK:Count2[6]_carry_eqn);
- D1_CLK:Count2[6] = DFFEAS(D1_CLK:Count2[6]_lut_out, D1_CLK:Count1[9], VCC, , , , , D1L44, );
- --D1L33 is Frequency:inst5|CLK:Count2[6]~8
- --operation mode is arithmetic
- D1L33 = CARRY(D1_CLK:Count2[6] & (!D1L31));
- --D1_CLK:Count2[7] is Frequency:inst5|CLK:Count2[7]
- --operation mode is arithmetic
- D1_CLK:Count2[7]_carry_eqn = D1L33;
- D1_CLK:Count2[7]_lut_out = D1_CLK:Count2[7] $ (D1_CLK:Count2[7]_carry_eqn);
- D1_CLK:Count2[7] = DFFEAS(D1_CLK:Count2[7]_lut_out, D1_CLK:Count1[9], VCC, , , , , D1L44, );
- --D1L35 is Frequency:inst5|CLK:Count2[7]~10
- --operation mode is arithmetic
- D1L35 = CARRY(!D1L33 # !D1_CLK:Count2[7]);
- --D1_CLK:Count2[8] is Frequency:inst5|CLK:Count2[8]
- --operation mode is arithmetic
- D1_CLK:Count2[8]_carry_eqn = D1L35;
- D1_CLK:Count2[8]_lut_out = D1_CLK:Count2[8] $ (!D1_CLK:Count2[8]_carry_eqn);
- D1_CLK:Count2[8] = DFFEAS(D1_CLK:Count2[8]_lut_out, D1_CLK:Count1[9], VCC, , , , , D1L44, );
- --D1L37 is Frequency:inst5|CLK:Count2[8]~8
- --operation mode is arithmetic
- D1L37 = CARRY(D1_CLK:Count2[8] & (!D1L35));
- --D1L42 is Frequency:inst5|LessThan~372
- --operation mode is normal
- D1L42 = D1_CLK:Count2[5] & D1_CLK:Count2[6] & D1_CLK:Count2[7] & D1_CLK:Count2[8];
- --D1_CLK:Count2[4] is Frequency:inst5|CLK:Count2[4]
- --operation mode is arithmetic
- D1_CLK:Count2[4]_carry_eqn = D1L27;
- D1_CLK:Count2[4]_lut_out = D1_CLK:Count2[4] $ (!D1_CLK:Count2[4]_carry_eqn);
- D1_CLK:Count2[4] = DFFEAS(D1_CLK:Count2[4]_lut_out, D1_CLK:Count1[9], VCC, , , , , D1L44, );
- --D1L29 is Frequency:inst5|CLK:Count2[4]~15
- --operation mode is arithmetic
- D1L29 = CARRY(D1_CLK:Count2[4] & (!D1L27));
- --D1_CLK:Count2[3] is Frequency:inst5|CLK:Count2[3]
- --operation mode is arithmetic
- D1_CLK:Count2[3]_carry_eqn = D1L25;
- D1_CLK:Count2[3]_lut_out = D1_CLK:Count2[3] $ (D1_CLK:Count2[3]_carry_eqn);
- D1_CLK:Count2[3] = DFFEAS(D1_CLK:Count2[3]_lut_out, D1_CLK:Count1[9], VCC, , , , , D1L44, );
- --D1L27 is Frequency:inst5|CLK:Count2[3]~15
- --operation mode is arithmetic
- D1L27 = CARRY(!D1L25 # !D1_CLK:Count2[3]);
- --D1_CLK:Count2[0] is Frequency:inst5|CLK:Count2[0]
- --operation mode is arithmetic
- D1_CLK:Count2[0]_lut_out = !D1_CLK:Count2[0];
- D1_CLK:Count2[0] = DFFEAS(D1_CLK:Count2[0]_lut_out, D1_CLK:Count1[9], VCC, , , , , D1L44, );
- --D1L21 is Frequency:inst5|CLK:Count2[0]~8
- --operation mode is arithmetic
- D1L21 = CARRY(D1_CLK:Count2[0]);
- --D1_CLK:Count2[2] is Frequency:inst5|CLK:Count2[2]
- --operation mode is arithmetic
- D1_CLK:Count2[2]_carry_eqn = D1L23;
- D1_CLK:Count2[2]_lut_out = D1_CLK:Count2[2] $ (!D1_CLK:Count2[2]_carry_eqn);
- D1_CLK:Count2[2] = DFFEAS(D1_CLK:Count2[2]_lut_out, D1_CLK:Count1[9], VCC, , , , , D1L44, );
- --D1L25 is Frequency:inst5|CLK:Count2[2]~8
- --operation mode is arithmetic
- D1L25 = CARRY(D1_CLK:Count2[2] & (!D1L23));
- --D1L43 is Frequency:inst5|LessThan~373
- --operation mode is normal
- D1L43 = D1_CLK:Count2[3] # D1_CLK:Count2[1] & D1_CLK:Count2[0] & D1_CLK:Count2[2];
- --D1L44 is Frequency:inst5|LessThan~374
- --operation mode is normal
- D1L44 = D1_CLK:Count2[9] & D1L42 & (D1_CLK:Count2[4] # D1L43);
- --B1_count[1] is key44:inst|count[1]
- --operation mode is arithmetic
- B1_count[1]_carry_eqn = B1L37;
- B1_count[1]_lut_out = B1_count[1] $ (B1_count[1]_carry_eqn);
- B1_count[1] = DFFEAS(B1_count[1]_lut_out, B1_clk4, RESET, , B1L38, , , A1L34, );
- --B1L40 is key44:inst|count[1]~95
- --operation mode is arithmetic
- B1L40 = CARRY(!B1L37 # !B1_count[1]);
- --B1_Mega_cnt[3] is key44:inst|Mega_cnt[3]
- --operation mode is arithmetic
- B1_Mega_cnt[3]_carry_eqn = B1L8;
- B1_Mega_cnt[3]_lut_out = B1_Mega_cnt[3] $ (B1_Mega_cnt[3]_carry_eqn);
- B1_Mega_cnt[3] = DFFEAS(B1_Mega_cnt[3]_lut_out, GCLKP, RESET, , , , , , );
- --B1L10 is key44:inst|Mega_cnt[3]~180
- --operation mode is arithmetic
- B1L10 = CARRY(!B1L8 # !B1_Mega_cnt[3]);
- --D1_Period1uS is Frequency:inst5|Period1uS
- --operation mode is normal
- D1_Period1uS_lut_out = D1_Period1uS & !D1_CLK:Count[2] & !D1_CLK:Count[1] & !D1_CLK:Count[0] # !D1_Period1uS & D1_CLK:Count[2] & D1_CLK:Count[1] & D1_CLK:Count[0];
- D1_Period1uS = DFFEAS(D1_Period1uS_lut_out, GCLKP, VCC, , , , , , );
- --D1_CLK:Count1[8] is Frequency:inst5|CLK:Count1[8]
- --operation mode is arithmetic
- D1_CLK:Count1[8]_carry_eqn = D1L16;
- D1_CLK:Count1[8]_lut_out = D1_CLK:Count1[8] $ (!D1_CLK:Count1[8]_carry_eqn);
- D1_CLK:Count1[8] = DFFEAS(D1_CLK:Count1[8]_lut_out, D1_Period1uS, VCC, , , , , D1L47, );
- --D1L18 is Frequency:inst5|CLK:Count1[8]~8
- --operation mode is arithmetic
- D1L18 = CARRY(D1_CLK:Count1[8] & (!D1L16));
- --D1_CLK:Count1[5] is Frequency:inst5|CLK:Count1[5]
- --operation mode is arithmetic
- D1_CLK:Count1[5]_carry_eqn = D1L10;
- D1_CLK:Count1[5]_lut_out = D1_CLK:Count1[5] $ (D1_CLK:Count1[5]_carry_eqn);
- D1_CLK:Count1[5] = DFFEAS(D1_CLK:Count1[5]_lut_out, D1_Period1uS, VCC, , , , , D1L47, );
- --D1L12 is Frequency:inst5|CLK:Count1[5]~8
- --operation mode is arithmetic
- D1L12 = CARRY(!D1L10 # !D1_CLK:Count1[5]);
- --D1_CLK:Count1[6] is Frequency:inst5|CLK:Count1[6]
- --operation mode is arithmetic
- D1_CLK:Count1[6]_carry_eqn = D1L12;
- D1_CLK:Count1[6]_lut_out = D1_CLK:Count1[6] $ (!D1_CLK:Count1[6]_carry_eqn);
- D1_CLK:Count1[6] = DFFEAS(D1_CLK:Count1[6]_lut_out, D1_Period1uS, VCC, , , , , D1L47, );
- --D1L14 is Frequency:inst5|CLK:Count1[6]~8
- --operation mode is arithmetic
- D1L14 = CARRY(D1_CLK:Count1[6] & (!D1L12));
- --D1_CLK:Count1[7] is Frequency:inst5|CLK:Count1[7]
- --operation mode is arithmetic
- D1_CLK:Count1[7]_carry_eqn = D1L14;
- D1_CLK:Count1[7]_lut_out = D1_CLK:Count1[7] $ (D1_CLK:Count1[7]_carry_eqn);
- D1_CLK:Count1[7] = DFFEAS(D1_CLK:Count1[7]_lut_out, D1_Period1uS, VCC, , , , , D1L47, );
- --D1L16 is Frequency:inst5|CLK:Count1[7]~8
- --operation mode is arithmetic
- D1L16 = CARRY(!D1L14 # !D1_CLK:Count1[7]);
- --D1L45 is Frequency:inst5|LessThan~375
- --operation mode is normal
- D1L45 = D1_CLK:Count1[9] & D1_CLK:Count1[5] & D1_CLK:Count1[6] & D1_CLK:Count1[7];
- --D1_CLK:Count1[4] is Frequency:inst5|CLK:Count1[4]
- --operation mode is arithmetic
- D1_CLK:Count1[4]_carry_eqn = D1L8;
- D1_CLK:Count1[4]_lut_out = D1_CLK:Count1[4] $ (!D1_CLK:Count1[4]_carry_eqn);
- D1_CLK:Count1[4] = DFFEAS(D1_CLK:Count1[4]_lut_out, D1_Period1uS, VCC, , , , , D1L47, );
- --D1L10 is Frequency:inst5|CLK:Count1[4]~15
- --operation mode is arithmetic
- D1L10 = CARRY(D1_CLK:Count1[4] & (!D1L8));
- --D1_CLK:Count1[3] is Frequency:inst5|CLK:Count1[3]
- --operation mode is arithmetic
- D1_CLK:Count1[3]_carry_eqn = D1L6;
- D1_CLK:Count1[3]_lut_out = D1_CLK:Count1[3] $ (D1_CLK:Count1[3]_carry_eqn);
- D1_CLK:Count1[3] = DFFEAS(D1_CLK:Count1[3]_lut_out, D1_Period1uS, VCC, , , , , D1L47, );
- --D1L8 is Frequency:inst5|CLK:Count1[3]~15
- --operation mode is arithmetic
- D1L8 = CARRY(!D1L6 # !D1_CLK:Count1[3]);
- --D1_CLK:Count1[0] is Frequency:inst5|CLK:Count1[0]
- --operation mode is arithmetic
- D1_CLK:Count1[0]_lut_out = !D1_CLK:Count1[0];
- D1_CLK:Count1[0] = DFFEAS(D1_CLK:Count1[0]_lut_out, D1_Period1uS, VCC, , , , , D1L47, );
- --D1L2 is Frequency:inst5|CLK:Count1[0]~8
- --operation mode is arithmetic
- D1L2 = CARRY(D1_CLK:Count1[0]);
- --D1_CLK:Count1[1] is Frequency:inst5|CLK:Count1[1]
- --operation mode is arithmetic
- D1_CLK:Count1[1]_carry_eqn = D1L2;
- D1_CLK:Count1[1]_lut_out = D1_CLK:Count1[1] $ (D1_CLK:Count1[1]_carry_eqn);
- D1_CLK:Count1[1] = DFFEAS(D1_CLK:Count1[1]_lut_out, D1_Period1uS, VCC, , , , , D1L47, );
- --D1L4 is Frequency:inst5|CLK:Count1[1]~8
- --operation mode is arithmetic
- D1L4 = CARRY(!D1L2 # !D1_CLK:Count1[1]);
- --D1_CLK:Count1[2] is Frequency:inst5|CLK:Count1[2]
- --operation mode is arithmetic
- D1_CLK:Count1[2]_carry_eqn = D1L4;
- D1_CLK:Count1[2]_lut_out = D1_CLK:Count1[2] $ (!D1_CLK:Count1[2]_carry_eqn);
- D1_CLK:Count1[2] = DFFEAS(D1_CLK:Count1[2]_lut_out, D1_Period1uS, VCC, , , , , D1L47, );
- --D1L6 is Frequency:inst5|CLK:Count1[2]~8
- --operation mode is arithmetic
- D1L6 = CARRY(D1_CLK:Count1[2] & (!D1L4));
- --D1L46 is Frequency:inst5|LessThan~376
- --operation mode is normal
- D1L46 = D1_CLK:Count1[3] # D1_CLK:Count1[0] & D1_CLK:Count1[1] & D1_CLK:Count1[2];
- --D1L47 is Frequency:inst5|LessThan~377
- --operation mode is normal
- D1L47 = D1_CLK:Count1[8] & D1L45 & (D1_CLK:Count1[4] # D1L46);
- --B1_count[0] is key44:inst|count[0]
- --operation mode is arithmetic
- B1_count[0]_lut_out = B1L1 $ !B1_count[0];
- B1_count[0] = DFFEAS(B1_count[0]_lut_out, B1_clk4, RESET, , B1L38, , , A1L34, );
- --B1L37 is key44:inst|count[0]~99
- --operation mode is arithmetic
- B1L37 = CARRY(!B1L1 & B1_count[0]);
- --B1_Mega_cnt[2] is key44:inst|Mega_cnt[2]
- --operation mode is arithmetic
- B1_Mega_cnt[2]_carry_eqn = B1L6;
- B1_Mega_cnt[2]_lut_out = B1_Mega_cnt[2] $ (!B1_Mega_cnt[2]_carry_eqn);
- B1_Mega_cnt[2] = DFFEAS(B1_Mega_cnt[2]_lut_out, GCLKP, RESET, , , , , , );
- --B1L8 is key44:inst|Mega_cnt[2]~184
- --operation mode is arithmetic
- B1L8 = CARRY(B1_Mega_cnt[2] & (!B1L6));
- --D1_CLK:Count[2] is Frequency:inst5|CLK:Count[2]
- --operation mode is normal
- D1_CLK:Count[2]_lut_out = !D1_Period1uS & (D1_CLK:Count[2] $ (D1_CLK:Count[1] & D1_CLK:Count[0]));
- D1_CLK:Count[2] = DFFEAS(D1_CLK:Count[2]_lut_out, GCLKP, VCC, , , , , , );
- --D1_CLK:Count[1] is Frequency:inst5|CLK:Count[1]
- --operation mode is normal
- D1_CLK:Count[1]_lut_out = !D1_Period1uS & (D1_CLK:Count[1] $ D1_CLK:Count[0]);
- D1_CLK:Count[1] = DFFEAS(D1_CLK:Count[1]_lut_out, GCLKP, VCC, , , , , , );
- --D1_CLK:Count[0] is Frequency:inst5|CLK:Count[0]
- --operation mode is normal
- D1_CLK:Count[0]_lut_out = !D1_CLK:Count[0] & (!D1_CLK:Count[2] & !D1_CLK:Count[1] # !D1_Period1uS);
- D1_CLK:Count[0] = DFFEAS(D1_CLK:Count[0]_lut_out, GCLKP, VCC, , , , , , );
- --B1_Mega_cnt[1] is key44:inst|Mega_cnt[1]
- --operation mode is arithmetic
- B1_Mega_cnt[1]_carry_eqn = B1L4;
- B1_Mega_cnt[1]_lut_out = B1_Mega_cnt[1] $ (B1_Mega_cnt[1]_carry_eqn);
- B1_Mega_cnt[1] = DFFEAS(B1_Mega_cnt[1]_lut_out, GCLKP, RESET, , , , , , );
- --B1L6 is key44:inst|Mega_cnt[1]~188
- --operation mode is arithmetic
- B1L6 = CARRY(!B1L4 # !B1_Mega_cnt[1]);
- --B1_Mega_cnt[0] is key44:inst|Mega_cnt[0]
- --operation mode is arithmetic
- B1_Mega_cnt[0]_lut_out = !B1_Mega_cnt[0];
- B1_Mega_cnt[0] = DFFEAS(B1_Mega_cnt[0]_lut_out, GCLKP, RESET, , , , , , );
- --B1L4 is key44:inst|Mega_cnt[0]~192
- --operation mode is arithmetic
- B1L4 = CARRY(B1_Mega_cnt[0]);
- --B1L87 is key44:inst|valid~278
- --operation mode is normal
- B1L87 = B1_state[0] & !B1_state[5] & !A1L34 & B1L86;
- --B1L38 is key44:inst|count[0]~102
- --operation mode is normal
- B1L38 = B1_state[5] # !A1L34 # !B1_state[0];
- --B1L73 is key44:inst|reduce_or~2194
- --operation mode is normal
- B1L73 = B1_row_reg[3] & (B1_row_reg[1] & (B1_row_reg[0] $ B1_row_reg[2]) # !B1_row_reg[1] & B1_row_reg[0] & B1_row_reg[2]);
- --B1_code[0] is key44:inst|code[0]
- --operation mode is normal
- B1_code[0] = B1L63 & !B1L56 # !B1L63 & (B1_code[0]);
- --B1_code[1] is key44:inst|code[1]
- --operation mode is normal
- B1_code[1] = B1L63 & B1L65 # !B1L63 & (B1_code[1]);
- --B1_code[2] is key44:inst|code[2]
- --operation mode is normal
- B1_code[2] = B1L63 & !B1L69 # !B1L63 & (B1_code[2]);
- --B1_code[3] is key44:inst|code[3]
- --operation mode is normal
- B1_code[3] = B1L63 & !B1L72 # !B1L63 & (B1_code[3]);
- --GCLKP2 is GCLKP2
- --operation mode is input
- GCLKP2 = INPUT();
- --ROW[3] is ROW[3]
- --operation mode is input
- ROW[3] = INPUT();
- --ROW[1] is ROW[1]
- --operation mode is input
- ROW[1] = INPUT();
- --ROW[2] is ROW[2]
- --operation mode is input
- ROW[2] = INPUT();
- --ROW[0] is ROW[0]
- --operation mode is input
- ROW[0] = INPUT();
- --RESET is RESET
- --operation mode is input
- RESET = INPUT();
- --GCLKP is GCLKP
- --operation mode is input
- GCLKP = INPUT();
- --COL[3] is COL[3]
- --operation mode is output
- COL[3] = OUTPUT(B1L28);
- --COL[2] is COL[2]
- --operation mode is output
- COL[2] = OUTPUT(B1L26);
- --COL[1] is COL[1]
- --operation mode is output
- COL[1] = OUTPUT(B1L24);
- --COL[0] is COL[0]
- --operation mode is output
- COL[0] = OUTPUT(B1L22);
- --LEDOUT[7] is LEDOUT[7]
- --operation mode is output
- LEDOUT[7] = OUTPUT(GND);
- --LEDOUT[6] is LEDOUT[6]
- --operation mode is output
- LEDOUT[6] = OUTPUT(C1L9);
- --LEDOUT[5] is LEDOUT[5]
- --operation mode is output
- LEDOUT[5] = OUTPUT(!C1L8);
- --LEDOUT[4] is LEDOUT[4]
- --operation mode is output
- LEDOUT[4] = OUTPUT(!C1L7);
- --LEDOUT[3] is LEDOUT[3]
- --operation mode is output
- LEDOUT[3] = OUTPUT(!C1L6);
- --LEDOUT[2] is LEDOUT[2]
- --operation mode is output
- LEDOUT[2] = OUTPUT(!C1L5);
- --LEDOUT[1] is LEDOUT[1]
- --operation mode is output
- LEDOUT[1] = OUTPUT(!C1L4);
- --LEDOUT[0] is LEDOUT[0]
- --operation mode is output
- LEDOUT[0] = OUTPUT(!C1L3);
- --Light[7] is Light[7]
- --operation mode is output
- Light[7] = OUTPUT(!B1_code[3]);
- --Light[6] is Light[6]
- --operation mode is output
- Light[6] = OUTPUT(!B1_code[2]);
- --Light[5] is Light[5]
- --operation mode is output
- Light[5] = OUTPUT(!B1_code[1]);
- --Light[4] is Light[4]
- --operation mode is output
- Light[4] = OUTPUT(!B1_code[0]);
- --Light[3] is Light[3]
- --operation mode is output
- Light[3] = OUTPUT(!B1_code[3]);
- --Light[2] is Light[2]
- --operation mode is output
- Light[2] = OUTPUT(!B1_code[2]);
- --Light[1] is Light[1]
- --operation mode is output
- Light[1] = OUTPUT(!B1_code[1]);
- --Light[0] is Light[0]
- --operation mode is output
- Light[0] = OUTPUT(!B1_code[0]);
- --SELECT[3] is SELECT[3]
- --operation mode is output
- SELECT[3] = OUTPUT(C1L2);
- --SELECT[2] is SELECT[2]
- --operation mode is output
- SELECT[2] = OUTPUT(C1L1);
- --SELECT[1] is SELECT[1]
- --operation mode is output
- SELECT[1] = OUTPUT(!A1L32);
- --SELECT[0] is SELECT[0]
- --operation mode is output
- SELECT[0] = OUTPUT(A1L33);