KeyBoard.tan.summary
资源名称:KeyBoard.rar [点击查看]
上传用户:shenghui
上传日期:2022-08-09
资源大小:328k
文件大小:2k
源码类别:
VHDL/FPGA/Verilog
开发平台:
Others
- --------------------------------------------------------------------------------------
- Timing Analyzer Summary
- --------------------------------------------------------------------------------------
- Type : Worst-case tsu
- Slack : N/A
- Required Time : None
- Actual Time : 2.091 ns
- From : ROW[2]
- To : key44:inst|row_reg[3]
- From Clock : --
- To Clock : GCLKP
- Failed Paths : 0
- Type : Worst-case tco
- Slack : N/A
- Required Time : None
- Actual Time : 25.370 ns
- From : key44:inst|code[2]
- To : LEDOUT[0]
- From Clock : GCLKP
- To Clock : --
- Failed Paths : 0
- Type : Worst-case th
- Slack : N/A
- Required Time : None
- Actual Time : 10.382 ns
- From : ROW[0]
- To : key44:inst|state[4]
- From Clock : --
- To Clock : GCLKP
- Failed Paths : 0
- Type : Clock Setup: 'GCLKP'
- Slack : N/A
- Required Time : None
- Actual Time : 31.94 MHz ( period = 31.312 ns )
- From : key44:inst|state[5]
- To : key44:inst|row_reg[3]
- From Clock : GCLKP
- To Clock : GCLKP
- Failed Paths : 0
- Type : Clock Hold: 'GCLKP'
- Slack : Not operational: Clock Skew > Data Delay
- Required Time : None
- Actual Time : N/A
- From : key44:inst|col_reg[1]
- To : key44:inst|code[2]
- From Clock : GCLKP
- To Clock : GCLKP
- Failed Paths : 32
- Type : Total number of failed paths
- Slack :
- Required Time :
- Actual Time :
- From :
- To :
- From Clock :
- To Clock :
- Failed Paths : 32
- --------------------------------------------------------------------------------------