English
KeyBoard.tan.rpt
资源名称：KeyBoard.rar [点击查看]
上传用户：shenghui
上传日期：2022-08-09
资源大小：328k
文件大小：103k
源码类别：
VHDL/FPGA/Verilog
开发平台：
Others
- Classic Timing Analyzer report for KeyBoard
- Thu Jun 11 23:44:34 2009
- Quartus II Version 8.0 Build 215 05/29/2008 SJ Full Version
- ---------------------
- ; Table of Contents ;
- ---------------------
- 1. Legal Notice
- 2. Timing Analyzer Summary
- 3. Timing Analyzer Settings
- 4. Clock Settings Summary
- 5. Clock Setup: 'GCLKP'
- 6. Clock Hold: 'GCLKP'
- 7. tsu
- 8. tco
- 9. th
- 10. Timing Analyzer Messages
- ----------------
- ; Legal Notice ;
- ----------------
- Copyright (C) 1991-2008 Altera Corporation
- Your use of Altera Corporation's design tools, logic functions
- and other software and tools, and its AMPP partner logic
- functions, and any output files from any of the foregoing
- (including device programming or simulation files), and any
- associated documentation or information are expressly subject
- to the terms and conditions of the Altera Program License
- Subscription Agreement, Altera MegaCore Function License
- Agreement, or other applicable license agreement, including,
- without limitation, that your use is for the sole purpose of
- programming logic devices manufactured by Altera and sold by
- Altera or its authorized distributors. Please refer to the
- applicable agreement for further details.
- +-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
- ; Timing Analyzer Summary ;
- +------------------------------+------------------------------------------+---------------+----------------------------------+-----------------------+-----------------------+------------+----------+--------------+
- ; Type ; Slack ; Required Time ; Actual Time ; From ; To ; From Clock ; To Clock ; Failed Paths ;
- +------------------------------+------------------------------------------+---------------+----------------------------------+-----------------------+-----------------------+------------+----------+--------------+
- ; Worst-case tsu ; N/A ; None ; 2.091 ns ; ROW[2] ; key44:inst|row_reg[3] ; -- ; GCLKP ; 0 ;
- ; Worst-case tco ; N/A ; None ; 25.370 ns ; key44:inst|code[2] ; LEDOUT[0] ; GCLKP ; -- ; 0 ;
- ; Worst-case th ; N/A ; None ; 10.382 ns ; ROW[0] ; key44:inst|state[4] ; -- ; GCLKP ; 0 ;
- ; Clock Setup: 'GCLKP' ; N/A ; None ; 31.94 MHz ( period = 31.312 ns ) ; key44:inst|state[5] ; key44:inst|row_reg[3] ; GCLKP ; GCLKP ; 0 ;
- ; Clock Hold: 'GCLKP' ; Not operational: Clock Skew > Data Delay ; None ; N/A ; key44:inst|col_reg[1] ; key44:inst|code[2] ; GCLKP ; GCLKP ; 32 ;
- ; Total number of failed paths ; ; ; ; ; ; ; ; 32 ;
- +------------------------------+------------------------------------------+---------------+----------------------------------+-----------------------+-----------------------+------------+----------+--------------+
- +--------------------------------------------------------------------------------------------------------------------+
- ; Timing Analyzer Settings ;
- +---------------------------------------------------------------------+--------------------+------+----+-------------+
- ; Option ; Setting ; From ; To ; Entity Name ;
- +---------------------------------------------------------------------+--------------------+------+----+-------------+
- ; Device Name ; EPM570T100C5 ; ; ; ;
- ; Timing Models ; Final ; ; ; ;
- ; Default hold multicycle ; Same as Multicycle ; ; ; ;
- ; Cut paths between unrelated clock domains ; On ; ; ; ;
- ; Cut off read during write signal paths ; On ; ; ; ;
- ; Cut off feedback from I/O pins ; On ; ; ; ;
- ; Report Combined Fast/Slow Timing ; Off ; ; ; ;
- ; Ignore Clock Settings ; Off ; ; ; ;
- ; Analyze latches as synchronous elements ; On ; ; ; ;
- ; Enable Recovery/Removal analysis ; Off ; ; ; ;
- ; Enable Clock Latency ; Off ; ; ; ;
- ; Use TimeQuest Timing Analyzer ; Off ; ; ; ;
- ; Number of source nodes to report per destination node ; 10 ; ; ; ;
- ; Number of destination nodes to report ; 10 ; ; ; ;
- ; Number of paths to report ; 200 ; ; ; ;
- ; Report Minimum Timing Checks ; Off ; ; ; ;
- ; Use Fast Timing Models ; Off ; ; ; ;
- ; Report IO Paths Separately ; Off ; ; ; ;
- ; Perform Multicorner Analysis ; Off ; ; ; ;
- ; Reports the worst-case path for each clock domain and analysis ; Off ; ; ; ;
- ; Removes common clock path pessimism (CCPP) during slack computation ; Off ; ; ; ;
- +---------------------------------------------------------------------+--------------------+------+----+-------------+
- +------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
- ; Clock Settings Summary ;
- +-----------------+--------------------+----------+------------------+---------------+--------------+----------+-----------------------+---------------------+--------+--------------+
- ; Clock Node Name ; Clock Setting Name ; Type ; Fmax Requirement ; Early Latency ; Late Latency ; Based on ; Multiply Base Fmax by ; Divide Base Fmax by ; Offset ; Phase offset ;
- +-----------------+--------------------+----------+------------------+---------------+--------------+----------+-----------------------+---------------------+--------+--------------+
- ; GCLKP ; ; User Pin ; None ; 0.000 ns ; 0.000 ns ; -- ; N/A ; N/A ; N/A ; ;
- +-----------------+--------------------+----------+------------------+---------------+--------------+----------+-----------------------+---------------------+--------+--------------+
- +-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
- ; Clock Setup: 'GCLKP' ;
- +-----------------------------------------+-----------------------------------------------------+--------------------------------+--------------------------------+------------+----------+-----------------------------+---------------------------+-------------------------+
- ; Slack ; Actual fmax (period) ; From ; To ; From Clock ; To Clock ; Required Setup Relationship ; Required Longest P2P Time ; Actual Longest P2P Time ;
- +-----------------------------------------+-----------------------------------------------------+--------------------------------+--------------------------------+------------+----------+-----------------------------+---------------------------+-------------------------+
- ; N/A ; 31.94 MHz ( period = 31.312 ns ) ; key44:inst|state[5] ; key44:inst|col_reg[1] ; GCLKP ; GCLKP ; None ; None ; 6.056 ns ;
- ; N/A ; 31.94 MHz ( period = 31.312 ns ) ; key44:inst|state[5] ; key44:inst|col_reg[3] ; GCLKP ; GCLKP ; None ; None ; 6.056 ns ;
- ; N/A ; 31.94 MHz ( period = 31.312 ns ) ; key44:inst|state[5] ; key44:inst|row_reg[3] ; GCLKP ; GCLKP ; None ; None ; 6.056 ns ;
- ; N/A ; 32.10 MHz ( period = 31.152 ns ) ; key44:inst|state[0] ; key44:inst|col_reg[1] ; GCLKP ; GCLKP ; None ; None ; 5.976 ns ;
- ; N/A ; 32.10 MHz ( period = 31.152 ns ) ; key44:inst|state[0] ; key44:inst|col_reg[3] ; GCLKP ; GCLKP ; None ; None ; 5.976 ns ;
- ; N/A ; 32.10 MHz ( period = 31.152 ns ) ; key44:inst|state[0] ; key44:inst|row_reg[3] ; GCLKP ; GCLKP ; None ; None ; 5.976 ns ;
- ; N/A ; 32.19 MHz ( period = 31.070 ns ) ; key44:inst|state[3] ; key44:inst|col_reg[1] ; GCLKP ; GCLKP ; None ; None ; 5.935 ns ;
- ; N/A ; 32.19 MHz ( period = 31.070 ns ) ; key44:inst|state[3] ; key44:inst|col_reg[3] ; GCLKP ; GCLKP ; None ; None ; 5.935 ns ;
- ; N/A ; 32.19 MHz ( period = 31.070 ns ) ; key44:inst|state[3] ; key44:inst|row_reg[3] ; GCLKP ; GCLKP ; None ; None ; 5.935 ns ;
- ; N/A ; 32.30 MHz ( period = 30.960 ns ) ; key44:inst|state[1] ; key44:inst|col_reg[1] ; GCLKP ; GCLKP ; None ; None ; 5.880 ns ;
- ; N/A ; 32.30 MHz ( period = 30.960 ns ) ; key44:inst|state[1] ; key44:inst|col_reg[3] ; GCLKP ; GCLKP ; None ; None ; 5.880 ns ;
- ; N/A ; 32.30 MHz ( period = 30.960 ns ) ; key44:inst|state[1] ; key44:inst|row_reg[3] ; GCLKP ; GCLKP ; None ; None ; 5.880 ns ;
- ; N/A ; 32.72 MHz ( period = 30.560 ns ) ; key44:inst|state[5] ; key44:inst|row_reg[2] ; GCLKP ; GCLKP ; None ; None ; 7.350 ns ;
- ; N/A ; 32.72 MHz ( period = 30.560 ns ) ; key44:inst|state[5] ; key44:inst|row_reg[0] ; GCLKP ; GCLKP ; None ; None ; 7.350 ns ;
- ; N/A ; 32.72 MHz ( period = 30.560 ns ) ; key44:inst|state[5] ; key44:inst|row_reg[1] ; GCLKP ; GCLKP ; None ; None ; 7.350 ns ;
- ; N/A ; 32.89 MHz ( period = 30.400 ns ) ; key44:inst|state[0] ; key44:inst|row_reg[2] ; GCLKP ; GCLKP ; None ; None ; 7.270 ns ;
- ; N/A ; 32.89 MHz ( period = 30.400 ns ) ; key44:inst|state[0] ; key44:inst|row_reg[0] ; GCLKP ; GCLKP ; None ; None ; 7.270 ns ;
- ; N/A ; 32.89 MHz ( period = 30.400 ns ) ; key44:inst|state[0] ; key44:inst|row_reg[1] ; GCLKP ; GCLKP ; None ; None ; 7.270 ns ;
- ; N/A ; 32.98 MHz ( period = 30.318 ns ) ; key44:inst|state[3] ; key44:inst|row_reg[2] ; GCLKP ; GCLKP ; None ; None ; 7.229 ns ;
- ; N/A ; 32.98 MHz ( period = 30.318 ns ) ; key44:inst|state[3] ; key44:inst|row_reg[0] ; GCLKP ; GCLKP ; None ; None ; 7.229 ns ;
- ; N/A ; 32.98 MHz ( period = 30.318 ns ) ; key44:inst|state[3] ; key44:inst|row_reg[1] ; GCLKP ; GCLKP ; None ; None ; 7.229 ns ;
- ; N/A ; 33.10 MHz ( period = 30.208 ns ) ; key44:inst|state[1] ; key44:inst|row_reg[2] ; GCLKP ; GCLKP ; None ; None ; 7.174 ns ;
- ; N/A ; 33.10 MHz ( period = 30.208 ns ) ; key44:inst|state[1] ; key44:inst|row_reg[0] ; GCLKP ; GCLKP ; None ; None ; 7.174 ns ;
- ; N/A ; 33.10 MHz ( period = 30.208 ns ) ; key44:inst|state[1] ; key44:inst|row_reg[1] ; GCLKP ; GCLKP ; None ; None ; 7.174 ns ;
- ; N/A ; 33.62 MHz ( period = 29.748 ns ) ; key44:inst|state[5] ; key44:inst|col_reg[2] ; GCLKP ; GCLKP ; None ; None ; 5.627 ns ;
- ; N/A ; 33.62 MHz ( period = 29.748 ns ) ; key44:inst|state[5] ; key44:inst|col_reg[0] ; GCLKP ; GCLKP ; None ; None ; 5.627 ns ;
- ; N/A ; 33.80 MHz ( period = 29.588 ns ) ; key44:inst|state[0] ; key44:inst|col_reg[2] ; GCLKP ; GCLKP ; None ; None ; 5.547 ns ;
- ; N/A ; 33.80 MHz ( period = 29.588 ns ) ; key44:inst|state[0] ; key44:inst|col_reg[0] ; GCLKP ; GCLKP ; None ; None ; 5.547 ns ;
- ; N/A ; 33.89 MHz ( period = 29.506 ns ) ; key44:inst|state[3] ; key44:inst|col_reg[2] ; GCLKP ; GCLKP ; None ; None ; 5.506 ns ;
- ; N/A ; 33.89 MHz ( period = 29.506 ns ) ; key44:inst|state[3] ; key44:inst|col_reg[0] ; GCLKP ; GCLKP ; None ; None ; 5.506 ns ;
- ; N/A ; 34.02 MHz ( period = 29.396 ns ) ; key44:inst|state[1] ; key44:inst|col_reg[2] ; GCLKP ; GCLKP ; None ; None ; 5.451 ns ;
- ; N/A ; 34.02 MHz ( period = 29.396 ns ) ; key44:inst|state[1] ; key44:inst|col_reg[0] ; GCLKP ; GCLKP ; None ; None ; 5.451 ns ;
- ; N/A ; 35.40 MHz ( period = 28.250 ns ) ; key44:inst|state[2] ; key44:inst|col_reg[1] ; GCLKP ; GCLKP ; None ; None ; 4.525 ns ;
- ; N/A ; 35.40 MHz ( period = 28.250 ns ) ; key44:inst|state[2] ; key44:inst|col_reg[3] ; GCLKP ; GCLKP ; None ; None ; 4.525 ns ;
- ; N/A ; 35.40 MHz ( period = 28.250 ns ) ; key44:inst|state[2] ; key44:inst|row_reg[3] ; GCLKP ; GCLKP ; None ; None ; 4.525 ns ;
- ; N/A ; 35.90 MHz ( period = 27.854 ns ) ; key44:inst|state[4] ; key44:inst|col_reg[1] ; GCLKP ; GCLKP ; None ; None ; 4.327 ns ;
- ; N/A ; 35.90 MHz ( period = 27.854 ns ) ; key44:inst|state[4] ; key44:inst|col_reg[3] ; GCLKP ; GCLKP ; None ; None ; 4.327 ns ;
- ; N/A ; 35.90 MHz ( period = 27.854 ns ) ; key44:inst|state[4] ; key44:inst|row_reg[3] ; GCLKP ; GCLKP ; None ; None ; 4.327 ns ;
- ; N/A ; 36.37 MHz ( period = 27.498 ns ) ; key44:inst|state[2] ; key44:inst|row_reg[2] ; GCLKP ; GCLKP ; None ; None ; 5.819 ns ;
- ; N/A ; 36.37 MHz ( period = 27.498 ns ) ; key44:inst|state[2] ; key44:inst|row_reg[0] ; GCLKP ; GCLKP ; None ; None ; 5.819 ns ;
- ; N/A ; 36.37 MHz ( period = 27.498 ns ) ; key44:inst|state[2] ; key44:inst|row_reg[1] ; GCLKP ; GCLKP ; None ; None ; 5.819 ns ;
- ; N/A ; 36.78 MHz ( period = 27.192 ns ) ; key44:inst|state[2] ; key44:inst|col_reg[0] ; GCLKP ; GCLKP ; None ; None ; 4.349 ns ;
- ; N/A ; 36.90 MHz ( period = 27.102 ns ) ; key44:inst|state[4] ; key44:inst|row_reg[2] ; GCLKP ; GCLKP ; None ; None ; 5.621 ns ;
- ; N/A ; 36.90 MHz ( period = 27.102 ns ) ; key44:inst|state[4] ; key44:inst|row_reg[0] ; GCLKP ; GCLKP ; None ; None ; 5.621 ns ;
- ; N/A ; 36.90 MHz ( period = 27.102 ns ) ; key44:inst|state[4] ; key44:inst|row_reg[1] ; GCLKP ; GCLKP ; None ; None ; 5.621 ns ;
- ; N/A ; 37.44 MHz ( period = 26.712 ns ) ; key44:inst|state[4] ; key44:inst|col_reg[0] ; GCLKP ; GCLKP ; None ; None ; 4.109 ns ;
- ; N/A ; 37.47 MHz ( period = 26.686 ns ) ; key44:inst|state[2] ; key44:inst|col_reg[2] ; GCLKP ; GCLKP ; None ; None ; 4.096 ns ;
- ; N/A ; 38.04 MHz ( period = 26.290 ns ) ; key44:inst|state[4] ; key44:inst|col_reg[2] ; GCLKP ; GCLKP ; None ; None ; 3.898 ns ;
- ; N/A ; 113.08 MHz ( period = 8.843 ns ) ; key44:inst|state[1] ; key44:inst|state[1] ; GCLKP ; GCLKP ; None ; None ; 8.134 ns ;
- ; N/A ; 113.17 MHz ( period = 8.836 ns ) ; key44:inst|state[1] ; key44:inst|state[4] ; GCLKP ; GCLKP ; None ; None ; 8.127 ns ;
- ; N/A ; 113.39 MHz ( period = 8.819 ns ) ; key44:inst|state[1] ; key44:inst|state[5] ; GCLKP ; GCLKP ; None ; None ; 8.110 ns ;
- ; N/A ; 118.02 MHz ( period = 8.473 ns ) ; key44:inst|state[4] ; key44:inst|state[2] ; GCLKP ; GCLKP ; None ; None ; 7.764 ns ;
- ; N/A ; 118.78 MHz ( period = 8.419 ns ) ; key44:inst|state[5] ; key44:inst|state[2] ; GCLKP ; GCLKP ; None ; None ; 7.710 ns ;
- ; N/A ; 118.99 MHz ( period = 8.404 ns ) ; key44:inst|state[4] ; key44:inst|state[5] ; GCLKP ; GCLKP ; None ; None ; 7.695 ns ;
- ; N/A ; 122.74 MHz ( period = 8.147 ns ) ; key44:inst|state[5] ; key44:inst|state[1] ; GCLKP ; GCLKP ; None ; None ; 7.438 ns ;
- ; N/A ; 122.77 MHz ( period = 8.145 ns ) ; Frequency:inst5|CLK:Count1[3] ; Frequency:inst5|CLK:Count1[4] ; GCLKP ; GCLKP ; None ; None ; 7.436 ns ;
- ; N/A ; 122.82 MHz ( period = 8.142 ns ) ; Frequency:inst5|CLK:Count1[5] ; Frequency:inst5|CLK:Count1[9] ; GCLKP ; GCLKP ; None ; None ; 7.433 ns ;
- ; N/A ; 122.85 MHz ( period = 8.140 ns ) ; key44:inst|state[5] ; key44:inst|state[4] ; GCLKP ; GCLKP ; None ; None ; 7.431 ns ;
- ; N/A ; 123.32 MHz ( period = 8.109 ns ) ; Frequency:inst5|CLK:Count1[3] ; Frequency:inst5|CLK:Count1[5] ; GCLKP ; GCLKP ; None ; None ; 7.400 ns ;
- ; N/A ; 123.67 MHz ( period = 8.086 ns ) ; Frequency:inst5|CLK:Count1[4] ; Frequency:inst5|CLK:Count1[5] ; GCLKP ; GCLKP ; None ; None ; 7.377 ns ;
- ; N/A ; 124.64 MHz ( period = 8.023 ns ) ; key44:inst|state[5] ; key44:inst|state[0] ; GCLKP ; GCLKP ; None ; None ; 7.314 ns ;
- ; N/A ; 125.72 MHz ( period = 7.954 ns ) ; key44:inst|state[4] ; key44:inst|state[0] ; GCLKP ; GCLKP ; None ; None ; 7.245 ns ;
- ; N/A ; 126.65 MHz ( period = 7.896 ns ) ; Frequency:inst5|CLK:Count1[3] ; Frequency:inst5|CLK:Count1[9] ; GCLKP ; GCLKP ; None ; None ; 7.187 ns ;
- ; N/A ; 127.02 MHz ( period = 7.873 ns ) ; Frequency:inst5|CLK:Count1[4] ; Frequency:inst5|CLK:Count1[9] ; GCLKP ; GCLKP ; None ; None ; 7.164 ns ;
- ; N/A ; 127.94 MHz ( period = 7.816 ns ) ; key44:inst|state[4] ; key44:inst|state[1] ; GCLKP ; GCLKP ; None ; None ; 7.107 ns ;
- ; N/A ; 128.06 MHz ( period = 7.809 ns ) ; key44:inst|state[4] ; key44:inst|state[4] ; GCLKP ; GCLKP ; None ; None ; 7.100 ns ;
- ; N/A ; 130.36 MHz ( period = 7.671 ns ) ; key44:inst|state[1] ; key44:inst|state[0] ; GCLKP ; GCLKP ; None ; None ; 6.962 ns ;
- ; N/A ; 131.68 MHz ( period = 7.594 ns ) ; Frequency:inst5|CLK:Count1[0] ; Frequency:inst5|CLK:Count1[4] ; GCLKP ; GCLKP ; None ; None ; 6.885 ns ;
- ; N/A ; 132.31 MHz ( period = 7.558 ns ) ; Frequency:inst5|CLK:Count1[0] ; Frequency:inst5|CLK:Count1[5] ; GCLKP ; GCLKP ; None ; None ; 6.849 ns ;
- ; N/A ; 132.52 MHz ( period = 7.546 ns ) ; Frequency:inst5|CLK:Count1[5] ; Frequency:inst5|CLK:Count1[8] ; GCLKP ; GCLKP ; None ; None ; 6.837 ns ;
- ; N/A ; 132.87 MHz ( period = 7.526 ns ) ; Frequency:inst5|CLK:Count1[4] ; Frequency:inst5|CLK:Count1[4] ; GCLKP ; GCLKP ; None ; None ; 6.817 ns ;
- ; N/A ; 132.91 MHz ( period = 7.524 ns ) ; Frequency:inst5|CLK:Count1[4] ; Frequency:inst5|CLK:Count1[3] ; GCLKP ; GCLKP ; None ; None ; 6.815 ns ;
- ; N/A ; 133.00 MHz ( period = 7.519 ns ) ; Frequency:inst5|CLK:Count1[6] ; Frequency:inst5|CLK:Count1[9] ; GCLKP ; GCLKP ; None ; None ; 6.810 ns ;
- ; N/A ; 134.08 MHz ( period = 7.458 ns ) ; Frequency:inst5|CLK:Count1[5] ; Frequency:inst5|CLK:Count1[5] ; GCLKP ; GCLKP ; None ; None ; 6.749 ns ;
- ; N/A ; 134.12 MHz ( period = 7.456 ns ) ; Frequency:inst5|CLK:Count2[0] ; Frequency:inst5|CLK:Count2[7] ; GCLKP ; GCLKP ; None ; None ; 6.747 ns ;
- ; N/A ; 134.14 MHz ( period = 7.455 ns ) ; Frequency:inst5|CLK:Count2[0] ; Frequency:inst5|CLK:Count2[8] ; GCLKP ; GCLKP ; None ; None ; 6.746 ns ;
- ; N/A ; 134.16 MHz ( period = 7.454 ns ) ; Frequency:inst5|CLK:Count1[5] ; Frequency:inst5|CLK:Count1[4] ; GCLKP ; GCLKP ; None ; None ; 6.745 ns ;
- ; N/A ; 134.17 MHz ( period = 7.453 ns ) ; Frequency:inst5|CLK:Count2[0] ; Frequency:inst5|CLK:Count2[4] ; GCLKP ; GCLKP ; None ; None ; 6.744 ns ;
- ; N/A ; 134.19 MHz ( period = 7.452 ns ) ; Frequency:inst5|CLK:Count1[5] ; Frequency:inst5|CLK:Count1[3] ; GCLKP ; GCLKP ; None ; None ; 6.743 ns ;
- ; N/A ; 134.32 MHz ( period = 7.445 ns ) ; Frequency:inst5|CLK:Count2[0] ; Frequency:inst5|CLK:Count2[5] ; GCLKP ; GCLKP ; None ; None ; 6.736 ns ;
- ; N/A ; 134.72 MHz ( period = 7.423 ns ) ; Frequency:inst5|CLK:Count1[3] ; Frequency:inst5|CLK:Count1[8] ; GCLKP ; GCLKP ; None ; None ; 6.714 ns ;
- ; N/A ; 135.12 MHz ( period = 7.401 ns ) ; key44:inst|state[2] ; key44:inst|state[1] ; GCLKP ; GCLKP ; None ; None ; 6.692 ns ;
- ; N/A ; 135.14 MHz ( period = 7.400 ns ) ; Frequency:inst5|CLK:Count1[4] ; Frequency:inst5|CLK:Count1[8] ; GCLKP ; GCLKP ; None ; None ; 6.691 ns ;
- ; N/A ; 135.17 MHz ( period = 7.398 ns ) ; Frequency:inst5|CLK:Count2[4] ; Frequency:inst5|CLK:Count2[7] ; GCLKP ; GCLKP ; None ; None ; 6.689 ns ;
- ; N/A ; 135.19 MHz ( period = 7.397 ns ) ; Frequency:inst5|CLK:Count2[4] ; Frequency:inst5|CLK:Count2[8] ; GCLKP ; GCLKP ; None ; None ; 6.688 ns ;
- ; N/A ; 135.23 MHz ( period = 7.395 ns ) ; Frequency:inst5|CLK:Count2[4] ; Frequency:inst5|CLK:Count2[4] ; GCLKP ; GCLKP ; None ; None ; 6.686 ns ;
- ; N/A ; 135.24 MHz ( period = 7.394 ns ) ; key44:inst|state[2] ; key44:inst|state[4] ; GCLKP ; GCLKP ; None ; None ; 6.685 ns ;
- ; N/A ; 135.30 MHz ( period = 7.391 ns ) ; key44:inst|state[2] ; key44:inst|state[5] ; GCLKP ; GCLKP ; None ; None ; 6.682 ns ;
- ; N/A ; 135.37 MHz ( period = 7.387 ns ) ; Frequency:inst5|CLK:Count2[4] ; Frequency:inst5|CLK:Count2[5] ; GCLKP ; GCLKP ; None ; None ; 6.678 ns ;
- ; N/A ; 135.96 MHz ( period = 7.355 ns ) ; Frequency:inst5|CLK:Count1[5] ; Frequency:inst5|Period1mS ; GCLKP ; GCLKP ; None ; None ; 6.646 ns ;
- ; N/A ; 136.15 MHz ( period = 7.345 ns ) ; Frequency:inst5|CLK:Count1[0] ; Frequency:inst5|CLK:Count1[9] ; GCLKP ; GCLKP ; None ; None ; 6.636 ns ;
- ; N/A ; 136.86 MHz ( period = 7.307 ns ) ; Frequency:inst5|CLK:Count2[0] ; Frequency:inst5|CLK:Count2[1] ; GCLKP ; GCLKP ; None ; None ; 6.598 ns ;
- ; N/A ; 137.12 MHz ( period = 7.293 ns ) ; Frequency:inst5|CLK:Count1[7] ; Frequency:inst5|CLK:Count1[5] ; GCLKP ; GCLKP ; None ; None ; 6.584 ns ;
- ; N/A ; 137.19 MHz ( period = 7.289 ns ) ; Frequency:inst5|CLK:Count1[7] ; Frequency:inst5|CLK:Count1[4] ; GCLKP ; GCLKP ; None ; None ; 6.580 ns ;
- ; N/A ; 137.21 MHz ( period = 7.288 ns ) ; key44:inst|state[2] ; key44:inst|state[0] ; GCLKP ; GCLKP ; None ; None ; 6.579 ns ;
- ; N/A ; 137.23 MHz ( period = 7.287 ns ) ; Frequency:inst5|CLK:Count1[7] ; Frequency:inst5|CLK:Count1[3] ; GCLKP ; GCLKP ; None ; None ; 6.578 ns ;
- ; N/A ; 137.78 MHz ( period = 7.258 ns ) ; Frequency:inst5|CLK:Count1[1] ; Frequency:inst5|CLK:Count1[4] ; GCLKP ; GCLKP ; None ; None ; 6.549 ns ;
- ; N/A ; 137.91 MHz ( period = 7.251 ns ) ; Frequency:inst5|CLK:Count2[0] ; Frequency:inst5|CLK:Count2[3] ; GCLKP ; GCLKP ; None ; None ; 6.542 ns ;
- ; N/A ; 137.93 MHz ( period = 7.250 ns ) ; Frequency:inst5|CLK:Count2[0] ; Frequency:inst5|CLK:Count2[9] ; GCLKP ; GCLKP ; None ; None ; 6.541 ns ;
- ; N/A ; 138.03 MHz ( period = 7.245 ns ) ; Frequency:inst5|CLK:Count2[0] ; Frequency:inst5|CLK:Count2[6] ; GCLKP ; GCLKP ; None ; None ; 6.536 ns ;
- ; N/A ; 138.05 MHz ( period = 7.244 ns ) ; Frequency:inst5|CLK:Count2[0] ; Frequency:inst5|CLK:Count2[2] ; GCLKP ; GCLKP ; None ; None ; 6.535 ns ;
- ; N/A ; 138.06 MHz ( period = 7.243 ns ) ; Frequency:inst5|CLK:Count2[0] ; Frequency:inst5|CLK:Count2[0] ; GCLKP ; GCLKP ; None ; None ; 6.534 ns ;
- ; N/A ; 138.47 MHz ( period = 7.222 ns ) ; Frequency:inst5|CLK:Count1[1] ; Frequency:inst5|CLK:Count1[5] ; GCLKP ; GCLKP ; None ; None ; 6.513 ns ;
- ; N/A ; 138.58 MHz ( period = 7.216 ns ) ; Frequency:inst5|CLK:Count2[4] ; Frequency:inst5|CLK:Count2[1] ; GCLKP ; GCLKP ; None ; None ; 6.507 ns ;
- ; N/A ; 139.02 MHz ( period = 7.193 ns ) ; Frequency:inst5|CLK:Count2[4] ; Frequency:inst5|CLK:Count2[3] ; GCLKP ; GCLKP ; None ; None ; 6.484 ns ;
- ; N/A ; 139.04 MHz ( period = 7.192 ns ) ; Frequency:inst5|CLK:Count2[4] ; Frequency:inst5|CLK:Count2[9] ; GCLKP ; GCLKP ; None ; None ; 6.483 ns ;
- ; N/A ; 139.14 MHz ( period = 7.187 ns ) ; Frequency:inst5|CLK:Count2[4] ; Frequency:inst5|CLK:Count2[6] ; GCLKP ; GCLKP ; None ; None ; 6.478 ns ;
- ; N/A ; 139.16 MHz ( period = 7.186 ns ) ; Frequency:inst5|CLK:Count2[4] ; Frequency:inst5|CLK:Count2[2] ; GCLKP ; GCLKP ; None ; None ; 6.477 ns ;
- ; N/A ; 139.18 MHz ( period = 7.185 ns ) ; Frequency:inst5|CLK:Count2[4] ; Frequency:inst5|CLK:Count2[0] ; GCLKP ; GCLKP ; None ; None ; 6.476 ns ;
- ; N/A ; 139.59 MHz ( period = 7.164 ns ) ; Frequency:inst5|CLK:Count1[2] ; Frequency:inst5|CLK:Count1[4] ; GCLKP ; GCLKP ; None ; None ; 6.455 ns ;
- ; N/A ; 139.72 MHz ( period = 7.157 ns ) ; key44:inst|state[5] ; key44:inst|state[5] ; GCLKP ; GCLKP ; None ; None ; 6.448 ns ;
- ; N/A ; 140.08 MHz ( period = 7.139 ns ) ; Frequency:inst5|CLK:Count1[8] ; Frequency:inst5|CLK:Count1[5] ; GCLKP ; GCLKP ; None ; None ; 6.430 ns ;
- ; N/A ; 140.15 MHz ( period = 7.135 ns ) ; Frequency:inst5|CLK:Count1[8] ; Frequency:inst5|CLK:Count1[4] ; GCLKP ; GCLKP ; None ; None ; 6.426 ns ;
- ; N/A ; 140.19 MHz ( period = 7.133 ns ) ; Frequency:inst5|CLK:Count1[8] ; Frequency:inst5|CLK:Count1[3] ; GCLKP ; GCLKP ; None ; None ; 6.424 ns ;
- ; N/A ; 140.29 MHz ( period = 7.128 ns ) ; Frequency:inst5|CLK:Count1[2] ; Frequency:inst5|CLK:Count1[5] ; GCLKP ; GCLKP ; None ; None ; 6.419 ns ;
- ; N/A ; 140.63 MHz ( period = 7.111 ns ) ; Frequency:inst5|CLK:Count1[3] ; Frequency:inst5|CLK:Count1[6] ; GCLKP ; GCLKP ; None ; None ; 6.402 ns ;
- ; N/A ; 140.67 MHz ( period = 7.109 ns ) ; Frequency:inst5|CLK:Count1[3] ; Frequency:inst5|Period1mS ; GCLKP ; GCLKP ; None ; None ; 6.400 ns ;
- ; N/A ; 141.08 MHz ( period = 7.088 ns ) ; Frequency:inst5|CLK:Count1[4] ; Frequency:inst5|CLK:Count1[6] ; GCLKP ; GCLKP ; None ; None ; 6.379 ns ;
- ; N/A ; 141.12 MHz ( period = 7.086 ns ) ; Frequency:inst5|CLK:Count1[4] ; Frequency:inst5|Period1mS ; GCLKP ; GCLKP ; None ; None ; 6.377 ns ;
- ; N/A ; 141.62 MHz ( period = 7.061 ns ) ; key44:inst|state[3] ; key44:inst|state[5] ; GCLKP ; GCLKP ; None ; None ; 6.352 ns ;
- ; N/A ; 142.37 MHz ( period = 7.024 ns ) ; Frequency:inst5|CLK:Count1[3] ; Frequency:inst5|CLK:Count1[3] ; GCLKP ; GCLKP ; None ; None ; 6.315 ns ;
- ; N/A ; 142.67 MHz ( period = 7.009 ns ) ; Frequency:inst5|CLK:Count1[1] ; Frequency:inst5|CLK:Count1[9] ; GCLKP ; GCLKP ; None ; None ; 6.300 ns ;
- ; N/A ; 142.69 MHz ( period = 7.008 ns ) ; Frequency:inst5|CLK:Count1[0] ; Frequency:inst5|CLK:Count1[3] ; GCLKP ; GCLKP ; None ; None ; 6.299 ns ;
- ; N/A ; 143.10 MHz ( period = 6.988 ns ) ; Frequency:inst5|CLK:Count1[5] ; Frequency:inst5|CLK:Count1[6] ; GCLKP ; GCLKP ; None ; None ; 6.279 ns ;
- ; N/A ; 144.45 MHz ( period = 6.923 ns ) ; Frequency:inst5|CLK:Count1[6] ; Frequency:inst5|CLK:Count1[8] ; GCLKP ; GCLKP ; None ; None ; 6.214 ns ;
- ; N/A ; 144.61 MHz ( period = 6.915 ns ) ; Frequency:inst5|CLK:Count1[2] ; Frequency:inst5|CLK:Count1[9] ; GCLKP ; GCLKP ; None ; None ; 6.206 ns ;
- ; N/A ; 145.52 MHz ( period = 6.872 ns ) ; Frequency:inst5|CLK:Count1[0] ; Frequency:inst5|CLK:Count1[8] ; GCLKP ; GCLKP ; None ; None ; 6.163 ns ;
- ; N/A ; 146.50 MHz ( period = 6.826 ns ) ; Frequency:inst5|CLK:Count1[5] ; Frequency:inst5|CLK:Count1[7] ; GCLKP ; GCLKP ; None ; None ; 6.117 ns ;
- ; N/A ; 146.50 MHz ( period = 6.826 ns ) ; Frequency:inst5|CLK:Count1[3] ; Frequency:inst5|CLK:Count1[7] ; GCLKP ; GCLKP ; None ; None ; 6.117 ns ;
- ; N/A ; 146.99 MHz ( period = 6.803 ns ) ; Frequency:inst5|CLK:Count1[4] ; Frequency:inst5|CLK:Count1[7] ; GCLKP ; GCLKP ; None ; None ; 6.094 ns ;
- ; N/A ; 147.84 MHz ( period = 6.764 ns ) ; Frequency:inst5|CLK:Count1[2] ; Frequency:inst5|CLK:Count1[3] ; GCLKP ; GCLKP ; None ; None ; 6.055 ns ;
- ; N/A ; 148.26 MHz ( period = 6.745 ns ) ; Frequency:inst5|CLK:Count2[7] ; Frequency:inst5|CLK:Count2[7] ; GCLKP ; GCLKP ; None ; None ; 6.036 ns ;
- ; N/A ; 148.28 MHz ( period = 6.744 ns ) ; Frequency:inst5|CLK:Count2[7] ; Frequency:inst5|CLK:Count2[8] ; GCLKP ; GCLKP ; None ; None ; 6.035 ns ;
- ; N/A ; 148.32 MHz ( period = 6.742 ns ) ; Frequency:inst5|CLK:Count2[7] ; Frequency:inst5|CLK:Count2[4] ; GCLKP ; GCLKP ; None ; None ; 6.033 ns ;
- ; N/A ; 148.50 MHz ( period = 6.734 ns ) ; Frequency:inst5|CLK:Count2[7] ; Frequency:inst5|CLK:Count2[5] ; GCLKP ; GCLKP ; None ; None ; 6.025 ns ;
- ; N/A ; 148.54 MHz ( period = 6.732 ns ) ; Frequency:inst5|CLK:Count1[6] ; Frequency:inst5|Period1mS ; GCLKP ; GCLKP ; None ; None ; 6.023 ns ;
- ; N/A ; 149.16 MHz ( period = 6.704 ns ) ; Frequency:inst5|CLK:Count2[2] ; Frequency:inst5|CLK:Count2[7] ; GCLKP ; GCLKP ; None ; None ; 5.995 ns ;
- ; N/A ; 149.19 MHz ( period = 6.703 ns ) ; Frequency:inst5|CLK:Count2[2] ; Frequency:inst5|CLK:Count2[8] ; GCLKP ; GCLKP ; None ; None ; 5.994 ns ;
- ; N/A ; 149.23 MHz ( period = 6.701 ns ) ; Frequency:inst5|CLK:Count2[2] ; Frequency:inst5|CLK:Count2[4] ; GCLKP ; GCLKP ; None ; None ; 5.992 ns ;
- ; N/A ; 149.41 MHz ( period = 6.693 ns ) ; Frequency:inst5|CLK:Count2[2] ; Frequency:inst5|CLK:Count2[5] ; GCLKP ; GCLKP ; None ; None ; 5.984 ns ;
- ; N/A ; 149.88 MHz ( period = 6.672 ns ) ; Frequency:inst5|CLK:Count1[1] ; Frequency:inst5|CLK:Count1[3] ; GCLKP ; GCLKP ; None ; None ; 5.963 ns ;
- ; N/A ; 150.26 MHz ( period = 6.655 ns ) ; Frequency:inst5|CLK:Count2[1] ; Frequency:inst5|CLK:Count2[1] ; GCLKP ; GCLKP ; None ; None ; 5.946 ns ;
- ; N/A ; 151.42 MHz ( period = 6.604 ns ) ; Frequency:inst5|CLK:Count1[6] ; Frequency:inst5|CLK:Count1[5] ; GCLKP ; GCLKP ; None ; None ; 5.895 ns ;
- ; N/A ; 151.52 MHz ( period = 6.600 ns ) ; Frequency:inst5|CLK:Count1[6] ; Frequency:inst5|CLK:Count1[4] ; GCLKP ; GCLKP ; None ; None ; 5.891 ns ;
- ; N/A ; 151.56 MHz ( period = 6.598 ns ) ; Frequency:inst5|CLK:Count1[6] ; Frequency:inst5|CLK:Count1[3] ; GCLKP ; GCLKP ; None ; None ; 5.889 ns ;
- ; N/A ; 151.79 MHz ( period = 6.588 ns ) ; Frequency:inst5|CLK:Count2[5] ; Frequency:inst5|CLK:Count2[7] ; GCLKP ; GCLKP ; None ; None ; 5.879 ns ;
- ; N/A ; 151.81 MHz ( period = 6.587 ns ) ; Frequency:inst5|CLK:Count2[5] ; Frequency:inst5|CLK:Count2[8] ; GCLKP ; GCLKP ; None ; None ; 5.878 ns ;
- ; N/A ; 151.86 MHz ( period = 6.585 ns ) ; Frequency:inst5|CLK:Count2[5] ; Frequency:inst5|CLK:Count2[4] ; GCLKP ; GCLKP ; None ; None ; 5.876 ns ;
- ; N/A ; 151.91 MHz ( period = 6.583 ns ) ; Frequency:inst5|CLK:Count2[6] ; Frequency:inst5|CLK:Count2[7] ; GCLKP ; GCLKP ; None ; None ; 5.874 ns ;
- ; N/A ; 151.93 MHz ( period = 6.582 ns ) ; Frequency:inst5|CLK:Count2[6] ; Frequency:inst5|CLK:Count2[8] ; GCLKP ; GCLKP ; None ; None ; 5.873 ns ;
- ; N/A ; 151.98 MHz ( period = 6.580 ns ) ; Frequency:inst5|CLK:Count2[6] ; Frequency:inst5|CLK:Count2[4] ; GCLKP ; GCLKP ; None ; None ; 5.871 ns ;
- ; N/A ; 152.05 MHz ( period = 6.577 ns ) ; Frequency:inst5|CLK:Count2[5] ; Frequency:inst5|CLK:Count2[5] ; GCLKP ; GCLKP ; None ; None ; 5.868 ns ;
- ; N/A ; 152.16 MHz ( period = 6.572 ns ) ; Frequency:inst5|CLK:Count2[6] ; Frequency:inst5|CLK:Count2[5] ; GCLKP ; GCLKP ; None ; None ; 5.863 ns ;
- ; N/A ; 152.37 MHz ( period = 6.563 ns ) ; Frequency:inst5|CLK:Count2[7] ; Frequency:inst5|CLK:Count2[1] ; GCLKP ; GCLKP ; None ; None ; 5.854 ns ;
- ; N/A ; 152.44 MHz ( period = 6.560 ns ) ; Frequency:inst5|CLK:Count1[0] ; Frequency:inst5|CLK:Count1[6] ; GCLKP ; GCLKP ; None ; None ; 5.851 ns ;
- ; N/A ; 152.49 MHz ( period = 6.558 ns ) ; Frequency:inst5|CLK:Count1[0] ; Frequency:inst5|Period1mS ; GCLKP ; GCLKP ; None ; None ; 5.849 ns ;
- ; N/A ; 152.56 MHz ( period = 6.555 ns ) ; Frequency:inst5|CLK:Count1[8] ; Frequency:inst5|CLK:Count1[9] ; GCLKP ; GCLKP ; None ; None ; 5.846 ns ;
- ; N/A ; 152.67 MHz ( period = 6.550 ns ) ; key44:inst|state[4] ; key44:inst|state[3] ; GCLKP ; GCLKP ; None ; None ; 5.841 ns ;
- ; N/A ; 152.91 MHz ( period = 6.540 ns ) ; Frequency:inst5|CLK:Count2[7] ; Frequency:inst5|CLK:Count2[3] ; GCLKP ; GCLKP ; None ; None ; 5.831 ns ;
- ; N/A ; 152.93 MHz ( period = 6.539 ns ) ; Frequency:inst5|CLK:Count2[7] ; Frequency:inst5|CLK:Count2[9] ; GCLKP ; GCLKP ; None ; None ; 5.830 ns ;
- ; N/A ; 153.00 MHz ( period = 6.536 ns ) ; Frequency:inst5|CLK:Count1[1] ; Frequency:inst5|CLK:Count1[8] ; GCLKP ; GCLKP ; None ; None ; 5.827 ns ;
- ; N/A ; 153.05 MHz ( period = 6.534 ns ) ; Frequency:inst5|CLK:Count2[7] ; Frequency:inst5|CLK:Count2[6] ; GCLKP ; GCLKP ; None ; None ; 5.825 ns ;
- ; N/A ; 153.07 MHz ( period = 6.533 ns ) ; Frequency:inst5|CLK:Count2[7] ; Frequency:inst5|CLK:Count2[2] ; GCLKP ; GCLKP ; None ; None ; 5.824 ns ;
- ; N/A ; 153.09 MHz ( period = 6.532 ns ) ; Frequency:inst5|CLK:Count2[7] ; Frequency:inst5|CLK:Count2[0] ; GCLKP ; GCLKP ; None ; None ; 5.823 ns ;
- ; N/A ; 153.33 MHz ( period = 6.522 ns ) ; Frequency:inst5|CLK:Count2[2] ; Frequency:inst5|CLK:Count2[1] ; GCLKP ; GCLKP ; None ; None ; 5.813 ns ;
- ; N/A ; 153.80 MHz ( period = 6.502 ns ) ; Frequency:inst5|CLK:Count2[1] ; Frequency:inst5|CLK:Count2[6] ; GCLKP ; GCLKP ; None ; None ; 5.793 ns ;
- ; N/A ; 153.87 MHz ( period = 6.499 ns ) ; Frequency:inst5|CLK:Count2[2] ; Frequency:inst5|CLK:Count2[3] ; GCLKP ; GCLKP ; None ; None ; 5.790 ns ;
- ; N/A ; 153.89 MHz ( period = 6.498 ns ) ; Frequency:inst5|CLK:Count2[2] ; Frequency:inst5|CLK:Count2[9] ; GCLKP ; GCLKP ; None ; None ; 5.789 ns ;
- ; N/A ; 153.94 MHz ( period = 6.496 ns ) ; key44:inst|state[5] ; key44:inst|state[3] ; GCLKP ; GCLKP ; None ; None ; 5.787 ns ;
- ; N/A ; 154.01 MHz ( period = 6.493 ns ) ; Frequency:inst5|CLK:Count2[2] ; Frequency:inst5|CLK:Count2[6] ; GCLKP ; GCLKP ; None ; None ; 5.784 ns ;
- ; N/A ; 154.04 MHz ( period = 6.492 ns ) ; Frequency:inst5|CLK:Count2[2] ; Frequency:inst5|CLK:Count2[2] ; GCLKP ; GCLKP ; None ; None ; 5.783 ns ;
- ; N/A ; 154.06 MHz ( period = 6.491 ns ) ; Frequency:inst5|CLK:Count2[2] ; Frequency:inst5|CLK:Count2[0] ; GCLKP ; GCLKP ; None ; None ; 5.782 ns ;
- ; N/A ; 154.11 MHz ( period = 6.489 ns ) ; Frequency:inst5|CLK:Count1[7] ; Frequency:inst5|CLK:Count1[9] ; GCLKP ; GCLKP ; None ; None ; 5.780 ns ;
- ; N/A ; 155.23 MHz ( period = 6.442 ns ) ; Frequency:inst5|CLK:Count1[2] ; Frequency:inst5|CLK:Count1[8] ; GCLKP ; GCLKP ; None ; None ; 5.733 ns ;
- ; N/A ; 155.26 MHz ( period = 6.441 ns ) ; Frequency:inst5|CLK:Count2[1] ; Frequency:inst5|CLK:Count2[9] ; GCLKP ; GCLKP ; None ; None ; 5.732 ns ;
- ; N/A ; 156.10 MHz ( period = 6.406 ns ) ; Frequency:inst5|CLK:Count2[5] ; Frequency:inst5|CLK:Count2[1] ; GCLKP ; GCLKP ; None ; None ; 5.697 ns ;
- ; N/A ; 156.23 MHz ( period = 6.401 ns ) ; Frequency:inst5|CLK:Count2[6] ; Frequency:inst5|CLK:Count2[1] ; GCLKP ; GCLKP ; None ; None ; 5.692 ns ;
- ; N/A ; 156.67 MHz ( period = 6.383 ns ) ; Frequency:inst5|CLK:Count2[5] ; Frequency:inst5|CLK:Count2[3] ; GCLKP ; GCLKP ; None ; None ; 5.674 ns ;
- ; N/A ; 156.69 MHz ( period = 6.382 ns ) ; Frequency:inst5|CLK:Count2[5] ; Frequency:inst5|CLK:Count2[9] ; GCLKP ; GCLKP ; None ; None ; 5.673 ns ;
- ; N/A ; 156.79 MHz ( period = 6.378 ns ) ; Frequency:inst5|CLK:Count2[6] ; Frequency:inst5|CLK:Count2[3] ; GCLKP ; GCLKP ; None ; None ; 5.669 ns ;
- ; N/A ; 156.81 MHz ( period = 6.377 ns ) ; Frequency:inst5|CLK:Count2[6] ; Frequency:inst5|CLK:Count2[9] ; GCLKP ; GCLKP ; None ; None ; 5.668 ns ;
- ; N/A ; 156.81 MHz ( period = 6.377 ns ) ; Frequency:inst5|CLK:Count2[5] ; Frequency:inst5|CLK:Count2[6] ; GCLKP ; GCLKP ; None ; None ; 5.668 ns ;
- ; N/A ; 156.84 MHz ( period = 6.376 ns ) ; Frequency:inst5|CLK:Count2[5] ; Frequency:inst5|CLK:Count2[2] ; GCLKP ; GCLKP ; None ; None ; 5.667 ns ;
- ; N/A ; 156.86 MHz ( period = 6.375 ns ) ; Frequency:inst5|CLK:Count2[5] ; Frequency:inst5|CLK:Count2[0] ; GCLKP ; GCLKP ; None ; None ; 5.666 ns ;
- ; N/A ; 156.94 MHz ( period = 6.372 ns ) ; Frequency:inst5|CLK:Count2[6] ; Frequency:inst5|CLK:Count2[6] ; GCLKP ; GCLKP ; None ; None ; 5.663 ns ;
- ; N/A ; 156.96 MHz ( period = 6.371 ns ) ; Frequency:inst5|CLK:Count2[6] ; Frequency:inst5|CLK:Count2[2] ; GCLKP ; GCLKP ; None ; None ; 5.662 ns ;
- ; N/A ; 156.99 MHz ( period = 6.370 ns ) ; Frequency:inst5|CLK:Count2[6] ; Frequency:inst5|CLK:Count2[0] ; GCLKP ; GCLKP ; None ; None ; 5.661 ns ;
- ; N/A ; 158.60 MHz ( period = 6.305 ns ) ; Frequency:inst5|CLK:Count2[9] ; Frequency:inst5|CLK:Count2[7] ; GCLKP ; GCLKP ; None ; None ; 5.596 ns ;
- ; N/A ; 158.63 MHz ( period = 6.304 ns ) ; Frequency:inst5|CLK:Count2[9] ; Frequency:inst5|CLK:Count2[8] ; GCLKP ; GCLKP ; None ; None ; 5.595 ns ;
- ; N/A ; 158.68 MHz ( period = 6.302 ns ) ; Frequency:inst5|CLK:Count2[9] ; Frequency:inst5|CLK:Count2[4] ; GCLKP ; GCLKP ; None ; None ; 5.593 ns ;
- ; N/A ; 158.88 MHz ( period = 6.294 ns ) ; Frequency:inst5|CLK:Count2[9] ; Frequency:inst5|CLK:Count2[5] ; GCLKP ; GCLKP ; None ; None ; 5.585 ns ;
- ; N/A ; 159.06 MHz ( period = 6.287 ns ) ; Frequency:inst5|CLK:Count2[1] ; Frequency:inst5|CLK:Count2[5] ; GCLKP ; GCLKP ; None ; None ; 5.578 ns ;
- ; N/A ; 159.36 MHz ( period = 6.275 ns ) ; Frequency:inst5|CLK:Count1[0] ; Frequency:inst5|CLK:Count1[7] ; GCLKP ; GCLKP ; None ; None ; 5.566 ns ;
- ; N/A ; 159.57 MHz ( period = 6.267 ns ) ; Frequency:inst5|CLK:Count2[1] ; Frequency:inst5|CLK:Count2[8] ; GCLKP ; GCLKP ; None ; None ; 5.558 ns ;
- ; N/A ; 160.67 MHz ( period = 6.224 ns ) ; Frequency:inst5|CLK:Count1[1] ; Frequency:inst5|CLK:Count1[6] ; GCLKP ; GCLKP ; None ; None ; 5.515 ns ;
- ; N/A ; 160.72 MHz ( period = 6.222 ns ) ; Frequency:inst5|CLK:Count1[1] ; Frequency:inst5|Period1mS ; GCLKP ; GCLKP ; None ; None ; 5.513 ns ;
- ; N/A ; 161.21 MHz ( period = 6.203 ns ) ; Frequency:inst5|CLK:Count1[6] ; Frequency:inst5|CLK:Count1[7] ; GCLKP ; GCLKP ; None ; None ; 5.494 ns ;
- ; N/A ; 161.71 MHz ( period = 6.184 ns ) ; key44:inst|state[0] ; key44:inst|state[5] ; GCLKP ; GCLKP ; None ; None ; 5.475 ns ;
- ; N/A ; 162.07 MHz ( period = 6.170 ns ) ; Frequency:inst5|CLK:Count2[1] ; Frequency:inst5|CLK:Count2[7] ; GCLKP ; GCLKP ; None ; None ; 5.461 ns ;
- ; N/A ; 163.13 MHz ( period = 6.130 ns ) ; Frequency:inst5|CLK:Count1[2] ; Frequency:inst5|CLK:Count1[6] ; GCLKP ; GCLKP ; None ; None ; 5.421 ns ;
- ; Timing analysis restricted to 200 rows. ; To change the limit use Settings (Assignments menu) ; ; ; ; ; ; ; ;
- +-----------------------------------------+-----------------------------------------------------+--------------------------------+--------------------------------+------------+----------+-----------------------------+---------------------------+-------------------------+
- +----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
- ; Clock Hold: 'GCLKP' ;
- +------------------------------------------+-----------------------+--------------------+------------+----------+----------------------------+----------------------------+--------------------------+
- ; Minimum Slack ; From ; To ; From Clock ; To Clock ; Required Hold Relationship ; Required Shortest P2P Time ; Actual Shortest P2P Time ;
- +------------------------------------------+-----------------------+--------------------+------------+----------+----------------------------+----------------------------+--------------------------+
- ; Not operational: Clock Skew > Data Delay ; key44:inst|col_reg[1] ; key44:inst|code[2] ; GCLKP ; GCLKP ; None ; None ; 7.065 ns ;
- ; Not operational: Clock Skew > Data Delay ; key44:inst|col_reg[0] ; key44:inst|code[2] ; GCLKP ; GCLKP ; None ; None ; 6.820 ns ;
- ; Not operational: Clock Skew > Data Delay ; key44:inst|col_reg[2] ; key44:inst|code[2] ; GCLKP ; GCLKP ; None ; None ; 6.849 ns ;
- ; Not operational: Clock Skew > Data Delay ; key44:inst|col_reg[3] ; key44:inst|code[2] ; GCLKP ; GCLKP ; None ; None ; 7.460 ns ;
- ; Not operational: Clock Skew > Data Delay ; key44:inst|row_reg[3] ; key44:inst|code[2] ; GCLKP ; GCLKP ; None ; None ; 7.490 ns ;
- ; Not operational: Clock Skew > Data Delay ; key44:inst|row_reg[3] ; key44:inst|code[3] ; GCLKP ; GCLKP ; None ; None ; 6.471 ns ;
- ; Not operational: Clock Skew > Data Delay ; key44:inst|row_reg[2] ; key44:inst|code[1] ; GCLKP ; GCLKP ; None ; None ; 3.958 ns ;
- ; Not operational: Clock Skew > Data Delay ; key44:inst|col_reg[1] ; key44:inst|code[3] ; GCLKP ; GCLKP ; None ; None ; 7.496 ns ;
- ; Not operational: Clock Skew > Data Delay ; key44:inst|row_reg[1] ; key44:inst|code[2] ; GCLKP ; GCLKP ; None ; None ; 7.078 ns ;
- ; Not operational: Clock Skew > Data Delay ; key44:inst|row_reg[0] ; key44:inst|code[1] ; GCLKP ; GCLKP ; None ; None ; 5.046 ns ;
- ; Not operational: Clock Skew > Data Delay ; key44:inst|row_reg[1] ; key44:inst|code[1] ; GCLKP ; GCLKP ; None ; None ; 5.063 ns ;
- ; Not operational: Clock Skew > Data Delay ; key44:inst|row_reg[1] ; key44:inst|code[3] ; GCLKP ; GCLKP ; None ; None ; 6.056 ns ;
- ; Not operational: Clock Skew > Data Delay ; key44:inst|col_reg[3] ; key44:inst|code[3] ; GCLKP ; GCLKP ; None ; None ; 7.966 ns ;
- ; Not operational: Clock Skew > Data Delay ; key44:inst|row_reg[0] ; key44:inst|code[2] ; GCLKP ; GCLKP ; None ; None ; 7.647 ns ;
- ; Not operational: Clock Skew > Data Delay ; key44:inst|row_reg[0] ; key44:inst|code[3] ; GCLKP ; GCLKP ; None ; None ; 6.625 ns ;
- ; Not operational: Clock Skew > Data Delay ; key44:inst|col_reg[2] ; key44:inst|code[3] ; GCLKP ; GCLKP ; None ; None ; 8.215 ns ;
- ; Not operational: Clock Skew > Data Delay ; key44:inst|row_reg[3] ; key44:inst|code[1] ; GCLKP ; GCLKP ; None ; None ; 7.630 ns ;
- ; Not operational: Clock Skew > Data Delay ; key44:inst|row_reg[3] ; key44:inst|code[0] ; GCLKP ; GCLKP ; None ; None ; 8.037 ns ;
- ; Not operational: Clock Skew > Data Delay ; key44:inst|row_reg[2] ; key44:inst|code[2] ; GCLKP ; GCLKP ; None ; None ; 8.549 ns ;
- ; Not operational: Clock Skew > Data Delay ; key44:inst|col_reg[0] ; key44:inst|code[3] ; GCLKP ; GCLKP ; None ; None ; 8.821 ns ;
- ; Not operational: Clock Skew > Data Delay ; key44:inst|row_reg[2] ; key44:inst|code[3] ; GCLKP ; GCLKP ; None ; None ; 7.527 ns ;
- ; Not operational: Clock Skew > Data Delay ; key44:inst|row_reg[0] ; key44:inst|code[0] ; GCLKP ; GCLKP ; None ; None ; 6.594 ns ;
- ; Not operational: Clock Skew > Data Delay ; key44:inst|row_reg[1] ; key44:inst|code[0] ; GCLKP ; GCLKP ; None ; None ; 6.820 ns ;
- ; Not operational: Clock Skew > Data Delay ; key44:inst|col_reg[1] ; key44:inst|code[1] ; GCLKP ; GCLKP ; None ; None ; 9.013 ns ;
- ; Not operational: Clock Skew > Data Delay ; key44:inst|row_reg[2] ; key44:inst|code[0] ; GCLKP ; GCLKP ; None ; None ; 7.525 ns ;
- ; Not operational: Clock Skew > Data Delay ; key44:inst|col_reg[3] ; key44:inst|code[1] ; GCLKP ; GCLKP ; None ; None ; 9.343 ns ;
- ; Not operational: Clock Skew > Data Delay ; key44:inst|col_reg[1] ; key44:inst|code[0] ; GCLKP ; GCLKP ; None ; None ; 9.434 ns ;
- ; Not operational: Clock Skew > Data Delay ; key44:inst|col_reg[3] ; key44:inst|code[0] ; GCLKP ; GCLKP ; None ; None ; 9.764 ns ;
- ; Not operational: Clock Skew > Data Delay ; key44:inst|col_reg[0] ; key44:inst|code[1] ; GCLKP ; GCLKP ; None ; None ; 9.807 ns ;
- ; Not operational: Clock Skew > Data Delay ; key44:inst|col_reg[2] ; key44:inst|code[1] ; GCLKP ; GCLKP ; None ; None ; 9.848 ns ;
- ; Not operational: Clock Skew > Data Delay ; key44:inst|col_reg[0] ; key44:inst|code[0] ; GCLKP ; GCLKP ; None ; None ; 10.228 ns ;
- ; Not operational: Clock Skew > Data Delay ; key44:inst|col_reg[2] ; key44:inst|code[0] ; GCLKP ; GCLKP ; None ; None ; 10.269 ns ;
- +------------------------------------------+-----------------------+--------------------+------------+----------+----------------------------+----------------------------+--------------------------+
- +-------------------------------------------------------------------------------+
- ; tsu ;
- +-------+--------------+------------+--------+-----------------------+----------+
- ; Slack ; Required tsu ; Actual tsu ; From ; To ; To Clock ;
- +-------+--------------+------------+--------+-----------------------+----------+
- ; N/A ; None ; 2.091 ns ; ROW[2] ; key44:inst|col_reg[1] ; GCLKP ;
- ; N/A ; None ; 2.091 ns ; ROW[2] ; key44:inst|col_reg[3] ; GCLKP ;
- ; N/A ; None ; 2.091 ns ; ROW[2] ; key44:inst|row_reg[3] ; GCLKP ;
- ; N/A ; None ; 1.993 ns ; ROW[1] ; key44:inst|col_reg[1] ; GCLKP ;
- ; N/A ; None ; 1.993 ns ; ROW[1] ; key44:inst|col_reg[3] ; GCLKP ;
- ; N/A ; None ; 1.993 ns ; ROW[1] ; key44:inst|row_reg[3] ; GCLKP ;
- ; N/A ; None ; 1.985 ns ; ROW[3] ; key44:inst|col_reg[1] ; GCLKP ;
- ; N/A ; None ; 1.985 ns ; ROW[3] ; key44:inst|col_reg[3] ; GCLKP ;
- ; N/A ; None ; 1.985 ns ; ROW[3] ; key44:inst|row_reg[3] ; GCLKP ;
- ; N/A ; None ; 1.715 ns ; ROW[2] ; key44:inst|row_reg[2] ; GCLKP ;
- ; N/A ; None ; 1.715 ns ; ROW[2] ; key44:inst|row_reg[0] ; GCLKP ;
- ; N/A ; None ; 1.715 ns ; ROW[2] ; key44:inst|row_reg[1] ; GCLKP ;
- ; N/A ; None ; 1.617 ns ; ROW[1] ; key44:inst|row_reg[2] ; GCLKP ;
- ; N/A ; None ; 1.617 ns ; ROW[1] ; key44:inst|row_reg[0] ; GCLKP ;
- ; N/A ; None ; 1.617 ns ; ROW[1] ; key44:inst|row_reg[1] ; GCLKP ;
- ; N/A ; None ; 1.609 ns ; ROW[3] ; key44:inst|row_reg[2] ; GCLKP ;
- ; N/A ; None ; 1.609 ns ; ROW[3] ; key44:inst|row_reg[0] ; GCLKP ;
- ; N/A ; None ; 1.609 ns ; ROW[3] ; key44:inst|row_reg[1] ; GCLKP ;
- ; N/A ; None ; 1.567 ns ; ROW[0] ; key44:inst|col_reg[1] ; GCLKP ;
- ; N/A ; None ; 1.567 ns ; ROW[0] ; key44:inst|col_reg[3] ; GCLKP ;
- ; N/A ; None ; 1.567 ns ; ROW[0] ; key44:inst|row_reg[3] ; GCLKP ;
- ; N/A ; None ; 1.309 ns ; ROW[2] ; key44:inst|col_reg[2] ; GCLKP ;
- ; N/A ; None ; 1.309 ns ; ROW[2] ; key44:inst|col_reg[0] ; GCLKP ;
- ; N/A ; None ; 1.211 ns ; ROW[1] ; key44:inst|col_reg[2] ; GCLKP ;
- ; N/A ; None ; 1.211 ns ; ROW[1] ; key44:inst|col_reg[0] ; GCLKP ;
- ; N/A ; None ; 1.203 ns ; ROW[3] ; key44:inst|col_reg[2] ; GCLKP ;
- ; N/A ; None ; 1.203 ns ; ROW[3] ; key44:inst|col_reg[0] ; GCLKP ;
- ; N/A ; None ; 1.191 ns ; ROW[0] ; key44:inst|row_reg[2] ; GCLKP ;
- ; N/A ; None ; 1.191 ns ; ROW[0] ; key44:inst|row_reg[0] ; GCLKP ;
- ; N/A ; None ; 1.191 ns ; ROW[0] ; key44:inst|row_reg[1] ; GCLKP ;
- ; N/A ; None ; 0.785 ns ; ROW[0] ; key44:inst|col_reg[2] ; GCLKP ;
- ; N/A ; None ; 0.785 ns ; ROW[0] ; key44:inst|col_reg[0] ; GCLKP ;
- ; N/A ; None ; -2.554 ns ; ROW[2] ; key44:inst|state[0] ; GCLKP ;
- ; N/A ; None ; -2.652 ns ; ROW[1] ; key44:inst|state[0] ; GCLKP ;
- ; N/A ; None ; -2.660 ns ; ROW[3] ; key44:inst|state[0] ; GCLKP ;
- ; N/A ; None ; -2.726 ns ; ROW[2] ; key44:inst|state[2] ; GCLKP ;
- ; N/A ; None ; -2.824 ns ; ROW[1] ; key44:inst|state[2] ; GCLKP ;
- ; N/A ; None ; -2.832 ns ; ROW[3] ; key44:inst|state[2] ; GCLKP ;
- ; N/A ; None ; -3.078 ns ; ROW[0] ; key44:inst|state[0] ; GCLKP ;
- ; N/A ; None ; -3.250 ns ; ROW[0] ; key44:inst|state[2] ; GCLKP ;
- ; N/A ; None ; -4.649 ns ; ROW[2] ; key44:inst|state[3] ; GCLKP ;
- ; N/A ; None ; -4.703 ns ; ROW[2] ; key44:inst|count[2] ; GCLKP ;
- ; N/A ; None ; -4.703 ns ; ROW[2] ; key44:inst|count[1] ; GCLKP ;
- ; N/A ; None ; -4.703 ns ; ROW[2] ; key44:inst|count[0] ; GCLKP ;
- ; N/A ; None ; -4.703 ns ; ROW[2] ; key44:inst|count[3] ; GCLKP ;
- ; N/A ; None ; -4.747 ns ; ROW[1] ; key44:inst|state[3] ; GCLKP ;
- ; N/A ; None ; -4.755 ns ; ROW[3] ; key44:inst|state[3] ; GCLKP ;
- ; N/A ; None ; -4.801 ns ; ROW[1] ; key44:inst|count[2] ; GCLKP ;
- ; N/A ; None ; -4.801 ns ; ROW[1] ; key44:inst|count[1] ; GCLKP ;
- ; N/A ; None ; -4.801 ns ; ROW[1] ; key44:inst|count[0] ; GCLKP ;
- ; N/A ; None ; -4.801 ns ; ROW[1] ; key44:inst|count[3] ; GCLKP ;
- ; N/A ; None ; -4.809 ns ; ROW[3] ; key44:inst|count[2] ; GCLKP ;
- ; N/A ; None ; -4.809 ns ; ROW[3] ; key44:inst|count[1] ; GCLKP ;
- ; N/A ; None ; -4.809 ns ; ROW[3] ; key44:inst|count[0] ; GCLKP ;
- ; N/A ; None ; -4.809 ns ; ROW[3] ; key44:inst|count[3] ; GCLKP ;
- ; N/A ; None ; -5.173 ns ; ROW[0] ; key44:inst|state[3] ; GCLKP ;
- ; N/A ; None ; -5.227 ns ; ROW[0] ; key44:inst|count[2] ; GCLKP ;
- ; N/A ; None ; -5.227 ns ; ROW[0] ; key44:inst|count[1] ; GCLKP ;
- ; N/A ; None ; -5.227 ns ; ROW[0] ; key44:inst|count[0] ; GCLKP ;
- ; N/A ; None ; -5.227 ns ; ROW[0] ; key44:inst|count[3] ; GCLKP ;
- ; N/A ; None ; -5.658 ns ; ROW[2] ; key44:inst|S_row ; GCLKP ;
- ; N/A ; None ; -5.660 ns ; ROW[2] ; key44:inst|state[5] ; GCLKP ;
- ; N/A ; None ; -5.756 ns ; ROW[1] ; key44:inst|S_row ; GCLKP ;
- ; N/A ; None ; -5.758 ns ; ROW[1] ; key44:inst|state[5] ; GCLKP ;
- ; N/A ; None ; -5.764 ns ; ROW[3] ; key44:inst|S_row ; GCLKP ;
- ; N/A ; None ; -5.766 ns ; ROW[3] ; key44:inst|state[5] ; GCLKP ;
- ; N/A ; None ; -6.182 ns ; ROW[0] ; key44:inst|S_row ; GCLKP ;
- ; N/A ; None ; -6.184 ns ; ROW[0] ; key44:inst|state[5] ; GCLKP ;
- ; N/A ; None ; -9.304 ns ; ROW[2] ; key44:inst|state[4] ; GCLKP ;
- ; N/A ; None ; -9.402 ns ; ROW[1] ; key44:inst|state[4] ; GCLKP ;
- ; N/A ; None ; -9.410 ns ; ROW[3] ; key44:inst|state[4] ; GCLKP ;
- ; N/A ; None ; -9.828 ns ; ROW[0] ; key44:inst|state[4] ; GCLKP ;
- +-------+--------------+------------+--------+-----------------------+----------+
- +------------------------------------------------------------------------------------+
- ; tco ;
- +-------+--------------+------------+-----------------------+-----------+------------+
- ; Slack ; Required tco ; Actual tco ; From ; To ; From Clock ;
- +-------+--------------+------------+-----------------------+-----------+------------+
- ; N/A ; None ; 25.370 ns ; key44:inst|code[2] ; LEDOUT[0] ; GCLKP ;
- ; N/A ; None ; 24.975 ns ; key44:inst|code[2] ; LEDOUT[1] ; GCLKP ;
- ; N/A ; None ; 24.884 ns ; key44:inst|code[2] ; LEDOUT[3] ; GCLKP ;
- ; N/A ; None ; 24.878 ns ; key44:inst|code[2] ; LEDOUT[6] ; GCLKP ;
- ; N/A ; None ; 24.785 ns ; key44:inst|code[3] ; LEDOUT[0] ; GCLKP ;
- ; N/A ; None ; 24.781 ns ; key44:inst|code[2] ; LEDOUT[4] ; GCLKP ;
- ; N/A ; None ; 24.780 ns ; key44:inst|code[2] ; LEDOUT[5] ; GCLKP ;
- ; N/A ; None ; 24.764 ns ; key44:inst|code[2] ; LEDOUT[2] ; GCLKP ;
- ; N/A ; None ; 24.467 ns ; key44:inst|state[0] ; COL[0] ; GCLKP ;
- ; N/A ; None ; 24.428 ns ; key44:inst|code[0] ; LEDOUT[0] ; GCLKP ;
- ; N/A ; None ; 24.174 ns ; key44:inst|code[3] ; LEDOUT[1] ; GCLKP ;
- ; N/A ; None ; 24.091 ns ; key44:inst|state[3] ; COL[0] ; GCLKP ;
- ; N/A ; None ; 24.089 ns ; key44:inst|code[2] ; Light[2] ; GCLKP ;
- ; N/A ; None ; 24.089 ns ; key44:inst|code[2] ; Light[6] ; GCLKP ;
- ; N/A ; None ; 24.072 ns ; key44:inst|code[3] ; LEDOUT[3] ; GCLKP ;
- ; N/A ; None ; 24.066 ns ; key44:inst|code[3] ; LEDOUT[6] ; GCLKP ;
- ; N/A ; None ; 24.029 ns ; key44:inst|state[2] ; COL[0] ; GCLKP ;
- ; N/A ; None ; 23.975 ns ; key44:inst|code[3] ; LEDOUT[5] ; GCLKP ;
- ; N/A ; None ; 23.969 ns ; key44:inst|code[3] ; LEDOUT[4] ; GCLKP ;
- ; N/A ; None ; 23.952 ns ; key44:inst|code[3] ; LEDOUT[2] ; GCLKP ;
- ; N/A ; None ; 23.843 ns ; key44:inst|state[0] ; COL[2] ; GCLKP ;
- ; N/A ; None ; 23.789 ns ; key44:inst|state[4] ; COL[0] ; GCLKP ;
- ; N/A ; None ; 23.763 ns ; key44:inst|state[1] ; COL[2] ; GCLKP ;
- ; N/A ; None ; 23.704 ns ; LED4:inst3|Refresh[0] ; SELECT[3] ; GCLKP ;
- ; N/A ; None ; 23.570 ns ; LED4:inst3|Refresh[0] ; SELECT[1] ; GCLKP ;
- ; N/A ; None ; 23.568 ns ; LED4:inst3|Refresh[0] ; SELECT[0] ; GCLKP ;
- ; N/A ; None ; 23.565 ns ; LED4:inst3|Refresh[0] ; SELECT[2] ; GCLKP ;
- ; N/A ; None ; 23.490 ns ; key44:inst|state[1] ; COL[3] ; GCLKP ;
- ; N/A ; None ; 23.485 ns ; key44:inst|code[1] ; LEDOUT[0] ; GCLKP ;
- ; N/A ; None ; 23.472 ns ; key44:inst|state[1] ; COL[1] ; GCLKP ;
- ; N/A ; None ; 23.465 ns ; key44:inst|state[3] ; COL[3] ; GCLKP ;
- ; N/A ; None ; 23.446 ns ; key44:inst|state[3] ; COL[1] ; GCLKP ;
- ; N/A ; None ; 23.424 ns ; key44:inst|state[3] ; COL[2] ; GCLKP ;
- ; N/A ; None ; 23.413 ns ; key44:inst|state[5] ; COL[0] ; GCLKP ;
- ; N/A ; None ; 23.325 ns ; LED4:inst3|Refresh[1] ; SELECT[3] ; GCLKP ;
- ; N/A ; None ; 23.300 ns ; key44:inst|code[3] ; Light[7] ; GCLKP ;
- ; N/A ; None ; 23.220 ns ; key44:inst|state[0] ; COL[3] ; GCLKP ;
- ; N/A ; None ; 23.200 ns ; key44:inst|state[0] ; COL[1] ; GCLKP ;
- ; N/A ; None ; 23.185 ns ; LED4:inst3|Refresh[1] ; SELECT[0] ; GCLKP ;
- ; N/A ; None ; 23.179 ns ; LED4:inst3|Refresh[1] ; SELECT[1] ; GCLKP ;
- ; N/A ; None ; 23.178 ns ; LED4:inst3|Refresh[1] ; SELECT[2] ; GCLKP ;
- ; N/A ; None ; 23.142 ns ; key44:inst|state[5] ; COL[2] ; GCLKP ;
- ; N/A ; None ; 23.120 ns ; key44:inst|state[2] ; COL[3] ; GCLKP ;
- ; N/A ; None ; 23.119 ns ; key44:inst|state[1] ; COL[0] ; GCLKP ;
- ; N/A ; None ; 23.097 ns ; key44:inst|code[1] ; LEDOUT[1] ; GCLKP ;
- ; N/A ; None ; 22.971 ns ; key44:inst|code[1] ; LEDOUT[6] ; GCLKP ;
- ; N/A ; None ; 22.970 ns ; key44:inst|code[1] ; LEDOUT[3] ; GCLKP ;
- ; N/A ; None ; 22.903 ns ; key44:inst|code[0] ; LEDOUT[4] ; GCLKP ;
- ; N/A ; None ; 22.898 ns ; key44:inst|code[1] ; LEDOUT[5] ; GCLKP ;
- ; N/A ; None ; 22.862 ns ; key44:inst|code[1] ; LEDOUT[2] ; GCLKP ;
- ; N/A ; None ; 22.846 ns ; key44:inst|state[5] ; COL[1] ; GCLKP ;
- ; N/A ; None ; 22.811 ns ; key44:inst|code[3] ; Light[3] ; GCLKP ;
- ; N/A ; None ; 22.576 ns ; key44:inst|code[0] ; LEDOUT[1] ; GCLKP ;
- ; N/A ; None ; 22.491 ns ; key44:inst|state[5] ; COL[3] ; GCLKP ;
- ; N/A ; None ; 22.477 ns ; key44:inst|code[0] ; LEDOUT[3] ; GCLKP ;
- ; N/A ; None ; 22.471 ns ; key44:inst|code[0] ; LEDOUT[6] ; GCLKP ;
- ; N/A ; None ; 22.424 ns ; key44:inst|state[4] ; COL[1] ; GCLKP ;
- ; N/A ; None ; 22.398 ns ; key44:inst|state[2] ; COL[2] ; GCLKP ;
- ; N/A ; None ; 22.377 ns ; key44:inst|code[0] ; LEDOUT[5] ; GCLKP ;
- ; N/A ; None ; 22.357 ns ; key44:inst|code[0] ; LEDOUT[2] ; GCLKP ;
- ; N/A ; None ; 22.205 ns ; key44:inst|state[4] ; COL[2] ; GCLKP ;
- ; N/A ; None ; 22.078 ns ; key44:inst|code[0] ; Light[0] ; GCLKP ;
- ; N/A ; None ; 22.078 ns ; key44:inst|code[0] ; Light[4] ; GCLKP ;
- ; N/A ; None ; 21.941 ns ; key44:inst|code[1] ; Light[5] ; GCLKP ;
- ; N/A ; None ; 21.927 ns ; key44:inst|code[1] ; Light[1] ; GCLKP ;
- ; N/A ; None ; 21.830 ns ; key44:inst|state[2] ; COL[1] ; GCLKP ;
- ; N/A ; None ; 21.781 ns ; key44:inst|code[1] ; LEDOUT[4] ; GCLKP ;
- ; N/A ; None ; 21.505 ns ; key44:inst|state[4] ; COL[3] ; GCLKP ;
- +-------+--------------+------------+-----------------------+-----------+------------+
- +-------------------------------------------------------------------------------------+
- ; th ;
- +---------------+-------------+-----------+--------+-----------------------+----------+
- ; Minimum Slack ; Required th ; Actual th ; From ; To ; To Clock ;
- +---------------+-------------+-----------+--------+-----------------------+----------+
- ; N/A ; None ; 10.382 ns ; ROW[0] ; key44:inst|state[4] ; GCLKP ;
- ; N/A ; None ; 9.964 ns ; ROW[3] ; key44:inst|state[4] ; GCLKP ;
- ; N/A ; None ; 9.956 ns ; ROW[1] ; key44:inst|state[4] ; GCLKP ;
- ; N/A ; None ; 9.858 ns ; ROW[2] ; key44:inst|state[4] ; GCLKP ;
- ; N/A ; None ; 6.738 ns ; ROW[0] ; key44:inst|state[5] ; GCLKP ;
- ; N/A ; None ; 6.736 ns ; ROW[0] ; key44:inst|S_row ; GCLKP ;
- ; N/A ; None ; 6.320 ns ; ROW[3] ; key44:inst|state[5] ; GCLKP ;
- ; N/A ; None ; 6.318 ns ; ROW[3] ; key44:inst|S_row ; GCLKP ;
- ; N/A ; None ; 6.312 ns ; ROW[1] ; key44:inst|state[5] ; GCLKP ;
- ; N/A ; None ; 6.310 ns ; ROW[1] ; key44:inst|S_row ; GCLKP ;
- ; N/A ; None ; 6.214 ns ; ROW[2] ; key44:inst|state[5] ; GCLKP ;
- ; N/A ; None ; 6.212 ns ; ROW[2] ; key44:inst|S_row ; GCLKP ;
- ; N/A ; None ; 6.204 ns ; ROW[0] ; key44:inst|count[2] ; GCLKP ;
- ; N/A ; None ; 6.204 ns ; ROW[0] ; key44:inst|count[1] ; GCLKP ;
- ; N/A ; None ; 6.204 ns ; ROW[0] ; key44:inst|count[0] ; GCLKP ;
- ; N/A ; None ; 6.204 ns ; ROW[0] ; key44:inst|count[3] ; GCLKP ;
- ; N/A ; None ; 5.786 ns ; ROW[3] ; key44:inst|count[2] ; GCLKP ;
- ; N/A ; None ; 5.786 ns ; ROW[3] ; key44:inst|count[1] ; GCLKP ;
- ; N/A ; None ; 5.786 ns ; ROW[3] ; key44:inst|count[0] ; GCLKP ;
- ; N/A ; None ; 5.786 ns ; ROW[3] ; key44:inst|count[3] ; GCLKP ;
- ; N/A ; None ; 5.778 ns ; ROW[1] ; key44:inst|count[2] ; GCLKP ;
- ; N/A ; None ; 5.778 ns ; ROW[1] ; key44:inst|count[1] ; GCLKP ;
- ; N/A ; None ; 5.778 ns ; ROW[1] ; key44:inst|count[0] ; GCLKP ;
- ; N/A ; None ; 5.778 ns ; ROW[1] ; key44:inst|count[3] ; GCLKP ;
- ; N/A ; None ; 5.727 ns ; ROW[0] ; key44:inst|state[3] ; GCLKP ;
- ; N/A ; None ; 5.680 ns ; ROW[2] ; key44:inst|count[2] ; GCLKP ;
- ; N/A ; None ; 5.680 ns ; ROW[2] ; key44:inst|count[1] ; GCLKP ;
- ; N/A ; None ; 5.680 ns ; ROW[2] ; key44:inst|count[0] ; GCLKP ;
- ; N/A ; None ; 5.680 ns ; ROW[2] ; key44:inst|count[3] ; GCLKP ;
- ; N/A ; None ; 5.309 ns ; ROW[3] ; key44:inst|state[3] ; GCLKP ;
- ; N/A ; None ; 5.301 ns ; ROW[1] ; key44:inst|state[3] ; GCLKP ;
- ; N/A ; None ; 5.203 ns ; ROW[2] ; key44:inst|state[3] ; GCLKP ;
- ; N/A ; None ; 3.804 ns ; ROW[0] ; key44:inst|state[2] ; GCLKP ;
- ; N/A ; None ; 3.632 ns ; ROW[0] ; key44:inst|state[0] ; GCLKP ;
- ; N/A ; None ; 3.386 ns ; ROW[3] ; key44:inst|state[2] ; GCLKP ;
- ; N/A ; None ; 3.378 ns ; ROW[1] ; key44:inst|state[2] ; GCLKP ;
- ; N/A ; None ; 3.280 ns ; ROW[2] ; key44:inst|state[2] ; GCLKP ;
- ; N/A ; None ; 3.214 ns ; ROW[3] ; key44:inst|state[0] ; GCLKP ;
- ; N/A ; None ; 3.206 ns ; ROW[1] ; key44:inst|state[0] ; GCLKP ;
- ; N/A ; None ; 3.108 ns ; ROW[2] ; key44:inst|state[0] ; GCLKP ;
- ; N/A ; None ; 2.346 ns ; ROW[1] ; key44:inst|row_reg[1] ; GCLKP ;
- ; N/A ; None ; 2.233 ns ; ROW[2] ; key44:inst|row_reg[2] ; GCLKP ;
- ; N/A ; None ; 2.043 ns ; ROW[3] ; key44:inst|row_reg[3] ; GCLKP ;
- ; N/A ; None ; 1.355 ns ; ROW[0] ; key44:inst|row_reg[0] ; GCLKP ;
- ; N/A ; None ; -0.231 ns ; ROW[0] ; key44:inst|col_reg[2] ; GCLKP ;
- ; N/A ; None ; -0.231 ns ; ROW[0] ; key44:inst|col_reg[0] ; GCLKP ;
- ; N/A ; None ; -0.637 ns ; ROW[0] ; key44:inst|row_reg[2] ; GCLKP ;
- ; N/A ; None ; -0.637 ns ; ROW[0] ; key44:inst|row_reg[1] ; GCLKP ;
- ; N/A ; None ; -0.649 ns ; ROW[3] ; key44:inst|col_reg[2] ; GCLKP ;
- ; N/A ; None ; -0.649 ns ; ROW[3] ; key44:inst|col_reg[0] ; GCLKP ;
- ; N/A ; None ; -0.657 ns ; ROW[1] ; key44:inst|col_reg[2] ; GCLKP ;
- ; N/A ; None ; -0.657 ns ; ROW[1] ; key44:inst|col_reg[0] ; GCLKP ;
- ; N/A ; None ; -0.755 ns ; ROW[2] ; key44:inst|col_reg[2] ; GCLKP ;
- ; N/A ; None ; -0.755 ns ; ROW[2] ; key44:inst|col_reg[0] ; GCLKP ;
- ; N/A ; None ; -1.013 ns ; ROW[0] ; key44:inst|col_reg[1] ; GCLKP ;
- ; N/A ; None ; -1.013 ns ; ROW[0] ; key44:inst|col_reg[3] ; GCLKP ;
- ; N/A ; None ; -1.013 ns ; ROW[0] ; key44:inst|row_reg[3] ; GCLKP ;
- ; N/A ; None ; -1.055 ns ; ROW[3] ; key44:inst|row_reg[2] ; GCLKP ;
- ; N/A ; None ; -1.055 ns ; ROW[3] ; key44:inst|row_reg[0] ; GCLKP ;
- ; N/A ; None ; -1.055 ns ; ROW[3] ; key44:inst|row_reg[1] ; GCLKP ;
- ; N/A ; None ; -1.063 ns ; ROW[1] ; key44:inst|row_reg[2] ; GCLKP ;
- ; N/A ; None ; -1.063 ns ; ROW[1] ; key44:inst|row_reg[0] ; GCLKP ;
- ; N/A ; None ; -1.161 ns ; ROW[2] ; key44:inst|row_reg[0] ; GCLKP ;
- ; N/A ; None ; -1.161 ns ; ROW[2] ; key44:inst|row_reg[1] ; GCLKP ;
- ; N/A ; None ; -1.431 ns ; ROW[3] ; key44:inst|col_reg[1] ; GCLKP ;
- ; N/A ; None ; -1.431 ns ; ROW[3] ; key44:inst|col_reg[3] ; GCLKP ;
- ; N/A ; None ; -1.439 ns ; ROW[1] ; key44:inst|col_reg[1] ; GCLKP ;
- ; N/A ; None ; -1.439 ns ; ROW[1] ; key44:inst|col_reg[3] ; GCLKP ;
- ; N/A ; None ; -1.439 ns ; ROW[1] ; key44:inst|row_reg[3] ; GCLKP ;
- ; N/A ; None ; -1.537 ns ; ROW[2] ; key44:inst|col_reg[1] ; GCLKP ;
- ; N/A ; None ; -1.537 ns ; ROW[2] ; key44:inst|col_reg[3] ; GCLKP ;
- ; N/A ; None ; -1.537 ns ; ROW[2] ; key44:inst|row_reg[3] ; GCLKP ;
- +---------------+-------------+-----------+--------+-----------------------+----------+
- +--------------------------+
- ; Timing Analyzer Messages ;
- +--------------------------+
- Info: *******************************************************************
- Info: Running Quartus II Classic Timing Analyzer
- Info: Version 8.0 Build 215 05/29/2008 SJ Full Version
- Info: Processing started: Thu Jun 11 23:44:33 2009
- Info: Command: quartus_tan --read_settings_files=off --write_settings_files=off KeyBoard -c KeyBoard
- Info: Started post-fitting delay annotation
- Info: Delay annotation completed successfully
- Warning: Timing Analysis is analyzing one or more combinational loops as latches
- Warning: Node "key44:inst|code[3]" is a latch
- Warning: Node "key44:inst|code[1]" is a latch
- Warning: Node "key44:inst|code[2]" is a latch
- Warning: Node "key44:inst|code[0]" is a latch
- Warning: Found pins functioning as undefined clocks and/or memory enables
- Info: Assuming node "GCLKP" is an undefined clock
- Warning: Found 22 node(s) in clock paths which may be acting as ripple and/or gated clocks -- node(s) analyzed as buffer(s) resulting in clock skew
- Info: Detected ripple clock "Frequency:inst5|Period1uS" as buffer
- Info: Detected gated clock "key44:inst|WideOr0~777" as buffer
- Info: Detected gated clock "key44:inst|WideOr0~775" as buffer
- Info: Detected ripple clock "key44:inst|row_reg[3]" as buffer
- Info: Detected ripple clock "key44:inst|row_reg[1]" as buffer
- Info: Detected gated clock "key44:inst|WideOr8~614" as buffer
- Info: Detected ripple clock "key44:inst|col_reg[3]" as buffer
- Info: Detected gated clock "key44:inst|WideOr0~774" as buffer
- Info: Detected ripple clock "key44:inst|row_reg[0]" as buffer
- Info: Detected ripple clock "key44:inst|row_reg[2]" as buffer
- Info: Detected ripple clock "Frequency:inst5|Period1mS" as buffer
- Info: Detected ripple clock "Frequency:inst5|ClockScan" as buffer
- Info: Detected gated clock "key44:inst|WideOr0~780" as buffer
- Info: Detected gated clock "key44:inst|WideOr0~778" as buffer
- Info: Detected gated clock "key44:inst|WideOr0~779" as buffer
- Info: Detected gated clock "key44:inst|WideOr0~776" as buffer
- Info: Detected ripple clock "key44:inst|col_reg[0]" as buffer
- Info: Detected ripple clock "key44:inst|col_reg[1]" as buffer
- Info: Detected ripple clock "key44:inst|Mega_cnt[4]" as buffer
- Info: Detected ripple clock "key44:inst|col_reg[2]" as buffer
- Info: Detected ripple clock "key44:inst|clk2" as buffer
- Info: Detected ripple clock "key44:inst|clk4" as buffer
- Info: Clock "GCLKP" has Internal fmax of 31.94 MHz between source register "key44:inst|state[5]" and destination register "key44:inst|col_reg[1]" (period= 31.312 ns)
- Info: + Longest register to register delay is 6.056 ns
- Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = LC_X10_Y2_N2; Fanout = 15; REG Node = 'key44:inst|state[5]'
- Info: 2: + IC(2.801 ns) + CELL(0.914 ns) = 3.715 ns; Loc. = LC_X7_Y4_N8; Fanout = 8; COMB Node = 'key44:inst|valid~262'
- Info: 3: + IC(1.098 ns) + CELL(1.243 ns) = 6.056 ns; Loc. = LC_X8_Y4_N0; Fanout = 8; REG Node = 'key44:inst|col_reg[1]'
- Info: Total cell delay = 2.157 ns ( 35.62 % )
- Info: Total interconnect delay = 3.899 ns ( 64.38 % )
- Info: - Smallest clock skew is -8.891 ns
- Info: + Shortest clock path from clock "GCLKP" to destination register is 5.861 ns
- Info: 1: + IC(0.000 ns) + CELL(1.163 ns) = 1.163 ns; Loc. = PIN_14; Fanout = 10; CLK Node = 'GCLKP'
- Info: 2: + IC(1.600 ns) + CELL(1.294 ns) = 4.057 ns; Loc. = LC_X8_Y4_N8; Fanout = 10; REG Node = 'key44:inst|Mega_cnt[4]'
- Info: 3: + IC(0.886 ns) + CELL(0.918 ns) = 5.861 ns; Loc. = LC_X8_Y4_N0; Fanout = 8; REG Node = 'key44:inst|col_reg[1]'
- Info: Total cell delay = 3.375 ns ( 57.58 % )
- Info: Total interconnect delay = 2.486 ns ( 42.42 % )
- Info: - Longest clock path from clock "GCLKP" to source register is 14.752 ns
- Info: 1: + IC(0.000 ns) + CELL(1.163 ns) = 1.163 ns; Loc. = PIN_14; Fanout = 10; CLK Node = 'GCLKP'
- Info: 2: + IC(1.600 ns) + CELL(1.294 ns) = 4.057 ns; Loc. = LC_X8_Y4_N8; Fanout = 10; REG Node = 'key44:inst|Mega_cnt[4]'
- Info: 3: + IC(2.961 ns) + CELL(1.294 ns) = 8.312 ns; Loc. = LC_X11_Y3_N2; Fanout = 2; REG Node = 'key44:inst|clk2'
- Info: 4: + IC(0.868 ns) + CELL(1.294 ns) = 10.474 ns; Loc. = LC_X11_Y3_N3; Fanout = 12; REG Node = 'key44:inst|clk4'
- Info: 5: + IC(3.360 ns) + CELL(0.918 ns) = 14.752 ns; Loc. = LC_X10_Y2_N2; Fanout = 15; REG Node = 'key44:inst|state[5]'
- Info: Total cell delay = 5.963 ns ( 40.42 % )
- Info: Total interconnect delay = 8.789 ns ( 59.58 % )
- Info: + Micro clock to output delay of source is 0.376 ns
- Info: + Micro setup delay of destination is 0.333 ns
- Info: Delay path is controlled by inverted clocks -- if clock duty cycle is 50%, fmax is divided by two
- Warning: Circuit may not operate. Detected 32 non-operational path(s) clocked by clock "GCLKP" with clock skew larger than data delay. See Compilation Report for details.
- Info: Found hold time violation between source pin or register "key44:inst|col_reg[1]" and destination pin or register "key44:inst|code[2]" for clock "GCLKP" (Hold time is 5.9 ns)
- Info: + Largest clock skew is 13.341 ns
- Info: + Longest clock path from clock "GCLKP" to destination register is 19.202 ns
- Info: 1: + IC(0.000 ns) + CELL(1.163 ns) = 1.163 ns; Loc. = PIN_14; Fanout = 10; CLK Node = 'GCLKP'
- Info: 2: + IC(1.600 ns) + CELL(1.294 ns) = 4.057 ns; Loc. = LC_X8_Y4_N8; Fanout = 10; REG Node = 'key44:inst|Mega_cnt[4]'
- Info: 3: + IC(1.239 ns) + CELL(1.294 ns) = 6.590 ns; Loc. = LC_X7_Y4_N6; Fanout = 6; REG Node = 'key44:inst|col_reg[2]'
- Info: 4: + IC(2.724 ns) + CELL(0.740 ns) = 10.054 ns; Loc. = LC_X11_Y2_N4; Fanout = 2; COMB Node = 'key44:inst|WideOr0~774'
- Info: 5: + IC(1.114 ns) + CELL(0.740 ns) = 11.908 ns; Loc. = LC_X12_Y2_N3; Fanout = 1; COMB Node = 'key44:inst|WideOr0~776'
- Info: 6: + IC(1.115 ns) + CELL(0.914 ns) = 13.937 ns; Loc. = LC_X11_Y2_N0; Fanout = 4; COMB Node = 'key44:inst|WideOr0~781'
- Info: 7: + IC(4.351 ns) + CELL(0.914 ns) = 19.202 ns; Loc. = LC_X8_Y5_N6; Fanout = 9; REG Node = 'key44:inst|code[2]'
- Info: Total cell delay = 7.059 ns ( 36.76 % )
- Info: Total interconnect delay = 12.143 ns ( 63.24 % )
- Info: - Shortest clock path from clock "GCLKP" to source register is 5.861 ns
- Info: 1: + IC(0.000 ns) + CELL(1.163 ns) = 1.163 ns; Loc. = PIN_14; Fanout = 10; CLK Node = 'GCLKP'
- Info: 2: + IC(1.600 ns) + CELL(1.294 ns) = 4.057 ns; Loc. = LC_X8_Y4_N8; Fanout = 10; REG Node = 'key44:inst|Mega_cnt[4]'
- Info: 3: + IC(0.886 ns) + CELL(0.918 ns) = 5.861 ns; Loc. = LC_X8_Y4_N0; Fanout = 8; REG Node = 'key44:inst|col_reg[1]'
- Info: Total cell delay = 3.375 ns ( 57.58 % )
- Info: Total interconnect delay = 2.486 ns ( 42.42 % )
- Info: - Micro clock to output delay of source is 0.376 ns
- Info: - Shortest register to register delay is 7.065 ns
- Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = LC_X8_Y4_N0; Fanout = 8; REG Node = 'key44:inst|col_reg[1]'
- Info: 2: + IC(2.828 ns) + CELL(0.200 ns) = 3.028 ns; Loc. = LC_X11_Y2_N6; Fanout = 1; COMB Node = 'key44:inst|WideOr4~711'
- Info: 3: + IC(0.774 ns) + CELL(0.511 ns) = 4.313 ns; Loc. = LC_X11_Y2_N7; Fanout = 1; COMB Node = 'key44:inst|WideOr4~714'
- Info: 4: + IC(2.552 ns) + CELL(0.200 ns) = 7.065 ns; Loc. = LC_X8_Y5_N6; Fanout = 9; REG Node = 'key44:inst|code[2]'
- Info: Total cell delay = 0.911 ns ( 12.89 % )
- Info: Total interconnect delay = 6.154 ns ( 87.11 % )
- Info: + Micro hold delay of destination is 0.000 ns
- Info: tsu for register "key44:inst|col_reg[1]" (data pin = "ROW[2]", clock pin = "GCLKP") is 2.091 ns
- Info: + Longest pin to register delay is 7.619 ns
- Info: 1: + IC(0.000 ns) + CELL(1.132 ns) = 1.132 ns; Loc. = PIN_38; Fanout = 2; PIN Node = 'ROW[2]'
- Info: 2: + IC(1.944 ns) + CELL(0.914 ns) = 3.990 ns; Loc. = LC_X7_Y4_N4; Fanout = 11; COMB Node = 'key44:inst|Equal4~117'
- Info: 3: + IC(0.777 ns) + CELL(0.511 ns) = 5.278 ns; Loc. = LC_X7_Y4_N8; Fanout = 8; COMB Node = 'key44:inst|valid~262'
- Info: 4: + IC(1.098 ns) + CELL(1.243 ns) = 7.619 ns; Loc. = LC_X8_Y4_N0; Fanout = 8; REG Node = 'key44:inst|col_reg[1]'
- Info: Total cell delay = 3.800 ns ( 49.88 % )
- Info: Total interconnect delay = 3.819 ns ( 50.12 % )
- Info: + Micro setup delay of destination is 0.333 ns
- Info: - Shortest clock path from clock "GCLKP" to destination register is 5.861 ns
- Info: 1: + IC(0.000 ns) + CELL(1.163 ns) = 1.163 ns; Loc. = PIN_14; Fanout = 10; CLK Node = 'GCLKP'
- Info: 2: + IC(1.600 ns) + CELL(1.294 ns) = 4.057 ns; Loc. = LC_X8_Y4_N8; Fanout = 10; REG Node = 'key44:inst|Mega_cnt[4]'
- Info: 3: + IC(0.886 ns) + CELL(0.918 ns) = 5.861 ns; Loc. = LC_X8_Y4_N0; Fanout = 8; REG Node = 'key44:inst|col_reg[1]'
- Info: Total cell delay = 3.375 ns ( 57.58 % )
- Info: Total interconnect delay = 2.486 ns ( 42.42 % )
- Info: tco from clock "GCLKP" to destination pin "LEDOUT[0]" through register "key44:inst|code[2]" is 25.370 ns
- Info: + Longest clock path from clock "GCLKP" to source register is 19.202 ns
- Info: 1: + IC(0.000 ns) + CELL(1.163 ns) = 1.163 ns; Loc. = PIN_14; Fanout = 10; CLK Node = 'GCLKP'
- Info: 2: + IC(1.600 ns) + CELL(1.294 ns) = 4.057 ns; Loc. = LC_X8_Y4_N8; Fanout = 10; REG Node = 'key44:inst|Mega_cnt[4]'
- Info: 3: + IC(1.239 ns) + CELL(1.294 ns) = 6.590 ns; Loc. = LC_X7_Y4_N6; Fanout = 6; REG Node = 'key44:inst|col_reg[2]'
- Info: 4: + IC(2.724 ns) + CELL(0.740 ns) = 10.054 ns; Loc. = LC_X11_Y2_N4; Fanout = 2; COMB Node = 'key44:inst|WideOr0~774'
- Info: 5: + IC(1.114 ns) + CELL(0.740 ns) = 11.908 ns; Loc. = LC_X12_Y2_N3; Fanout = 1; COMB Node = 'key44:inst|WideOr0~776'
- Info: 6: + IC(1.115 ns) + CELL(0.914 ns) = 13.937 ns; Loc. = LC_X11_Y2_N0; Fanout = 4; COMB Node = 'key44:inst|WideOr0~781'
- Info: 7: + IC(4.351 ns) + CELL(0.914 ns) = 19.202 ns; Loc. = LC_X8_Y5_N6; Fanout = 9; REG Node = 'key44:inst|code[2]'
- Info: Total cell delay = 7.059 ns ( 36.76 % )
- Info: Total interconnect delay = 12.143 ns ( 63.24 % )
- Info: + Micro clock to output delay of source is 0.000 ns
- Info: + Longest register to pin delay is 6.168 ns
- Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = LC_X8_Y5_N6; Fanout = 9; REG Node = 'key44:inst|code[2]'
- Info: 2: + IC(1.865 ns) + CELL(0.200 ns) = 2.065 ns; Loc. = LC_X7_Y6_N2; Fanout = 1; COMB Node = 'LED4:inst3|Mux6~29'
- Info: 3: + IC(1.781 ns) + CELL(2.322 ns) = 6.168 ns; Loc. = PIN_89; Fanout = 0; PIN Node = 'LEDOUT[0]'
- Info: Total cell delay = 2.522 ns ( 40.89 % )
- Info: Total interconnect delay = 3.646 ns ( 59.11 % )
- Info: th for register "key44:inst|state[4]" (data pin = "ROW[0]", clock pin = "GCLKP") is 10.382 ns
- Info: + Longest clock path from clock "GCLKP" to destination register is 14.752 ns
- Info: 1: + IC(0.000 ns) + CELL(1.163 ns) = 1.163 ns; Loc. = PIN_14; Fanout = 10; CLK Node = 'GCLKP'
- Info: 2: + IC(1.600 ns) + CELL(1.294 ns) = 4.057 ns; Loc. = LC_X8_Y4_N8; Fanout = 10; REG Node = 'key44:inst|Mega_cnt[4]'
- Info: 3: + IC(2.961 ns) + CELL(1.294 ns) = 8.312 ns; Loc. = LC_X11_Y3_N2; Fanout = 2; REG Node = 'key44:inst|clk2'
- Info: 4: + IC(0.868 ns) + CELL(1.294 ns) = 10.474 ns; Loc. = LC_X11_Y3_N3; Fanout = 12; REG Node = 'key44:inst|clk4'
- Info: 5: + IC(3.360 ns) + CELL(0.918 ns) = 14.752 ns; Loc. = LC_X7_Y4_N5; Fanout = 11; REG Node = 'key44:inst|state[4]'
- Info: Total cell delay = 5.963 ns ( 40.42 % )
- Info: Total interconnect delay = 8.789 ns ( 59.58 % )
- Info: + Micro hold delay of destination is 0.221 ns
- Info: - Shortest pin to register delay is 4.591 ns
- Info: 1: + IC(0.000 ns) + CELL(1.132 ns) = 1.132 ns; Loc. = PIN_41; Fanout = 2; PIN Node = 'ROW[0]'
- Info: 2: + IC(2.134 ns) + CELL(0.200 ns) = 3.466 ns; Loc. = LC_X7_Y4_N4; Fanout = 11; COMB Node = 'key44:inst|Equal4~117'
- Info: 3: + IC(0.534 ns) + CELL(0.591 ns) = 4.591 ns; Loc. = LC_X7_Y4_N5; Fanout = 11; REG Node = 'key44:inst|state[4]'
- Info: Total cell delay = 1.923 ns ( 41.89 % )
- Info: Total interconnect delay = 2.668 ns ( 58.11 % )
- Info: Quartus II Classic Timing Analyzer was successful. 0 errors, 8 warnings
- Info: Peak virtual memory: 124 megabytes
- Info: Processing ended: Thu Jun 11 23:44:34 2009
- Info: Elapsed time: 00:00:01
- Info: Total CPU time (on all processors): 00:00:01
