Music.hier_info
资源名称:Music.rar [点击查看]
上传用户:jnxfc1
上传日期:2022-08-09
资源大小:363k
文件大小:4k
源码类别:
VHDL/FPGA/Verilog
开发平台:
Others
- |Music
- BEEP <= Speakera:inst.BEEP
- RESET => Speakera:inst.RESET
- RESET => Frequency:inst2.RESET
- RESET => LED4:inst1.RESET
- GCLKP1 => Frequency:inst2.GCLKP1
- GCLKP2 => Frequency:inst2.GCLKP2
- LEDOUT[0] <= LED4:inst1.LEDOut[0]
- LEDOUT[1] <= LED4:inst1.LEDOut[1]
- LEDOUT[2] <= LED4:inst1.LEDOut[2]
- LEDOUT[3] <= LED4:inst1.LEDOut[3]
- LEDOUT[4] <= LED4:inst1.LEDOut[4]
- LEDOUT[5] <= LED4:inst1.LEDOut[5]
- LEDOUT[6] <= LED4:inst1.LEDOut[6]
- LEDOUT[7] <= LED4:inst1.LEDOut[7]
- Light[0] <= LED4:inst1.Light[0]
- Light[1] <= LED4:inst1.Light[1]
- Light[2] <= LED4:inst1.Light[2]
- Light[3] <= LED4:inst1.Light[3]
- Light[4] <= LED4:inst1.Light[4]
- Light[5] <= LED4:inst1.Light[5]
- Light[6] <= LED4:inst1.Light[6]
- Light[7] <= LED4:inst1.Light[7]
- SELECT[0] <= LED4:inst1.DigitSelect[0]
- SELECT[1] <= LED4:inst1.DigitSelect[1]
- SELECT[2] <= LED4:inst1.DigitSelect[2]
- SELECT[3] <= LED4:inst1.DigitSelect[3]
- |Music|Speakera:inst
- RESET => ~NO_FANOUT~
- CLK => GenSpkS:Count11[10].CLK
- CLK => GenSpkS:Count11[9].CLK
- CLK => GenSpkS:Count11[8].CLK
- CLK => GenSpkS:Count11[7].CLK
- CLK => GenSpkS:Count11[6].CLK
- CLK => GenSpkS:Count11[5].CLK
- CLK => GenSpkS:Count11[4].CLK
- CLK => GenSpkS:Count11[3].CLK
- CLK => GenSpkS:Count11[2].CLK
- CLK => GenSpkS:Count11[1].CLK
- CLK => GenSpkS:Count11[0].CLK
- CLK => FullSpkS.CLK
- CLK8Hz => Counter[7].CLK
- CLK8Hz => Counter[6].CLK
- CLK8Hz => Counter[5].CLK
- CLK8Hz => Counter[4].CLK
- CLK8Hz => Counter[3].CLK
- CLK8Hz => Counter[2].CLK
- CLK8Hz => Counter[1].CLK
- CLK8Hz => Counter[0].CLK
- ToneOut[0] <= CODE[0].DB_MAX_OUTPUT_PORT_TYPE
- ToneOut[1] <= CODE[1].DB_MAX_OUTPUT_PORT_TYPE
- ToneOut[2] <= CODE[2].DB_MAX_OUTPUT_PORT_TYPE
- ToneOut[3] <= CODE[3].DB_MAX_OUTPUT_PORT_TYPE
- BEEP <= SpkOut:SpkS.DB_MAX_OUTPUT_PORT_TYPE
- |Music|Frequency:inst2
- RESET => ~NO_FANOUT~
- GCLKP1 => Count[3].CLK
- GCLKP1 => Count[2].CLK
- GCLKP1 => Count[1].CLK
- GCLKP1 => Count[0].CLK
- GCLKP1 => Period1uS.CLK
- GCLKP2 => ~NO_FANOUT~
- ClockScan <= ClockScan~reg0.DB_MAX_OUTPUT_PORT_TYPE
- CLK <= CLK~reg0.DB_MAX_OUTPUT_PORT_TYPE
- CLK8Hz <= CLK8Hz~reg0.DB_MAX_OUTPUT_PORT_TYPE
- |Music|LED4:inst1
- RESET => ~NO_FANOUT~
- ClockScan => Refresh[1].CLK
- ClockScan => Refresh[0].CLK
- LED1[0] => LED[0].DATAB
- LED1[0] => Light[4].DATAIN
- LED1[1] => LED[1].DATAB
- LED1[1] => Light[5].DATAIN
- LED1[2] => LED[2].DATAB
- LED1[2] => Light[6].DATAIN
- LED1[3] => LED[3].DATAB
- LED1[3] => Light[7].DATAIN
- LED2[0] => LED~7.DATAB
- LED2[0] => Light[0].DATAIN
- LED2[1] => LED~6.DATAB
- LED2[1] => Light[1].DATAIN
- LED2[2] => LED~5.DATAB
- LED2[2] => Light[2].DATAIN
- LED2[3] => LED~4.DATAB
- LED2[3] => Light[3].DATAIN
- LED3[0] => LED~3.DATAB
- LED3[1] => LED~2.DATAB
- LED3[2] => LED~1.DATAB
- LED3[3] => LED~0.DATAB
- LED4[0] => LED~3.DATAA
- LED4[1] => LED~2.DATAA
- LED4[2] => LED~1.DATAA
- LED4[3] => LED~0.DATAA
- Light[0] <= LED2[0].DB_MAX_OUTPUT_PORT_TYPE
- Light[1] <= LED2[1].DB_MAX_OUTPUT_PORT_TYPE
- Light[2] <= LED2[2].DB_MAX_OUTPUT_PORT_TYPE
- Light[3] <= LED2[3].DB_MAX_OUTPUT_PORT_TYPE
- Light[4] <= LED1[0].DB_MAX_OUTPUT_PORT_TYPE
- Light[5] <= LED1[1].DB_MAX_OUTPUT_PORT_TYPE
- Light[6] <= LED1[2].DB_MAX_OUTPUT_PORT_TYPE
- Light[7] <= LED1[3].DB_MAX_OUTPUT_PORT_TYPE
- LEDOut[0] <= Mux6.DB_MAX_OUTPUT_PORT_TYPE
- LEDOut[1] <= Mux5.DB_MAX_OUTPUT_PORT_TYPE
- LEDOut[2] <= Mux4.DB_MAX_OUTPUT_PORT_TYPE
- LEDOut[3] <= Mux3.DB_MAX_OUTPUT_PORT_TYPE
- LEDOut[4] <= Mux2.DB_MAX_OUTPUT_PORT_TYPE
- LEDOut[5] <= Mux1.DB_MAX_OUTPUT_PORT_TYPE
- LEDOut[6] <= Mux0.DB_MAX_OUTPUT_PORT_TYPE
- LEDOut[7] <= <GND>
- DigitSelect[0] <= Equal2.DB_MAX_OUTPUT_PORT_TYPE
- DigitSelect[1] <= DigitSelect~4.DB_MAX_OUTPUT_PORT_TYPE
- DigitSelect[2] <= DigitSelect~3.DB_MAX_OUTPUT_PORT_TYPE
- DigitSelect[3] <= DigitSelect~2.DB_MAX_OUTPUT_PORT_TYPE