mux2x5.pin
资源名称:mips.rar [点击查看]
上传用户:huang_5966
上传日期:2022-08-09
资源大小:439k
文件大小:5k
源码类别:
VHDL/FPGA/Verilog
开发平台:
VHDL
- -- Copyright (C) 1988-2000 Altera Corporation
- -- Any megafunction design, and related net list (encrypted or decrypted),
- -- support information, device programming or simulation file, and any other
- -- associated documentation or information provided by Altera or a partner
- -- under Altera's Megafunction Partnership Program may be used only to
- -- program PLD devices (but not masked PLD devices) from Altera. Any other
- -- use of such megafunction design, net list, support information, device
- -- programming or simulation file, or any other related documentation or
- -- information is prohibited for any other purpose, including, but not
- -- limited to modification, reverse engineering, de-compiling, or use with
- -- any other silicon devices, unless such use is explicitly licensed under
- -- a separate agreement with Altera or a megafunction partner. Title to
- -- the intellectual property, including patents, copyrights, trademarks,
- -- trade secrets, or maskworks, embodied in any such megafunction design,
- -- net list, support information, device programming or simulation file, or
- -- any other related documentation or information provided by Altera or a
- -- megafunction partner, remains with Altera, the megafunction partner, or
- -- their respective licensors. No other licenses, including any licenses
- -- needed under any third party's intellectual property, are provided herein.
- N.C. = No Connect. This pin has no internal connection to the device.
- VCCINT = Dedicated power pin, which MUST be connected to VCC (5.0 volts).
- VCCIO = Dedicated power pin, which MUST be connected to VCC (5.0 volts).
- GNDINT = Dedicated ground pin or unused dedicated input, which MUST be connected to GND.
- GNDIO = Dedicated ground pin, which MUST be connected to GND.
- RESERVED = Unused I/O pin, which MUST be left unconnected.
- ----------------------------------------------------------------------------
- CHIP "mux2x5" ASSIGNED TO AN EPF10K10LC84-3
- B1 : 1
- A0 : 2
- RESERVED : 3
- VCCINT : 4
- RESERVED : 5
- RESERVED : 6
- RESERVED : 7
- RESERVED : 8
- RESERVED : 9
- RESERVED : 10
- RESERVED : 11
- DATA0 : 12
- DCLK : 13
- nCE : 14
- TDI : 15
- RESERVED : 16
- RESERVED : 17
- RESERVED : 18
- RESERVED : 19
- VCCINT : 20
- A3 : 21
- Y0 : 22
- Y3 : 23
- B4 : 24
- Y4 : 25
- GNDINT : 26
- RESERVED : 27
- RESERVED : 28
- RESERVED : 29
- RESERVED : 30
- MSEL0 : 31
- MSEL1 : 32
- VCCINT : 33
- nCONFIG : 34
- RESERVED : 35
- RESERVED : 36
- Y1 : 37
- RESERVED : 38
- RESERVED : 39
- VCCINT : 40
- GNDINT : 41
- S : 42
- A2 : 43
- B0 : 44
- VCCINT : 45
- GNDINT : 46
- RESERVED : 47
- RESERVED : 48
- RESERVED : 49
- RESERVED : 50
- RESERVED : 51
- RESERVED : 52
- RESERVED : 53
- RESERVED : 54
- nSTATUS : 55
- TRST : 56
- TMS : 57
- RESERVED : 58
- RESERVED : 59
- RESERVED : 60
- RESERVED : 61
- RESERVED : 62
- VCCINT : 63
- B3 : 64
- A4 : 65
- Y2 : 66
- B2 : 67
- GNDINT : 68
- RESERVED : 69
- RESERVED : 70
- RESERVED : 71
- RESERVED : 72
- RESERVED : 73
- TDO : 74
- nCEO : 75
- CONF_DONE : 76
- TCK : 77
- RESERVED : 78
- RESERVED : 79
- RESERVED : 80
- RESERVED : 81
- GNDINT : 82
- RESERVED : 83
- A1 : 84