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add32bit.pin
资源名称：mips.rar [点击查看]
上传用户：huang_5966
上传日期：2022-08-09
资源大小：439k
文件大小：7k
源码类别：
VHDL/FPGA/Verilog
开发平台：
VHDL
- -- Copyright (C) 1988-2000 Altera Corporation
- -- Any megafunction design, and related net list (encrypted or decrypted),
- -- support information, device programming or simulation file, and any other
- -- associated documentation or information provided by Altera or a partner
- -- under Altera's Megafunction Partnership Program may be used only to
- -- program PLD devices (but not masked PLD devices) from Altera. Any other
- -- use of such megafunction design, net list, support information, device
- -- programming or simulation file, or any other related documentation or
- -- information is prohibited for any other purpose, including, but not
- -- limited to modification, reverse engineering, de-compiling, or use with
- -- any other silicon devices, unless such use is explicitly licensed under
- -- a separate agreement with Altera or a megafunction partner. Title to
- -- the intellectual property, including patents, copyrights, trademarks,
- -- trade secrets, or maskworks, embodied in any such megafunction design,
- -- net list, support information, device programming or simulation file, or
- -- any other related documentation or information provided by Altera or a
- -- megafunction partner, remains with Altera, the megafunction partner, or
- -- their respective licensors. No other licenses, including any licenses
- -- needed under any third party's intellectual property, are provided herein.
- N.C. = No Connect. This pin has no internal connection to the device.
- VCCINT = Dedicated power pin, which MUST be connected to VCC (5.0 volts).
- VCCIO = Dedicated power pin, which MUST be connected to VCC (5.0 volts).
- GNDINT = Dedicated ground pin or unused dedicated input, which MUST be connected to GND.
- GNDIO = Dedicated ground pin, which MUST be connected to GND.
- RESERVED = Unused I/O pin, which MUST be left unconnected.
- ----------------------------------------------------------------------------
- CHIP "add32bit" ASSIGNED TO AN EPF10K10TC144-3
- TCK : 1
- CONF_DONE : 2
- nCEO : 3
- TDO : 4
- VCCIO : 5
- VCCINT : 6
- B3 : 7
- S27 : 8
- A26 : 9
- S6 : 10
- A23 : 11
- S3 : 12
- S4 : 13
- S29 : 14
- GNDIO : 15
- GNDINT : 16
- B20 : 17
- A17 : 18
- A15 : 19
- A21 : 20
- B19 : 21
- A19 : 22
- B17 : 23
- VCCIO : 24
- VCCINT : 25
- S2 : 26
- S9 : 27
- S8 : 28
- A13 : 29
- B12 : 30
- B7 : 31
- B8 : 32
- S11 : 33
- TMS : 34
- nSTATUS : 35
- B9 : 36
- S30 : 37
- S31 : 38
- A3 : 39
- GNDIO : 40
- B28 : 41
- A28 : 42
- B10 : 43
- A27 : 44
- VCCIO : 45
- A29 : 46
- S5 : 47
- A31 : 48
- RESERVED : 49
- GNDIO : 50
- A6 : 51
- VCCINT : 52
- VCCINT : 53
- B11 : 54
- A0 : 55
- A11 : 56
- GNDINT : 57
- GNDINT : 58
- A2 : 59
- B2 : 60
- VCCIO : 61
- A18 : 62
- S0 : 63
- A25 : 64
- A22 : 65
- GNDIO : 66
- S17 : 67
- B16 : 68
- B24 : 69
- RESERVED : 70
- VCCIO : 71
- B15 : 72
- B21 : 73
- nCONFIG : 74
- VCCINT : 75
- MSEL1 : 76
- MSEL0 : 77
- A12 : 78
- S12 : 79
- S14 : 80
- S1 : 81
- S7 : 82
- S13 : 83
- GNDINT : 84
- GNDIO : 85
- S18 : 86
- S22 : 87
- S20 : 88
- S19 : 89
- S16 : 90
- S15 : 91
- S21 : 92
- VCCINT : 93
- VCCIO : 94
- S24 : 95
- A30 : 96
- B4 : 97
- S23 : 98
- A5 : 99
- A24 : 100
- B25 : 101
- S26 : 102
- GNDINT : 103
- GNDIO : 104
- TDI : 105
- nCE : 106
- DCLK : 107
- DATA0 : 108
- B18 : 109
- B26 : 110
- A20 : 111
- B22 : 112
- RESERVED : 113
- B13 : 114
- VCCIO : 115
- S25 : 116
- A16 : 117
- B14 : 118
- B23 : 119
- A14 : 120
- B1 : 121
- RESERVED : 122
- VCCINT : 123
- B0 : 124
- A1 : 125
- CI : 126
- GNDINT : 127
- S10 : 128
- GNDIO : 129
- B6 : 130
- B27 : 131
- B29 : 132
- B30 : 133
- VCCIO : 134
- A10 : 135
- B31 : 136
- A9 : 137
- A8 : 138
- GNDIO : 139
- RESERVED : 140
- B5 : 141
- A4 : 142
- A7 : 143
- S28 : 144
