fj.qsf
资源名称:fj.rar [点击查看]
上传用户:whhc027
上传日期:2022-08-10
资源大小:410k
文件大小:2k
源码类别:
VHDL/FPGA/Verilog
开发平台:
VHDL
- # Copyright (C) 1991-2007 Altera Corporation
- # Your use of Altera Corporation's design tools, logic functions
- # and other software and tools, and its AMPP partner logic
- # functions, and any output files from any of the foregoing
- # (including device programming or simulation files), and any
- # associated documentation or information are expressly subject
- # to the terms and conditions of the Altera Program License
- # Subscription Agreement, Altera MegaCore Function License
- # Agreement, or other applicable license agreement, including,
- # without limitation, that your use is for the sole purpose of
- # programming logic devices manufactured by Altera and sold by
- # Altera or its authorized distributors. Please refer to the
- # applicable agreement for further details.
- # The default values for assignments are stored in the file
- # fj_assignment_defaults.qdf
- # If this file doesn't exist, and for assignments not listed, see file
- # assignment_defaults.qdf
- # Altera recommends that you do not modify this file. This
- # file is updated automatically by the Quartus II software
- # and any changes you make may be lost or overwritten.
- set_global_assignment -name FAMILY "Stratix II"
- set_global_assignment -name DEVICE AUTO
- set_global_assignment -name TOP_LEVEL_ENTITY fj
- set_global_assignment -name ORIGINAL_QUARTUS_VERSION 7.2
- set_global_assignment -name PROJECT_CREATION_TIME_DATE "18:53:22 MARCH 02, 2009"
- set_global_assignment -name LAST_QUARTUS_VERSION 7.2
- set_global_assignment -name USE_GENERATED_PHYSICAL_CONSTRAINTS OFF -section_id eda_palace
- set_global_assignment -name DEVICE_FILTER_SPEED_GRADE FASTEST
- set_global_assignment -name VHDL_FILE fj.vhd
- set_instance_assignment -name PARTITION_HIERARCHY no_file_for_top_partition -to | -section_id Top
- set_global_assignment -name PARTITION_NETLIST_TYPE SOURCE -section_id Top
- set_global_assignment -name PARTITION_COLOR 2147039 -section_id Top
- set_global_assignment -name LL_ROOT_REGION ON -section_id "Root Region"
- set_global_assignment -name LL_MEMBER_STATE LOCKED -section_id "Root Region"
- set_global_assignment -name VECTOR_WAVEFORM_FILE fj.vwf
- set_global_assignment -name BDF_FILE Block1.bdf