DAC960.c
上传用户:ajay2009
上传日期:2009-05-22
资源大小:495k
文件大小:260k
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开发平台:

Unix_Linux

  1. continue;
  2.       DAC960_Info("         Errors - Parity: %d, Soft: %d, "
  3.   "Hard: %d, Misc: %dn", Controller,
  4.   PhysicalDeviceInfo->ParityErrors,
  5.   PhysicalDeviceInfo->SoftErrors,
  6.   PhysicalDeviceInfo->HardErrors,
  7.   PhysicalDeviceInfo->MiscellaneousErrors);
  8.       DAC960_Info("                  Timeouts: %d, Retries: %d, "
  9.   "Aborts: %d, Predicted: %dn", Controller,
  10.   PhysicalDeviceInfo->CommandTimeouts,
  11.   PhysicalDeviceInfo->Retries,
  12.   PhysicalDeviceInfo->Aborts,
  13.   PhysicalDeviceInfo->PredictedFailuresDetected);
  14.     }
  15.   DAC960_Info("  Logical Drives:n", Controller);
  16.   for (LogicalDriveNumber = 0;
  17.        LogicalDriveNumber < DAC960_MaxLogicalDrives;
  18.        LogicalDriveNumber++)
  19.     {
  20.       DAC960_V2_LogicalDeviceInfo_T *LogicalDeviceInfo =
  21. Controller->V2.LogicalDeviceInformation[LogicalDriveNumber];
  22.       unsigned char *ReadCacheStatus[] = { "Read Cache Disabled",
  23.    "Read Cache Enabled",
  24.    "Read Ahead Enabled",
  25.    "Intelligent Read Ahead Enabled",
  26.    "-", "-", "-", "-" };
  27.       unsigned char *WriteCacheStatus[] = { "Write Cache Disabled",
  28.     "Logical Device Read Only",
  29.     "Write Cache Enabled",
  30.     "Intelligent Write Cache Enabled",
  31.     "-", "-", "-", "-" };
  32.       unsigned char *GeometryTranslation;
  33.       if (LogicalDeviceInfo == NULL) continue;
  34.       switch (LogicalDeviceInfo->DriveGeometry)
  35. {
  36. case DAC960_V2_Geometry_128_32:
  37.   GeometryTranslation = "128/32";
  38.   break;
  39. case DAC960_V2_Geometry_255_63:
  40.   GeometryTranslation = "255/63";
  41.   break;
  42. default:
  43.   GeometryTranslation = "Invalid";
  44.   DAC960_Error("Illegal Logical Device Geometry %dn",
  45.        Controller, LogicalDeviceInfo->DriveGeometry);
  46.   break;
  47. }
  48.       DAC960_Info("    /dev/rd/c%dd%d: RAID-%d, %s, %u blocksn",
  49.   Controller, Controller->ControllerNumber, LogicalDriveNumber,
  50.   LogicalDeviceInfo->RAIDLevel,
  51.   (LogicalDeviceInfo->LogicalDeviceState
  52.    == DAC960_V2_LogicalDevice_Online
  53.    ? "Online"
  54.    : LogicalDeviceInfo->LogicalDeviceState
  55.      == DAC960_V2_LogicalDevice_Critical
  56.      ? "Critical" : "Offline"),
  57.   LogicalDeviceInfo->ConfigurableDeviceSize);
  58.       DAC960_Info("                  Logical Device %s, BIOS Geometry: %sn",
  59.   Controller,
  60.   (LogicalDeviceInfo->LogicalDeviceControl
  61.      .LogicalDeviceInitialized
  62.    ? "Initialized" : "Uninitialized"),
  63.   GeometryTranslation);
  64.       if (LogicalDeviceInfo->StripeSize == 0)
  65. {
  66.   if (LogicalDeviceInfo->CacheLineSize == 0)
  67.     DAC960_Info("                  Stripe Size: N/A, "
  68. "Segment Size: N/An", Controller);
  69.   else
  70.     DAC960_Info("                  Stripe Size: N/A, "
  71. "Segment Size: %dKBn", Controller,
  72. 1 << (LogicalDeviceInfo->CacheLineSize - 2));
  73. }
  74.       else
  75. {
  76.   if (LogicalDeviceInfo->CacheLineSize == 0)
  77.     DAC960_Info("                  Stripe Size: %dKB, "
  78. "Segment Size: N/An", Controller,
  79. 1 << (LogicalDeviceInfo->StripeSize - 2));
  80.   else
  81.     DAC960_Info("                  Stripe Size: %dKB, "
  82. "Segment Size: %dKBn", Controller,
  83. 1 << (LogicalDeviceInfo->StripeSize - 2),
  84. 1 << (LogicalDeviceInfo->CacheLineSize - 2));
  85. }
  86.       DAC960_Info("                  %s, %sn", Controller,
  87.   ReadCacheStatus[
  88.     LogicalDeviceInfo->LogicalDeviceControl.ReadCache],
  89.   WriteCacheStatus[
  90.     LogicalDeviceInfo->LogicalDeviceControl.WriteCache]);
  91.       if (LogicalDeviceInfo->SoftErrors > 0 ||
  92.   LogicalDeviceInfo->CommandsFailed > 0 ||
  93.   LogicalDeviceInfo->DeferredWriteErrors)
  94. DAC960_Info("                  Errors - Soft: %d, Failed: %d, "
  95.     "Deferred Write: %dn", Controller,
  96.     LogicalDeviceInfo->SoftErrors,
  97.     LogicalDeviceInfo->CommandsFailed,
  98.     LogicalDeviceInfo->DeferredWriteErrors);
  99.     }
  100.   return true;
  101. }
  102. /*
  103.   DAC960_RegisterBlockDevice registers the Block Device structures
  104.   associated with Controller.
  105. */
  106. static boolean DAC960_RegisterBlockDevice(DAC960_Controller_T *Controller)
  107. {
  108.   int MajorNumber = DAC960_MAJOR + Controller->ControllerNumber;
  109.   int n;
  110.   /*
  111.     Register the Block Device Major Number for this DAC960 Controller.
  112.   */
  113.   if (register_blkdev(MajorNumber, "dac960") < 0)
  114.       return false;
  115.   for (n = 0; n < DAC960_MaxLogicalDrives; n++) {
  116. struct gendisk *disk = Controller->disks[n];
  117.    struct request_queue *RequestQueue;
  118. /* for now, let all request queues share controller's lock */
  119.    RequestQueue = blk_init_queue(DAC960_RequestFunction,&Controller->queue_lock);
  120.    if (!RequestQueue) {
  121. printk("DAC960: failure to allocate request queuen");
  122. continue;
  123.    }
  124.    Controller->RequestQueue[n] = RequestQueue;
  125.    blk_queue_bounce_limit(RequestQueue, Controller->BounceBufferLimit);
  126.    RequestQueue->queuedata = Controller;
  127.    blk_queue_max_hw_segments(RequestQueue, Controller->DriverScatterGatherLimit);
  128. blk_queue_max_phys_segments(RequestQueue, Controller->DriverScatterGatherLimit);
  129. blk_queue_max_sectors(RequestQueue, Controller->MaxBlocksPerCommand);
  130. disk->queue = RequestQueue;
  131. sprintf(disk->disk_name, "rd/c%dd%d", Controller->ControllerNumber, n);
  132. sprintf(disk->devfs_name, "rd/host%d/target%d", Controller->ControllerNumber, n);
  133. disk->major = MajorNumber;
  134. disk->first_minor = n << DAC960_MaxPartitionsBits;
  135. disk->fops = &DAC960_BlockDeviceOperations;
  136.    }
  137.   /*
  138.     Indicate the Block Device Registration completed successfully,
  139.   */
  140.   return true;
  141. }
  142. /*
  143.   DAC960_UnregisterBlockDevice unregisters the Block Device structures
  144.   associated with Controller.
  145. */
  146. static void DAC960_UnregisterBlockDevice(DAC960_Controller_T *Controller)
  147. {
  148.   int MajorNumber = DAC960_MAJOR + Controller->ControllerNumber;
  149.   int disk;
  150.   /* does order matter when deleting gendisk and cleanup in request queue? */
  151.   for (disk = 0; disk < DAC960_MaxLogicalDrives; disk++) {
  152. del_gendisk(Controller->disks[disk]);
  153. blk_cleanup_queue(Controller->RequestQueue[disk]);
  154. Controller->RequestQueue[disk] = NULL;
  155.   }
  156.   /*
  157.     Unregister the Block Device Major Number for this DAC960 Controller.
  158.   */
  159.   unregister_blkdev(MajorNumber, "dac960");
  160. }
  161. /*
  162.   DAC960_ComputeGenericDiskInfo computes the values for the Generic Disk
  163.   Information Partition Sector Counts and Block Sizes.
  164. */
  165. static void DAC960_ComputeGenericDiskInfo(DAC960_Controller_T *Controller)
  166. {
  167. int disk;
  168. for (disk = 0; disk < DAC960_MaxLogicalDrives; disk++)
  169. set_capacity(Controller->disks[disk], disk_size(Controller, disk));
  170. }
  171. /*
  172.   DAC960_ReportErrorStatus reports Controller BIOS Messages passed through
  173.   the Error Status Register when the driver performs the BIOS handshaking.
  174.   It returns true for fatal errors and false otherwise.
  175. */
  176. static boolean DAC960_ReportErrorStatus(DAC960_Controller_T *Controller,
  177. unsigned char ErrorStatus,
  178. unsigned char Parameter0,
  179. unsigned char Parameter1)
  180. {
  181.   switch (ErrorStatus)
  182.     {
  183.     case 0x00:
  184.       DAC960_Notice("Physical Device %d:%d Not Respondingn",
  185.     Controller, Parameter1, Parameter0);
  186.       break;
  187.     case 0x08:
  188.       if (Controller->DriveSpinUpMessageDisplayed) break;
  189.       DAC960_Notice("Spinning Up Drivesn", Controller);
  190.       Controller->DriveSpinUpMessageDisplayed = true;
  191.       break;
  192.     case 0x30:
  193.       DAC960_Notice("Configuration Checksum Errorn", Controller);
  194.       break;
  195.     case 0x60:
  196.       DAC960_Notice("Mirror Race Recovery Failedn", Controller);
  197.       break;
  198.     case 0x70:
  199.       DAC960_Notice("Mirror Race Recovery In Progressn", Controller);
  200.       break;
  201.     case 0x90:
  202.       DAC960_Notice("Physical Device %d:%d COD Mismatchn",
  203.     Controller, Parameter1, Parameter0);
  204.       break;
  205.     case 0xA0:
  206.       DAC960_Notice("Logical Drive Installation Abortedn", Controller);
  207.       break;
  208.     case 0xB0:
  209.       DAC960_Notice("Mirror Race On A Critical Logical Driven", Controller);
  210.       break;
  211.     case 0xD0:
  212.       DAC960_Notice("New Controller Configuration Foundn", Controller);
  213.       break;
  214.     case 0xF0:
  215.       DAC960_Error("Fatal Memory Parity Error for Controller atn", Controller);
  216.       return true;
  217.     default:
  218.       DAC960_Error("Unknown Initialization Error %02X for Controller atn",
  219.    Controller, ErrorStatus);
  220.       return true;
  221.     }
  222.   return false;
  223. }
  224. /*
  225.  * DAC960_DetectCleanup releases the resources that were allocated
  226.  * during DAC960_DetectController().  DAC960_DetectController can
  227.  * has several internal failure points, so not ALL resources may 
  228.  * have been allocated.  It's important to free only
  229.  * resources that HAVE been allocated.  The code below always
  230.  * tests that the resource has been allocated before attempting to
  231.  * free it.
  232.  */
  233. static void DAC960_DetectCleanup(DAC960_Controller_T *Controller)
  234. {
  235.   int i;
  236.   /* Free the memory mailbox, status, and related structures */
  237.   free_dma_loaf(Controller->PCIDevice, &Controller->DmaPages);
  238.   if (Controller->MemoryMappedAddress) {
  239.    switch(Controller->HardwareType)
  240.    {
  241. case DAC960_GEM_Controller:
  242. DAC960_GEM_DisableInterrupts(Controller->BaseAddress);
  243. break;
  244. case DAC960_BA_Controller:
  245. DAC960_BA_DisableInterrupts(Controller->BaseAddress);
  246. break;
  247. case DAC960_LP_Controller:
  248. DAC960_LP_DisableInterrupts(Controller->BaseAddress);
  249. break;
  250. case DAC960_LA_Controller:
  251. DAC960_LA_DisableInterrupts(Controller->BaseAddress);
  252. break;
  253. case DAC960_PG_Controller:
  254. DAC960_PG_DisableInterrupts(Controller->BaseAddress);
  255. break;
  256. case DAC960_PD_Controller:
  257. DAC960_PD_DisableInterrupts(Controller->BaseAddress);
  258. break;
  259. case DAC960_P_Controller:
  260. DAC960_PD_DisableInterrupts(Controller->BaseAddress);
  261. break;
  262.    }
  263.    iounmap(Controller->MemoryMappedAddress);
  264.   }
  265.   if (Controller->IRQ_Channel)
  266.    free_irq(Controller->IRQ_Channel, Controller);
  267.   if (Controller->IO_Address)
  268. release_region(Controller->IO_Address, 0x80);
  269.   pci_disable_device(Controller->PCIDevice);
  270.   for (i = 0; (i < DAC960_MaxLogicalDrives) && Controller->disks[i]; i++)
  271.        put_disk(Controller->disks[i]);
  272.   DAC960_Controllers[Controller->ControllerNumber] = NULL;
  273.   kfree(Controller);
  274. }
  275. /*
  276.   DAC960_DetectController detects Mylex DAC960/AcceleRAID/eXtremeRAID
  277.   PCI RAID Controllers by interrogating the PCI Configuration Space for
  278.   Controller Type.
  279. */
  280. static DAC960_Controller_T * 
  281. DAC960_DetectController(struct pci_dev *PCI_Device,
  282. const struct pci_device_id *entry)
  283. {
  284.   struct DAC960_privdata *privdata =
  285.    (struct DAC960_privdata *)entry->driver_data;
  286.   irqreturn_t (*InterruptHandler)(int, void *, struct pt_regs *) =
  287.    privdata->InterruptHandler;
  288.   unsigned int MemoryWindowSize = privdata->MemoryWindowSize;
  289.   DAC960_Controller_T *Controller = NULL;
  290.   unsigned char DeviceFunction = PCI_Device->devfn;
  291.   unsigned char ErrorStatus, Parameter0, Parameter1;
  292.   unsigned int IRQ_Channel;
  293.   void __iomem *BaseAddress;
  294.   int i;
  295.   Controller = (DAC960_Controller_T *)
  296. kmalloc(sizeof(DAC960_Controller_T), GFP_ATOMIC);
  297.   if (Controller == NULL) {
  298. DAC960_Error("Unable to allocate Controller structure for "
  299.                        "Controller atn", NULL);
  300. return NULL;
  301.   }
  302.   memset(Controller, 0, sizeof(DAC960_Controller_T));
  303.   Controller->ControllerNumber = DAC960_ControllerCount;
  304.   DAC960_Controllers[DAC960_ControllerCount++] = Controller;
  305.   Controller->Bus = PCI_Device->bus->number;
  306.   Controller->FirmwareType = privdata->FirmwareType;
  307.   Controller->HardwareType = privdata->HardwareType;
  308.   Controller->Device = DeviceFunction >> 3;
  309.   Controller->Function = DeviceFunction & 0x7;
  310.   Controller->PCIDevice = PCI_Device;
  311.   strcpy(Controller->FullModelName, "DAC960");
  312.   if (pci_enable_device(PCI_Device))
  313. goto Failure;
  314.   switch (Controller->HardwareType)
  315.   {
  316. case DAC960_GEM_Controller:
  317.   Controller->PCI_Address = pci_resource_start(PCI_Device, 0);
  318.   break;
  319. case DAC960_BA_Controller:
  320.   Controller->PCI_Address = pci_resource_start(PCI_Device, 0);
  321.   break;
  322. case DAC960_LP_Controller:
  323.   Controller->PCI_Address = pci_resource_start(PCI_Device, 0);
  324.   break;
  325. case DAC960_LA_Controller:
  326.   Controller->PCI_Address = pci_resource_start(PCI_Device, 0);
  327.   break;
  328. case DAC960_PG_Controller:
  329.   Controller->PCI_Address = pci_resource_start(PCI_Device, 0);
  330.   break;
  331. case DAC960_PD_Controller:
  332.   Controller->IO_Address = pci_resource_start(PCI_Device, 0);
  333.   Controller->PCI_Address = pci_resource_start(PCI_Device, 1);
  334.   break;
  335. case DAC960_P_Controller:
  336.   Controller->IO_Address = pci_resource_start(PCI_Device, 0);
  337.   Controller->PCI_Address = pci_resource_start(PCI_Device, 1);
  338.   break;
  339.   }
  340.   pci_set_drvdata(PCI_Device, (void *)((long)Controller->ControllerNumber));
  341.   for (i = 0; i < DAC960_MaxLogicalDrives; i++) {
  342. Controller->disks[i] = alloc_disk(1<<DAC960_MaxPartitionsBits);
  343. if (!Controller->disks[i])
  344. goto Failure;
  345. Controller->disks[i]->private_data = (void *)((long)i);
  346.   }
  347.   init_waitqueue_head(&Controller->CommandWaitQueue);
  348.   init_waitqueue_head(&Controller->HealthStatusWaitQueue);
  349.   spin_lock_init(&Controller->queue_lock);
  350.   DAC960_AnnounceDriver(Controller);
  351.   /*
  352.     Map the Controller Register Window.
  353.   */
  354.  if (MemoryWindowSize < PAGE_SIZE)
  355. MemoryWindowSize = PAGE_SIZE;
  356.   Controller->MemoryMappedAddress =
  357. ioremap_nocache(Controller->PCI_Address & PAGE_MASK, MemoryWindowSize);
  358.   Controller->BaseAddress =
  359. Controller->MemoryMappedAddress + (Controller->PCI_Address & ~PAGE_MASK);
  360.   if (Controller->MemoryMappedAddress == NULL)
  361.   {
  362.   DAC960_Error("Unable to map Controller Register Window for "
  363.        "Controller atn", Controller);
  364.   goto Failure;
  365.   }
  366.   BaseAddress = Controller->BaseAddress;
  367.   switch (Controller->HardwareType)
  368.   {
  369. case DAC960_GEM_Controller:
  370.   DAC960_GEM_DisableInterrupts(BaseAddress);
  371.   DAC960_GEM_AcknowledgeHardwareMailboxStatus(BaseAddress);
  372.   udelay(1000);
  373.   while (DAC960_GEM_InitializationInProgressP(BaseAddress))
  374.     {
  375.       if (DAC960_GEM_ReadErrorStatus(BaseAddress, &ErrorStatus,
  376.     &Parameter0, &Parameter1) &&
  377.   DAC960_ReportErrorStatus(Controller, ErrorStatus,
  378.    Parameter0, Parameter1))
  379. goto Failure;
  380.       udelay(10);
  381.     }
  382.   if (!DAC960_V2_EnableMemoryMailboxInterface(Controller))
  383.     {
  384.       DAC960_Error("Unable to Enable Memory Mailbox Interface "
  385.    "for Controller atn", Controller);
  386.       goto Failure;
  387.     }
  388.   DAC960_GEM_EnableInterrupts(BaseAddress);
  389.   Controller->QueueCommand = DAC960_GEM_QueueCommand;
  390.   Controller->ReadControllerConfiguration =
  391.     DAC960_V2_ReadControllerConfiguration;
  392.   Controller->ReadDeviceConfiguration =
  393.     DAC960_V2_ReadDeviceConfiguration;
  394.   Controller->ReportDeviceConfiguration =
  395.     DAC960_V2_ReportDeviceConfiguration;
  396.   Controller->QueueReadWriteCommand =
  397.     DAC960_V2_QueueReadWriteCommand;
  398.   break;
  399. case DAC960_BA_Controller:
  400.   DAC960_BA_DisableInterrupts(BaseAddress);
  401.   DAC960_BA_AcknowledgeHardwareMailboxStatus(BaseAddress);
  402.   udelay(1000);
  403.   while (DAC960_BA_InitializationInProgressP(BaseAddress))
  404.     {
  405.       if (DAC960_BA_ReadErrorStatus(BaseAddress, &ErrorStatus,
  406.     &Parameter0, &Parameter1) &&
  407.   DAC960_ReportErrorStatus(Controller, ErrorStatus,
  408.    Parameter0, Parameter1))
  409. goto Failure;
  410.       udelay(10);
  411.     }
  412.   if (!DAC960_V2_EnableMemoryMailboxInterface(Controller))
  413.     {
  414.       DAC960_Error("Unable to Enable Memory Mailbox Interface "
  415.    "for Controller atn", Controller);
  416.       goto Failure;
  417.     }
  418.   DAC960_BA_EnableInterrupts(BaseAddress);
  419.   Controller->QueueCommand = DAC960_BA_QueueCommand;
  420.   Controller->ReadControllerConfiguration =
  421.     DAC960_V2_ReadControllerConfiguration;
  422.   Controller->ReadDeviceConfiguration =
  423.     DAC960_V2_ReadDeviceConfiguration;
  424.   Controller->ReportDeviceConfiguration =
  425.     DAC960_V2_ReportDeviceConfiguration;
  426.   Controller->QueueReadWriteCommand =
  427.     DAC960_V2_QueueReadWriteCommand;
  428.   break;
  429. case DAC960_LP_Controller:
  430.   DAC960_LP_DisableInterrupts(BaseAddress);
  431.   DAC960_LP_AcknowledgeHardwareMailboxStatus(BaseAddress);
  432.   udelay(1000);
  433.   while (DAC960_LP_InitializationInProgressP(BaseAddress))
  434.     {
  435.       if (DAC960_LP_ReadErrorStatus(BaseAddress, &ErrorStatus,
  436.     &Parameter0, &Parameter1) &&
  437.   DAC960_ReportErrorStatus(Controller, ErrorStatus,
  438.    Parameter0, Parameter1))
  439. goto Failure;
  440.       udelay(10);
  441.     }
  442.   if (!DAC960_V2_EnableMemoryMailboxInterface(Controller))
  443.     {
  444.       DAC960_Error("Unable to Enable Memory Mailbox Interface "
  445.    "for Controller atn", Controller);
  446.       goto Failure;
  447.     }
  448.   DAC960_LP_EnableInterrupts(BaseAddress);
  449.   Controller->QueueCommand = DAC960_LP_QueueCommand;
  450.   Controller->ReadControllerConfiguration =
  451.     DAC960_V2_ReadControllerConfiguration;
  452.   Controller->ReadDeviceConfiguration =
  453.     DAC960_V2_ReadDeviceConfiguration;
  454.   Controller->ReportDeviceConfiguration =
  455.     DAC960_V2_ReportDeviceConfiguration;
  456.   Controller->QueueReadWriteCommand =
  457.     DAC960_V2_QueueReadWriteCommand;
  458.   break;
  459. case DAC960_LA_Controller:
  460.   DAC960_LA_DisableInterrupts(BaseAddress);
  461.   DAC960_LA_AcknowledgeHardwareMailboxStatus(BaseAddress);
  462.   udelay(1000);
  463.   while (DAC960_LA_InitializationInProgressP(BaseAddress))
  464.     {
  465.       if (DAC960_LA_ReadErrorStatus(BaseAddress, &ErrorStatus,
  466.     &Parameter0, &Parameter1) &&
  467.   DAC960_ReportErrorStatus(Controller, ErrorStatus,
  468.    Parameter0, Parameter1))
  469. goto Failure;
  470.       udelay(10);
  471.     }
  472.   if (!DAC960_V1_EnableMemoryMailboxInterface(Controller))
  473.     {
  474.       DAC960_Error("Unable to Enable Memory Mailbox Interface "
  475.    "for Controller atn", Controller);
  476.       goto Failure;
  477.     }
  478.   DAC960_LA_EnableInterrupts(BaseAddress);
  479.   if (Controller->V1.DualModeMemoryMailboxInterface)
  480.     Controller->QueueCommand = DAC960_LA_QueueCommandDualMode;
  481.   else Controller->QueueCommand = DAC960_LA_QueueCommandSingleMode;
  482.   Controller->ReadControllerConfiguration =
  483.     DAC960_V1_ReadControllerConfiguration;
  484.   Controller->ReadDeviceConfiguration =
  485.     DAC960_V1_ReadDeviceConfiguration;
  486.   Controller->ReportDeviceConfiguration =
  487.     DAC960_V1_ReportDeviceConfiguration;
  488.   Controller->QueueReadWriteCommand =
  489.     DAC960_V1_QueueReadWriteCommand;
  490.   break;
  491. case DAC960_PG_Controller:
  492.   DAC960_PG_DisableInterrupts(BaseAddress);
  493.   DAC960_PG_AcknowledgeHardwareMailboxStatus(BaseAddress);
  494.   udelay(1000);
  495.   while (DAC960_PG_InitializationInProgressP(BaseAddress))
  496.     {
  497.       if (DAC960_PG_ReadErrorStatus(BaseAddress, &ErrorStatus,
  498.     &Parameter0, &Parameter1) &&
  499.   DAC960_ReportErrorStatus(Controller, ErrorStatus,
  500.    Parameter0, Parameter1))
  501. goto Failure;
  502.       udelay(10);
  503.     }
  504.   if (!DAC960_V1_EnableMemoryMailboxInterface(Controller))
  505.     {
  506.       DAC960_Error("Unable to Enable Memory Mailbox Interface "
  507.    "for Controller atn", Controller);
  508.       goto Failure;
  509.     }
  510.   DAC960_PG_EnableInterrupts(BaseAddress);
  511.   if (Controller->V1.DualModeMemoryMailboxInterface)
  512.     Controller->QueueCommand = DAC960_PG_QueueCommandDualMode;
  513.   else Controller->QueueCommand = DAC960_PG_QueueCommandSingleMode;
  514.   Controller->ReadControllerConfiguration =
  515.     DAC960_V1_ReadControllerConfiguration;
  516.   Controller->ReadDeviceConfiguration =
  517.     DAC960_V1_ReadDeviceConfiguration;
  518.   Controller->ReportDeviceConfiguration =
  519.     DAC960_V1_ReportDeviceConfiguration;
  520.   Controller->QueueReadWriteCommand =
  521.     DAC960_V1_QueueReadWriteCommand;
  522.   break;
  523. case DAC960_PD_Controller:
  524.   if (!request_region(Controller->IO_Address, 0x80,
  525.       Controller->FullModelName)) {
  526. DAC960_Error("IO port 0x%d busy for Controller atn",
  527.      Controller, Controller->IO_Address);
  528. goto Failure;
  529.   }
  530.   DAC960_PD_DisableInterrupts(BaseAddress);
  531.   DAC960_PD_AcknowledgeStatus(BaseAddress);
  532.   udelay(1000);
  533.   while (DAC960_PD_InitializationInProgressP(BaseAddress))
  534.     {
  535.       if (DAC960_PD_ReadErrorStatus(BaseAddress, &ErrorStatus,
  536.     &Parameter0, &Parameter1) &&
  537.   DAC960_ReportErrorStatus(Controller, ErrorStatus,
  538.    Parameter0, Parameter1))
  539. goto Failure;
  540.       udelay(10);
  541.     }
  542.   if (!DAC960_V1_EnableMemoryMailboxInterface(Controller))
  543.     {
  544.       DAC960_Error("Unable to allocate DMA mapped memory "
  545.    "for Controller atn", Controller);
  546.       goto Failure;
  547.     }
  548.   DAC960_PD_EnableInterrupts(BaseAddress);
  549.   Controller->QueueCommand = DAC960_PD_QueueCommand;
  550.   Controller->ReadControllerConfiguration =
  551.     DAC960_V1_ReadControllerConfiguration;
  552.   Controller->ReadDeviceConfiguration =
  553.     DAC960_V1_ReadDeviceConfiguration;
  554.   Controller->ReportDeviceConfiguration =
  555.     DAC960_V1_ReportDeviceConfiguration;
  556.   Controller->QueueReadWriteCommand =
  557.     DAC960_V1_QueueReadWriteCommand;
  558.   break;
  559. case DAC960_P_Controller:
  560.   if (!request_region(Controller->IO_Address, 0x80,
  561.       Controller->FullModelName)){
  562. DAC960_Error("IO port 0x%d busy for Controller atn",
  563.          Controller, Controller->IO_Address);
  564. goto Failure;
  565.   }
  566.   DAC960_PD_DisableInterrupts(BaseAddress);
  567.   DAC960_PD_AcknowledgeStatus(BaseAddress);
  568.   udelay(1000);
  569.   while (DAC960_PD_InitializationInProgressP(BaseAddress))
  570.     {
  571.       if (DAC960_PD_ReadErrorStatus(BaseAddress, &ErrorStatus,
  572.     &Parameter0, &Parameter1) &&
  573.   DAC960_ReportErrorStatus(Controller, ErrorStatus,
  574.    Parameter0, Parameter1))
  575. goto Failure;
  576.       udelay(10);
  577.     }
  578.   if (!DAC960_V1_EnableMemoryMailboxInterface(Controller))
  579.     {
  580.       DAC960_Error("Unable to allocate DMA mapped memory"
  581.    "for Controller atn", Controller);
  582.       goto Failure;
  583.     }
  584.   DAC960_PD_EnableInterrupts(BaseAddress);
  585.   Controller->QueueCommand = DAC960_P_QueueCommand;
  586.   Controller->ReadControllerConfiguration =
  587.     DAC960_V1_ReadControllerConfiguration;
  588.   Controller->ReadDeviceConfiguration =
  589.     DAC960_V1_ReadDeviceConfiguration;
  590.   Controller->ReportDeviceConfiguration =
  591.     DAC960_V1_ReportDeviceConfiguration;
  592.   Controller->QueueReadWriteCommand =
  593.     DAC960_V1_QueueReadWriteCommand;
  594.   break;
  595.   }
  596.   /*
  597.      Acquire shared access to the IRQ Channel.
  598.   */
  599.   IRQ_Channel = PCI_Device->irq;
  600.   if (request_irq(IRQ_Channel, InterruptHandler, SA_SHIRQ,
  601.       Controller->FullModelName, Controller) < 0)
  602.   {
  603. DAC960_Error("Unable to acquire IRQ Channel %d for Controller atn",
  604.        Controller, Controller->IRQ_Channel);
  605. goto Failure;
  606.   }
  607.   Controller->IRQ_Channel = IRQ_Channel;
  608.   Controller->InitialCommand.CommandIdentifier = 1;
  609.   Controller->InitialCommand.Controller = Controller;
  610.   Controller->Commands[0] = &Controller->InitialCommand;
  611.   Controller->FreeCommands = &Controller->InitialCommand;
  612.   return Controller;
  613.       
  614. Failure:
  615.   if (Controller->IO_Address == 0)
  616. DAC960_Error("PCI Bus %d Device %d Function %d I/O Address N/A "
  617.      "PCI Address 0x%Xn", Controller,
  618.      Controller->Bus, Controller->Device,
  619.      Controller->Function, Controller->PCI_Address);
  620.   else
  621. DAC960_Error("PCI Bus %d Device %d Function %d I/O Address "
  622. "0x%X PCI Address 0x%Xn", Controller,
  623. Controller->Bus, Controller->Device,
  624. Controller->Function, Controller->IO_Address,
  625. Controller->PCI_Address);
  626.   DAC960_DetectCleanup(Controller);
  627.   DAC960_ControllerCount--;
  628.   return NULL;
  629. }
  630. /*
  631.   DAC960_InitializeController initializes Controller.
  632. */
  633. static boolean 
  634. DAC960_InitializeController(DAC960_Controller_T *Controller)
  635. {
  636.   if (DAC960_ReadControllerConfiguration(Controller) &&
  637.       DAC960_ReportControllerConfiguration(Controller) &&
  638.       DAC960_CreateAuxiliaryStructures(Controller) &&
  639.       DAC960_ReadDeviceConfiguration(Controller) &&
  640.       DAC960_ReportDeviceConfiguration(Controller) &&
  641.       DAC960_RegisterBlockDevice(Controller))
  642.     {
  643.       /*
  644. Initialize the Monitoring Timer.
  645.       */
  646.       init_timer(&Controller->MonitoringTimer);
  647.       Controller->MonitoringTimer.expires =
  648. jiffies + DAC960_MonitoringTimerInterval;
  649.       Controller->MonitoringTimer.data = (unsigned long) Controller;
  650.       Controller->MonitoringTimer.function = DAC960_MonitoringTimerFunction;
  651.       add_timer(&Controller->MonitoringTimer);
  652.       Controller->ControllerInitialized = true;
  653.       return true;
  654.     }
  655.   return false;
  656. }
  657. /*
  658.   DAC960_FinalizeController finalizes Controller.
  659. */
  660. static void DAC960_FinalizeController(DAC960_Controller_T *Controller)
  661. {
  662.   if (Controller->ControllerInitialized)
  663.     {
  664.       unsigned long flags;
  665.       /*
  666.        * Acquiring and releasing lock here eliminates
  667.        * a very low probability race.
  668.        *
  669.        * The code below allocates controller command structures
  670.        * from the free list without holding the controller lock.
  671.        * This is safe assuming there is no other activity on
  672.        * the controller at the time.
  673.        * 
  674.        * But, there might be a monitoring command still
  675.        * in progress.  Setting the Shutdown flag while holding
  676.        * the lock ensures that there is no monitoring command
  677.        * in the interrupt handler currently, and any monitoring
  678.        * commands that complete from this time on will NOT return
  679.        * their command structure to the free list.
  680.        */
  681.       spin_lock_irqsave(&Controller->queue_lock, flags);
  682.       Controller->ShutdownMonitoringTimer = 1;
  683.       spin_unlock_irqrestore(&Controller->queue_lock, flags);
  684.       del_timer_sync(&Controller->MonitoringTimer);
  685.       if (Controller->FirmwareType == DAC960_V1_Controller)
  686. {
  687.   DAC960_Notice("Flushing Cache...", Controller);
  688.   DAC960_V1_ExecuteType3(Controller, DAC960_V1_Flush, 0);
  689.   DAC960_Notice("donen", Controller);
  690.   if (Controller->HardwareType == DAC960_PD_Controller)
  691.       release_region(Controller->IO_Address, 0x80);
  692. }
  693.       else
  694. {
  695.   DAC960_Notice("Flushing Cache...", Controller);
  696.   DAC960_V2_DeviceOperation(Controller, DAC960_V2_PauseDevice,
  697.     DAC960_V2_RAID_Controller);
  698.   DAC960_Notice("donen", Controller);
  699. }
  700.     }
  701.   DAC960_UnregisterBlockDevice(Controller);
  702.   DAC960_DestroyAuxiliaryStructures(Controller);
  703.   DAC960_DestroyProcEntries(Controller);
  704.   DAC960_DetectCleanup(Controller);
  705. }
  706. /*
  707.   DAC960_Probe verifies controller's existence and
  708.   initializes the DAC960 Driver for that controller.
  709. */
  710. static int 
  711. DAC960_Probe(struct pci_dev *dev, const struct pci_device_id *entry)
  712. {
  713.   int disk;
  714.   DAC960_Controller_T *Controller;
  715.   if (DAC960_ControllerCount == DAC960_MaxControllers)
  716.   {
  717. DAC960_Error("More than %d DAC960 Controllers detected - "
  718.                        "ignoring from Controller atn",
  719.                        NULL, DAC960_MaxControllers);
  720. return -ENODEV;
  721.   }
  722.   Controller = DAC960_DetectController(dev, entry);
  723.   if (!Controller)
  724. return -ENODEV;
  725.   if (!DAC960_InitializeController(Controller)) {
  726.    DAC960_FinalizeController(Controller);
  727. return -ENODEV;
  728.   }
  729.   for (disk = 0; disk < DAC960_MaxLogicalDrives; disk++) {
  730.         set_capacity(Controller->disks[disk], disk_size(Controller, disk));
  731.         add_disk(Controller->disks[disk]);
  732.   }
  733.   DAC960_CreateProcEntries(Controller);
  734.   return 0;
  735. }
  736. /*
  737.   DAC960_Finalize finalizes the DAC960 Driver.
  738. */
  739. static void DAC960_Remove(struct pci_dev *PCI_Device)
  740. {
  741.   int Controller_Number = (long)pci_get_drvdata(PCI_Device);
  742.   DAC960_Controller_T *Controller = DAC960_Controllers[Controller_Number];
  743.   if (Controller != NULL)
  744.       DAC960_FinalizeController(Controller);
  745. }
  746. /*
  747.   DAC960_V1_QueueReadWriteCommand prepares and queues a Read/Write Command for
  748.   DAC960 V1 Firmware Controllers.
  749. */
  750. static void DAC960_V1_QueueReadWriteCommand(DAC960_Command_T *Command)
  751. {
  752.   DAC960_Controller_T *Controller = Command->Controller;
  753.   DAC960_V1_CommandMailbox_T *CommandMailbox = &Command->V1.CommandMailbox;
  754.   DAC960_V1_ScatterGatherSegment_T *ScatterGatherList =
  755. Command->V1.ScatterGatherList;
  756.   struct scatterlist *ScatterList = Command->V1.ScatterList;
  757.   DAC960_V1_ClearCommand(Command);
  758.   if (Command->SegmentCount == 1)
  759.     {
  760.       if (Command->DmaDirection == PCI_DMA_FROMDEVICE)
  761. CommandMailbox->Type5.CommandOpcode = DAC960_V1_Read;
  762.       else 
  763.         CommandMailbox->Type5.CommandOpcode = DAC960_V1_Write;
  764.       CommandMailbox->Type5.LD.TransferLength = Command->BlockCount;
  765.       CommandMailbox->Type5.LD.LogicalDriveNumber = Command->LogicalDriveNumber;
  766.       CommandMailbox->Type5.LogicalBlockAddress = Command->BlockNumber;
  767.       CommandMailbox->Type5.BusAddress =
  768. (DAC960_BusAddress32_T)sg_dma_address(ScatterList);
  769.     }
  770.   else
  771.     {
  772.       int i;
  773.       if (Command->DmaDirection == PCI_DMA_FROMDEVICE)
  774. CommandMailbox->Type5.CommandOpcode = DAC960_V1_ReadWithScatterGather;
  775.       else
  776. CommandMailbox->Type5.CommandOpcode = DAC960_V1_WriteWithScatterGather;
  777.       CommandMailbox->Type5.LD.TransferLength = Command->BlockCount;
  778.       CommandMailbox->Type5.LD.LogicalDriveNumber = Command->LogicalDriveNumber;
  779.       CommandMailbox->Type5.LogicalBlockAddress = Command->BlockNumber;
  780.       CommandMailbox->Type5.BusAddress = Command->V1.ScatterGatherListDMA;
  781.       CommandMailbox->Type5.ScatterGatherCount = Command->SegmentCount;
  782.       for (i = 0; i < Command->SegmentCount; i++, ScatterList++, ScatterGatherList++) {
  783. ScatterGatherList->SegmentDataPointer =
  784. (DAC960_BusAddress32_T)sg_dma_address(ScatterList);
  785. ScatterGatherList->SegmentByteCount =
  786. (DAC960_ByteCount32_T)sg_dma_len(ScatterList);
  787.       }
  788.     }
  789.   DAC960_QueueCommand(Command);
  790. }
  791. /*
  792.   DAC960_V2_QueueReadWriteCommand prepares and queues a Read/Write Command for
  793.   DAC960 V2 Firmware Controllers.
  794. */
  795. static void DAC960_V2_QueueReadWriteCommand(DAC960_Command_T *Command)
  796. {
  797.   DAC960_Controller_T *Controller = Command->Controller;
  798.   DAC960_V2_CommandMailbox_T *CommandMailbox = &Command->V2.CommandMailbox;
  799.   struct scatterlist *ScatterList = Command->V2.ScatterList;
  800.   DAC960_V2_ClearCommand(Command);
  801.   CommandMailbox->SCSI_10.CommandOpcode = DAC960_V2_SCSI_10;
  802.   CommandMailbox->SCSI_10.CommandControlBits.DataTransferControllerToHost =
  803.     (Command->DmaDirection == PCI_DMA_FROMDEVICE);
  804.   CommandMailbox->SCSI_10.DataTransferSize =
  805.     Command->BlockCount << DAC960_BlockSizeBits;
  806.   CommandMailbox->SCSI_10.RequestSenseBusAddress = Command->V2.RequestSenseDMA;
  807.   CommandMailbox->SCSI_10.PhysicalDevice =
  808.     Controller->V2.LogicalDriveToVirtualDevice[Command->LogicalDriveNumber];
  809.   CommandMailbox->SCSI_10.RequestSenseSize = sizeof(DAC960_SCSI_RequestSense_T);
  810.   CommandMailbox->SCSI_10.CDBLength = 10;
  811.   CommandMailbox->SCSI_10.SCSI_CDB[0] =
  812.     (Command->DmaDirection == PCI_DMA_FROMDEVICE ? 0x28 : 0x2A);
  813.   CommandMailbox->SCSI_10.SCSI_CDB[2] = Command->BlockNumber >> 24;
  814.   CommandMailbox->SCSI_10.SCSI_CDB[3] = Command->BlockNumber >> 16;
  815.   CommandMailbox->SCSI_10.SCSI_CDB[4] = Command->BlockNumber >> 8;
  816.   CommandMailbox->SCSI_10.SCSI_CDB[5] = Command->BlockNumber;
  817.   CommandMailbox->SCSI_10.SCSI_CDB[7] = Command->BlockCount >> 8;
  818.   CommandMailbox->SCSI_10.SCSI_CDB[8] = Command->BlockCount;
  819.   if (Command->SegmentCount == 1)
  820.     {
  821.       CommandMailbox->SCSI_10.DataTransferMemoryAddress
  822.      .ScatterGatherSegments[0]
  823.      .SegmentDataPointer =
  824. (DAC960_BusAddress64_T)sg_dma_address(ScatterList);
  825.       CommandMailbox->SCSI_10.DataTransferMemoryAddress
  826.      .ScatterGatherSegments[0]
  827.      .SegmentByteCount =
  828. CommandMailbox->SCSI_10.DataTransferSize;
  829.     }
  830.   else
  831.     {
  832.       DAC960_V2_ScatterGatherSegment_T *ScatterGatherList;
  833.       int i;
  834.       if (Command->SegmentCount > 2)
  835. {
  836.           ScatterGatherList = Command->V2.ScatterGatherList;
  837.   CommandMailbox->SCSI_10.CommandControlBits
  838.  .AdditionalScatterGatherListMemory = true;
  839.   CommandMailbox->SCSI_10.DataTransferMemoryAddress
  840. .ExtendedScatterGather.ScatterGatherList0Length = Command->SegmentCount;
  841.   CommandMailbox->SCSI_10.DataTransferMemoryAddress
  842.  .ExtendedScatterGather.ScatterGatherList0Address =
  843.     Command->V2.ScatterGatherListDMA;
  844. }
  845.       else
  846. ScatterGatherList = CommandMailbox->SCSI_10.DataTransferMemoryAddress
  847.  .ScatterGatherSegments;
  848.       for (i = 0; i < Command->SegmentCount; i++, ScatterList++, ScatterGatherList++) {
  849. ScatterGatherList->SegmentDataPointer =
  850. (DAC960_BusAddress64_T)sg_dma_address(ScatterList);
  851. ScatterGatherList->SegmentByteCount =
  852. (DAC960_ByteCount64_T)sg_dma_len(ScatterList);
  853.       }
  854.     }
  855.   DAC960_QueueCommand(Command);
  856. }
  857. static int DAC960_process_queue(DAC960_Controller_T *Controller, struct request_queue *req_q)
  858. {
  859. struct request *Request;
  860. DAC960_Command_T *Command;
  861.    while(1) {
  862. Request = elv_next_request(req_q);
  863. if (!Request)
  864. return 1;
  865. Command = DAC960_AllocateCommand(Controller);
  866. if (Command == NULL)
  867. return 0;
  868. if (rq_data_dir(Request) == READ) {
  869. Command->DmaDirection = PCI_DMA_FROMDEVICE;
  870. Command->CommandType = DAC960_ReadCommand;
  871. } else {
  872. Command->DmaDirection = PCI_DMA_TODEVICE;
  873. Command->CommandType = DAC960_WriteCommand;
  874. }
  875. Command->Completion = Request->waiting;
  876. Command->LogicalDriveNumber = (long)Request->rq_disk->private_data;
  877. Command->BlockNumber = Request->sector;
  878. Command->BlockCount = Request->nr_sectors;
  879. Command->Request = Request;
  880. blkdev_dequeue_request(Request);
  881. Command->SegmentCount = blk_rq_map_sg(req_q,
  882.   Command->Request, Command->cmd_sglist);
  883. /* pci_map_sg MAY change the value of SegCount */
  884. Command->SegmentCount = pci_map_sg(Controller->PCIDevice, Command->cmd_sglist,
  885.  Command->SegmentCount, Command->DmaDirection);
  886. DAC960_QueueReadWriteCommand(Command);
  887.   }
  888. }
  889. /*
  890.   DAC960_ProcessRequest attempts to remove one I/O Request from Controller's
  891.   I/O Request Queue and queues it to the Controller.  WaitForCommand is true if
  892.   this function should wait for a Command to become available if necessary.
  893.   This function returns true if an I/O Request was queued and false otherwise.
  894. */
  895. static void DAC960_ProcessRequest(DAC960_Controller_T *controller)
  896. {
  897. int i;
  898. if (!controller->ControllerInitialized)
  899. return;
  900. /* Do this better later! */
  901. for (i = controller->req_q_index; i < DAC960_MaxLogicalDrives; i++) {
  902. struct request_queue *req_q = controller->RequestQueue[i];
  903. if (req_q == NULL)
  904. continue;
  905. if (!DAC960_process_queue(controller, req_q)) {
  906. controller->req_q_index = i;
  907. return;
  908. }
  909. }
  910. if (controller->req_q_index == 0)
  911. return;
  912. for (i = 0; i < controller->req_q_index; i++) {
  913. struct request_queue *req_q = controller->RequestQueue[i];
  914. if (req_q == NULL)
  915. continue;
  916. if (!DAC960_process_queue(controller, req_q)) {
  917. controller->req_q_index = i;
  918. return;
  919. }
  920. }
  921. }
  922. /*
  923.   DAC960_queue_partial_rw extracts one bio from the request already
  924.   associated with argument command, and construct a new command block to retry I/O
  925.   only on that bio.  Queue that command to the controller.
  926.   This function re-uses a previously-allocated Command,
  927.    there is no failure mode from trying to allocate a command.
  928. */
  929. static void DAC960_queue_partial_rw(DAC960_Command_T *Command)
  930. {
  931.   DAC960_Controller_T *Controller = Command->Controller;
  932.   struct request *Request = Command->Request;
  933.   struct request_queue *req_q = Controller->RequestQueue[Command->LogicalDriveNumber];
  934.   if (Command->DmaDirection == PCI_DMA_FROMDEVICE)
  935.     Command->CommandType = DAC960_ReadRetryCommand;
  936.   else
  937.     Command->CommandType = DAC960_WriteRetryCommand;
  938.   /*
  939.    * We could be more efficient with these mapping requests
  940.    * and map only the portions that we need.  But since this
  941.    * code should almost never be called, just go with a
  942.    * simple coding.
  943.    */
  944.   (void)blk_rq_map_sg(req_q, Command->Request, Command->cmd_sglist);
  945.   (void)pci_map_sg(Controller->PCIDevice, Command->cmd_sglist, 1, Command->DmaDirection);
  946.   /*
  947.    * Resubmitting the request sector at a time is really tedious.
  948.    * But, this should almost never happen.  So, we're willing to pay
  949.    * this price so that in the end, as much of the transfer is completed
  950.    * successfully as possible.
  951.    */
  952.   Command->SegmentCount = 1;
  953.   Command->BlockNumber = Request->sector;
  954.   Command->BlockCount = 1;
  955.   DAC960_QueueReadWriteCommand(Command);
  956.   return;
  957. }
  958. /*
  959.   DAC960_RequestFunction is the I/O Request Function for DAC960 Controllers.
  960. */
  961. static void DAC960_RequestFunction(struct request_queue *RequestQueue)
  962. {
  963. DAC960_ProcessRequest(RequestQueue->queuedata);
  964. }
  965. /*
  966.   DAC960_ProcessCompletedBuffer performs completion processing for an
  967.   individual Buffer.
  968. */
  969. static inline boolean DAC960_ProcessCompletedRequest(DAC960_Command_T *Command,
  970.  boolean SuccessfulIO)
  971. {
  972. struct request *Request = Command->Request;
  973. int UpToDate;
  974. UpToDate = 0;
  975. if (SuccessfulIO)
  976. UpToDate = 1;
  977. pci_unmap_sg(Command->Controller->PCIDevice, Command->cmd_sglist,
  978. Command->SegmentCount, Command->DmaDirection);
  979.  if (!end_that_request_first(Request, UpToDate, Command->BlockCount)) {
  980.     end_that_request_last(Request);
  981. if (Command->Completion) {
  982. complete(Command->Completion);
  983. Command->Completion = NULL;
  984. }
  985. return true;
  986. }
  987. return false;
  988. }
  989. /*
  990.   DAC960_V1_ReadWriteError prints an appropriate error message for Command
  991.   when an error occurs on a Read or Write operation.
  992. */
  993. static void DAC960_V1_ReadWriteError(DAC960_Command_T *Command)
  994. {
  995.   DAC960_Controller_T *Controller = Command->Controller;
  996.   unsigned char *CommandName = "UNKNOWN";
  997.   switch (Command->CommandType)
  998.     {
  999.     case DAC960_ReadCommand:
  1000.     case DAC960_ReadRetryCommand:
  1001.       CommandName = "READ";
  1002.       break;
  1003.     case DAC960_WriteCommand:
  1004.     case DAC960_WriteRetryCommand:
  1005.       CommandName = "WRITE";
  1006.       break;
  1007.     case DAC960_MonitoringCommand:
  1008.     case DAC960_ImmediateCommand:
  1009.     case DAC960_QueuedCommand:
  1010.       break;
  1011.     }
  1012.   switch (Command->V1.CommandStatus)
  1013.     {
  1014.     case DAC960_V1_IrrecoverableDataError:
  1015.       DAC960_Error("Irrecoverable Data Error on %s:n",
  1016.    Controller, CommandName);
  1017.       break;
  1018.     case DAC960_V1_LogicalDriveNonexistentOrOffline:
  1019.       DAC960_Error("Logical Drive Nonexistent or Offline on %s:n",
  1020.    Controller, CommandName);
  1021.       break;
  1022.     case DAC960_V1_AccessBeyondEndOfLogicalDrive:
  1023.       DAC960_Error("Attempt to Access Beyond End of Logical Drive "
  1024.    "on %s:n", Controller, CommandName);
  1025.       break;
  1026.     case DAC960_V1_BadDataEncountered:
  1027.       DAC960_Error("Bad Data Encountered on %s:n", Controller, CommandName);
  1028.       break;
  1029.     default:
  1030.       DAC960_Error("Unexpected Error Status %04X on %s:n",
  1031.    Controller, Command->V1.CommandStatus, CommandName);
  1032.       break;
  1033.     }
  1034.   DAC960_Error("  /dev/rd/c%dd%d:   absolute blocks %u..%un",
  1035.        Controller, Controller->ControllerNumber,
  1036.        Command->LogicalDriveNumber, Command->BlockNumber,
  1037.        Command->BlockNumber + Command->BlockCount - 1);
  1038. }
  1039. /*
  1040.   DAC960_V1_ProcessCompletedCommand performs completion processing for Command
  1041.   for DAC960 V1 Firmware Controllers.
  1042. */
  1043. static void DAC960_V1_ProcessCompletedCommand(DAC960_Command_T *Command)
  1044. {
  1045.   DAC960_Controller_T *Controller = Command->Controller;
  1046.   DAC960_CommandType_T CommandType = Command->CommandType;
  1047.   DAC960_V1_CommandOpcode_T CommandOpcode =
  1048.     Command->V1.CommandMailbox.Common.CommandOpcode;
  1049.   DAC960_V1_CommandStatus_T CommandStatus = Command->V1.CommandStatus;
  1050.   if (CommandType == DAC960_ReadCommand ||
  1051.       CommandType == DAC960_WriteCommand)
  1052.     {
  1053. #ifdef FORCE_RETRY_DEBUG
  1054.       CommandStatus = DAC960_V1_IrrecoverableDataError;
  1055. #endif
  1056.       if (CommandStatus == DAC960_V1_NormalCompletion) {
  1057. if (!DAC960_ProcessCompletedRequest(Command, true))
  1058. BUG();
  1059.       } else if (CommandStatus == DAC960_V1_IrrecoverableDataError ||
  1060. CommandStatus == DAC960_V1_BadDataEncountered)
  1061. {
  1062.   /*
  1063.    * break the command down into pieces and resubmit each
  1064.    * piece, hoping that some of them will succeed.
  1065.    */
  1066.    DAC960_queue_partial_rw(Command);
  1067.    return;
  1068. }
  1069.       else
  1070. {
  1071.   if (CommandStatus != DAC960_V1_LogicalDriveNonexistentOrOffline)
  1072.     DAC960_V1_ReadWriteError(Command);
  1073.  if (!DAC960_ProcessCompletedRequest(Command, false))
  1074. BUG();
  1075. }
  1076.     }
  1077.   else if (CommandType == DAC960_ReadRetryCommand ||
  1078.    CommandType == DAC960_WriteRetryCommand)
  1079.     {
  1080.       boolean normal_completion;
  1081. #ifdef FORCE_RETRY_FAILURE_DEBUG
  1082.       static int retry_count = 1;
  1083. #endif
  1084.       /*
  1085.         Perform completion processing for the portion that was
  1086.         retried, and submit the next portion, if any.
  1087.       */
  1088.       normal_completion = true;
  1089.       if (CommandStatus != DAC960_V1_NormalCompletion) {
  1090.         normal_completion = false;
  1091.         if (CommandStatus != DAC960_V1_LogicalDriveNonexistentOrOffline)
  1092.             DAC960_V1_ReadWriteError(Command);
  1093.       }
  1094. #ifdef FORCE_RETRY_FAILURE_DEBUG
  1095.       if (!(++retry_count % 10000)) {
  1096.       printk("V1 error retry failure testn");
  1097.       normal_completion = false;
  1098.               DAC960_V1_ReadWriteError(Command);
  1099.       }
  1100. #endif
  1101.       if (!DAC960_ProcessCompletedRequest(Command, normal_completion)) {
  1102.         DAC960_queue_partial_rw(Command);
  1103.         return;
  1104.       }
  1105.     }
  1106.   else if (CommandType == DAC960_MonitoringCommand)
  1107.     {
  1108.       if (Controller->ShutdownMonitoringTimer)
  1109.       return;
  1110.       if (CommandOpcode == DAC960_V1_Enquiry)
  1111. {
  1112.   DAC960_V1_Enquiry_T *OldEnquiry = &Controller->V1.Enquiry;
  1113.   DAC960_V1_Enquiry_T *NewEnquiry = Controller->V1.NewEnquiry;
  1114.   unsigned int OldCriticalLogicalDriveCount =
  1115.     OldEnquiry->CriticalLogicalDriveCount;
  1116.   unsigned int NewCriticalLogicalDriveCount =
  1117.     NewEnquiry->CriticalLogicalDriveCount;
  1118.   if (NewEnquiry->NumberOfLogicalDrives > Controller->LogicalDriveCount)
  1119.     {
  1120.       int LogicalDriveNumber = Controller->LogicalDriveCount - 1;
  1121.       while (++LogicalDriveNumber < NewEnquiry->NumberOfLogicalDrives)
  1122. DAC960_Critical("Logical Drive %d (/dev/rd/c%dd%d) "
  1123. "Now Existsn", Controller,
  1124. LogicalDriveNumber,
  1125. Controller->ControllerNumber,
  1126. LogicalDriveNumber);
  1127.       Controller->LogicalDriveCount = NewEnquiry->NumberOfLogicalDrives;
  1128.       DAC960_ComputeGenericDiskInfo(Controller);
  1129.     }
  1130.   if (NewEnquiry->NumberOfLogicalDrives < Controller->LogicalDriveCount)
  1131.     {
  1132.       int LogicalDriveNumber = NewEnquiry->NumberOfLogicalDrives - 1;
  1133.       while (++LogicalDriveNumber < Controller->LogicalDriveCount)
  1134. DAC960_Critical("Logical Drive %d (/dev/rd/c%dd%d) "
  1135. "No Longer Existsn", Controller,
  1136. LogicalDriveNumber,
  1137. Controller->ControllerNumber,
  1138. LogicalDriveNumber);
  1139.       Controller->LogicalDriveCount = NewEnquiry->NumberOfLogicalDrives;
  1140.       DAC960_ComputeGenericDiskInfo(Controller);
  1141.     }
  1142.   if (NewEnquiry->StatusFlags.DeferredWriteError !=
  1143.       OldEnquiry->StatusFlags.DeferredWriteError)
  1144.     DAC960_Critical("Deferred Write Error Flag is now %sn", Controller,
  1145.     (NewEnquiry->StatusFlags.DeferredWriteError
  1146.      ? "TRUE" : "FALSE"));
  1147.   if ((NewCriticalLogicalDriveCount > 0 ||
  1148.        NewCriticalLogicalDriveCount != OldCriticalLogicalDriveCount) ||
  1149.       (NewEnquiry->OfflineLogicalDriveCount > 0 ||
  1150.        NewEnquiry->OfflineLogicalDriveCount !=
  1151.        OldEnquiry->OfflineLogicalDriveCount) ||
  1152.       (NewEnquiry->DeadDriveCount > 0 ||
  1153.        NewEnquiry->DeadDriveCount !=
  1154.        OldEnquiry->DeadDriveCount) ||
  1155.       (NewEnquiry->EventLogSequenceNumber !=
  1156.        OldEnquiry->EventLogSequenceNumber) ||
  1157.       Controller->MonitoringTimerCount == 0 ||
  1158.       (jiffies - Controller->SecondaryMonitoringTime
  1159.        >= DAC960_SecondaryMonitoringInterval))
  1160.     {
  1161.       Controller->V1.NeedLogicalDriveInformation = true;
  1162.       Controller->V1.NewEventLogSequenceNumber =
  1163. NewEnquiry->EventLogSequenceNumber;
  1164.       Controller->V1.NeedErrorTableInformation = true;
  1165.       Controller->V1.NeedDeviceStateInformation = true;
  1166.       Controller->V1.StartDeviceStateScan = true;
  1167.       Controller->V1.NeedBackgroundInitializationStatus =
  1168. Controller->V1.BackgroundInitializationStatusSupported;
  1169.       Controller->SecondaryMonitoringTime = jiffies;
  1170.     }
  1171.   if (NewEnquiry->RebuildFlag == DAC960_V1_StandbyRebuildInProgress ||
  1172.       NewEnquiry->RebuildFlag
  1173.       == DAC960_V1_BackgroundRebuildInProgress ||
  1174.       OldEnquiry->RebuildFlag == DAC960_V1_StandbyRebuildInProgress ||
  1175.       OldEnquiry->RebuildFlag == DAC960_V1_BackgroundRebuildInProgress)
  1176.     {
  1177.       Controller->V1.NeedRebuildProgress = true;
  1178.       Controller->V1.RebuildProgressFirst =
  1179. (NewEnquiry->CriticalLogicalDriveCount <
  1180.  OldEnquiry->CriticalLogicalDriveCount);
  1181.     }
  1182.   if (OldEnquiry->RebuildFlag == DAC960_V1_BackgroundCheckInProgress)
  1183.     switch (NewEnquiry->RebuildFlag)
  1184.       {
  1185.       case DAC960_V1_NoStandbyRebuildOrCheckInProgress:
  1186. DAC960_Progress("Consistency Check Completed Successfullyn",
  1187. Controller);
  1188. break;
  1189.       case DAC960_V1_StandbyRebuildInProgress:
  1190.       case DAC960_V1_BackgroundRebuildInProgress:
  1191. break;
  1192.       case DAC960_V1_BackgroundCheckInProgress:
  1193. Controller->V1.NeedConsistencyCheckProgress = true;
  1194. break;
  1195.       case DAC960_V1_StandbyRebuildCompletedWithError:
  1196. DAC960_Progress("Consistency Check Completed with Errorn",
  1197. Controller);
  1198. break;
  1199.       case DAC960_V1_BackgroundRebuildOrCheckFailed_DriveFailed:
  1200. DAC960_Progress("Consistency Check Failed - "
  1201. "Physical Device Failedn", Controller);
  1202. break;
  1203.       case DAC960_V1_BackgroundRebuildOrCheckFailed_LogicalDriveFailed:
  1204. DAC960_Progress("Consistency Check Failed - "
  1205. "Logical Drive Failedn", Controller);
  1206. break;
  1207.       case DAC960_V1_BackgroundRebuildOrCheckFailed_OtherCauses:
  1208. DAC960_Progress("Consistency Check Failed - Other Causesn",
  1209. Controller);
  1210. break;
  1211.       case DAC960_V1_BackgroundRebuildOrCheckSuccessfullyTerminated:
  1212. DAC960_Progress("Consistency Check Successfully Terminatedn",
  1213. Controller);
  1214. break;
  1215.       }
  1216.   else if (NewEnquiry->RebuildFlag
  1217.    == DAC960_V1_BackgroundCheckInProgress)
  1218.     Controller->V1.NeedConsistencyCheckProgress = true;
  1219.   Controller->MonitoringAlertMode =
  1220.     (NewEnquiry->CriticalLogicalDriveCount > 0 ||
  1221.      NewEnquiry->OfflineLogicalDriveCount > 0 ||
  1222.      NewEnquiry->DeadDriveCount > 0);
  1223.   if (NewEnquiry->RebuildFlag > DAC960_V1_BackgroundCheckInProgress)
  1224.     {
  1225.       Controller->V1.PendingRebuildFlag = NewEnquiry->RebuildFlag;
  1226.       Controller->V1.RebuildFlagPending = true;
  1227.     }
  1228.   memcpy(&Controller->V1.Enquiry, &Controller->V1.NewEnquiry,
  1229.  sizeof(DAC960_V1_Enquiry_T));
  1230. }
  1231.       else if (CommandOpcode == DAC960_V1_PerformEventLogOperation)
  1232. {
  1233.   static char
  1234.     *DAC960_EventMessages[] =
  1235.        { "killed because write recovery failed",
  1236.  "killed because of SCSI bus reset failure",
  1237.  "killed because of double check condition",
  1238.  "killed because it was removed",
  1239.  "killed because of gross error on SCSI chip",
  1240.  "killed because of bad tag returned from drive",
  1241.  "killed because of timeout on SCSI command",
  1242.  "killed because of reset SCSI command issued from system",
  1243.  "killed because busy or parity error count exceeded limit",
  1244.  "killed because of 'kill drive' command from system",
  1245.  "killed because of selection timeout",
  1246.  "killed due to SCSI phase sequence error",
  1247.  "killed due to unknown status" };
  1248.   DAC960_V1_EventLogEntry_T *EventLogEntry =
  1249.      Controller->V1.EventLogEntry;
  1250.   if (EventLogEntry->SequenceNumber ==
  1251.       Controller->V1.OldEventLogSequenceNumber)
  1252.     {
  1253.       unsigned char SenseKey = EventLogEntry->SenseKey;
  1254.       unsigned char AdditionalSenseCode =
  1255. EventLogEntry->AdditionalSenseCode;
  1256.       unsigned char AdditionalSenseCodeQualifier =
  1257. EventLogEntry->AdditionalSenseCodeQualifier;
  1258.       if (SenseKey == DAC960_SenseKey_VendorSpecific &&
  1259.   AdditionalSenseCode == 0x80 &&
  1260.   AdditionalSenseCodeQualifier <
  1261.   sizeof(DAC960_EventMessages) / sizeof(char *))
  1262. DAC960_Critical("Physical Device %d:%d %sn", Controller,
  1263. EventLogEntry->Channel,
  1264. EventLogEntry->TargetID,
  1265. DAC960_EventMessages[
  1266.   AdditionalSenseCodeQualifier]);
  1267.       else if (SenseKey == DAC960_SenseKey_UnitAttention &&
  1268.        AdditionalSenseCode == 0x29)
  1269. {
  1270.   if (Controller->MonitoringTimerCount > 0)
  1271.     Controller->V1.DeviceResetCount[EventLogEntry->Channel]
  1272.    [EventLogEntry->TargetID]++;
  1273. }
  1274.       else if (!(SenseKey == DAC960_SenseKey_NoSense ||
  1275.  (SenseKey == DAC960_SenseKey_NotReady &&
  1276.   AdditionalSenseCode == 0x04 &&
  1277.   (AdditionalSenseCodeQualifier == 0x01 ||
  1278.    AdditionalSenseCodeQualifier == 0x02))))
  1279. {
  1280.   DAC960_Critical("Physical Device %d:%d Error Log: "
  1281.   "Sense Key = %X, ASC = %02X, ASCQ = %02Xn",
  1282.   Controller,
  1283.   EventLogEntry->Channel,
  1284.   EventLogEntry->TargetID,
  1285.   SenseKey,
  1286.   AdditionalSenseCode,
  1287.   AdditionalSenseCodeQualifier);
  1288.   DAC960_Critical("Physical Device %d:%d Error Log: "
  1289.   "Information = %02X%02X%02X%02X "
  1290.   "%02X%02X%02X%02Xn",
  1291.   Controller,
  1292.   EventLogEntry->Channel,
  1293.   EventLogEntry->TargetID,
  1294.   EventLogEntry->Information[0],
  1295.   EventLogEntry->Information[1],
  1296.   EventLogEntry->Information[2],
  1297.   EventLogEntry->Information[3],
  1298.   EventLogEntry->CommandSpecificInformation[0],
  1299.   EventLogEntry->CommandSpecificInformation[1],
  1300.   EventLogEntry->CommandSpecificInformation[2],
  1301.   EventLogEntry->CommandSpecificInformation[3]);
  1302. }
  1303.     }
  1304.   Controller->V1.OldEventLogSequenceNumber++;
  1305. }
  1306.       else if (CommandOpcode == DAC960_V1_GetErrorTable)
  1307. {
  1308.   DAC960_V1_ErrorTable_T *OldErrorTable = &Controller->V1.ErrorTable;
  1309.   DAC960_V1_ErrorTable_T *NewErrorTable = Controller->V1.NewErrorTable;
  1310.   int Channel, TargetID;
  1311.   for (Channel = 0; Channel < Controller->Channels; Channel++)
  1312.     for (TargetID = 0; TargetID < Controller->Targets; TargetID++)
  1313.       {
  1314. DAC960_V1_ErrorTableEntry_T *NewErrorEntry =
  1315.   &NewErrorTable->ErrorTableEntries[Channel][TargetID];
  1316. DAC960_V1_ErrorTableEntry_T *OldErrorEntry =
  1317.   &OldErrorTable->ErrorTableEntries[Channel][TargetID];
  1318. if ((NewErrorEntry->ParityErrorCount !=
  1319.      OldErrorEntry->ParityErrorCount) ||
  1320.     (NewErrorEntry->SoftErrorCount !=
  1321.      OldErrorEntry->SoftErrorCount) ||
  1322.     (NewErrorEntry->HardErrorCount !=
  1323.      OldErrorEntry->HardErrorCount) ||
  1324.     (NewErrorEntry->MiscErrorCount !=
  1325.      OldErrorEntry->MiscErrorCount))
  1326.   DAC960_Critical("Physical Device %d:%d Errors: "
  1327.   "Parity = %d, Soft = %d, "
  1328.   "Hard = %d, Misc = %dn",
  1329.   Controller, Channel, TargetID,
  1330.   NewErrorEntry->ParityErrorCount,
  1331.   NewErrorEntry->SoftErrorCount,
  1332.   NewErrorEntry->HardErrorCount,
  1333.   NewErrorEntry->MiscErrorCount);
  1334.       }
  1335.   memcpy(&Controller->V1.ErrorTable, Controller->V1.NewErrorTable,
  1336.  sizeof(DAC960_V1_ErrorTable_T));
  1337. }
  1338.       else if (CommandOpcode == DAC960_V1_GetDeviceState)
  1339. {
  1340.   DAC960_V1_DeviceState_T *OldDeviceState =
  1341.     &Controller->V1.DeviceState[Controller->V1.DeviceStateChannel]
  1342.        [Controller->V1.DeviceStateTargetID];
  1343.   DAC960_V1_DeviceState_T *NewDeviceState =
  1344.     Controller->V1.NewDeviceState;
  1345.   if (NewDeviceState->DeviceState != OldDeviceState->DeviceState)
  1346.     DAC960_Critical("Physical Device %d:%d is now %sn", Controller,
  1347.     Controller->V1.DeviceStateChannel,
  1348.     Controller->V1.DeviceStateTargetID,
  1349.     (NewDeviceState->DeviceState
  1350.      == DAC960_V1_Device_Dead
  1351.      ? "DEAD"
  1352.      : NewDeviceState->DeviceState
  1353.        == DAC960_V1_Device_WriteOnly
  1354.        ? "WRITE-ONLY"
  1355.        : NewDeviceState->DeviceState
  1356.  == DAC960_V1_Device_Online
  1357.  ? "ONLINE" : "STANDBY"));
  1358.   if (OldDeviceState->DeviceState == DAC960_V1_Device_Dead &&
  1359.       NewDeviceState->DeviceState != DAC960_V1_Device_Dead)
  1360.     {
  1361.       Controller->V1.NeedDeviceInquiryInformation = true;
  1362.       Controller->V1.NeedDeviceSerialNumberInformation = true;
  1363.       Controller->V1.DeviceResetCount
  1364.      [Controller->V1.DeviceStateChannel]
  1365.      [Controller->V1.DeviceStateTargetID] = 0;
  1366.     }
  1367.   memcpy(OldDeviceState, NewDeviceState,
  1368.  sizeof(DAC960_V1_DeviceState_T));
  1369. }
  1370.       else if (CommandOpcode == DAC960_V1_GetLogicalDriveInformation)
  1371. {
  1372.   int LogicalDriveNumber;
  1373.   for (LogicalDriveNumber = 0;
  1374.        LogicalDriveNumber < Controller->LogicalDriveCount;
  1375.        LogicalDriveNumber++)
  1376.     {
  1377.       DAC960_V1_LogicalDriveInformation_T *OldLogicalDriveInformation =
  1378. &Controller->V1.LogicalDriveInformation[LogicalDriveNumber];
  1379.       DAC960_V1_LogicalDriveInformation_T *NewLogicalDriveInformation =
  1380. &(*Controller->V1.NewLogicalDriveInformation)[LogicalDriveNumber];
  1381.       if (NewLogicalDriveInformation->LogicalDriveState !=
  1382.   OldLogicalDriveInformation->LogicalDriveState)
  1383. DAC960_Critical("Logical Drive %d (/dev/rd/c%dd%d) "
  1384. "is now %sn", Controller,
  1385. LogicalDriveNumber,
  1386. Controller->ControllerNumber,
  1387. LogicalDriveNumber,
  1388. (NewLogicalDriveInformation->LogicalDriveState
  1389.  == DAC960_V1_LogicalDrive_Online
  1390.  ? "ONLINE"
  1391.  : NewLogicalDriveInformation->LogicalDriveState
  1392.    == DAC960_V1_LogicalDrive_Critical
  1393.    ? "CRITICAL" : "OFFLINE"));
  1394.       if (NewLogicalDriveInformation->WriteBack !=
  1395.   OldLogicalDriveInformation->WriteBack)
  1396. DAC960_Critical("Logical Drive %d (/dev/rd/c%dd%d) "
  1397. "is now %sn", Controller,
  1398. LogicalDriveNumber,
  1399. Controller->ControllerNumber,
  1400. LogicalDriveNumber,
  1401. (NewLogicalDriveInformation->WriteBack
  1402.  ? "WRITE BACK" : "WRITE THRU"));
  1403.     }
  1404.   memcpy(&Controller->V1.LogicalDriveInformation,
  1405.  Controller->V1.NewLogicalDriveInformation,
  1406.  sizeof(DAC960_V1_LogicalDriveInformationArray_T));
  1407. }
  1408.       else if (CommandOpcode == DAC960_V1_GetRebuildProgress)
  1409. {
  1410.   unsigned int LogicalDriveNumber =
  1411.     Controller->V1.RebuildProgress->LogicalDriveNumber;
  1412.   unsigned int LogicalDriveSize =
  1413.     Controller->V1.RebuildProgress->LogicalDriveSize;
  1414.   unsigned int BlocksCompleted =
  1415.     LogicalDriveSize - Controller->V1.RebuildProgress->RemainingBlocks;
  1416.   if (CommandStatus == DAC960_V1_NoRebuildOrCheckInProgress &&
  1417.       Controller->V1.LastRebuildStatus == DAC960_V1_NormalCompletion)
  1418.     CommandStatus = DAC960_V1_RebuildSuccessful;
  1419.   switch (CommandStatus)
  1420.     {
  1421.     case DAC960_V1_NormalCompletion:
  1422.       Controller->EphemeralProgressMessage = true;
  1423.       DAC960_Progress("Rebuild in Progress: "
  1424.       "Logical Drive %d (/dev/rd/c%dd%d) "
  1425.       "%d%% completedn",
  1426.       Controller, LogicalDriveNumber,
  1427.       Controller->ControllerNumber,
  1428.       LogicalDriveNumber,
  1429.       (100 * (BlocksCompleted >> 7))
  1430.       / (LogicalDriveSize >> 7));
  1431.       Controller->EphemeralProgressMessage = false;
  1432.       break;
  1433.     case DAC960_V1_RebuildFailed_LogicalDriveFailure:
  1434.       DAC960_Progress("Rebuild Failed due to "
  1435.       "Logical Drive Failuren", Controller);
  1436.       break;
  1437.     case DAC960_V1_RebuildFailed_BadBlocksOnOther:
  1438.       DAC960_Progress("Rebuild Failed due to "
  1439.       "Bad Blocks on Other Drivesn", Controller);
  1440.       break;
  1441.     case DAC960_V1_RebuildFailed_NewDriveFailed:
  1442.       DAC960_Progress("Rebuild Failed due to "
  1443.       "Failure of Drive Being Rebuiltn", Controller);
  1444.       break;
  1445.     case DAC960_V1_NoRebuildOrCheckInProgress:
  1446.       break;
  1447.     case DAC960_V1_RebuildSuccessful:
  1448.       DAC960_Progress("Rebuild Completed Successfullyn", Controller);
  1449.       break;
  1450.     case DAC960_V1_RebuildSuccessfullyTerminated:
  1451.       DAC960_Progress("Rebuild Successfully Terminatedn", Controller);
  1452.       break;
  1453.     }
  1454.   Controller->V1.LastRebuildStatus = CommandStatus;
  1455.   if (CommandType != DAC960_MonitoringCommand &&
  1456.       Controller->V1.RebuildStatusPending)
  1457.     {
  1458.       Command->V1.CommandStatus = Controller->V1.PendingRebuildStatus;
  1459.       Controller->V1.RebuildStatusPending = false;
  1460.     }
  1461.   else if (CommandType == DAC960_MonitoringCommand &&
  1462.    CommandStatus != DAC960_V1_NormalCompletion &&
  1463.    CommandStatus != DAC960_V1_NoRebuildOrCheckInProgress)
  1464.     {
  1465.       Controller->V1.PendingRebuildStatus = CommandStatus;
  1466.       Controller->V1.RebuildStatusPending = true;
  1467.     }
  1468. }
  1469.       else if (CommandOpcode == DAC960_V1_RebuildStat)
  1470. {
  1471.   unsigned int LogicalDriveNumber =
  1472.     Controller->V1.RebuildProgress->LogicalDriveNumber;
  1473.   unsigned int LogicalDriveSize =
  1474.     Controller->V1.RebuildProgress->LogicalDriveSize;
  1475.   unsigned int BlocksCompleted =
  1476.     LogicalDriveSize - Controller->V1.RebuildProgress->RemainingBlocks;
  1477.   if (CommandStatus == DAC960_V1_NormalCompletion)
  1478.     {
  1479.       Controller->EphemeralProgressMessage = true;
  1480.       DAC960_Progress("Consistency Check in Progress: "
  1481.       "Logical Drive %d (/dev/rd/c%dd%d) "
  1482.       "%d%% completedn",
  1483.       Controller, LogicalDriveNumber,
  1484.       Controller->ControllerNumber,
  1485.       LogicalDriveNumber,
  1486.       (100 * (BlocksCompleted >> 7))
  1487.       / (LogicalDriveSize >> 7));
  1488.       Controller->EphemeralProgressMessage = false;
  1489.     }
  1490. }
  1491.       else if (CommandOpcode == DAC960_V1_BackgroundInitializationControl)
  1492. {
  1493.   unsigned int LogicalDriveNumber =
  1494.     Controller->V1.BackgroundInitializationStatus->LogicalDriveNumber;
  1495.   unsigned int LogicalDriveSize =
  1496.     Controller->V1.BackgroundInitializationStatus->LogicalDriveSize;
  1497.   unsigned int BlocksCompleted =
  1498.     Controller->V1.BackgroundInitializationStatus->BlocksCompleted;
  1499.   switch (CommandStatus)
  1500.     {
  1501.     case DAC960_V1_NormalCompletion:
  1502.       switch (Controller->V1.BackgroundInitializationStatus->Status)
  1503. {
  1504. case DAC960_V1_BackgroundInitializationInvalid:
  1505.   break;
  1506. case DAC960_V1_BackgroundInitializationStarted:
  1507.   DAC960_Progress("Background Initialization Startedn",
  1508.   Controller);
  1509.   break;
  1510. case DAC960_V1_BackgroundInitializationInProgress:
  1511.   if (BlocksCompleted ==
  1512.       Controller->V1.LastBackgroundInitializationStatus.
  1513. BlocksCompleted &&
  1514.       LogicalDriveNumber ==
  1515.       Controller->V1.LastBackgroundInitializationStatus.
  1516. LogicalDriveNumber)
  1517.     break;
  1518.   Controller->EphemeralProgressMessage = true;
  1519.   DAC960_Progress("Background Initialization in Progress: "
  1520.   "Logical Drive %d (/dev/rd/c%dd%d) "
  1521.   "%d%% completedn",
  1522.   Controller, LogicalDriveNumber,
  1523.   Controller->ControllerNumber,
  1524.   LogicalDriveNumber,
  1525.   (100 * (BlocksCompleted >> 7))
  1526.   / (LogicalDriveSize >> 7));
  1527.   Controller->EphemeralProgressMessage = false;
  1528.   break;
  1529. case DAC960_V1_BackgroundInitializationSuspended:
  1530.   DAC960_Progress("Background Initialization Suspendedn",
  1531.   Controller);
  1532.   break;
  1533. case DAC960_V1_BackgroundInitializationCancelled:
  1534.   DAC960_Progress("Background Initialization Cancelledn",
  1535.   Controller);
  1536.   break;
  1537. }
  1538.       memcpy(&Controller->V1.LastBackgroundInitializationStatus,
  1539.      Controller->V1.BackgroundInitializationStatus,
  1540.      sizeof(DAC960_V1_BackgroundInitializationStatus_T));
  1541.       break;
  1542.     case DAC960_V1_BackgroundInitSuccessful:
  1543.       if (Controller->V1.BackgroundInitializationStatus->Status ==
  1544.   DAC960_V1_BackgroundInitializationInProgress)
  1545. DAC960_Progress("Background Initialization "
  1546. "Completed Successfullyn", Controller);
  1547.       Controller->V1.BackgroundInitializationStatus->Status =
  1548. DAC960_V1_BackgroundInitializationInvalid;
  1549.       break;
  1550.     case DAC960_V1_BackgroundInitAborted:
  1551.       if (Controller->V1.BackgroundInitializationStatus->Status ==
  1552.   DAC960_V1_BackgroundInitializationInProgress)
  1553. DAC960_Progress("Background Initialization Abortedn",
  1554. Controller);
  1555.       Controller->V1.BackgroundInitializationStatus->Status =
  1556. DAC960_V1_BackgroundInitializationInvalid;
  1557.       break;
  1558.     case DAC960_V1_NoBackgroundInitInProgress:
  1559.       break;
  1560.     }
  1561.       else if (CommandOpcode == DAC960_V1_DCDB)
  1562. {
  1563.    /*
  1564.      This is a bit ugly.
  1565.      The InquiryStandardData and 
  1566.      the InquiryUntitSerialNumber information
  1567.      retrieval operations BOTH use the DAC960_V1_DCDB
  1568.      commands.  the test above can't distinguish between
  1569.      these two cases.
  1570.      Instead, we rely on the order of code later in this
  1571.              function to ensure that DeviceInquiryInformation commands
  1572.              are submitted before DeviceSerialNumber commands.
  1573.    */
  1574.    if (Controller->V1.NeedDeviceInquiryInformation)
  1575.      {
  1576.         DAC960_SCSI_Inquiry_T *InquiryStandardData =
  1577. &Controller->V1.InquiryStandardData
  1578. [Controller->V1.DeviceStateChannel]
  1579. [Controller->V1.DeviceStateTargetID];
  1580.         if (CommandStatus != DAC960_V1_NormalCompletion)
  1581.    {
  1582. memset(InquiryStandardData, 0,
  1583. sizeof(DAC960_SCSI_Inquiry_T));
  1584.        InquiryStandardData->PeripheralDeviceType = 0x1F;
  1585.     }
  1586.          else
  1587. memcpy(InquiryStandardData, 
  1588. Controller->V1.NewInquiryStandardData,
  1589. sizeof(DAC960_SCSI_Inquiry_T));
  1590.          Controller->V1.NeedDeviceInquiryInformation = false;
  1591.               }
  1592.    else if (Controller->V1.NeedDeviceSerialNumberInformation) 
  1593.               {
  1594.         DAC960_SCSI_Inquiry_UnitSerialNumber_T *InquiryUnitSerialNumber =
  1595.   &Controller->V1.InquiryUnitSerialNumber
  1596. [Controller->V1.DeviceStateChannel]
  1597. [Controller->V1.DeviceStateTargetID];
  1598.          if (CommandStatus != DAC960_V1_NormalCompletion)
  1599.    {
  1600. memset(InquiryUnitSerialNumber, 0,
  1601. sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T));
  1602.        InquiryUnitSerialNumber->PeripheralDeviceType = 0x1F;
  1603.     }
  1604.           else
  1605. memcpy(InquiryUnitSerialNumber, 
  1606. Controller->V1.NewInquiryUnitSerialNumber,
  1607. sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T));
  1608.       Controller->V1.NeedDeviceSerialNumberInformation = false;
  1609.      }
  1610. }
  1611.       /*
  1612.         Begin submitting new monitoring commands.
  1613.        */
  1614.       if (Controller->V1.NewEventLogSequenceNumber
  1615.   - Controller->V1.OldEventLogSequenceNumber > 0)
  1616. {
  1617.   Command->V1.CommandMailbox.Type3E.CommandOpcode =
  1618.     DAC960_V1_PerformEventLogOperation;
  1619.   Command->V1.CommandMailbox.Type3E.OperationType =
  1620.     DAC960_V1_GetEventLogEntry;
  1621.   Command->V1.CommandMailbox.Type3E.OperationQualifier = 1;
  1622.   Command->V1.CommandMailbox.Type3E.SequenceNumber =
  1623.     Controller->V1.OldEventLogSequenceNumber;
  1624.   Command->V1.CommandMailbox.Type3E.BusAddress =
  1625.      Controller->V1.EventLogEntryDMA;
  1626.   DAC960_QueueCommand(Command);
  1627.   return;
  1628. }
  1629.       if (Controller->V1.NeedErrorTableInformation)
  1630. {
  1631.   Controller->V1.NeedErrorTableInformation = false;
  1632.   Command->V1.CommandMailbox.Type3.CommandOpcode =
  1633.     DAC960_V1_GetErrorTable;
  1634.   Command->V1.CommandMailbox.Type3.BusAddress =
  1635.      Controller->V1.NewErrorTableDMA;
  1636.   DAC960_QueueCommand(Command);
  1637.   return;
  1638. }
  1639.       if (Controller->V1.NeedRebuildProgress &&
  1640.   Controller->V1.RebuildProgressFirst)
  1641. {
  1642.   Controller->V1.NeedRebuildProgress = false;
  1643.   Command->V1.CommandMailbox.Type3.CommandOpcode =
  1644.     DAC960_V1_GetRebuildProgress;
  1645.   Command->V1.CommandMailbox.Type3.BusAddress =
  1646.     Controller->V1.RebuildProgressDMA;
  1647.   DAC960_QueueCommand(Command);
  1648.   return;
  1649. }
  1650.       if (Controller->V1.NeedDeviceStateInformation)
  1651. {
  1652.   if (Controller->V1.NeedDeviceInquiryInformation)
  1653.     {
  1654.       DAC960_V1_DCDB_T *DCDB = Controller->V1.MonitoringDCDB;
  1655.       dma_addr_t DCDB_DMA = Controller->V1.MonitoringDCDB_DMA;
  1656.       dma_addr_t NewInquiryStandardDataDMA =
  1657. Controller->V1.NewInquiryStandardDataDMA;
  1658.       Command->V1.CommandMailbox.Type3.CommandOpcode = DAC960_V1_DCDB;
  1659.       Command->V1.CommandMailbox.Type3.BusAddress = DCDB_DMA;
  1660.       DCDB->Channel = Controller->V1.DeviceStateChannel;
  1661.       DCDB->TargetID = Controller->V1.DeviceStateTargetID;
  1662.       DCDB->Direction = DAC960_V1_DCDB_DataTransferDeviceToSystem;
  1663.       DCDB->EarlyStatus = false;
  1664.       DCDB->Timeout = DAC960_V1_DCDB_Timeout_10_seconds;
  1665.       DCDB->NoAutomaticRequestSense = false;
  1666.       DCDB->DisconnectPermitted = true;
  1667.       DCDB->TransferLength = sizeof(DAC960_SCSI_Inquiry_T);
  1668.       DCDB->BusAddress = NewInquiryStandardDataDMA;
  1669.       DCDB->CDBLength = 6;
  1670.       DCDB->TransferLengthHigh4 = 0;
  1671.       DCDB->SenseLength = sizeof(DCDB->SenseData);
  1672.       DCDB->CDB[0] = 0x12; /* INQUIRY */
  1673.       DCDB->CDB[1] = 0; /* EVPD = 0 */
  1674.       DCDB->CDB[2] = 0; /* Page Code */
  1675.       DCDB->CDB[3] = 0; /* Reserved */
  1676.       DCDB->CDB[4] = sizeof(DAC960_SCSI_Inquiry_T);
  1677.       DCDB->CDB[5] = 0; /* Control */
  1678.       DAC960_QueueCommand(Command);
  1679.       return;
  1680.     }
  1681.   if (Controller->V1.NeedDeviceSerialNumberInformation)
  1682.     {
  1683.       DAC960_V1_DCDB_T *DCDB = Controller->V1.MonitoringDCDB;
  1684.       dma_addr_t DCDB_DMA = Controller->V1.MonitoringDCDB_DMA;
  1685.       dma_addr_t NewInquiryUnitSerialNumberDMA = 
  1686. Controller->V1.NewInquiryUnitSerialNumberDMA;
  1687.       Command->V1.CommandMailbox.Type3.CommandOpcode = DAC960_V1_DCDB;
  1688.       Command->V1.CommandMailbox.Type3.BusAddress = DCDB_DMA;
  1689.       DCDB->Channel = Controller->V1.DeviceStateChannel;
  1690.       DCDB->TargetID = Controller->V1.DeviceStateTargetID;
  1691.       DCDB->Direction = DAC960_V1_DCDB_DataTransferDeviceToSystem;
  1692.       DCDB->EarlyStatus = false;
  1693.       DCDB->Timeout = DAC960_V1_DCDB_Timeout_10_seconds;
  1694.       DCDB->NoAutomaticRequestSense = false;
  1695.       DCDB->DisconnectPermitted = true;
  1696.       DCDB->TransferLength =
  1697. sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T);
  1698.       DCDB->BusAddress = NewInquiryUnitSerialNumberDMA;
  1699.       DCDB->CDBLength = 6;
  1700.       DCDB->TransferLengthHigh4 = 0;
  1701.       DCDB->SenseLength = sizeof(DCDB->SenseData);
  1702.       DCDB->CDB[0] = 0x12; /* INQUIRY */
  1703.       DCDB->CDB[1] = 1; /* EVPD = 1 */
  1704.       DCDB->CDB[2] = 0x80; /* Page Code */
  1705.       DCDB->CDB[3] = 0; /* Reserved */
  1706.       DCDB->CDB[4] = sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T);
  1707.       DCDB->CDB[5] = 0; /* Control */
  1708.       DAC960_QueueCommand(Command);
  1709.       return;
  1710.     }
  1711.   if (Controller->V1.StartDeviceStateScan)
  1712.     {
  1713.       Controller->V1.DeviceStateChannel = 0;
  1714.       Controller->V1.DeviceStateTargetID = 0;
  1715.       Controller->V1.StartDeviceStateScan = false;
  1716.     }
  1717.   else if (++Controller->V1.DeviceStateTargetID == Controller->Targets)
  1718.     {
  1719.       Controller->V1.DeviceStateChannel++;
  1720.       Controller->V1.DeviceStateTargetID = 0;
  1721.     }
  1722.   if (Controller->V1.DeviceStateChannel < Controller->Channels)
  1723.     {
  1724.       Controller->V1.NewDeviceState->DeviceState =
  1725. DAC960_V1_Device_Dead;
  1726.       Command->V1.CommandMailbox.Type3D.CommandOpcode =
  1727. DAC960_V1_GetDeviceState;
  1728.       Command->V1.CommandMailbox.Type3D.Channel =
  1729. Controller->V1.DeviceStateChannel;
  1730.       Command->V1.CommandMailbox.Type3D.TargetID =
  1731. Controller->V1.DeviceStateTargetID;
  1732.       Command->V1.CommandMailbox.Type3D.BusAddress =
  1733. Controller->V1.NewDeviceStateDMA;
  1734.       DAC960_QueueCommand(Command);
  1735.       return;
  1736.     }
  1737.   Controller->V1.NeedDeviceStateInformation = false;
  1738. }
  1739.       if (Controller->V1.NeedLogicalDriveInformation)
  1740. {
  1741.   Controller->V1.NeedLogicalDriveInformation = false;
  1742.   Command->V1.CommandMailbox.Type3.CommandOpcode =
  1743.     DAC960_V1_GetLogicalDriveInformation;
  1744.   Command->V1.CommandMailbox.Type3.BusAddress =
  1745.     Controller->V1.NewLogicalDriveInformationDMA;
  1746.   DAC960_QueueCommand(Command);
  1747.   return;
  1748. }
  1749.       if (Controller->V1.NeedRebuildProgress)
  1750. {
  1751.   Controller->V1.NeedRebuildProgress = false;
  1752.   Command->V1.CommandMailbox.Type3.CommandOpcode =
  1753.     DAC960_V1_GetRebuildProgress;
  1754.   Command->V1.CommandMailbox.Type3.BusAddress =
  1755.      Controller->V1.RebuildProgressDMA;
  1756.   DAC960_QueueCommand(Command);
  1757.   return;
  1758. }
  1759.       if (Controller->V1.NeedConsistencyCheckProgress)
  1760. {
  1761.   Controller->V1.NeedConsistencyCheckProgress = false;
  1762.   Command->V1.CommandMailbox.Type3.CommandOpcode =
  1763.     DAC960_V1_RebuildStat;
  1764.   Command->V1.CommandMailbox.Type3.BusAddress =
  1765.     Controller->V1.RebuildProgressDMA;
  1766.   DAC960_QueueCommand(Command);
  1767.   return;
  1768. }
  1769.       if (Controller->V1.NeedBackgroundInitializationStatus)
  1770. {
  1771.   Controller->V1.NeedBackgroundInitializationStatus = false;
  1772.   Command->V1.CommandMailbox.Type3B.CommandOpcode =
  1773.     DAC960_V1_BackgroundInitializationControl;
  1774.   Command->V1.CommandMailbox.Type3B.CommandOpcode2 = 0x20;
  1775.   Command->V1.CommandMailbox.Type3B.BusAddress =
  1776.     Controller->V1.BackgroundInitializationStatusDMA;
  1777.   DAC960_QueueCommand(Command);
  1778.   return;
  1779. }
  1780.       Controller->MonitoringTimerCount++;
  1781.       Controller->MonitoringTimer.expires =
  1782. jiffies + DAC960_MonitoringTimerInterval;
  1783.        add_timer(&Controller->MonitoringTimer);
  1784.     }
  1785.   if (CommandType == DAC960_ImmediateCommand)
  1786.     {
  1787.       complete(Command->Completion);
  1788.       Command->Completion = NULL;
  1789.       return;
  1790.     }
  1791.   if (CommandType == DAC960_QueuedCommand)
  1792.     {
  1793.       DAC960_V1_KernelCommand_T *KernelCommand = Command->V1.KernelCommand;
  1794.       KernelCommand->CommandStatus = Command->V1.CommandStatus;
  1795.       Command->V1.KernelCommand = NULL;
  1796.       if (CommandOpcode == DAC960_V1_DCDB)
  1797. Controller->V1.DirectCommandActive[KernelCommand->DCDB->Channel]
  1798.   [KernelCommand->DCDB->TargetID] =
  1799.   false;
  1800.       DAC960_DeallocateCommand(Command);
  1801.       KernelCommand->CompletionFunction(KernelCommand);
  1802.       return;
  1803.     }
  1804.   /*
  1805.     Queue a Status Monitoring Command to the Controller using the just
  1806.     completed Command if one was deferred previously due to lack of a
  1807.     free Command when the Monitoring Timer Function was called.
  1808.   */
  1809.   if (Controller->MonitoringCommandDeferred)
  1810.     {
  1811.       Controller->MonitoringCommandDeferred = false;
  1812.       DAC960_V1_QueueMonitoringCommand(Command);
  1813.       return;
  1814.     }
  1815.   /*
  1816.     Deallocate the Command.
  1817.   */
  1818.   DAC960_DeallocateCommand(Command);
  1819.   /*
  1820.     Wake up any processes waiting on a free Command.
  1821.   */
  1822.   wake_up(&Controller->CommandWaitQueue);
  1823. }
  1824. /*
  1825.   DAC960_V2_ReadWriteError prints an appropriate error message for Command
  1826.   when an error occurs on a Read or Write operation.
  1827. */
  1828. static void DAC960_V2_ReadWriteError(DAC960_Command_T *Command)
  1829. {
  1830.   DAC960_Controller_T *Controller = Command->Controller;
  1831.   unsigned char *SenseErrors[] = { "NO SENSE", "RECOVERED ERROR",
  1832.    "NOT READY", "MEDIUM ERROR",
  1833.    "HARDWARE ERROR", "ILLEGAL REQUEST",
  1834.    "UNIT ATTENTION", "DATA PROTECT",
  1835.    "BLANK CHECK", "VENDOR-SPECIFIC",
  1836.    "COPY ABORTED", "ABORTED COMMAND",
  1837.    "EQUAL", "VOLUME OVERFLOW",
  1838.    "MISCOMPARE", "RESERVED" };
  1839.   unsigned char *CommandName = "UNKNOWN";
  1840.   switch (Command->CommandType)
  1841.     {
  1842.     case DAC960_ReadCommand:
  1843.     case DAC960_ReadRetryCommand:
  1844.       CommandName = "READ";
  1845.       break;
  1846.     case DAC960_WriteCommand:
  1847.     case DAC960_WriteRetryCommand:
  1848.       CommandName = "WRITE";
  1849.       break;
  1850.     case DAC960_MonitoringCommand:
  1851.     case DAC960_ImmediateCommand:
  1852.     case DAC960_QueuedCommand:
  1853.       break;
  1854.     }
  1855.   DAC960_Error("Error Condition %s on %s:n", Controller,
  1856.        SenseErrors[Command->V2.RequestSense->SenseKey], CommandName);
  1857.   DAC960_Error("  /dev/rd/c%dd%d:   absolute blocks %u..%un",
  1858.        Controller, Controller->ControllerNumber,
  1859.        Command->LogicalDriveNumber, Command->BlockNumber,
  1860.        Command->BlockNumber + Command->BlockCount - 1);
  1861. }
  1862. /*
  1863.   DAC960_V2_ReportEvent prints an appropriate message when a Controller Event
  1864.   occurs.
  1865. */
  1866. static void DAC960_V2_ReportEvent(DAC960_Controller_T *Controller,
  1867.   DAC960_V2_Event_T *Event)
  1868. {
  1869.   DAC960_SCSI_RequestSense_T *RequestSense =
  1870.     (DAC960_SCSI_RequestSense_T *) &Event->RequestSenseData;
  1871.   unsigned char MessageBuffer[DAC960_LineBufferSize];
  1872.   static struct { int EventCode; unsigned char *EventMessage; } EventList[] =
  1873.     { /* Physical Device Events (0x0000 - 0x007F) */
  1874.       { 0x0001, "P Online" },
  1875.       { 0x0002, "P Standby" },
  1876.       { 0x0005, "P Automatic Rebuild Started" },
  1877.       { 0x0006, "P Manual Rebuild Started" },
  1878.       { 0x0007, "P Rebuild Completed" },
  1879.       { 0x0008, "P Rebuild Cancelled" },
  1880.       { 0x0009, "P Rebuild Failed for Unknown Reasons" },
  1881.       { 0x000A, "P Rebuild Failed due to New Physical Device" },
  1882.       { 0x000B, "P Rebuild Failed due to Logical Drive Failure" },
  1883.       { 0x000C, "S Offline" },
  1884.       { 0x000D, "P Found" },
  1885.       { 0x000E, "P Removed" },
  1886.       { 0x000F, "P Unconfigured" },
  1887.       { 0x0010, "P Expand Capacity Started" },
  1888.       { 0x0011, "P Expand Capacity Completed" },
  1889.       { 0x0012, "P Expand Capacity Failed" },
  1890.       { 0x0013, "P Command Timed Out" },
  1891.       { 0x0014, "P Command Aborted" },
  1892.       { 0x0015, "P Command Retried" },
  1893.       { 0x0016, "P Parity Error" },
  1894.       { 0x0017, "P Soft Error" },
  1895.       { 0x0018, "P Miscellaneous Error" },
  1896.       { 0x0019, "P Reset" },
  1897.       { 0x001A, "P Active Spare Found" },
  1898.       { 0x001B, "P Warm Spare Found" },
  1899.       { 0x001C, "S Sense Data Received" },
  1900.       { 0x001D, "P Initialization Started" },
  1901.       { 0x001E, "P Initialization Completed" },
  1902.       { 0x001F, "P Initialization Failed" },
  1903.       { 0x0020, "P Initialization Cancelled" },
  1904.       { 0x0021, "P Failed because Write Recovery Failed" },
  1905.       { 0x0022, "P Failed because SCSI Bus Reset Failed" },
  1906.       { 0x0023, "P Failed because of Double Check Condition" },
  1907.       { 0x0024, "P Failed because Device Cannot Be Accessed" },
  1908.       { 0x0025, "P Failed because of Gross Error on SCSI Processor" },
  1909.       { 0x0026, "P Failed because of Bad Tag from Device" },
  1910.       { 0x0027, "P Failed because of Command Timeout" },
  1911.       { 0x0028, "P Failed because of System Reset" },
  1912.       { 0x0029, "P Failed because of Busy Status or Parity Error" },
  1913.       { 0x002A, "P Failed because Host Set Device to Failed State" },
  1914.       { 0x002B, "P Failed because of Selection Timeout" },
  1915.       { 0x002C, "P Failed because of SCSI Bus Phase Error" },
  1916.       { 0x002D, "P Failed because Device Returned Unknown Status" },
  1917.       { 0x002E, "P Failed because Device Not Ready" },
  1918.       { 0x002F, "P Failed because Device Not Found at Startup" },
  1919.       { 0x0030, "P Failed because COD Write Operation Failed" },
  1920.       { 0x0031, "P Failed because BDT Write Operation Failed" },
  1921.       { 0x0039, "P Missing at Startup" },
  1922.       { 0x003A, "P Start Rebuild Failed due to Physical Drive Too Small" },
  1923.       { 0x003C, "P Temporarily Offline Device Automatically Made Online" },
  1924.       { 0x003D, "P Standby Rebuild Started" },
  1925.       /* Logical Device Events (0x0080 - 0x00FF) */
  1926.       { 0x0080, "M Consistency Check Started" },
  1927.       { 0x0081, "M Consistency Check Completed" },
  1928.       { 0x0082, "M Consistency Check Cancelled" },
  1929.       { 0x0083, "M Consistency Check Completed With Errors" },
  1930.       { 0x0084, "M Consistency Check Failed due to Logical Drive Failure" },
  1931.       { 0x0085, "M Consistency Check Failed due to Physical Device Failure" },
  1932.       { 0x0086, "L Offline" },
  1933.       { 0x0087, "L Critical" },
  1934.       { 0x0088, "L Online" },
  1935.       { 0x0089, "M Automatic Rebuild Started" },
  1936.       { 0x008A, "M Manual Rebuild Started" },
  1937.       { 0x008B, "M Rebuild Completed" },
  1938.       { 0x008C, "M Rebuild Cancelled" },
  1939.       { 0x008D, "M Rebuild Failed for Unknown Reasons" },
  1940.       { 0x008E, "M Rebuild Failed due to New Physical Device" },
  1941.       { 0x008F, "M Rebuild Failed due to Logical Drive Failure" },
  1942.       { 0x0090, "M Initialization Started" },
  1943.       { 0x0091, "M Initialization Completed" },
  1944.       { 0x0092, "M Initialization Cancelled" },
  1945.       { 0x0093, "M Initialization Failed" },
  1946.       { 0x0094, "L Found" },
  1947.       { 0x0095, "L Deleted" },
  1948.       { 0x0096, "M Expand Capacity Started" },
  1949.       { 0x0097, "M Expand Capacity Completed" },
  1950.       { 0x0098, "M Expand Capacity Failed" },
  1951.       { 0x0099, "L Bad Block Found" },
  1952.       { 0x009A, "L Size Changed" },
  1953.       { 0x009B, "L Type Changed" },
  1954.       { 0x009C, "L Bad Data Block Found" },
  1955.       { 0x009E, "L Read of Data Block in BDT" },
  1956.       { 0x009F, "L Write Back Data for Disk Block Lost" },
  1957.       { 0x00A0, "L Temporarily Offline RAID-5/3 Drive Made Online" },
  1958.       { 0x00A1, "L Temporarily Offline RAID-6/1/0/7 Drive Made Online" },
  1959.       { 0x00A2, "L Standby Rebuild Started" },
  1960.       /* Fault Management Events (0x0100 - 0x017F) */
  1961.       { 0x0140, "E Fan %d Failed" },
  1962.       { 0x0141, "E Fan %d OK" },
  1963.       { 0x0142, "E Fan %d Not Present" },
  1964.       { 0x0143, "E Power Supply %d Failed" },
  1965.       { 0x0144, "E Power Supply %d OK" },
  1966.       { 0x0145, "E Power Supply %d Not Present" },
  1967.       { 0x0146, "E Temperature Sensor %d Temperature Exceeds Safe Limit" },
  1968.       { 0x0147, "E Temperature Sensor %d Temperature Exceeds Working Limit" },
  1969.       { 0x0148, "E Temperature Sensor %d Temperature Normal" },
  1970.       { 0x0149, "E Temperature Sensor %d Not Present" },
  1971.       { 0x014A, "E Enclosure Management Unit %d Access Critical" },
  1972.       { 0x014B, "E Enclosure Management Unit %d Access OK" },
  1973.       { 0x014C, "E Enclosure Management Unit %d Access Offline" },
  1974.       /* Controller Events (0x0180 - 0x01FF) */
  1975.       { 0x0181, "C Cache Write Back Error" },
  1976.       { 0x0188, "C Battery Backup Unit Found" },
  1977.       { 0x0189, "C Battery Backup Unit Charge Level Low" },
  1978.       { 0x018A, "C Battery Backup Unit Charge Level OK" },
  1979.       { 0x0193, "C Installation Aborted" },
  1980.       { 0x0195, "C Battery Backup Unit Physically Removed" },
  1981.       { 0x0196, "C Memory Error During Warm Boot" },
  1982.       { 0x019E, "C Memory Soft ECC Error Corrected" },
  1983.       { 0x019F, "C Memory Hard ECC Error Corrected" },
  1984.       { 0x01A2, "C Battery Backup Unit Failed" },
  1985.       { 0x01AB, "C Mirror Race Recovery Failed" },
  1986.       { 0x01AC, "C Mirror Race on Critical Drive" },
  1987.       /* Controller Internal Processor Events */
  1988.       { 0x0380, "C Internal Controller Hung" },
  1989.       { 0x0381, "C Internal Controller Firmware Breakpoint" },
  1990.       { 0x0390, "C Internal Controller i960 Processor Specific Error" },
  1991.       { 0x03A0, "C Internal Controller StrongARM Processor Specific Error" },
  1992.       { 0, "" } };
  1993.   int EventListIndex = 0, EventCode;
  1994.   unsigned char EventType, *EventMessage;
  1995.   if (Event->EventCode == 0x1C &&
  1996.       RequestSense->SenseKey == DAC960_SenseKey_VendorSpecific &&
  1997.       (RequestSense->AdditionalSenseCode == 0x80 ||
  1998.        RequestSense->AdditionalSenseCode == 0x81))
  1999.     Event->EventCode = ((RequestSense->AdditionalSenseCode - 0x80) << 8) |
  2000.        RequestSense->AdditionalSenseCodeQualifier;
  2001.   while (true)
  2002.     {
  2003.       EventCode = EventList[EventListIndex].EventCode;
  2004.       if (EventCode == Event->EventCode || EventCode == 0) break;
  2005.       EventListIndex++;
  2006.     }
  2007.   EventType = EventList[EventListIndex].EventMessage[0];
  2008.   EventMessage = &EventList[EventListIndex].EventMessage[2];
  2009.   if (EventCode == 0)
  2010.     {
  2011.       DAC960_Critical("Unknown Controller Event Code %04Xn",
  2012.       Controller, Event->EventCode);
  2013.       return;
  2014.     }
  2015.   switch (EventType)
  2016.     {
  2017.     case 'P':
  2018.       DAC960_Critical("Physical Device %d:%d %sn", Controller,
  2019.       Event->Channel, Event->TargetID, EventMessage);
  2020.       break;
  2021.     case 'L':
  2022.       DAC960_Critical("Logical Drive %d (/dev/rd/c%dd%d) %sn", Controller,
  2023.       Event->LogicalUnit, Controller->ControllerNumber,
  2024.       Event->LogicalUnit, EventMessage);
  2025.       break;
  2026.     case 'M':
  2027.       DAC960_Progress("Logical Drive %d (/dev/rd/c%dd%d) %sn", Controller,
  2028.       Event->LogicalUnit, Controller->ControllerNumber,
  2029.       Event->LogicalUnit, EventMessage);
  2030.       break;
  2031.     case 'S':
  2032.       if (RequestSense->SenseKey == DAC960_SenseKey_NoSense ||
  2033.   (RequestSense->SenseKey == DAC960_SenseKey_NotReady &&
  2034.    RequestSense->AdditionalSenseCode == 0x04 &&
  2035.    (RequestSense->AdditionalSenseCodeQualifier == 0x01 ||
  2036.     RequestSense->AdditionalSenseCodeQualifier == 0x02)))
  2037. break;
  2038.       DAC960_Critical("Physical Device %d:%d %sn", Controller,
  2039.       Event->Channel, Event->TargetID, EventMessage);
  2040.       DAC960_Critical("Physical Device %d:%d Request Sense: "
  2041.       "Sense Key = %X, ASC = %02X, ASCQ = %02Xn",
  2042.       Controller,
  2043.       Event->Channel,
  2044.       Event->TargetID,
  2045.       RequestSense->SenseKey,
  2046.       RequestSense->AdditionalSenseCode,
  2047.       RequestSense->AdditionalSenseCodeQualifier);
  2048.       DAC960_Critical("Physical Device %d:%d Request Sense: "
  2049.       "Information = %02X%02X%02X%02X "
  2050.       "%02X%02X%02X%02Xn",
  2051.       Controller,
  2052.       Event->Channel,
  2053.       Event->TargetID,
  2054.       RequestSense->Information[0],
  2055.       RequestSense->Information[1],
  2056.       RequestSense->Information[2],
  2057.       RequestSense->Information[3],
  2058.       RequestSense->CommandSpecificInformation[0],
  2059.       RequestSense->CommandSpecificInformation[1],
  2060.       RequestSense->CommandSpecificInformation[2],
  2061.       RequestSense->CommandSpecificInformation[3]);
  2062.       break;
  2063.     case 'E':
  2064.       if (Controller->SuppressEnclosureMessages) break;
  2065.       sprintf(MessageBuffer, EventMessage, Event->LogicalUnit);
  2066.       DAC960_Critical("Enclosure %d %sn", Controller,
  2067.       Event->TargetID, MessageBuffer);
  2068.       break;
  2069.     case 'C':
  2070.       DAC960_Critical("Controller %sn", Controller, EventMessage);
  2071.       break;
  2072.     default:
  2073.       DAC960_Critical("Unknown Controller Event Code %04Xn",
  2074.       Controller, Event->EventCode);
  2075.       break;
  2076.     }
  2077. }
  2078. /*
  2079.   DAC960_V2_ReportProgress prints an appropriate progress message for
  2080.   Logical Device Long Operations.
  2081. */
  2082. static void DAC960_V2_ReportProgress(DAC960_Controller_T *Controller,
  2083.      unsigned char *MessageString,
  2084.      unsigned int LogicalDeviceNumber,
  2085.      unsigned long BlocksCompleted,
  2086.      unsigned long LogicalDeviceSize)
  2087. {
  2088.   Controller->EphemeralProgressMessage = true;
  2089.   DAC960_Progress("%s in Progress: Logical Drive %d (/dev/rd/c%dd%d) "
  2090.   "%d%% completedn", Controller,
  2091.   MessageString,
  2092.   LogicalDeviceNumber,
  2093.   Controller->ControllerNumber,
  2094.   LogicalDeviceNumber,
  2095.   (100 * (BlocksCompleted >> 7)) / (LogicalDeviceSize >> 7));
  2096.   Controller->EphemeralProgressMessage = false;
  2097. }
  2098. /*
  2099.   DAC960_V2_ProcessCompletedCommand performs completion processing for Command
  2100.   for DAC960 V2 Firmware Controllers.
  2101. */
  2102. static void DAC960_V2_ProcessCompletedCommand(DAC960_Command_T *Command)
  2103. {
  2104.   DAC960_Controller_T *Controller = Command->Controller;
  2105.   DAC960_CommandType_T CommandType = Command->CommandType;
  2106.   DAC960_V2_CommandMailbox_T *CommandMailbox = &Command->V2.CommandMailbox;
  2107.   DAC960_V2_IOCTL_Opcode_T CommandOpcode = CommandMailbox->Common.IOCTL_Opcode;
  2108.   DAC960_V2_CommandStatus_T CommandStatus = Command->V2.CommandStatus;
  2109.   if (CommandType == DAC960_ReadCommand ||
  2110.       CommandType == DAC960_WriteCommand)
  2111.     {
  2112. #ifdef FORCE_RETRY_DEBUG
  2113.       CommandStatus = DAC960_V2_AbormalCompletion;
  2114. #endif
  2115.       Command->V2.RequestSense->SenseKey = DAC960_SenseKey_MediumError;
  2116.       if (CommandStatus == DAC960_V2_NormalCompletion) {
  2117. if (!DAC960_ProcessCompletedRequest(Command, true))
  2118. BUG();
  2119.       } else if (Command->V2.RequestSense->SenseKey == DAC960_SenseKey_MediumError)
  2120. {
  2121.   /*
  2122.    * break the command down into pieces and resubmit each
  2123.    * piece, hoping that some of them will succeed.
  2124.    */
  2125.    DAC960_queue_partial_rw(Command);
  2126.    return;
  2127. }
  2128.       else
  2129. {
  2130.   if (Command->V2.RequestSense->SenseKey != DAC960_SenseKey_NotReady)
  2131.     DAC960_V2_ReadWriteError(Command);
  2132.   /*
  2133.     Perform completion processing for all buffers in this I/O Request.
  2134.   */
  2135.           (void)DAC960_ProcessCompletedRequest(Command, false);
  2136. }
  2137.     }
  2138.   else if (CommandType == DAC960_ReadRetryCommand ||
  2139.    CommandType == DAC960_WriteRetryCommand)
  2140.     {
  2141.       boolean normal_completion;
  2142. #ifdef FORCE_RETRY_FAILURE_DEBUG
  2143.       static int retry_count = 1;
  2144. #endif
  2145.       /*
  2146.         Perform completion processing for the portion that was
  2147. retried, and submit the next portion, if any.
  2148.       */
  2149.       normal_completion = true;
  2150.       if (CommandStatus != DAC960_V2_NormalCompletion) {
  2151. normal_completion = false;
  2152. if (Command->V2.RequestSense->SenseKey != DAC960_SenseKey_NotReady)
  2153.     DAC960_V2_ReadWriteError(Command);
  2154.       }
  2155. #ifdef FORCE_RETRY_FAILURE_DEBUG
  2156.       if (!(++retry_count % 10000)) {
  2157.       printk("V2 error retry failure testn");
  2158.       normal_completion = false;
  2159.       DAC960_V2_ReadWriteError(Command);
  2160.       }
  2161. #endif
  2162.       if (!DAC960_ProcessCompletedRequest(Command, normal_completion)) {
  2163. DAC960_queue_partial_rw(Command);
  2164.          return;
  2165.       }
  2166.     }
  2167.   else if (CommandType == DAC960_MonitoringCommand)
  2168.     {
  2169.       if (Controller->ShutdownMonitoringTimer)
  2170.       return;
  2171.       if (CommandOpcode == DAC960_V2_GetControllerInfo)
  2172. {
  2173.   DAC960_V2_ControllerInfo_T *NewControllerInfo =
  2174.     Controller->V2.NewControllerInformation;
  2175.   DAC960_V2_ControllerInfo_T *ControllerInfo =
  2176.     &Controller->V2.ControllerInformation;
  2177.   Controller->LogicalDriveCount =
  2178.     NewControllerInfo->LogicalDevicesPresent;
  2179.   Controller->V2.NeedLogicalDeviceInformation = true;
  2180.   Controller->V2.NeedPhysicalDeviceInformation = true;
  2181.   Controller->V2.StartLogicalDeviceInformationScan = true;
  2182.   Controller->V2.StartPhysicalDeviceInformationScan = true;
  2183.   Controller->MonitoringAlertMode =
  2184.     (NewControllerInfo->LogicalDevicesCritical > 0 ||
  2185.      NewControllerInfo->LogicalDevicesOffline > 0 ||
  2186.      NewControllerInfo->PhysicalDisksCritical > 0 ||
  2187.      NewControllerInfo->PhysicalDisksOffline > 0);
  2188.   memcpy(ControllerInfo, NewControllerInfo,
  2189.  sizeof(DAC960_V2_ControllerInfo_T));
  2190. }
  2191.       else if (CommandOpcode == DAC960_V2_GetEvent)
  2192. {
  2193.   if (CommandStatus == DAC960_V2_NormalCompletion) {
  2194.     DAC960_V2_ReportEvent(Controller, Controller->V2.Event);
  2195.   }
  2196.   Controller->V2.NextEventSequenceNumber++;
  2197. }
  2198.       else if (CommandOpcode == DAC960_V2_GetPhysicalDeviceInfoValid &&
  2199.        CommandStatus == DAC960_V2_NormalCompletion)
  2200. {
  2201.   DAC960_V2_PhysicalDeviceInfo_T *NewPhysicalDeviceInfo =
  2202.     Controller->V2.NewPhysicalDeviceInformation;
  2203.   unsigned int PhysicalDeviceIndex = Controller->V2.PhysicalDeviceIndex;
  2204.   DAC960_V2_PhysicalDeviceInfo_T *PhysicalDeviceInfo =
  2205.     Controller->V2.PhysicalDeviceInformation[PhysicalDeviceIndex];
  2206.   DAC960_SCSI_Inquiry_UnitSerialNumber_T *InquiryUnitSerialNumber =
  2207.     Controller->V2.InquiryUnitSerialNumber[PhysicalDeviceIndex];
  2208.   unsigned int DeviceIndex;
  2209.   while (PhysicalDeviceInfo != NULL &&
  2210.  (NewPhysicalDeviceInfo->Channel >
  2211.   PhysicalDeviceInfo->Channel ||
  2212.   (NewPhysicalDeviceInfo->Channel ==
  2213.    PhysicalDeviceInfo->Channel &&
  2214.    (NewPhysicalDeviceInfo->TargetID >
  2215.     PhysicalDeviceInfo->TargetID ||
  2216.    (NewPhysicalDeviceInfo->TargetID ==
  2217.     PhysicalDeviceInfo->TargetID &&
  2218.     NewPhysicalDeviceInfo->LogicalUnit >
  2219.     PhysicalDeviceInfo->LogicalUnit)))))
  2220.     {
  2221.       DAC960_Critical("Physical Device %d:%d No Longer Existsn",
  2222.       Controller,
  2223.       PhysicalDeviceInfo->Channel,
  2224.       PhysicalDeviceInfo->TargetID);
  2225.       Controller->V2.PhysicalDeviceInformation
  2226.      [PhysicalDeviceIndex] = NULL;
  2227.       Controller->V2.InquiryUnitSerialNumber
  2228.      [PhysicalDeviceIndex] = NULL;
  2229.       kfree(PhysicalDeviceInfo);
  2230.       kfree(InquiryUnitSerialNumber);
  2231.       for (DeviceIndex = PhysicalDeviceIndex;
  2232.    DeviceIndex < DAC960_V2_MaxPhysicalDevices - 1;
  2233.    DeviceIndex++)
  2234. {
  2235.   Controller->V2.PhysicalDeviceInformation[DeviceIndex] =
  2236.     Controller->V2.PhysicalDeviceInformation[DeviceIndex+1];
  2237.   Controller->V2.InquiryUnitSerialNumber[DeviceIndex] =
  2238.     Controller->V2.InquiryUnitSerialNumber[DeviceIndex+1];
  2239. }
  2240.       Controller->V2.PhysicalDeviceInformation
  2241.      [DAC960_V2_MaxPhysicalDevices-1] = NULL;
  2242.       Controller->V2.InquiryUnitSerialNumber
  2243.      [DAC960_V2_MaxPhysicalDevices-1] = NULL;
  2244.       PhysicalDeviceInfo =
  2245. Controller->V2.PhysicalDeviceInformation[PhysicalDeviceIndex];
  2246.       InquiryUnitSerialNumber =
  2247. Controller->V2.InquiryUnitSerialNumber[PhysicalDeviceIndex];
  2248.     }
  2249.   if (PhysicalDeviceInfo == NULL ||
  2250.       (NewPhysicalDeviceInfo->Channel !=
  2251.        PhysicalDeviceInfo->Channel) ||
  2252.       (NewPhysicalDeviceInfo->TargetID !=
  2253.        PhysicalDeviceInfo->TargetID) ||
  2254.       (NewPhysicalDeviceInfo->LogicalUnit !=
  2255.        PhysicalDeviceInfo->LogicalUnit))
  2256.     {
  2257.       PhysicalDeviceInfo = (DAC960_V2_PhysicalDeviceInfo_T *)
  2258. kmalloc(sizeof(DAC960_V2_PhysicalDeviceInfo_T), GFP_ATOMIC);
  2259.       InquiryUnitSerialNumber =
  2260. (DAC960_SCSI_Inquiry_UnitSerialNumber_T *)
  2261.   kmalloc(sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T),
  2262.   GFP_ATOMIC);
  2263.       if (InquiryUnitSerialNumber == NULL &&
  2264.   PhysicalDeviceInfo != NULL)
  2265. {
  2266.   kfree(PhysicalDeviceInfo);
  2267.   PhysicalDeviceInfo = NULL;
  2268. }
  2269.       DAC960_Critical("Physical Device %d:%d Now Exists%sn",
  2270.       Controller,
  2271.       NewPhysicalDeviceInfo->Channel,
  2272.       NewPhysicalDeviceInfo->TargetID,
  2273.       (PhysicalDeviceInfo != NULL
  2274.        ? "" : " - Allocation Failed"));
  2275.       if (PhysicalDeviceInfo != NULL)
  2276. {
  2277.   memset(PhysicalDeviceInfo, 0,
  2278.  sizeof(DAC960_V2_PhysicalDeviceInfo_T));