lowcore.h
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嵌入式Linux

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Unix_Linux

  1. /*
  2.  *  include/asm-s390/lowcore.h
  3.  *
  4.  *  S390 version
  5.  *    Copyright (C) 1999 IBM Deutschland Entwicklung GmbH, IBM Corporation
  6.  *    Author(s): Hartmut Penner (hpenner@de.ibm.com),
  7.  *               Martin Schwidefsky (schwidefsky@de.ibm.com),
  8.  *               Denis Joseph Barrow (djbarrow@de.ibm.com,barrow_dj@yahoo.com)
  9.  */
  10. #ifndef _ASM_S390_LOWCORE_H
  11. #define _ASM_S390_LOWCORE_H
  12. #define __LC_EXT_OLD_PSW                0x0130
  13. #define __LC_SVC_OLD_PSW                0x0140
  14. #define __LC_PGM_OLD_PSW                0x0150
  15. #define __LC_MCK_OLD_PSW                0x0160
  16. #define __LC_IO_OLD_PSW                 0x0170
  17. #define __LC_EXT_NEW_PSW                0x01b0
  18. #define __LC_SVC_NEW_PSW                0x01c0
  19. #define __LC_PGM_NEW_PSW                0x01d0
  20. #define __LC_MCK_NEW_PSW                0x01e0
  21. #define __LC_IO_NEW_PSW                 0x01f0
  22. #define __LC_RETURN_PSW                 0x0200
  23. #define __LC_SYNC_IO_WORD               0x0210
  24. #define __LC_EXT_PARAMS                 0x080
  25. #define __LC_CPU_ADDRESS                0x084
  26. #define __LC_EXT_INT_CODE               0x086
  27. #define __LC_SVC_ILC                    0x088
  28. #define __LC_SVC_INT_CODE               0x08A
  29. #define __LC_PGM_ILC                    0x08C
  30. #define __LC_PGM_INT_CODE               0x08E
  31. #define __LC_TRANS_EXC_ADDR             0x0a8
  32. #define __LC_SUBCHANNEL_ID              0x0B8
  33. #define __LC_SUBCHANNEL_NR              0x0BA
  34. #define __LC_IO_INT_PARM                0x0BC
  35. #define __LC_IO_INT_WORD                0x0C0
  36. #define __LC_MCCK_CODE                  0x0E8
  37. #define __LC_SAVE_AREA                  0xC00
  38. #define __LC_KERNEL_STACK               0xD40
  39. #define __LC_ASYNC_STACK                0xD48
  40. #define __LC_CPUID                      0xD90
  41. #define __LC_CPUADDR                    0xD98
  42. #define __LC_IPLDEV                     0xDB8
  43. #define __LC_JIFFY_TIMER 0xDC0
  44. #define __LC_PANIC_MAGIC                0xE00
  45. #define __LC_AREGS_SAVE_AREA            0x1340
  46. #define __LC_CREGS_SAVE_AREA            0x1380
  47. #define __LC_PFAULT_INTPARM             0x11B8
  48. /* interrupt handler start with all io, external and mcck interrupt disabled */
  49. #define _RESTART_PSW_MASK    0x0000000180000000
  50. #define _EXT_PSW_MASK        0x0400000180000000
  51. #define _PGM_PSW_MASK        0x0400000180000000
  52. #define _SVC_PSW_MASK        0x0400000180000000
  53. #define _MCCK_PSW_MASK       0x0400000180000000
  54. #define _IO_PSW_MASK         0x0400000180000000
  55. #define _USER_PSW_MASK       0x0701C00180000000
  56. #define _WAIT_PSW_MASK       0x0706000180000000
  57. #define _DW_PSW_MASK         0x0002000180000000
  58. #define _PRIMARY_MASK        0x0000    /* MASK for SACF                    */
  59. #define _SECONDARY_MASK      0x0100    /* MASK for SACF                    */
  60. #define _ACCESS_MASK         0x0200    /* MASK for SACF                    */
  61. #define _HOME_MASK           0x0300    /* MASK for SACF                    */
  62. #define _PSW_PRIM_SPACE_MODE 0x0000000000000000
  63. #define _PSW_SEC_SPACE_MODE  0x0000800000000000
  64. #define _PSW_ACC_REG_MODE    0x0000400000000000
  65. #define _PSW_HOME_SPACE_MODE 0x0000C00000000000
  66. #define _PSW_WAIT_MASK_BIT   0x0002000000000000
  67. #define _PSW_IO_MASK_BIT     0x0200000000000000
  68. #define _PSW_IO_WAIT         0x0202000000000000
  69. #ifndef __ASSEMBLY__
  70. #include <linux/config.h>
  71. #include <asm/processor.h>
  72. #include <linux/types.h>
  73. #include <asm/atomic.h>
  74. #include <asm/sigp.h>
  75. void restart_int_handler(void);
  76. void ext_int_handler(void);
  77. void system_call(void);
  78. void pgm_check_handler(void);
  79. void mcck_int_handler(void);
  80. void io_int_handler(void);
  81. struct _lowcore
  82. {
  83.         /* prefix area: defined by architecture */
  84. __u32        ccw1[2];                  /* 0x000 */
  85. __u32        ccw2[4];                  /* 0x008 */
  86. __u8         pad1[0x80-0x18];          /* 0x018 */
  87. __u32        ext_params;               /* 0x080 */
  88. __u16        cpu_addr;                 /* 0x084 */
  89. __u16        ext_int_code;             /* 0x086 */
  90.         __u16        svc_ilc;                  /* 0x088 */
  91.         __u16        svc_code;                 /* 0x08a */
  92.         __u16        pgm_ilc;                  /* 0x08c */
  93.         __u16        pgm_code;                 /* 0x08e */
  94. __u32        data_exc_code;            /* 0x090 */
  95. __u16        mon_class_num;            /* 0x094 */
  96. __u16        per_perc_atmid;           /* 0x096 */
  97. addr_t       per_address;              /* 0x098 */
  98. __u8         exc_access_id;            /* 0x0a0 */
  99. __u8         per_access_id;            /* 0x0a1 */
  100. __u8         op_access_id;             /* 0x0a2 */
  101. __u8         ar_access_id;             /* 0x0a3 */
  102. __u8         pad2[0xA8-0xA4];          /* 0x0a4 */
  103. addr_t       trans_exc_code;           /* 0x0A0 */
  104. addr_t       monitor_code;             /* 0x09c */
  105. __u16        subchannel_id;            /* 0x0b8 */
  106. __u16        subchannel_nr;            /* 0x0ba */
  107. __u32        io_int_parm;              /* 0x0bc */
  108. __u32        io_int_word;              /* 0x0c0 */
  109. __u8         pad3[0xc8-0xc4];          /* 0x0c4 */
  110. __u32        stfl_fac_list;            /* 0x0c8 */
  111. __u8         pad4[0xe8-0xcc];          /* 0x0cc */
  112. __u32        mcck_interruption_code[2]; /* 0x0e8 */
  113. __u8         pad5[0xf4-0xf0];          /* 0x0f0 */
  114. __u32        external_damage_code;     /* 0x0f4 */
  115. addr_t       failing_storage_address;  /* 0x0f8 */
  116. __u8         pad6[0x120-0x100];        /* 0x100 */
  117. psw_t        restart_old_psw;          /* 0x120 */
  118. psw_t        external_old_psw;         /* 0x130 */
  119. psw_t        svc_old_psw;              /* 0x140 */
  120. psw_t        program_old_psw;          /* 0x150 */
  121. psw_t        mcck_old_psw;             /* 0x160 */
  122. psw_t        io_old_psw;               /* 0x170 */
  123. __u8         pad7[0x1a0-0x180];        /* 0x180 */
  124. psw_t        restart_psw;              /* 0x1a0 */
  125. psw_t        external_new_psw;         /* 0x1b0 */
  126. psw_t        svc_new_psw;              /* 0x1c0 */
  127. psw_t        program_new_psw;          /* 0x1d0 */
  128. psw_t        mcck_new_psw;             /* 0x1e0 */
  129. psw_t        io_new_psw;               /* 0x1f0 */
  130.         psw_t        return_psw;               /* 0x200 */
  131. __u32        sync_io_word;             /* 0x210 */
  132.         __u8         pad8[0xc00-0x214];        /* 0x214 */
  133.         /* System info area */
  134. __u64        save_area[16];            /* 0xc00 */
  135.         __u8         pad9[0xd40-0xc80];        /* 0xc80 */
  136.   __u64        kernel_stack;             /* 0xd40 */
  137. __u64        async_stack;              /* 0xd48 */
  138. /* entry.S sensitive area start */
  139. __u8         pad10[0xd80-0xd50];       /* 0xd64 */
  140. struct       cpuinfo_S390 cpu_data;    /* 0xd80 */
  141. __u32        ipl_device;               /* 0xdb8 */
  142. __u32        pad11;                    /* 0xdbc was lsw word of ipl_device until a bug was found DJB */
  143. /* entry.S sensitive area end */
  144.         /* SMP info area: defined by DJB */
  145.         __u64        jiffy_timer;              /* 0xdc0 */
  146. __u64        ext_call_fast;            /* 0xdc8 */
  147.         __u8         pad12[0xe00-0xdd0];       /* 0xdd0 */
  148.         /* 0xe00 is used as indicator for dump tools */
  149.         /* whether the kernel died with panic() or not */
  150.         __u32        panic_magic;              /* 0xe00 */
  151. __u8         pad13[0x1200-0xe04];      /* 0xe04 */
  152.         /* System info area */ 
  153. __u64        floating_pt_save_area[16]; /* 0x1200 */
  154. __u64        gpregs_save_area[16];      /* 0x1280 */
  155. __u32        st_status_fixed_logout[4]; /* 0x1300 */
  156. __u8         pad14[0x1318-0x1310];      /* 0x1310 */
  157. __u32        prefixreg_save_area;       /* 0x1318 */
  158. __u32        fpt_creg_save_area;        /* 0x131c */
  159. __u8         pad15[0x1324-0x1320];      /* 0x1320 */
  160. __u32        tod_progreg_save_area;     /* 0x1324 */
  161. __u32        cpu_timer_save_area[2];    /* 0x1328 */
  162. __u32        clock_comp_save_area[2];   /* 0x1330 */
  163. __u8         pad16[0x1340-0x1338];      /* 0x1338 */ 
  164. __u32        access_regs_save_area[16]; /* 0x1340 */ 
  165. __u64        cregs_save_area[16];       /* 0x1380 */
  166. /* align to the top of the prefix area */
  167. __u8         pad17[0x2000-0x1400];      /* 0x1400 */
  168. } __attribute__((packed)); /* End structure*/
  169. extern __inline__ void set_prefix(__u32 address)
  170. {
  171.         __asm__ __volatile__ ("spx %0" : : "m" (address) : "memory" );
  172. }
  173. #define S390_lowcore (*((struct _lowcore *) 0))
  174. extern struct _lowcore *lowcore_ptr[];
  175. #ifndef CONFIG_SMP
  176. #define get_cpu_lowcore(cpu)    S390_lowcore
  177. #define safe_get_cpu_lowcore(cpu) S390_lowcore
  178. #else
  179. #define get_cpu_lowcore(cpu)    (*lowcore_ptr[cpu])
  180. #define safe_get_cpu_lowcore(cpu) 
  181.         ((cpu)==smp_processor_id() ? S390_lowcore:(*lowcore_ptr[(cpu)]))
  182. #endif
  183. #endif /* __ASSEMBLY__ */
  184. #define __PANIC_MAGIC           0xDEADC0DE
  185. #endif