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offsets.h
资源名称：SBC-2410X_kernel.tar.gz　[点击查看]
上传用户：lgb322
上传日期：2013-02-24
资源大小：30529k
文件大小：6k
源码类别：

嵌入式Linux

开发平台：

Unix_Linux

offsets.h：源码内容
  1. #ifndef _ASM_IA64_OFFSETS_H
  2. #define _ASM_IA64_OFFSETS_H
  3. /*
  4.  * DO NOT MODIFY
  5.  *
  6.  * This file was generated by arch/ia64/tools/print_offsets.awk.
  7.  *
  8.  */
  9. #define PT_PTRACED_BIT 0
  10. #define PT_TRACESYS_BIT 1
  11. #define IA64_TASK_SIZE 3408 /* 0xd50 */
  12. #define IA64_PT_REGS_SIZE 400 /* 0x190 */
  13. #define IA64_SWITCH_STACK_SIZE 560 /* 0x230 */
  14. #define IA64_SIGINFO_SIZE 128 /* 0x80 */
  15. #define IA64_CPU_SIZE 16384 /* 0x4000 */
  16. #define SIGFRAME_SIZE 2816 /* 0xb00 */
  17. #define UNW_FRAME_INFO_SIZE 448 /* 0x1c0 */
  19. #define IA64_TASK_PTRACE_OFFSET 48 /* 0x30 */
  20. #define IA64_TASK_SIGPENDING_OFFSET 16 /* 0x10 */
  21. #define IA64_TASK_NEED_RESCHED_OFFSET 40 /* 0x28 */
  22. #define IA64_TASK_PROCESSOR_OFFSET 100 /* 0x64 */
  23. #define IA64_TASK_THREAD_OFFSET 976 /* 0x3d0 */
  24. #define IA64_TASK_THREAD_KSP_OFFSET 976 /* 0x3d0 */
  25. #define IA64_TASK_PFM_MUST_BLOCK_OFFSET 1600 /* 0x640 */
  26. #define IA64_TASK_PID_OFFSET 220 /* 0xdc */
  27. #define IA64_TASK_MM_OFFSET 88 /* 0x58 */
  28. #define IA64_PT_REGS_CR_IPSR_OFFSET 0 /* 0x0 */
  29. #define IA64_PT_REGS_CR_IIP_OFFSET 8 /* 0x8 */
  30. #define IA64_PT_REGS_CR_IFS_OFFSET 16 /* 0x10 */
  31. #define IA64_PT_REGS_AR_UNAT_OFFSET 24 /* 0x18 */
  32. #define IA64_PT_REGS_AR_PFS_OFFSET 32 /* 0x20 */
  33. #define IA64_PT_REGS_AR_RSC_OFFSET 40 /* 0x28 */
  34. #define IA64_PT_REGS_AR_RNAT_OFFSET 48 /* 0x30 */
  35. #define IA64_PT_REGS_AR_BSPSTORE_OFFSET 56 /* 0x38 */
  36. #define IA64_PT_REGS_PR_OFFSET 64 /* 0x40 */
  37. #define IA64_PT_REGS_B6_OFFSET 72 /* 0x48 */
  38. #define IA64_PT_REGS_LOADRS_OFFSET 80 /* 0x50 */
  39. #define IA64_PT_REGS_R1_OFFSET 88 /* 0x58 */
  40. #define IA64_PT_REGS_R2_OFFSET 96 /* 0x60 */
  41. #define IA64_PT_REGS_R3_OFFSET 104 /* 0x68 */
  42. #define IA64_PT_REGS_R12_OFFSET 112 /* 0x70 */
  43. #define IA64_PT_REGS_R13_OFFSET 120 /* 0x78 */
  44. #define IA64_PT_REGS_R14_OFFSET 128 /* 0x80 */
  45. #define IA64_PT_REGS_R15_OFFSET 136 /* 0x88 */
  46. #define IA64_PT_REGS_R8_OFFSET 144 /* 0x90 */
  47. #define IA64_PT_REGS_R9_OFFSET 152 /* 0x98 */
  48. #define IA64_PT_REGS_R10_OFFSET 160 /* 0xa0 */
  49. #define IA64_PT_REGS_R11_OFFSET 168 /* 0xa8 */
  50. #define IA64_PT_REGS_R16_OFFSET 176 /* 0xb0 */
  51. #define IA64_PT_REGS_R17_OFFSET 184 /* 0xb8 */
  52. #define IA64_PT_REGS_R18_OFFSET 192 /* 0xc0 */
  53. #define IA64_PT_REGS_R19_OFFSET 200 /* 0xc8 */
  54. #define IA64_PT_REGS_R20_OFFSET 208 /* 0xd0 */
  55. #define IA64_PT_REGS_R21_OFFSET 216 /* 0xd8 */
  56. #define IA64_PT_REGS_R22_OFFSET 224 /* 0xe0 */
  57. #define IA64_PT_REGS_R23_OFFSET 232 /* 0xe8 */
  58. #define IA64_PT_REGS_R24_OFFSET 240 /* 0xf0 */
  59. #define IA64_PT_REGS_R25_OFFSET 248 /* 0xf8 */
  60. #define IA64_PT_REGS_R26_OFFSET 256 /* 0x100 */
  61. #define IA64_PT_REGS_R27_OFFSET 264 /* 0x108 */
  62. #define IA64_PT_REGS_R28_OFFSET 272 /* 0x110 */
  63. #define IA64_PT_REGS_R29_OFFSET 280 /* 0x118 */
  64. #define IA64_PT_REGS_R30_OFFSET 288 /* 0x120 */
  65. #define IA64_PT_REGS_R31_OFFSET 296 /* 0x128 */
  66. #define IA64_PT_REGS_AR_CCV_OFFSET 304 /* 0x130 */
  67. #define IA64_PT_REGS_AR_FPSR_OFFSET 312 /* 0x138 */
  68. #define IA64_PT_REGS_B0_OFFSET 320 /* 0x140 */
  69. #define IA64_PT_REGS_B7_OFFSET 328 /* 0x148 */
  70. #define IA64_PT_REGS_F6_OFFSET 336 /* 0x150 */
  71. #define IA64_PT_REGS_F7_OFFSET 352 /* 0x160 */
  72. #define IA64_PT_REGS_F8_OFFSET 368 /* 0x170 */
  73. #define IA64_PT_REGS_F9_OFFSET 384 /* 0x180 */
  74. #define IA64_SWITCH_STACK_CALLER_UNAT_OFFSET 0 /* 0x0 */
  75. #define IA64_SWITCH_STACK_AR_FPSR_OFFSET 8 /* 0x8 */
  76. #define IA64_SWITCH_STACK_F2_OFFSET 16 /* 0x10 */
  77. #define IA64_SWITCH_STACK_F3_OFFSET 32 /* 0x20 */
  78. #define IA64_SWITCH_STACK_F4_OFFSET 48 /* 0x30 */
  79. #define IA64_SWITCH_STACK_F5_OFFSET 64 /* 0x40 */
  80. #define IA64_SWITCH_STACK_F10_OFFSET 80 /* 0x50 */
  81. #define IA64_SWITCH_STACK_F11_OFFSET 96 /* 0x60 */
  82. #define IA64_SWITCH_STACK_F12_OFFSET 112 /* 0x70 */
  83. #define IA64_SWITCH_STACK_F13_OFFSET 128 /* 0x80 */
  84. #define IA64_SWITCH_STACK_F14_OFFSET 144 /* 0x90 */
  85. #define IA64_SWITCH_STACK_F15_OFFSET 160 /* 0xa0 */
  86. #define IA64_SWITCH_STACK_F16_OFFSET 176 /* 0xb0 */
  87. #define IA64_SWITCH_STACK_F17_OFFSET 192 /* 0xc0 */
  88. #define IA64_SWITCH_STACK_F18_OFFSET 208 /* 0xd0 */
  89. #define IA64_SWITCH_STACK_F19_OFFSET 224 /* 0xe0 */
  90. #define IA64_SWITCH_STACK_F20_OFFSET 240 /* 0xf0 */
  91. #define IA64_SWITCH_STACK_F21_OFFSET 256 /* 0x100 */
  92. #define IA64_SWITCH_STACK_F22_OFFSET 272 /* 0x110 */
  93. #define IA64_SWITCH_STACK_F23_OFFSET 288 /* 0x120 */
  94. #define IA64_SWITCH_STACK_F24_OFFSET 304 /* 0x130 */
  95. #define IA64_SWITCH_STACK_F25_OFFSET 320 /* 0x140 */
  96. #define IA64_SWITCH_STACK_F26_OFFSET 336 /* 0x150 */
  97. #define IA64_SWITCH_STACK_F27_OFFSET 352 /* 0x160 */
  98. #define IA64_SWITCH_STACK_F28_OFFSET 368 /* 0x170 */
  99. #define IA64_SWITCH_STACK_F29_OFFSET 384 /* 0x180 */
  100. #define IA64_SWITCH_STACK_F30_OFFSET 400 /* 0x190 */
  101. #define IA64_SWITCH_STACK_F31_OFFSET 416 /* 0x1a0 */
  102. #define IA64_SWITCH_STACK_R4_OFFSET 432 /* 0x1b0 */
  103. #define IA64_SWITCH_STACK_R5_OFFSET 440 /* 0x1b8 */
  104. #define IA64_SWITCH_STACK_R6_OFFSET 448 /* 0x1c0 */
  105. #define IA64_SWITCH_STACK_R7_OFFSET 456 /* 0x1c8 */
  106. #define IA64_SWITCH_STACK_B0_OFFSET 464 /* 0x1d0 */
  107. #define IA64_SWITCH_STACK_B1_OFFSET 472 /* 0x1d8 */
  108. #define IA64_SWITCH_STACK_B2_OFFSET 480 /* 0x1e0 */
  109. #define IA64_SWITCH_STACK_B3_OFFSET 488 /* 0x1e8 */
  110. #define IA64_SWITCH_STACK_B4_OFFSET 496 /* 0x1f0 */
  111. #define IA64_SWITCH_STACK_B5_OFFSET 504 /* 0x1f8 */
  112. #define IA64_SWITCH_STACK_AR_PFS_OFFSET 512 /* 0x200 */
  113. #define IA64_SWITCH_STACK_AR_LC_OFFSET 520 /* 0x208 */
  114. #define IA64_SWITCH_STACK_AR_UNAT_OFFSET 528 /* 0x210 */
  115. #define IA64_SWITCH_STACK_AR_RNAT_OFFSET 536 /* 0x218 */
  116. #define IA64_SWITCH_STACK_AR_BSPSTORE_OFFSET 544 /* 0x220 */
  117. #define IA64_SWITCH_STACK_PR_OFFSET 552 /* 0x228 */
  118. #define IA64_SIGCONTEXT_AR_BSP_OFFSET 72 /* 0x48 */
  119. #define IA64_SIGCONTEXT_AR_FPSR_OFFSET 104 /* 0x68 */
  120. #define IA64_SIGCONTEXT_AR_RNAT_OFFSET 80 /* 0x50 */
  121. #define IA64_SIGCONTEXT_AR_UNAT_OFFSET 96 /* 0x60 */
  122. #define IA64_SIGCONTEXT_B0_OFFSET 136 /* 0x88 */
  123. #define IA64_SIGCONTEXT_CFM_OFFSET 48 /* 0x30 */
  124. #define IA64_SIGCONTEXT_FLAGS_OFFSET 0 /* 0x0 */
  125. #define IA64_SIGCONTEXT_FR6_OFFSET 560 /* 0x230 */
  126. #define IA64_SIGCONTEXT_PR_OFFSET 128 /* 0x80 */
  127. #define IA64_SIGCONTEXT_R12_OFFSET 296 /* 0x128 */
  128. #define IA64_SIGCONTEXT_RBS_BASE_OFFSET 2512 /* 0x9d0 */
  129. #define IA64_SIGCONTEXT_LOADRS_OFFSET 2520 /* 0x9d8 */
  130. #define IA64_SIGFRAME_ARG0_OFFSET 0 /* 0x0 */
  131. #define IA64_SIGFRAME_ARG1_OFFSET 8 /* 0x8 */
  132. #define IA64_SIGFRAME_ARG2_OFFSET 16 /* 0x10 */
  133. #define IA64_SIGFRAME_HANDLER_OFFSET 24 /* 0x18 */
  134. #define IA64_SIGFRAME_SIGCONTEXT_OFFSET 160 /* 0xa0 */
  135. #define IA64_CLONE_VFORK 16384 /* 0x4000 */
  136. #define IA64_CLONE_VM 256 /* 0x100 */
  137. #define IA64_CPU_IRQ_COUNT_OFFSET 0 /* 0x0 */
  138. #define IA64_CPU_BH_COUNT_OFFSET 4 /* 0x4 */
  139. #define IA64_CPU_PHYS_STACKED_SIZE_P8_OFFSET 12 /* 0xc */
  141. #endif /* _ASM_IA64_OFFSETS_H */