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gdb-low.S
资源名称：SBC-2410X_kernel.tar.gz　[点击查看]
上传用户：lgb322
上传日期：2013-02-24
资源大小：30529k
文件大小：7k
源码类别：

嵌入式Linux

开发平台：

Unix_Linux

gdb-low.S：源码内容
  1. /*
  2.  * gdb-low.S contains the low-level trap handler for the GDB stub.
  3.  *
  4.  * Copyright (C) 1995 Andreas Busse
  5.  */
  6. #include <linux/config.h>
  7. #include <linux/sys.h>
  9. #include <asm/asm.h>
  10. #include <asm/errno.h>
  11. #include <asm/mipsregs.h>
  12. #include <asm/regdef.h>
  13. #include <asm/stackframe.h>
  14. #include <asm/gdb-stub.h>
  16. /*
  17.  * The low level trap handler
  18.  */
  19. .align  5
  20. NESTED(trap_low, GDB_FR_SIZE, sp)
  21.   .set noat
  22. .set  noreorder
  24. mfc0 k0,CP0_STATUS
  25. sll k0,3      /* extract cu0 bit */
  26. bltz k0,1f
  27. move k1,sp
  29. /*
  30.  * Called from user mode, go somewhere else.
  31.  */
  32. lui k1,%hi(saved_vectors)
  33. mfc0 k0,CP0_CAUSE
  34. andi k0,k0,0x7c
  35. add k1,k1,k0
  36. lw k0,%lo(saved_vectors)(k1)
  37. jr k0
  38. nop
  39. 1:
  40. move k0,sp
  41. subu sp,k1,GDB_FR_SIZE
  42. sw k0,GDB_FR_REG29(sp)
  43. sw v0,GDB_FR_REG2(sp)
  45. /*
  46.  * First save the CP0 and special registers
  47.  */
  49. mfc0 v0,CP0_STATUS
  50. sw v0,GDB_FR_STATUS(sp)
  51. mfc0 v0,CP0_CAUSE
  52. sw v0,GDB_FR_CAUSE(sp)
  53. mfc0 v0,CP0_EPC
  54. sw v0,GDB_FR_EPC(sp)
  55. mfc0 v0,CP0_BADVADDR
  56. sw v0,GDB_FR_BADVADDR(sp)
  57. mfhi v0
  58. sw v0,GDB_FR_HI(sp)
  59. mflo v0
  60. sw v0,GDB_FR_LO(sp)
  62. /*
  63.  * Now the integer registers
  64.  */
  66. sw zero,GDB_FR_REG0(sp) /* I know... */
  67. sw $1,GDB_FR_REG1(sp)
  68. /* v0 already saved */
  69. sw v1,GDB_FR_REG3(sp)
  70. sw a0,GDB_FR_REG4(sp)
  71. sw a1,GDB_FR_REG5(sp)
  72. sw a2,GDB_FR_REG6(sp)
  73. sw a3,GDB_FR_REG7(sp)
  74. sw t0,GDB_FR_REG8(sp)
  75. sw t1,GDB_FR_REG9(sp)
  76. sw t2,GDB_FR_REG10(sp)
  77. sw t3,GDB_FR_REG11(sp)
  78. sw t4,GDB_FR_REG12(sp)
  79. sw t5,GDB_FR_REG13(sp)
  80. sw t6,GDB_FR_REG14(sp)
  81. sw t7,GDB_FR_REG15(sp)
  82. sw s0,GDB_FR_REG16(sp)
  83. sw s1,GDB_FR_REG17(sp)
  84. sw s2,GDB_FR_REG18(sp)
  85. sw s3,GDB_FR_REG19(sp)
  86. sw s4,GDB_FR_REG20(sp)
  87. sw s5,GDB_FR_REG21(sp)
  88. sw s6,GDB_FR_REG22(sp)
  89. sw s7,GDB_FR_REG23(sp)
  90. sw t8,GDB_FR_REG24(sp)
  91. sw t9,GDB_FR_REG25(sp)
  92. sw k0,GDB_FR_REG26(sp)
  93. sw k1,GDB_FR_REG27(sp)
  94. sw gp,GDB_FR_REG28(sp)
  95. /* sp already saved */
  96. sw fp,GDB_FR_REG30(sp)
  97. sw ra,GDB_FR_REG31(sp)
  99. CLI /* disable interrupts */
  101. /*
  102.  * Followed by the floating point registers
  103.  */
  104. mfc0 v0,CP0_STATUS /* FPU enabled? */
  105. srl v0,v0,16
  106. andi v0,v0,(ST0_CU1 >> 16)
  108. beqz v0,2f /* disabled, skip */
  109.  nop
  111. swc1 $0,GDB_FR_FPR0(sp)
  112. swc1 $1,GDB_FR_FPR1(sp)
  113. swc1 $2,GDB_FR_FPR2(sp)
  114. swc1 $3,GDB_FR_FPR3(sp)
  115. swc1 $4,GDB_FR_FPR4(sp)
  116. swc1 $5,GDB_FR_FPR5(sp)
  117. swc1 $6,GDB_FR_FPR6(sp)
  118. swc1 $7,GDB_FR_FPR7(sp)
  119. swc1 $8,GDB_FR_FPR8(sp)
  120. swc1 $9,GDB_FR_FPR9(sp)
  121. swc1 $10,GDB_FR_FPR10(sp)
  122. swc1 $11,GDB_FR_FPR11(sp)
  123. swc1 $12,GDB_FR_FPR12(sp)
  124. swc1 $13,GDB_FR_FPR13(sp)
  125. swc1 $14,GDB_FR_FPR14(sp)
  126. swc1 $15,GDB_FR_FPR15(sp)
  127. swc1 $16,GDB_FR_FPR16(sp)
  128. swc1 $17,GDB_FR_FPR17(sp)
  129. swc1 $18,GDB_FR_FPR18(sp)
  130. swc1 $19,GDB_FR_FPR19(sp)
  131. swc1 $20,GDB_FR_FPR20(sp)
  132. swc1 $21,GDB_FR_FPR21(sp)
  133. swc1 $22,GDB_FR_FPR22(sp)
  134. swc1 $23,GDB_FR_FPR23(sp)
  135. swc1 $24,GDB_FR_FPR24(sp)
  136. swc1 $25,GDB_FR_FPR25(sp)
  137. swc1 $26,GDB_FR_FPR26(sp)
  138. swc1 $27,GDB_FR_FPR27(sp)
  139. swc1 $28,GDB_FR_FPR28(sp)
  140. swc1 $29,GDB_FR_FPR29(sp)
  141. swc1 $30,GDB_FR_FPR30(sp)
  142. swc1 $31,GDB_FR_FPR31(sp)
  144. /*
  145.  * FPU control registers
  146.  */
  148. mfc1 v0,CP1_STATUS
  149. sw v0,GDB_FR_FSR(sp)
  150. mfc1 v0,CP1_REVISION
  151. sw v0,GDB_FR_FIR(sp)
  153. /*
  154.  * Current stack frame ptr
  155.  */
  157. 2:
  158. sw sp,GDB_FR_FRP(sp)
  160. /*
  161.  * CP0 registers (R4000/R4400 unused registers skipped)
  162.  */
  164. mfc0 v0,CP0_INDEX
  165. sw v0,GDB_FR_CP0_INDEX(sp)
  166. mfc0 v0,CP0_RANDOM
  167. sw v0,GDB_FR_CP0_RANDOM(sp)
  168. mfc0 v0,CP0_ENTRYLO0
  169. sw v0,GDB_FR_CP0_ENTRYLO0(sp)
  170. mfc0 v0,CP0_ENTRYLO1
  171. sw v0,GDB_FR_CP0_ENTRYLO1(sp)
  172. mfc0 v0,CP0_CONTEXT
  173. sw v0,GDB_FR_CP0_CONTEXT(sp)
  174. mfc0 v0,CP0_PAGEMASK
  175. sw v0,GDB_FR_CP0_PAGEMASK(sp)
  176. mfc0 v0,CP0_WIRED
  177. sw v0,GDB_FR_CP0_WIRED(sp)
  178. mfc0 v0,CP0_ENTRYHI
  179. sw v0,GDB_FR_CP0_ENTRYHI(sp)
  180. mfc0 v0,CP0_PRID
  181. sw v0,GDB_FR_CP0_PRID(sp)
  183. .set at
  185. /*
  186.  * Continue with the higher level handler
  187.  */
  189. move a0,sp
  191. jal handle_exception
  192.  nop
  194. /*
  195.  * Restore all writable registers, in reverse order
  196.  */
  198. .set noat
  200. lw v0,GDB_FR_CP0_ENTRYHI(sp)
  201. lw v1,GDB_FR_CP0_WIRED(sp)
  202. mtc0 v0,CP0_ENTRYHI
  203. mtc0 v1,CP0_WIRED
  204. lw v0,GDB_FR_CP0_PAGEMASK(sp)
  205. lw v1,GDB_FR_CP0_ENTRYLO1(sp)
  206. mtc0 v0,CP0_PAGEMASK
  207. mtc0 v1,CP0_ENTRYLO1
  208. lw v0,GDB_FR_CP0_ENTRYLO0(sp)
  209. lw v1,GDB_FR_CP0_INDEX(sp)
  210. mtc0 v0,CP0_ENTRYLO0
  211. lw v0,GDB_FR_CP0_CONTEXT(sp)
  212. mtc0 v1,CP0_INDEX
  213. mtc0 v0,CP0_CONTEXT
  216. /*
  217.  * Next, the floating point registers
  218.  */
  219. mfc0 v0,CP0_STATUS /* check if the FPU is enabled */
  220. srl v0,v0,16
  221. andi v0,v0,(ST0_CU1 >> 16)
  223. beqz v0,3f /* disabled, skip */
  224.  nop
  226. lwc1 $31,GDB_FR_FPR31(sp)
  227. lwc1 $30,GDB_FR_FPR30(sp)
  228. lwc1 $29,GDB_FR_FPR29(sp)
  229. lwc1 $28,GDB_FR_FPR28(sp)
  230. lwc1 $27,GDB_FR_FPR27(sp)
  231. lwc1 $26,GDB_FR_FPR26(sp)
  232. lwc1 $25,GDB_FR_FPR25(sp)
  233. lwc1 $24,GDB_FR_FPR24(sp)
  234. lwc1 $23,GDB_FR_FPR23(sp)
  235. lwc1 $22,GDB_FR_FPR22(sp)
  236. lwc1 $21,GDB_FR_FPR21(sp)
  237. lwc1 $20,GDB_FR_FPR20(sp)
  238. lwc1 $19,GDB_FR_FPR19(sp)
  239. lwc1 $18,GDB_FR_FPR18(sp)
  240. lwc1 $17,GDB_FR_FPR17(sp)
  241. lwc1 $16,GDB_FR_FPR16(sp)
  242. lwc1 $15,GDB_FR_FPR15(sp)
  243. lwc1 $14,GDB_FR_FPR14(sp)
  244. lwc1 $13,GDB_FR_FPR13(sp)
  245. lwc1 $12,GDB_FR_FPR12(sp)
  246. lwc1 $11,GDB_FR_FPR11(sp)
  247. lwc1 $10,GDB_FR_FPR10(sp)
  248. lwc1 $9,GDB_FR_FPR9(sp)
  249. lwc1 $8,GDB_FR_FPR8(sp)
  250. lwc1 $7,GDB_FR_FPR7(sp)
  251. lwc1 $6,GDB_FR_FPR6(sp)
  252. lwc1 $5,GDB_FR_FPR5(sp)
  253. lwc1 $4,GDB_FR_FPR4(sp)
  254. lwc1 $3,GDB_FR_FPR3(sp)
  255. lwc1 $2,GDB_FR_FPR2(sp)
  256. lwc1 $1,GDB_FR_FPR1(sp)
  257. lwc1 $0,GDB_FR_FPR0(sp)
  259. /*
  260.  * Now the CP0 and integer registers
  261.  */
  263. 3:
  264. mfc0 t0,CP0_STATUS
  265. ori t0,0x1f
  266. xori t0,0x1f
  267. mtc0 t0,CP0_STATUS
  269. lw v0,GDB_FR_STATUS(sp)
  270. lw v1,GDB_FR_EPC(sp)
  271. mtc0 v0,CP0_STATUS
  272. mtc0 v1,CP0_EPC
  273. lw v0,GDB_FR_HI(sp)
  274. lw v1,GDB_FR_LO(sp)
  275. mthi v0
  276. mtlo v0
  277. lw ra,GDB_FR_REG31(sp)
  278. lw fp,GDB_FR_REG30(sp)
  279. lw gp,GDB_FR_REG28(sp)
  280. lw k1,GDB_FR_REG27(sp)
  281. lw k0,GDB_FR_REG26(sp)
  282. lw t9,GDB_FR_REG25(sp)
  283. lw t8,GDB_FR_REG24(sp)
  284. lw s7,GDB_FR_REG23(sp)
  285. lw s6,GDB_FR_REG22(sp)
  286. lw s5,GDB_FR_REG21(sp)
  287. lw s4,GDB_FR_REG20(sp)
  288. lw s3,GDB_FR_REG19(sp)
  289. lw s2,GDB_FR_REG18(sp)
  290. lw s1,GDB_FR_REG17(sp)
  291. lw s0,GDB_FR_REG16(sp)
  292. lw t7,GDB_FR_REG15(sp)
  293. lw t6,GDB_FR_REG14(sp)
  294. lw t5,GDB_FR_REG13(sp)
  295. lw t4,GDB_FR_REG12(sp)
  296. lw t3,GDB_FR_REG11(sp)
  297. lw t2,GDB_FR_REG10(sp)
  298. lw t1,GDB_FR_REG9(sp)
  299. lw t0,GDB_FR_REG8(sp)
  300. lw a3,GDB_FR_REG7(sp)
  301. lw a2,GDB_FR_REG6(sp)
  302. lw a1,GDB_FR_REG5(sp)
  303. lw a0,GDB_FR_REG4(sp)
  304. lw v1,GDB_FR_REG3(sp)
  305. lw v0,GDB_FR_REG2(sp)
  306. lw $1,GDB_FR_REG1(sp)
  307. #ifdef CONFIG_CPU_R3000
  308. lw k0, GDB_FR_EPC(sp)
  309. lw sp, GDB_FR_REG29(sp) /* Deallocate stack */
  310. jr k0
  311. rfe
  312. #else
  313. lw sp, GDB_FR_REG29(sp) /* Deallocate stack */
  315. .set mips3
  316. eret
  317. .set mips0
  318. #endif
  319. .set at
  320. .set reorder
  321. END(trap_low)
  323. LEAF(kgdb_read_byte)
  324. .set push
  325. .set noreorder
  326. .set nomacro
  327. 4: lb t0, (a0)
  328. .set pop
  329. sb t0, (a1)
  330. li v0, 0
  331. jr ra
  332. .section __ex_table,"a"
  333. PTR 4b, kgdbfault
  334. .previous
  335. END(kgdb_read_byte)
  337. LEAF(kgdb_write_byte)
  338. .set push
  339. .set noreorder
  340. .set nomacro
  341. 5: sb a0, (a1)
  342. .set pop
  343. li v0, 0
  344. jr ra
  345. .section __ex_table,"a"
  346. PTR 5b, kgdbfault
  347. .previous
  348. END(kgdb_write_byte)
  350. .type kgdbfault@function
  351. .ent kgdbfault
  352. kgdbfault: li v0, -EFAULT
  353. jr ra
  354. .end kgdbfault