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mpi_cnfg.h
资源名称：SBC-2410X_kernel.tar.gz　[点击查看]
上传用户：lgb322
上传日期：2013-02-24
资源大小：30529k
文件大小：54k
源码类别：

嵌入式Linux

开发平台：

Unix_Linux

mpi_cnfg.h：源码内容
  1. /*
  2.  *  Copyright (c) 2000-2001 LSI Logic Corporation.
  3.  *
  4.  *
  5.  *           Name:  MPI_CNFG.H
  6.  *          Title:  MPI Config message, structures, and Pages
  7.  *  Creation Date:  July 27, 2000
  8.  *
  9.  *    MPI Version:  01.01.11
  10.  *
  11.  *  Version History
  12.  *  ---------------
  13.  *
  14.  *  Date      Version   Description
  15.  *  --------  --------  ------------------------------------------------------
  16.  *  05-08-00  00.10.01  Original release for 0.10 spec dated 4/26/2000.
  17.  *  06-06-00  01.00.01  Update version number for 1.0 release.
  18.  *  06-08-00  01.00.02  Added _PAGEVERSION definitions for all pages.
  19.  *                      Added FcPhLowestVersion, FcPhHighestVersion, Reserved2
  20.  *                      fields to FC_DEVICE_0 page, updated the page version.
  21.  *                      Changed _FREE_RUNNING_CLOCK to _PACING_TRANSFERS in
  22.  *                      SCSI_PORT_0, SCSI_DEVICE_0 and SCSI_DEVICE_1 pages
  23.  *                      and updated the page versions.
  24.  *                      Added _RESPONSE_ID_MASK definition to SCSI_PORT_1
  25.  *                      page and updated the page version.
  26.  *                      Added Information field and _INFO_PARAMS_NEGOTIATED
  27.  *                      definitionto SCSI_DEVICE_0 page.
  28.  *  06-22-00  01.00.03  Removed batch controls from LAN_0 page and updated the
  29.  *                      page version.
  30.  *                      Added BucketsRemaining to LAN_1 page, redefined the
  31.  *                      state values, and updated the page version.
  32.  *                      Revised bus width definitions in SCSI_PORT_0,
  33.  *                      SCSI_DEVICE_0 and SCSI_DEVICE_1 pages.
  34.  *  06-30-00  01.00.04  Added MaxReplySize to LAN_1 page and updated the page
  35.  *                      version.
  36.  *                      Moved FC_DEVICE_0 PageAddress description to spec.
  37.  *  07-27-00  01.00.05  Corrected the SubsystemVendorID and SubsystemID field
  38.  *                      widths in IOC_0 page and updated the page version.
  39.  *  11-02-00  01.01.01  Original release for post 1.0 work
  40.  *                      Added Manufacturing pages, IO Unit Page 2, SCSI SPI
  41.  *                      Port Page 2, FC Port Page 4, FC Port Page 5
  42.  *  11-15-00  01.01.02  Interim changes to match proposals
  43.  *  12-04-00  01.01.03  Config page changes to match MPI rev 1.00.01.
  44.  *  12-05-00  01.01.04  Modified config page actions.
  45.  *  01-09-01  01.01.05  Added defines for page address formats.
  46.  *                      Data size for Manufacturing pages 2 and 3 no longer
  47.  *                      defined here.
  48.  *                      Io Unit Page 2 size is fixed at 4 adapters and some
  49.  *                      flags were changed.
  50.  *                      SCSI Port Page 2 Device Settings modified.
  51.  *                      New fields added to FC Port Page 0 and some flags
  52.  *                      cleaned up.
  53.  *                      Removed impedance flash from FC Port Page 1.
  54.  *                      Added FC Port pages 6 and 7.
  55.  *  01-25-01  01.01.06  Added MaxInitiators field to FcPortPage0.
  56.  *  01-29-01  01.01.07  Changed some defines to make them 32 character unique.
  57.  *                      Added some LinkType defines for FcPortPage0.
  58.  *  02-20-01  01.01.08  Started using MPI_POINTER.
  59.  *  02-27-01  01.01.09  Replaced MPI_CONFIG_PAGETYPE_SCSI_LUN with
  60.  *                      MPI_CONFIG_PAGETYPE_RAID_VOLUME.
  61.  *                      Added definitions and structures for IOC Page 2 and
  62.  *                      RAID Volume Page 2.
  63.  *  03-27-01  01.01.10  Added CONFIG_PAGE_FC_PORT_8 and CONFIG_PAGE_FC_PORT_9.
  64.  *                      CONFIG_PAGE_FC_PORT_3 now supports persistent by DID.
  65.  *                      Added VendorId and ProductRevLevel fields to
  66.  *                      RAIDVOL2_IM_PHYS_ID struct.
  67.  *                      Modified values for MPI_FCPORTPAGE0_FLAGS_ATTACH_
  68.  *                      defines to make them compatible to MPI version 1.0.
  69.  *                      Added structure offset comments.
  70.  *  04-09-01  01.01.11  Added some new defines for the PageAddress field and
  71.  *                      removed some obsolete ones.
  72.  *                      Added IO Unit Page 3.
  73.  *                      Modified defines for Scsi Port Page 2.
  74.  *                      Modified RAID Volume Pages.
  75.  *  --------------------------------------------------------------------------
  76.  */
  78. #ifndef MPI_CNFG_H
  79. #define MPI_CNFG_H
  82. /*****************************************************************************
  83. *
  84. *       C o n f i g    M e s s a g e    a n d    S t r u c t u r e s
  85. *
  86. *****************************************************************************/
  88. typedef struct _CONFIG_PAGE_HEADER
  89. {
  90.     U8                      PageVersion;                /* 00h */
  91.     U8                      PageLength;                 /* 01h */
  92.     U8                      PageNumber;                 /* 02h */
  93.     U8                      PageType;                   /* 03h */
  94. } fCONFIG_PAGE_HEADER, MPI_POINTER PTR_CONFIG_PAGE_HEADER,
  95.   ConfigPageHeader_t, MPI_POINTER pConfigPageHeader_t;
  97. typedef union _CONFIG_PAGE_HEADER_UNION
  98. {
  99.    ConfigPageHeader_t  Struct;
  100.    U8                  Bytes[4];
  101.    U16                 Word16[2];
  102.    U32                 Word32;
  103. } ConfigPageHeaderUnion, MPI_POINTER pConfigPageHeaderUnion,
  104.   fCONFIG_PAGE_HEADER_UNION, MPI_POINTER PTR_CONFIG_PAGE_HEADER_UNION;
  107. /****************************************************************************/
  108. /*  PageType field values                                                   */
  109. /****************************************************************************/
  110. #define MPI_CONFIG_PAGEATTR_READ_ONLY               (0x00)
  111. #define MPI_CONFIG_PAGEATTR_CHANGEABLE              (0x10)
  112. #define MPI_CONFIG_PAGEATTR_PERSISTENT              (0x20)
  113. #define MPI_CONFIG_PAGEATTR_MASK                    (0xF0)
  115. #define MPI_CONFIG_PAGETYPE_IO_UNIT                 (0x00)
  116. #define MPI_CONFIG_PAGETYPE_IOC                     (0x01)
  117. #define MPI_CONFIG_PAGETYPE_BIOS                    (0x02)
  118. #define MPI_CONFIG_PAGETYPE_SCSI_PORT               (0x03)
  119. #define MPI_CONFIG_PAGETYPE_SCSI_DEVICE             (0x04)
  120. #define MPI_CONFIG_PAGETYPE_FC_PORT                 (0x05)
  121. #define MPI_CONFIG_PAGETYPE_FC_DEVICE               (0x06)
  122. #define MPI_CONFIG_PAGETYPE_LAN                     (0x07)
  123. #define MPI_CONFIG_PAGETYPE_RAID_VOLUME             (0x08)
  124. #define MPI_CONFIG_PAGETYPE_MANUFACTURING           (0x09)
  125. #define MPI_CONFIG_PAGETYPE_MASK                    (0x0F)
  127. #define MPI_CONFIG_TYPENUM_MASK                     (0x0FFF)
  130. /****************************************************************************
  131.  *  PageAddres field values
  132.  ****************************************************************************/
  133. #define MPI_SCSI_PORT_PGAD_PORT_MASK                (0x000000FF)
  135. #define MPI_SCSI_DEVICE_FORM_MASK                   (0xF0000000)
  136. #define MPI_SCSI_DEVICE_FORM_TARGETID               (0x00000000)
  137. #define MPI_SCSI_DEVICE_FORM_RAID_PHYS_DEV_NUM      (0x10000000)
  138. #define MPI_SCSI_DEVICE_TARGET_ID_MASK              (0x000000FF)
  139. #define MPI_SCSI_DEVICE_TARGET_ID_SHIFT             (0)
  140. #define MPI_SCSI_DEVICE_BUS_MASK                    (0x0000FF00)
  141. #define MPI_SCSI_DEVICE_BUS_SHIFT                   (8)
  142. #define MPI_SCSI_DEVICE_VOLUME_TARG_ID_MASK         (0x000000FF)
  143. #define MPI_SCSI_DEVICE_VOLUME_TARG_ID_SHIFT        (0)
  144. #define MPI_SCSI_DEVICE_VOLUME_BUS_MASK             (0x0000FF00)
  145. #define MPI_SCSI_DEVICE_VOLUME_BUS_SHIFT            (8)
  146. #define MPI_SCSI_DEVICE_PHYS_DISK_NUM_MASK          (0x00FF0000)
  147. #define MPI_SCSI_DEVICE_PHYS_DISK_NUM_SHIFT         (16)
  149. #define MPI_FC_PORT_PGAD_PORT_MASK                  (0xF0000000)
  150. #define MPI_FC_PORT_PGAD_PORT_SHIFT                 (28)
  151. #define MPI_FC_PORT_PGAD_FORM_MASK                  (0x0F000000)
  152. #define MPI_FC_PORT_PGAD_FORM_INDEX                 (0x01000000)
  153. #define MPI_FC_PORT_PGAD_INDEX_MASK                 (0x0000FFFF)
  154. #define MPI_FC_PORT_PGAD_INDEX_SHIFT                (0)
  156. #define MPI_FC_DEVICE_PGAD_PORT_MASK                (0xF0000000)
  157. #define MPI_FC_DEVICE_PGAD_PORT_SHIFT               (28)
  158. #define MPI_FC_DEVICE_PGAD_FORM_MASK                (0x0F000000)
  159. #define MPI_FC_DEVICE_PGAD_FORM_NEXT_DID            (0x00000000)
  160. #define MPI_FC_DEVICE_PGAD_ND_PORT_MASK             (0xF0000000)
  161. #define MPI_FC_DEVICE_PGAD_ND_PORT_SHIFT            (28)
  162. #define MPI_FC_DEVICE_PGAD_ND_DID_MASK              (0x00FFFFFF)
  163. #define MPI_FC_DEVICE_PGAD_ND_DID_SHIFT             (0)
  164. #define MPI_FC_DEVICE_PGAD_FORM_BUS_TID             (0x01000000)
  165. #define MPI_FC_DEVICE_PGAD_BT_BUS_MASK              (0x0000FF00)
  166. #define MPI_FC_DEVICE_PGAD_BT_BUS_SHIFT             (8)
  167. #define MPI_FC_DEVICE_PGAD_BT_TID_MASK              (0x000000FF)
  168. #define MPI_FC_DEVICE_PGAD_BT_TID_SHIFT             (0)
  171. /****************************************************************************/
  172. /*  Config Request Message                                                          */
  173. /****************************************************************************/
  174. typedef struct _MSG_CONFIG
  175. {
  176.     U8                      Action;                     /* 00h */
  177.     U8                      Reserved;                   /* 01h */
  178.     U8                      ChainOffset;                /* 02h */
  179.     U8                      Function;                   /* 03h */
  180.     U8                      Reserved1[3];               /* 04h */
  181.     U8                      MsgFlags;                   /* 07h */
  182.     U32                     MsgContext;                 /* 08h */
  183.     U8                      Reserved2[8];               /* 0Ch */
  184.    fCONFIG_PAGE_HEADER      Header;                     /* 14h */
  185.     U32                     PageAddress;                /* 18h */
  186.     SGE_IO_UNION            PageBufferSGE;              /* 1Ch */
  187. } MSG_CONFIG, MPI_POINTER PTR_MSG_CONFIG,
  188.   Config_t, MPI_POINTER pConfig_t;
  191. /****************************************************************************/
  192. /*  Action field values                                                     */
  193. /****************************************************************************/
  194. #define MPI_CONFIG_ACTION_PAGE_HEADER               (0x00)
  195. #define MPI_CONFIG_ACTION_PAGE_READ_CURRENT         (0x01)
  196. #define MPI_CONFIG_ACTION_PAGE_WRITE_CURRENT        (0x02)
  197. #define MPI_CONFIG_ACTION_PAGE_DEFAULT              (0x03)
  198. #define MPI_CONFIG_ACTION_PAGE_WRITE_NVRAM          (0x04)
  199. #define MPI_CONFIG_ACTION_PAGE_READ_DEFAULT         (0x05)
  200. #define MPI_CONFIG_ACTION_PAGE_READ_NVRAM           (0x06)
  203. /* Config Reply Message */
  204. typedef struct _MSG_CONFIG_REPLY
  205. {
  206.     U8                      Action;                     /* 00h */
  207.     U8                      Reserved;                   /* 01h */
  208.     U8                      MsgLength;                  /* 02h */
  209.     U8                      Function;                   /* 03h */
  210.     U8                      Reserved1[3];               /* 04h */
  211.     U8                      MsgFlags;                   /* 07h */
  212.     U32                     MsgContext;                 /* 08h */
  213.     U8                      Reserved2[2];               /* 0Ch */
  214.     U16                     IOCStatus;                  /* 0Eh */
  215.     U32                     IOCLogInfo;                 /* 10h */
  216.    fCONFIG_PAGE_HEADER      Header;                     /* 14h */
  217. } MSG_CONFIG_REPLY, MPI_POINTER PTR_MSG_CONFIG_REPLY,
  218.   ConfigReply_t, MPI_POINTER pConfigReply_t;
  222. /*****************************************************************************
  223. *
  224. *               C o n f i g u r a t i o n    P a g e s
  225. *
  226. *****************************************************************************/
  228. /****************************************************************************/
  229. /*  Manufacturing Config pages                                              */
  230. /****************************************************************************/
  231. #define MPI_MANUFACTPAGE_DEVICEID_FC909             (0x0621)
  232. #define MPI_MANUFACTPAGE_DEVICEID_FC919             (0x0624)
  233. #define MPI_MANUFACTPAGE_DEVICEID_FC929             (0x0622)
  234. #define MPI_MANUFACTPAGE_DEVID_53C1030              (0x0030)
  235. #define MPI_MANUFACTPAGE_DEVID_53C1030ZC            (0x0031)
  236. #define MPI_MANUFACTPAGE_DEVID_53C1035              (0x0035)
  238. typedef struct _CONFIG_PAGE_MANUFACTURING_0
  239. {
  240.    fCONFIG_PAGE_HEADER      Header;                     /* 00h */
  241.     U8                      ChipName[16];               /* 04h */
  242.     U8                      ChipRevision[8];            /* 14h */
  243.     U8                      BoardName[16];              /* 1Ch */
  244.     U8                      BoardAssembly[16];          /* 2Ch */
  245.     U8                      BoardTracerNumber[16];      /* 3Ch */
  247. } fCONFIG_PAGE_MANUFACTURING_0, MPI_POINTER PTR_CONFIG_PAGE_MANUFACTURING_0,
  248.   ManufacturingPage0_t, MPI_POINTER pManufacturingPage0_t;
  250. #define MPI_MANUFACTURING0_PAGEVERSION                 (0x00)
  253. typedef struct _CONFIG_PAGE_MANUFACTURING_1
  254. {
  255.    fCONFIG_PAGE_HEADER      Header;                     /* 00h */
  256.     U8                      VPD[256];                   /* 04h */
  257. } fCONFIG_PAGE_MANUFACTURING_1, MPI_POINTER PTR_CONFIG_PAGE_MANUFACTURING_1,
  258.   ManufacturingPage1_t, MPI_POINTER pManufacturingPage1_t;
  260. #define MPI_MANUFACTURING1_PAGEVERSION                 (0x00)
  263. typedef struct _MPI_CHIP_REVISION_ID
  264. {
  265.     U16 DeviceID;                                       /* 00h */
  266.     U8  PCIRevisionID;                                  /* 02h */
  267.     U8  Reserved;                                       /* 03h */
  268. } MPI_CHIP_REVISION_ID, MPI_POINTER PTR_MPI_CHIP_REVISION_ID,
  269.   MpiChipRevisionId_t, MPI_POINTER pMpiChipRevisionId_t;
  272. typedef struct _CONFIG_PAGE_MANUFACTURING_2
  273. {
  274.    fCONFIG_PAGE_HEADER                  Header;         /* 00h */
  275.     MPI_CHIP_REVISION_ID                ChipId;         /* 04h */
  276.     U32                                 HwSettings[1];  /* 08h */
  277. } fCONFIG_PAGE_MANUFACTURING_2, MPI_POINTER PTR_CONFIG_PAGE_MANUFACTURING_2,
  278.   ManufacturingPage2_t, MPI_POINTER pManufacturingPage2_t;
  280. #define MPI_MANUFACTURING2_PAGEVERSION                  (0x00)
  283. typedef struct _CONFIG_PAGE_MANUFACTURING_3
  284. {
  285.    fCONFIG_PAGE_HEADER                  Header;         /* 00h */
  286.     MPI_CHIP_REVISION_ID                ChipId;         /* 04h */
  287.     U32                                 Info[1];        /* 08h */
  288. } fCONFIG_PAGE_MANUFACTURING_3, MPI_POINTER PTR_CONFIG_PAGE_MANUFACTURING_3,
  289.   ManufacturingPage3_t, MPI_POINTER pManufacturingPage3_t;
  291. #define MPI_MANUFACTURING3_PAGEVERSION                  (0x00)
  294. /****************************************************************************/
  295. /*  IO Unit Config Pages                                                    */
  296. /****************************************************************************/
  298. typedef struct _CONFIG_PAGE_IO_UNIT_0
  299. {
  300.    fCONFIG_PAGE_HEADER      Header;                     /* 00h */
  301.     U64                     UniqueValue;                /* 04h */
  302. } fCONFIG_PAGE_IO_UNIT_0, MPI_POINTER PTR_CONFIG_PAGE_IO_UNIT_0,
  303.   IOUnitPage0_t, MPI_POINTER pIOUnitPage0_t;
  305. #define MPI_IOUNITPAGE0_PAGEVERSION                     (0x00)
  308. typedef struct _CONFIG_PAGE_IO_UNIT_1
  309. {
  310.    fCONFIG_PAGE_HEADER      Header;                     /* 00h */
  311.     U32                     Flags;                      /* 04h */
  312. } fCONFIG_PAGE_IO_UNIT_1, MPI_POINTER PTR_CONFIG_PAGE_IO_UNIT_1,
  313.   IOUnitPage1_t, MPI_POINTER pIOUnitPage1_t;
  315. #define MPI_IOUNITPAGE1_PAGEVERSION                     (0x00)
  317. #define MPI_IOUNITPAGE1_MULTI_FUNCTION                  (0x00000000)
  318. #define MPI_IOUNITPAGE1_SINGLE_FUNCTION                 (0x00000001)
  319. #define MPI_IOUNITPAGE1_MULTI_PATHING                   (0x00000002)
  320. #define MPI_IOUNITPAGE1_SINGLE_PATHING                  (0x00000000)
  322. #define MPI_IOUNITPAGE1_FORCE_32                        (0x00000080)
  325. typedef struct _MPI_ADAPTER_INFO
  326. {
  327.     U8      PciBusNumber;                               /* 00h */
  328.     U8      PciDeviceAndFunctionNumber;                 /* 01h */
  329.     U16     AdapterFlags;                               /* 02h */
  330. } MPI_ADAPTER_INFO, MPI_POINTER PTR_MPI_ADAPTER_INFO,
  331.   MpiAdapterInfo_t, MPI_POINTER pMpiAdapterInfo_t;
  333. #define MPI_ADAPTER_INFO_FLAGS_EMBEDDED                 (0x0001)
  334. #define MPI_ADAPTER_INFO_FLAGS_INIT_STATUS              (0x0002)
  336. typedef struct _CONFIG_PAGE_IO_UNIT_2
  337. {
  338.    fCONFIG_PAGE_HEADER      Header;                     /* 00h */
  339.     U32                     Flags;                      /* 04h */
  340.     U32                     BiosVersion;                /* 08h */
  341.     MPI_ADAPTER_INFO        AdapterOrder[4];            /* 0Ch */
  342. } fCONFIG_PAGE_IO_UNIT_2, MPI_POINTER PTR_CONFIG_PAGE_IO_UNIT_2,
  343.   IOUnitPage2_t, MPI_POINTER pIOUnitPage2_t;
  345. #define MPI_IOUNITPAGE2_PAGEVERSION                     (0x00)
  347. #define MPI_IOUNITPAGE2_FLAGS_RAID_DISABLE              (0x00000001)
  348. #define MPI_IOUNITPAGE2_FLAGS_PAUSE_ON_ERROR            (0x00000002)
  349. #define MPI_IOUNITPAGE2_FLAGS_VERBOSE_ENABLE            (0x00000004)
  350. #define MPI_IOUNITPAGE2_FLAGS_COLOR_VIDEO_DISABLE       (0x00000008)
  351. #define MPI_IOUNITPAGE2_FLAGS_DONT_HOOK_INT_40          (0x00000010)
  354. typedef struct _CONFIG_PAGE_IO_UNIT_3
  355. {
  356.    fCONFIG_PAGE_HEADER      Header;                     /* 00h */
  357.     U32                     VolumeSettings;             /* 04h */
  358.     U8                      InfoOffset0;                /* 08h */
  359.     U8                      InfoSize0;                  /* 09h */
  360.     U8                      InfoOffset1;                /* 0Ah */
  361.     U8                      InfoSize1;                  /* 0Bh */
  362.     U8                      InquirySize;                /* 0Ch */
  363.     U8                      Reserved;                   /* 0Dh */
  364.     U16                     Reserved2;                  /* 0Eh */
  365.     U8                      InquiryData[56];            /* 10h */
  366. } fCONFIG_PAGE_IO_UNIT_3, MPI_POINTER PTR_CONFIG_PAGE_IO_UNIT_3,
  367.   IOUnitPage3_t, MPI_POINTER pIOUnitPage3_t;
  369. #define MPI_IOUNITPAGE3_PAGEVERSION                     (0x00)
  372. /****************************************************************************/
  373. /*  IOC Config Pages                                                        */
  374. /****************************************************************************/
  376. typedef struct _CONFIG_PAGE_IOC_0
  377. {
  378.    fCONFIG_PAGE_HEADER      Header;                     /* 00h */
  379.     U32                     TotalNVStore;               /* 04h */
  380.     U32                     FreeNVStore;                /* 08h */
  381.     U16                     VendorID;                   /* 0Ch */
  382.     U16                     DeviceID;                   /* 0Eh */
  383.     U8                      RevisionID;                 /* 10h */
  384.     U8                      Reserved[3];                /* 11h */
  385.     U32                     ClassCode;                  /* 14h */
  386.     U16                     SubsystemVendorID;          /* 18h */
  387.     U16                     SubsystemID;                /* 1Ah */
  388. } fCONFIG_PAGE_IOC_0, MPI_POINTER PTR_CONFIG_PAGE_IOC_0,
  389.   IOCPage0_t, MPI_POINTER pIOCPage0_t;
  391. #define MPI_IOCPAGE0_PAGEVERSION                        (0x01)
  394. typedef struct _CONFIG_PAGE_IOC_1
  395. {
  396.    fCONFIG_PAGE_HEADER      Header;                     /* 00h */
  397.     U32                     Flags;                      /* 04h */
  398.     U32                     CoalescingTimeout;          /* 08h */
  399.     U8                      CoalescingDepth;            /* 0Ch */
  400.     U8                      Reserved[3];                /* 0Dh */
  401. } fCONFIG_PAGE_IOC_1, MPI_POINTER PTR_CONFIG_PAGE_IOC_1,
  402.   IOCPage1_t, MPI_POINTER pIOCPage1_t;
  404. #define MPI_IOCPAGE1_PAGEVERSION                        (0x00)
  406. #define MPI_IOCPAGE1_REPLY_COALESCING                   (0x00000001)
  409. typedef struct _CONFIG_PAGE_IOC_2_RAID_VOL
  410. {
  411.     U8                      VolumeTargetID;             /* 00h */
  412.     U8                      VolumeBus;                  /* 01h */
  413.     U16                     Reserved;                   /* 02h */
  414.     U8                      VolumeVersionMinor;         /* 04h */
  415.     U8                      VolumeVersionMajor;         /* 05h */
  416.     U8                      VolumeRaidType;             /* 06h */
  417.     U8                      Reserved1;                  /* 07h */
  418. } fCONFIG_PAGE_IOC_2_RAID_VOL, MPI_POINTER PTR_CONFIG_PAGE_IOC_2_RAID_VOL,
  419.   ConfigPageIoc2RaidVol_t, MPI_POINTER pConfigPageIoc2RaidVol_t;
  421. typedef struct _CONFIG_PAGE_IOC_2
  422. {
  423.    fCONFIG_PAGE_HEADER          Header;                 /* 00h */
  424.     U32                         CapabilitiesFlags;      /* 04h */
  425.     U8                          NumActiveVolumes;       /* 08h */
  426.     U8                          MaxVolumes;             /* 09h */
  427.     U16                         Reserved;               /* 0Ah */
  428.    fCONFIG_PAGE_IOC_2_RAID_VOL  RaidVolume[1];          /* 0Ch */
  429. } fCONFIG_PAGE_IOC_2, MPI_POINTER PTR_CONFIG_PAGE_IOC_2,
  430.   IOCPage2_t, MPI_POINTER pIOCPage2_t;
  432. #define MPI_IOCPAGE2_PAGEVERSION                        (0x00)
  434. /* IOC Page 2 Capabilities flags */
  436. #define MPI_IOCPAGE2_CAP_FLAGS_RAID_0_SUPPORT           (0x00000001)
  437. #define MPI_IOCPAGE2_CAP_FLAGS_RAID_1_SUPPORT           (0x00000002)
  438. #define MPI_IOCPAGE2_CAP_FLAGS_LSI_MIRROR_SUPPORT       (0x00000004)
  439. #define MPI_IOCPAGE2_CAP_FLAGS_RAID_5_SUPPORT           (0x00000008)
  440. #define MPI_IOCPAGE2_CAP_FLAGS_RAID_10_SUPPORT          (0x00000010)
  442. /* IOC Page 2 Volume RAID Type values */
  444. #define MPI_IOCPAGE2_VOL_TYPE_RAID_0                    (0x00)
  445. #define MPI_IOCPAGE2_VOL_TYPE_RAID_1                    (0x01)
  446. #define MPI_IOCPAGE2_VOL_TYPE_LSI_MIRROR                (0x02)
  447. #define MPI_IOCPAGE2_VOL_TYPE_RAID_5                    (0x05)
  448. #define MPI_IOCPAGE2_VOL_TYPE_RAID_10                   (0x0A)
  451. /****************************************************************************/
  452. /*  SCSI Port Config Pages                                                  */
  453. /****************************************************************************/
  455. typedef struct _CONFIG_PAGE_SCSI_PORT_0
  456. {
  457.    fCONFIG_PAGE_HEADER      Header;                     /* 00h */
  458.     U32                     Capabilities;               /* 04h */
  459.     U32                     PhysicalInterface;          /* 08h */
  460. } fCONFIG_PAGE_SCSI_PORT_0, MPI_POINTER PTR_CONFIG_PAGE_SCSI_PORT_0,
  461.   SCSIPortPage0_t, MPI_POINTER pSCSIPortPage0_t;
  463. #define MPI_SCSIPORTPAGE0_PAGEVERSION                   (0x01)
  465. #define MPI_SCSIPORTPAGE0_CAP_IU                        (0x00000001)
  466. #define MPI_SCSIPORTPAGE0_CAP_DT                        (0x00000002)
  467. #define MPI_SCSIPORTPAGE0_CAP_QAS                       (0x00000004)
  468. #define MPI_SCSIPORTPAGE0_CAP_PACING_TRANSFERS          (0x00000008)
  469. #define MPI_SCSIPORTPAGE0_CAP_MIN_SYNC_PERIOD_MASK      (0x0000FF00)
  470. #define MPI_SCSIPORTPAGE0_CAP_MAX_SYNC_OFFSET_MASK      (0x00FF0000)
  471. #define MPI_SCSIPORTPAGE0_CAP_WIDE                      (0x20000000)
  472. #define MPI_SCSIPORTPAGE0_CAP_AIP                       (0x80000000)
  474. #define MPI_SCSIPORTPAGE0_PHY_SIGNAL_TYPE_MASK          (0x00000003)
  475. #define MPI_SCSIPORTPAGE0_PHY_SIGNAL_HVD                (0x01)
  476. #define MPI_SCSIPORTPAGE0_PHY_SIGNAL_SE                 (0x02)
  477. #define MPI_SCSIPORTPAGE0_PHY_SIGNAL_LVD                (0x03)
  480. typedef struct _CONFIG_PAGE_SCSI_PORT_1
  481. {
  482.    fCONFIG_PAGE_HEADER      Header;                     /* 00h */
  483.     U32                     Configuration;              /* 04h */
  484. } fCONFIG_PAGE_SCSI_PORT_1, MPI_POINTER PTR_CONFIG_PAGE_SCSI_PORT_1,
  485.   SCSIPortPage1_t, MPI_POINTER pSCSIPortPage1_t;
  487. #define MPI_SCSIPORTPAGE1_PAGEVERSION                   (0x01)
  489. #define MPI_SCSIPORTPAGE1_CFG_PORT_SCSI_ID_MASK         (0x000000FF)
  490. #define MPI_SCSIPORTPAGE1_CFG_PORT_RESPONSE_ID_MASK     (0xFFFF0000)
  493. typedef struct _MPI_DEVICE_INFO
  494. {
  495.     U8      Timeout;                                    /* 00h */
  496.     U8      SyncFactor;                                 /* 01h */
  497.     U16     DeviceFlags;                                /* 02h */
  498. } MPI_DEVICE_INFO, MPI_POINTER PTR_MPI_DEVICE_INFO,
  499.   MpiDeviceInfo_t, MPI_POINTER pMpiDeviceInfo_t;
  501. typedef struct _CONFIG_PAGE_SCSI_PORT_2
  502. {
  503.    fCONFIG_PAGE_HEADER  Header;                         /* 00h */
  504.     U32                 PortFlags;                      /* 04h */
  505.     U32                 PortSettings;                   /* 08h */
  506.     MPI_DEVICE_INFO     DeviceSettings[16];             /* 0Ch */
  507. } fCONFIG_PAGE_SCSI_PORT_2, MPI_POINTER PTR_CONFIG_PAGE_SCSI_PORT_2,
  508.   SCSIPortPage2_t, MPI_POINTER pSCSIPortPage2_t;
  510. #define MPI_SCSIPORTPAGE2_PAGEVERSION                       (0x01)
  512. #define MPI_SCSIPORTPAGE2_PORT_FLAGS_SCAN_HIGH_TO_LOW       (0x00000001)
  513. #define MPI_SCSIPORTPAGE2_PORT_FLAGS_PARITY_ENABLE          (0x00000002)
  514. #define MPI_SCSIPORTPAGE2_PORT_FLAGS_AVOID_SCSI_RESET       (0x00000004)
  515. #define MPI_SCSIPORTPAGE2_PORT_FLAGS_ALTERNATE_CHS          (0x00000008)
  516. #define MPI_SCSIPORTPAGE2_PORT_FLAGS_TERMINATION_DISABLE    (0x00000010)
  518. #define MPI_SCSIPORTPAGE2_PORT_HOST_ID_MASK                 (0x0000000F)
  519. #define MPI_SCSIPORTPAGE2_PORT_MASK_INIT_HBA                (0x00000030)
  520. #define MPI_SCSIPORTPAGE2_PORT_DISABLE_INIT_HBA             (0x00000000)
  521. #define MPI_SCSIPORTPAGE2_PORT_BIOS_INIT_HBA                (0x00000010)
  522. #define MPI_SCSIPORTPAGE2_PORT_OS_INIT_HBA                  (0x00000020)
  523. #define MPI_SCSIPORTPAGE2_PORT_BIOS_OS_INIT_HBA             (0x00000030)
  524. #define MPI_SCSIPORTPAGE2_PORT_REMOVABLE_MEDIA              (0x000000C0)
  525. #define MPI_SCSIPORTPAGE2_PORT_SPINUP_DELAY_MASK            (0x00000F00)
  526. #define MPI_SCSIPORTPAGE2_PORT_MASK_NEGO_MASTER_SETTINGS    (0x00003000)
  527. #define MPI_SCSIPORTPAGE2_PORT_NEGO_MASTER_SETTINGS         (0x00000000)
  528. #define MPI_SCSIPORTPAGE2_PORT_NONE_MASTER_SETTINGS         (0x00001000)
  529. #define MPI_SCSIPORTPAGE2_PORT_ALL_MASTER_SETTINGS          (0x00003000)
  531. #define MPI_SCSIPORTPAGE2_DEVICE_DISCONNECT_ENABLE          (0x0001)
  532. #define MPI_SCSIPORTPAGE2_DEVICE_ID_SCAN_ENABLE             (0x0002)
  533. #define MPI_SCSIPORTPAGE2_DEVICE_LUN_SCAN_ENABLE            (0x0004)
  534. #define MPI_SCSIPORTPAGE2_DEVICE_TAG_QUEUE_ENABLE           (0x0008)
  535. #define MPI_SCSIPORTPAGE2_DEVICE_WIDE_DISABLE               (0x0010)
  536. #define MPI_SCSIPORTPAGE2_DEVICE_BOOT_CHOICE                (0x0020)
  539. /****************************************************************************/
  540. /*  SCSI Target Device Config Pages                                         */
  541. /****************************************************************************/
  543. typedef struct _CONFIG_PAGE_SCSI_DEVICE_0
  544. {
  545.    fCONFIG_PAGE_HEADER      Header;                     /* 00h */
  546.     U32                     NegotiatedParameters;       /* 04h */
  547.     U32                     Information;                /* 08h */
  548. } fCONFIG_PAGE_SCSI_DEVICE_0, MPI_POINTER PTR_CONFIG_PAGE_SCSI_DEVICE_0,
  549.   SCSIDevicePage0_t, MPI_POINTER pSCSIDevicePage0_t;
  551. #define MPI_SCSIDEVPAGE0_PAGEVERSION                    (0x01)
  553. #define MPI_SCSIDEVPAGE0_NP_IU                          (0x00000001)
  554. #define MPI_SCSIDEVPAGE0_NP_DT                          (0x00000002)
  555. #define MPI_SCSIDEVPAGE0_NP_QAS                         (0x00000004)
  556. #define MPI_SCSIDEVPAGE0_NP_PACING_TRANSFERS            (0x00000008)
  557. #define MPI_SCSIDEVPAGE0_NP_NEG_SYNC_PERIOD_MASK        (0x0000FF00)
  558. #define MPI_SCSIDEVPAGE0_NP_NEG_SYNC_OFFSET_MASK        (0x00FF0000)
  559. #define MPI_SCSIDEVPAGE0_NP_WIDE                        (0x20000000)
  560. #define MPI_SCSIDEVPAGE0_NP_AIP                         (0x80000000)
  562. #define MPI_SCSIDEVPAGE0_INFO_PARAMS_NEGOTIATED         (0x00000001)
  565. typedef struct _CONFIG_PAGE_SCSI_DEVICE_1
  566. {
  567.    fCONFIG_PAGE_HEADER      Header;                     /* 00h */
  568.     U32                     RequestedParameters;        /* 04h */
  569.     U32                     Reserved;                   /* 08h */
  570.     U32                     Configuration;              /* 0Ch */
  571. } fCONFIG_PAGE_SCSI_DEVICE_1, MPI_POINTER PTR_CONFIG_PAGE_SCSI_DEVICE_1,
  572.   SCSIDevicePage1_t, MPI_POINTER pSCSIDevicePage1_t;
  574. #define MPI_SCSIDEVPAGE1_PAGEVERSION                    (0x02)
  576. #define MPI_SCSIDEVPAGE1_RP_IU                          (0x00000001)
  577. #define MPI_SCSIDEVPAGE1_RP_DT                          (0x00000002)
  578. #define MPI_SCSIDEVPAGE1_RP_QAS                         (0x00000004)
  579. #define MPI_SCSIDEVPAGE1_RP_PACING_TRANSFERS            (0x00000008)
  580. #define MPI_SCSIDEVPAGE1_RP_MIN_SYNC_PERIOD_MASK        (0x0000FF00)
  581. #define MPI_SCSIDEVPAGE1_RP_MAX_SYNC_OFFSET_MASK        (0x00FF0000)
  582. #define MPI_SCSIDEVPAGE1_RP_WIDE                        (0x20000000)
  583. #define MPI_SCSIDEVPAGE1_RP_AIP                         (0x80000000)
  585. #define MPI_SCSIDEVPAGE1_DV_LVD_DRIVE_STRENGTH_MASK     (0x00000003)
  586. #define MPI_SCSIDEVPAGE1_DV_SE_SLEW_RATE_MASK           (0x00000300)
  588. #define MPI_SCSIDEVPAGE1_CONF_PPR_ALLOWED               (0x00000001)
  591. typedef struct _CONFIG_PAGE_SCSI_DEVICE_2
  592. {
  593.    fCONFIG_PAGE_HEADER      Header;                     /* 00h */
  594.     U32                     DomainValidation;           /* 04h */
  595.     U32                     ParityPipeSelect;           /* 08h */
  596.     U32                     DataPipeSelect;             /* 0Ch */
  597. } fCONFIG_PAGE_SCSI_DEVICE_2, MPI_POINTER PTR_CONFIG_PAGE_SCSI_DEVICE_2,
  598.   SCSIDevicePage2_t, MPI_POINTER pSCSIDevicePage2_t;
  600. #define MPI_SCSIDEVPAGE2_PAGEVERSION                    (0x00)
  602. #define MPI_SCSIDEVPAGE2_DV_ISI_ENABLE                  (0x00000010)
  603. #define MPI_SCSIDEVPAGE2_DV_SECONDARY_DRIVER_ENABLE     (0x00000020)
  604. #define MPI_SCSIDEVPAGE2_DV_SLEW_RATE_CTRL              (0x00000380)
  605. #define MPI_SCSIDEVPAGE2_DV_PRIM_DRIVE_STR_CTRL         (0x00001C00)
  606. #define MPI_SCSIDEVPAGE2_DV_SECOND_DRIVE_STR_CTRL       (0x0000E000)
  607. #define MPI_SCSIDEVPAGE2_DV_XCLKH_ST                    (0x10000000)
  608. #define MPI_SCSIDEVPAGE2_DV_XCLKS_ST                    (0x20000000)
  609. #define MPI_SCSIDEVPAGE2_DV_XCLKH_DT                    (0x40000000)
  610. #define MPI_SCSIDEVPAGE2_DV_XCLKS_DT                    (0x80000000)
  612. #define MPI_SCSIDEVPAGE2_PPS_PPS_MASK                   (0x00000003)
  614. #define MPI_SCSIDEVPAGE2_DPS_BIT_0_PL_SELECT_MASK       (0x00000003)
  615. #define MPI_SCSIDEVPAGE2_DPS_BIT_1_PL_SELECT_MASK       (0x0000000C)
  616. #define MPI_SCSIDEVPAGE2_DPS_BIT_2_PL_SELECT_MASK       (0x00000030)
  617. #define MPI_SCSIDEVPAGE2_DPS_BIT_3_PL_SELECT_MASK       (0x000000C0)
  618. #define MPI_SCSIDEVPAGE2_DPS_BIT_4_PL_SELECT_MASK       (0x00000300)
  619. #define MPI_SCSIDEVPAGE2_DPS_BIT_5_PL_SELECT_MASK       (0x00000C00)
  620. #define MPI_SCSIDEVPAGE2_DPS_BIT_6_PL_SELECT_MASK       (0x00003000)
  621. #define MPI_SCSIDEVPAGE2_DPS_BIT_7_PL_SELECT_MASK       (0x0000C000)
  622. #define MPI_SCSIDEVPAGE2_DPS_BIT_8_PL_SELECT_MASK       (0x00030000)
  623. #define MPI_SCSIDEVPAGE2_DPS_BIT_9_PL_SELECT_MASK       (0x000C0000)
  624. #define MPI_SCSIDEVPAGE2_DPS_BIT_10_PL_SELECT_MASK      (0x00300000)
  625. #define MPI_SCSIDEVPAGE2_DPS_BIT_11_PL_SELECT_MASK      (0x00C00000)
  626. #define MPI_SCSIDEVPAGE2_DPS_BIT_12_PL_SELECT_MASK      (0x03000000)
  627. #define MPI_SCSIDEVPAGE2_DPS_BIT_13_PL_SELECT_MASK      (0x0C000000)
  628. #define MPI_SCSIDEVPAGE2_DPS_BIT_14_PL_SELECT_MASK      (0x30000000)
  629. #define MPI_SCSIDEVPAGE2_DPS_BIT_15_PL_SELECT_MASK      (0xC0000000)
  632. /****************************************************************************/
  633. /*  FC Port Config Pages                                                    */
  634. /****************************************************************************/
  636. typedef struct _CONFIG_PAGE_FC_PORT_0
  637. {
  638.    fCONFIG_PAGE_HEADER      Header;                     /* 00h */
  639.     U32                     Flags;                      /* 04h */
  640.     U8                      MPIPortNumber;              /* 08h */
  641.     U8                      LinkType;                   /* 09h */
  642.     U8                      PortState;                  /* 0Ah */
  643.     U8                      Reserved;                   /* 0Bh */
  644.     U32                     PortIdentifier;             /* 0Ch */
  645.     U64                     WWNN;                       /* 10h */
  646.     U64                     WWPN;                       /* 18h */
  647.     U32                     SupportedServiceClass;      /* 20h */
  648.     U32                     SupportedSpeeds;            /* 24h */
  649.     U32                     CurrentSpeed;               /* 28h */
  650.     U32                     MaxFrameSize;               /* 2Ch */
  651.     U64                     FabricWWNN;                 /* 30h */
  652.     U64                     FabricWWPN;                 /* 38h */
  653.     U32                     DiscoveredPortsCount;       /* 40h */
  654.     U32                     MaxInitiators;              /* 44h */
  655. } fCONFIG_PAGE_FC_PORT_0, MPI_POINTER PTR_CONFIG_PAGE_FC_PORT_0,
  656.   FCPortPage0_t, MPI_POINTER pFCPortPage0_t;
  658. #define MPI_FCPORTPAGE0_PAGEVERSION                     (0x01)
  660. #define MPI_FCPORTPAGE0_FLAGS_PROT_MASK                 (0x0000000F)
  661. #define MPI_FCPORTPAGE0_FLAGS_PROT_FCP_INIT             (MPI_PORTFACTS_PROTOCOL_INITIATOR)
  662. #define MPI_FCPORTPAGE0_FLAGS_PROT_FCP_TARG             (MPI_PORTFACTS_PROTOCOL_TARGET)
  663. #define MPI_FCPORTPAGE0_FLAGS_PROT_LAN                  (MPI_PORTFACTS_PROTOCOL_LAN)
  664. #define MPI_FCPORTPAGE0_FLAGS_PROT_LOGBUSADDR           (MPI_PORTFACTS_PROTOCOL_LOGBUSADDR)
  666. #define MPI_FCPORTPAGE0_FLAGS_ALIAS_ALPA_SUPPORTED      (0x00000010)
  667. #define MPI_FCPORTPAGE0_FLAGS_ALIAS_WWN_SUPPORTED       (0x00000020)
  668. #define MPI_FCPORTPAGE0_FLAGS_FABRIC_WWN_VALID          (0x00000030)
  670. #define MPI_FCPORTPAGE0_FLAGS_ATTACH_TYPE_MASK          (0x00000F00)
  671. #define MPI_FCPORTPAGE0_FLAGS_ATTACH_NO_INIT            (0x00000000)
  672. #define MPI_FCPORTPAGE0_FLAGS_ATTACH_POINT_TO_POINT     (0x00000100)
  673. #define MPI_FCPORTPAGE0_FLAGS_ATTACH_PRIVATE_LOOP       (0x00000200)
  674. #define MPI_FCPORTPAGE0_FLAGS_ATTACH_FABRIC_DIRECT      (0x00000400)
  675. #define MPI_FCPORTPAGE0_FLAGS_ATTACH_PUBLIC_LOOP        (0x00000800)
  677. #define MPI_FCPORTPAGE0_LTYPE_RESERVED                  (0x00)
  678. #define MPI_FCPORTPAGE0_LTYPE_OTHER                     (0x01)
  679. #define MPI_FCPORTPAGE0_LTYPE_UNKNOWN                   (0x02)
  680. #define MPI_FCPORTPAGE0_LTYPE_COPPER                    (0x03)
  681. #define MPI_FCPORTPAGE0_LTYPE_SINGLE_1300               (0x04)
  682. #define MPI_FCPORTPAGE0_LTYPE_SINGLE_1500               (0x05)
  683. #define MPI_FCPORTPAGE0_LTYPE_50_LASER_MULTI            (0x06)
  684. #define MPI_FCPORTPAGE0_LTYPE_50_LED_MULTI              (0x07)
  685. #define MPI_FCPORTPAGE0_LTYPE_62_LASER_MULTI            (0x08)
  686. #define MPI_FCPORTPAGE0_LTYPE_62_LED_MULTI              (0x09)
  687. #define MPI_FCPORTPAGE0_LTYPE_MULTI_LONG_WAVE           (0x0A)
  688. #define MPI_FCPORTPAGE0_LTYPE_MULTI_SHORT_WAVE          (0x0B)
  689. #define MPI_FCPORTPAGE0_LTYPE_LASER_SHORT_WAVE          (0x0C)
  690. #define MPI_FCPORTPAGE0_LTYPE_LED_SHORT_WAVE            (0x0D)
  691. #define MPI_FCPORTPAGE0_LTYPE_1300_LONG_WAVE            (0x0E)
  692. #define MPI_FCPORTPAGE0_LTYPE_1500_LONG_WAVE            (0x0F)
  694. #define MPI_FCPORTPAGE0_PORTSTATE_UNKNOWN               (0x01)      /*(SNIA)HBA_PORTSTATE_UNKNOWN       1 Unknown */
  695. #define MPI_FCPORTPAGE0_PORTSTATE_ONLINE                (0x02)      /*(SNIA)HBA_PORTSTATE_ONLINE        2 Operational */
  696. #define MPI_FCPORTPAGE0_PORTSTATE_OFFLINE               (0x03)      /*(SNIA)HBA_PORTSTATE_OFFLINE       3 User Offline */
  697. #define MPI_FCPORTPAGE0_PORTSTATE_BYPASSED              (0x04)      /*(SNIA)HBA_PORTSTATE_BYPASSED      4 Bypassed */
  698. #define MPI_FCPORTPAGE0_PORTSTATE_DIAGNOST              (0x05)      /*(SNIA)HBA_PORTSTATE_DIAGNOSTICS   5 In diagnostics mode */
  699. #define MPI_FCPORTPAGE0_PORTSTATE_LINKDOWN              (0x06)      /*(SNIA)HBA_PORTSTATE_LINKDOWN      6 Link Down */
  700. #define MPI_FCPORTPAGE0_PORTSTATE_ERROR                 (0x07)      /*(SNIA)HBA_PORTSTATE_ERROR         7 Port Error */
  701. #define MPI_FCPORTPAGE0_PORTSTATE_LOOPBACK              (0x08)      /*(SNIA)HBA_PORTSTATE_LOOPBACK      8 Loopback */
  703. #define MPI_FCPORTPAGE0_SUPPORT_CLASS_1                 (0x00000001)
  704. #define MPI_FCPORTPAGE0_SUPPORT_CLASS_2                 (0x00000002)
  705. #define MPI_FCPORTPAGE0_SUPPORT_CLASS_3                 (0x00000004)
  707. #define MPI_FCPORTPAGE0_SUPPORT_1GBIT_SPEED             (0x00000001) /* (SNIA)HBA_PORTSPEED_1GBIT 1  1 GBit/sec  */
  708. #define MPI_FCPORTPAGE0_SUPPORT_2GBIT_SPEED             (0x00000002) /* (SNIA)HBA_PORTSPEED_2GBIT 2  2 GBit/sec  */
  709. #define MPI_FCPORTPAGE0_SUPPORT_10GBIT_SPEED            (0x00000004) /* (SNIA)HBA_PORTSPEED_10GBIT 4 10 GBit/sec */
  711. #define MPI_FCPORTPAGE0_CURRENT_SPEED_1GBIT             MPI_FCPORTPAGE0_SUPPORT_1GBIT_SPEED
  712. #define MPI_FCPORTPAGE0_CURRENT_SPEED_2GBIT             MPI_FCPORTPAGE0_SUPPORT_2GBIT_SPEED
  713. #define MPI_FCPORTPAGE0_CURRENT_SPEED_10GBIT            MPI_FCPORTPAGE0_SUPPORT_10GBIT_SPEED
  716. typedef struct _CONFIG_PAGE_FC_PORT_1
  717. {
  718.    fCONFIG_PAGE_HEADER      Header;                     /* 00h */
  719.     U32                     Flags;                      /* 04h */
  720.     U64                     NoSEEPROMWWNN;              /* 08h */
  721.     U64                     NoSEEPROMWWPN;              /* 10h */
  722.     U8                      HardALPA;                   /* 18h */
  723.     U8                      LinkConfig;                 /* 19h */
  724.     U8                      TopologyConfig;             /* 1Ah */
  725.     U8                      Reserved;                   /* 1Bh */
  726. } fCONFIG_PAGE_FC_PORT_1, MPI_POINTER PTR_CONFIG_PAGE_FC_PORT_1,
  727.   FCPortPage1_t, MPI_POINTER pFCPortPage1_t;
  729. #define MPI_FCPORTPAGE1_PAGEVERSION                     (0x01)
  731. #define MPI_FCPORTPAGE1_FLAGS_SORT_BY_DID               (0x00000001)
  732. #define MPI_FCPORTPAGE1_FLAGS_SORT_BY_WWN               (0x00000000)
  734. #define MPI_FCPORTPAGE1_FLAGS_PROT_MASK                 (0xF0000000)
  735. #define MPI_FCPORTPAGE1_FLAGS_PROT_SHIFT                (28)
  736. #define MPI_FCPORTPAGE1_FLAGS_PROT_FCP_INIT             ((U32)MPI_PORTFACTS_PROTOCOL_INITIATOR << MPI_FCPORTPAGE1_FLAGS_PROT_SHIFT)
  737. #define MPI_FCPORTPAGE1_FLAGS_PROT_FCP_TARG             ((U32)MPI_PORTFACTS_PROTOCOL_TARGET << MPI_FCPORTPAGE1_FLAGS_PROT_SHIFT)
  738. #define MPI_FCPORTPAGE1_FLAGS_PROT_LAN                  ((U32)MPI_PORTFACTS_PROTOCOL_LAN << MPI_FCPORTPAGE1_FLAGS_PROT_SHIFT)
  739. #define MPI_FCPORTPAGE1_FLAGS_PROT_LOGBUSADDR           ((U32)MPI_PORTFACTS_PROTOCOL_LOGBUSADDR << MPI_FCPORTPAGE1_FLAGS_PROT_SHIFT)
  741. #define MPI_FCPORTPAGE1_HARD_ALPA_NOT_USED              (0xFF)
  743. #define MPI_FCPORTPAGE1_LCONFIG_SPEED_MASK              (0x0F)
  744. #define MPI_FCPORTPAGE1_LCONFIG_SPEED_1GIG              (0x00)
  745. #define MPI_FCPORTPAGE1_LCONFIG_SPEED_2GIG              (0x01)
  746. #define MPI_FCPORTPAGE1_LCONFIG_SPEED_4GIG              (0x02)
  747. #define MPI_FCPORTPAGE1_LCONFIG_SPEED_10GIG             (0x03)
  748. #define MPI_FCPORTPAGE1_LCONFIG_SPEED_AUTO              (0x0F)
  750. #define MPI_FCPORTPAGE1_TOPOLGY_MASK                    (0x0F)
  751. #define MPI_FCPORTPAGE1_TOPOLGY_NLPORT                  (0x01)
  752. #define MPI_FCPORTPAGE1_TOPOLGY_NPORT                   (0x02)
  753. #define MPI_FCPORTPAGE1_TOPOLGY_AUTO                    (0x0F)
  756. typedef struct _CONFIG_PAGE_FC_PORT_2
  757. {
  758.    fCONFIG_PAGE_HEADER      Header;                     /* 00h */
  759.     U8                      NumberActive;               /* 04h */
  760.     U8                      ALPA[126];                  /* 05h */
  761.     U8                      Reserved;                   /* 83h */
  762. } fCONFIG_PAGE_FC_PORT_2, MPI_POINTER PTR_CONFIG_PAGE_FC_PORT_2,
  763.   FCPortPage2_t, MPI_POINTER pFCPortPage2_t;
  765. #define MPI_FCPORTPAGE2_PAGEVERSION                     (0x00)
  768. typedef struct _WWN_FORMAT
  769. {
  770.     U64                     WWNN;                       /* 00h */
  771.     U64                     WWPN;                       /* 08h */
  772. } WWN_FORMAT, MPI_POINTER PTR_WWN_FORMAT,
  773.   WWNFormat, MPI_POINTER pWWNFormat;
  775. typedef union _FC_PORT_PERSISTENT_PHYSICAL_ID
  776. {
  777.     WWN_FORMAT              WWN;
  778.     U32                     Did;
  779. } FC_PORT_PERSISTENT_PHYSICAL_ID, MPI_POINTER PTR_FC_PORT_PERSISTENT_PHYSICAL_ID,
  780.   PersistentPhysicalId_t, MPI_POINTER pPersistentPhysicalId_t;
  782. typedef struct _FC_PORT_PERSISTENT
  783. {
  784.     FC_PORT_PERSISTENT_PHYSICAL_ID  PhysicalIdentifier; /* 00h */
  785.     U8                              TargetID;           /* 10h */
  786.     U8                              Bus;                /* 11h */
  787.     U16                             Flags;              /* 12h */
  788. } FC_PORT_PERSISTENT, MPI_POINTER PTR_FC_PORT_PERSISTENT,
  789.   PersistentData_t, MPI_POINTER pPersistentData_t;
  791. #define MPI_PERSISTENT_FLAGS_SHIFT                      (16)
  792. #define MPI_PERSISTENT_FLAGS_ENTRY_VALID                (0x0001)
  793. #define MPI_PERSISTENT_FLAGS_SCAN_ID                    (0x0002)
  794. #define MPI_PERSISTENT_FLAGS_SCAN_LUNS                  (0x0004)
  795. #define MPI_PERSISTENT_FLAGS_BOOT_DEVICE                (0x0008)
  796. #define MPI_PERSISTENT_FLAGS_BY_DID                     (0x0080)
  798. typedef struct _CONFIG_PAGE_FC_PORT_3
  799. {
  800.    fCONFIG_PAGE_HEADER      Header;                     /* 00h */
  801.     FC_PORT_PERSISTENT      Entry[1];                   /* 04h */
  802. } fCONFIG_PAGE_FC_PORT_3, MPI_POINTER PTR_CONFIG_PAGE_FC_PORT_3,
  803.   FCPortPage3_t, MPI_POINTER pFCPortPage3_t;
  805. #define MPI_FCPORTPAGE3_PAGEVERSION                     (0x01)
  808. typedef struct _CONFIG_PAGE_FC_PORT_4
  809. {
  810.    fCONFIG_PAGE_HEADER      Header;                     /* 00h */
  811.     U32                     PortFlags;                  /* 04h */
  812.     U32                     PortSettings;               /* 08h */
  813. } fCONFIG_PAGE_FC_PORT_4, MPI_POINTER PTR_CONFIG_PAGE_FC_PORT_4,
  814.   FCPortPage4_t, MPI_POINTER pFCPortPage4_t;
  816. #define MPI_FCPORTPAGE4_PAGEVERSION                     (0x00)
  818. #define MPI_FCPORTPAGE4_PORT_FLAGS_ALTERNATE_CHS        (0x00000008)
  820. #define MPI_FCPORTPAGE4_PORT_MASK_INIT_HBA              (0x00000030)
  821. #define MPI_FCPORTPAGE4_PORT_DISABLE_INIT_HBA           (0x00000000)
  822. #define MPI_FCPORTPAGE4_PORT_BIOS_INIT_HBA              (0x00000010)
  823. #define MPI_FCPORTPAGE4_PORT_OS_INIT_HBA                (0x00000020)
  824. #define MPI_FCPORTPAGE4_PORT_BIOS_OS_INIT_HBA           (0x00000030)
  825. #define MPI_FCPORTPAGE4_PORT_REMOVABLE_MEDIA            (0x000000C0)
  826. #define MPI_FCPORTPAGE4_PORT_SPINUP_DELAY_MASK          (0x00000F00)
  829. typedef struct _CONFIG_PAGE_FC_PORT_5_ALIAS_INFO
  830. {
  831.     U8      Flags;                                      /* 00h */
  832.     U8      AliasAlpa;                                  /* 01h */
  833.     U16     Reserved;                                   /* 02h */
  834.     U64     AliasWWNN;                                  /* 04h */
  835.     U64     AliasWWPN;                                  /* 0Ch */
  836. } fCONFIG_PAGE_FC_PORT_5_ALIAS_INFO, MPI_POINTER PTR_CONFIG_PAGE_FC_PORT_5_ALIAS_INFO,
  837.   FcPortPage5AliasInfo_t, MPI_POINTER pFcPortPage5AliasInfo_t;
  839. typedef struct _CONFIG_PAGE_FC_PORT_5
  840. {
  841.    fCONFIG_PAGE_HEADER                  Header;         /* 00h */
  842.    fCONFIG_PAGE_FC_PORT_5_ALIAS_INFO    AliasInfo[1];   /* 04h */
  843. } fCONFIG_PAGE_FC_PORT_5, MPI_POINTER PTR_CONFIG_PAGE_FC_PORT_5,
  844.   FCPortPage5_t, MPI_POINTER pFCPortPage5_t;
  846. #define MPI_FCPORTPAGE5_PAGEVERSION                     (0x00)
  848. #define MPI_FCPORTPAGE5_FLAGS_ALIAS_ALPA_VALID          (0x01)
  849. #define MPI_FCPORTPAGE5_FLAGS_ALIAS_WWN_VALID           (0x02)
  852. typedef struct _CONFIG_PAGE_FC_PORT_6
  853. {
  854.    fCONFIG_PAGE_HEADER      Header;                     /* 00h */
  855.     U32                     Reserved;                   /* 04h */
  856.     U64                     TimeSinceReset;             /* 08h */
  857.     U64                     TxFrames;                   /* 10h */
  858.     U64                     RxFrames;                   /* 18h */
  859.     U64                     TxWords;                    /* 20h */
  860.     U64                     RxWords;                    /* 28h */
  861.     U64                     LipCount;                   /* 30h */
  862.     U64                     NosCount;                   /* 38h */
  863.     U64                     ErrorFrames;                /* 40h */
  864.     U64                     DumpedFrames;               /* 48h */
  865.     U64                     LinkFailureCount;           /* 50h */
  866.     U64                     LossOfSyncCount;            /* 58h */
  867.     U64                     LossOfSignalCount;          /* 60h */
  868.     U64                     PrimativeSeqErrCount;       /* 68h */
  869.     U64                     InvalidTxWordCount;         /* 70h */
  870.     U64                     InvalidCrcCount;            /* 78h */
  871.     U64                     FcpInitiatorIoCount;        /* 80h */
  872. } fCONFIG_PAGE_FC_PORT_6, MPI_POINTER PTR_CONFIG_PAGE_FC_PORT_6,
  873.   FCPortPage6_t, MPI_POINTER pFCPortPage6_t;
  875. #define MPI_FCPORTPAGE6_PAGEVERSION                     (0x00)
  878. typedef struct _CONFIG_PAGE_FC_PORT_7
  879. {
  880.    fCONFIG_PAGE_HEADER      Header;                     /* 00h */
  881.     U32                     Reserved;                   /* 04h */
  882.     U8                      PortSymbolicName[256];      /* 08h */
  883. } fCONFIG_PAGE_FC_PORT_7, MPI_POINTER PTR_CONFIG_PAGE_FC_PORT_7,
  884.   FCPortPage7_t, MPI_POINTER pFCPortPage7_t;
  886. #define MPI_FCPORTPAGE7_PAGEVERSION                     (0x00)
  889. typedef struct _CONFIG_PAGE_FC_PORT_8
  890. {
  891.    fCONFIG_PAGE_HEADER      Header;                     /* 00h */
  892.     U32                     BitVector[8];               /* 04h */
  893. } fCONFIG_PAGE_FC_PORT_8, MPI_POINTER PTR_CONFIG_PAGE_FC_PORT_8,
  894.   FCPortPage8_t, MPI_POINTER pFCPortPage8_t;
  896. #define MPI_FCPORTPAGE8_PAGEVERSION                     (0x00)
  899. typedef struct _CONFIG_PAGE_FC_PORT_9
  900. {
  901.    fCONFIG_PAGE_HEADER      Header;                     /* 00h */
  902.     U32                     Reserved;                   /* 04h */
  903.     U64                     GlobalWWPN;                 /* 08h */
  904.     U64                     GlobalWWNN;                 /* 10h */
  905.     U32                     UnitType;                   /* 18h */
  906.     U32                     PhysicalPortNumber;         /* 1Ch */
  907.     U32                     NumAttachedNodes;           /* 20h */
  908.     U16                     IPVersion;                  /* 24h */
  909.     U16                     UDPPortNumber;              /* 26h */
  910.     U8                      IPAddress[16];              /* 28h */
  911.     U16                     Reserved1;                  /* 38h */
  912.     U16                     TopologyDiscoveryFlags;     /* 3Ah */
  913. } fCONFIG_PAGE_FC_PORT_9, MPI_POINTER PTR_CONFIG_PAGE_FC_PORT_9,
  914.   FCPortPage9_t, MPI_POINTER pFCPortPage9_t;
  916. #define MPI_FCPORTPAGE9_PAGEVERSION                     (0x00)
  919. /****************************************************************************/
  920. /*  FC Device Config Pages                                                  */
  921. /****************************************************************************/
  923. typedef struct _CONFIG_PAGE_FC_DEVICE_0
  924. {
  925.    fCONFIG_PAGE_HEADER      Header;                     /* 00h */
  926.     U64                     WWNN;                       /* 04h */
  927.     U64                     WWPN;                       /* 0Ch */
  928.     U32                     PortIdentifier;             /* 14h */
  929.     U8                      Protocol;                   /* 18h */
  930.     U8                      Flags;                      /* 19h */
  931.     U16                     BBCredit;                   /* 1Ah */
  932.     U16                     MaxRxFrameSize;             /* 1Ch */
  933.     U8                      Reserved1;                  /* 1Eh */
  934.     U8                      PortNumber;                 /* 1Fh */
  935.     U8                      FcPhLowestVersion;          /* 20h */
  936.     U8                      FcPhHighestVersion;         /* 21h */
  937.     U8                      CurrentTargetID;            /* 22h */
  938.     U8                      CurrentBus;                 /* 23h */
  939. } fCONFIG_PAGE_FC_DEVICE_0, MPI_POINTER PTR_CONFIG_PAGE_FC_DEVICE_0,
  940.   FCDevicePage0_t, MPI_POINTER pFCDevicePage0_t;
  942. #define MPI_FC_DEVICE_PAGE0_PAGEVERSION                 (0x02)
  944. #define MPI_FC_DEVICE_PAGE0_FLAGS_TARGETID_BUS_VALID    (0x01)
  946. #define MPI_FC_DEVICE_PAGE0_PROT_IP                     (0x01)
  947. #define MPI_FC_DEVICE_PAGE0_PROT_FCP_TARGET             (0x02)
  948. #define MPI_FC_DEVICE_PAGE0_PROT_FCP_INITIATOR          (0x04)
  950. #define MPI_FC_DEVICE_PAGE0_PGAD_PORT_MASK              (MPI_FC_DEVICE_PGAD_PORT_MASK)
  951. #define MPI_FC_DEVICE_PAGE0_PGAD_FORM_MASK              (MPI_FC_DEVICE_PGAD_FORM_MASK)
  952. #define MPI_FC_DEVICE_PAGE0_PGAD_FORM_NEXT_DID          (MPI_FC_DEVICE_PGAD_FORM_NEXT_DID)
  953. #define MPI_FC_DEVICE_PAGE0_PGAD_FORM_BUS_TID           (MPI_FC_DEVICE_PGAD_FORM_BUS_TID)
  954. #define MPI_FC_DEVICE_PAGE0_PGAD_DID_MASK               (MPI_FC_DEVICE_PGAD_ND_DID_MASK)
  955. #define MPI_FC_DEVICE_PAGE0_PGAD_BUS_MASK               (MPI_FC_DEVICE_PGAD_BT_BUS_MASK)
  956. #define MPI_FC_DEVICE_PAGE0_PGAD_BUS_SHIFT              (MPI_FC_DEVICE_PGAD_BT_BUS_SHIFT)
  957. #define MPI_FC_DEVICE_PAGE0_PGAD_TID_MASK               (MPI_FC_DEVICE_PGAD_BT_TID_MASK)
  960. /****************************************************************************/
  961. /*  RAID Volume Config Pages                                                  */
  962. /****************************************************************************/
  964. typedef struct _RAIDVOL2_IM_PHYS_ID
  965. {
  966.     U8                      TargetID;                   /* 00h */
  967.     U8                      Bus;                        /* 01h */
  968.     U8                      IocNumber;                  /* 02h */
  969.     U8                      PhysDiskNumber;             /* 03h */
  970.     U8                      Reserved[8];                /* 04h */
  971.     U8                      PhysicalDiskIdentifier[16]; /* 0Ch */
  972.     U8                      VendorId[8];                /* 1Ch */
  973.     U8                      ProductId[16];              /* 24h */
  974.     U8                      ProductRevLevel[4];         /* 34h */
  975.     U32                     Reserved1;                  /* 38h */
  976.     U8                      Info[32];                   /* 3Ch */
  977. } RAIDVOL2_IM_PHYS_ID, MPI_POINTER PTR_RAIDVOL2_IM_PHYS_ID,
  978.   RaidVol2ImPhysicalID_t, MPI_POINTER pRaidVol2ImPhysicalID_t;
  980. typedef struct _RAIDVOL2_IM_DISK_INFO
  981. {
  982.     U32                     DiskStatus;                 /* 00h */
  983.     U32                     DeviceSettings;             /* 04h */
  984.     U16                     ErrorCount;                 /* 08h */
  985.     U16                     Reserved;                   /* 0Ah */
  986.     U8                      ErrorCdbByte;               /* 0Ch */
  987.     U8                      ErrorSenseKey;              /* 0Dh */
  988.     U8                      ErrorASC;                   /* 0Eh */
  989.     U8                      ErrorASCQ;                  /* 0Fh */
  990.     U16                     SmartCount;                 /* 10h */
  991.     U8                      SmartASC;                   /* 12h */
  992.     U8                      SmartASCQ;                  /* 13h */
  993. } RAIDVOL2_IM_DISK_INFO, MPI_POINTER PTR_RAIDVOL2_IM_DISK_INFO,
  994.   RaidVol2ImDiskInfo_t, MPI_POINTER pRaidVol2ImDiskInfo_t;
  996. /* RAID Volume 2 IM Physical Disk DiskStatus flags */
  998. #define MPI_RVP2_PHYS_DISK_PRIMARY                      (0x00000001)
  999. #define MPI_RVP2_PHYS_DISK_SECONDARY                    (0x00000002)
  1000. #define MPI_RVP2_PHYS_DISK_HOT_SPARE                    (0x00000004)
  1001. #define MPI_RVP2_PHYS_DISK_OUT_OF_SYNC                  (0x00000008)
  1002. #define MPI_RVP2_PHYS_DISK_STATUS_MASK                  (0x00000F00)
  1003. #define MPI_RVP2_PHYS_DISK_STATUS_ONLINE                (0x00000000)
  1004. #define MPI_RVP2_PHYS_DISK_STATUS_MISSING               (0x00000100)
  1005. #define MPI_RVP2_PHYS_DISK_STATUS_NOT_COMPATIBLE        (0x00000200)
  1006. #define MPI_RVP2_PHYS_DISK_STATUS_FAILED                (0x00000300)
  1007. #define MPI_RVP2_PHYS_DISK_STATUS_INITIALIZING          (0x00000400)
  1008. #define MPI_RVP2_PHYS_DISK_STATUS_OFFLINE_REQUESTED     (0x00000500)
  1009. #define MPI_RVP2_PHYS_DISK_STATUS_OTHER_OFFLINE         (0x00000F00)
  1012. typedef struct _RAIDVOL2_IM_PHYSICAL_DISK
  1013. {
  1014.     RAIDVOL2_IM_PHYS_ID     Id;                         /* 00h */
  1015.     RAIDVOL2_IM_DISK_INFO   Info;                       /* 5Ch */
  1016. } RAIDVOL2_IM_PHYSICAL_DISK, MPI_POINTER PTR_RAIDVOL2_IM_PHYSICAL_DISK,
  1017.   RaidVol2ImPhysicalDisk_t, MPI_POINTER pRaidVol2ImPhysicalDisk_t;
  1019. #define MPI_RAIDVOLPAGE2_MAX_DISKS                      (3)
  1021. typedef struct _CONFIG_PAGE_RAID_VOL_2
  1022. {
  1023.    fCONFIG_PAGE_HEADER          Header;                 /* 00h */
  1024.     U32                         VolumeStatus;           /* 04h */
  1025.     U32                         VolumeSettings;         /* 08h */
  1026.     U32                         Reserved;               /* 0Ch */
  1027.     U64                         MaxLba;                 /* 10h */
  1028.     U32                         BlockSize;              /* 18h */
  1029.     U8                          Reserved1;              /* 1Ch */
  1030.     U8                          NumPhysicalDisks;       /* 1Dh */
  1031.     U16                         Reserved2;              /* 1Eh */
  1032.     RAIDVOL2_IM_PHYSICAL_DISK   IMPhysicalDisk[MPI_RAIDVOLPAGE2_MAX_DISKS];
  1033. } fCONFIG_PAGE_RAID_VOL_2, MPI_POINTER PTR_CONFIG_PAGE_RAID_VOL_2,
  1034.   RaidVolumePage2_t, MPI_POINTER pRaidVolumePage2_t;
  1036. #define MPI_RAIDVOLPAGE2_PAGEVERSION                    (0x00)
  1038. /* RAID Volume Page 2 VolumeStatus defines */
  1040. #define MPI_RAIDVOLPAGE2_STATUS_ENABLED                 (0x00000001)
  1041. #define MPI_RAIDVOLPAGE2_STATUS_QUIESCED                (0x00000002)
  1042. #define MPI_RAIDVOLPAGE2_STATUS_RESYNC_IN_PROGRESS      (0x00000004)
  1043. #define MPI_RAIDVOLPAGE2_STATUS_DEGRADED                (0x00000008)
  1045. /* RAID Volume Page 2 VolumeSettings defines */
  1047. #define MPI_RAIDVOLPAGE2_SETTING_WRITE_CACHING_ENABLE   (0x00000001)
  1048. #define MPI_RAIDVOLPAGE2_SETTING_OFFLINE_ON_SMART       (0x00000002)
  1049. #define MPI_RAIDVOLPAGE2_SETTING_AUTO_CONFIGURE         (0x00000004)
  1050. #define MPI_RAIDVOLPAGE2_SETTING_USE_DEFAULTS           (0x80000000)
  1053. /****************************************************************************/
  1054. /* LAN Config Pages                                                         */
  1055. /****************************************************************************/
  1057. typedef struct _CONFIG_PAGE_LAN_0
  1058. {
  1059.     ConfigPageHeader_t      Header;                     /* 00h */
  1060.     U16                     TxRxModes;                  /* 04h */
  1061.     U16                     Reserved;                   /* 06h */
  1062.     U32                     PacketPrePad;               /* 08h */
  1063. } fCONFIG_PAGE_LAN_0, MPI_POINTER PTR_CONFIG_PAGE_LAN_0,
  1064.   LANPage0_t, MPI_POINTER pLANPage0_t;
  1066. #define MPI_LAN_PAGE0_PAGEVERSION                       (0x01)
  1068. #define MPI_LAN_PAGE0_RETURN_LOOPBACK                   (0x0000)
  1069. #define MPI_LAN_PAGE0_SUPPRESS_LOOPBACK                 (0x0001)
  1070. #define MPI_LAN_PAGE0_LOOPBACK_MASK                     (0x0001)
  1072. typedef struct _CONFIG_PAGE_LAN_1
  1073. {
  1074.     ConfigPageHeader_t      Header;                     /* 00h */
  1075.     U16                     Reserved;                   /* 04h */
  1076.     U8                      CurrentDeviceState;         /* 06h */
  1077.     U8                      Reserved1;                  /* 07h */
  1078.     U32                     MinPacketSize;              /* 08h */
  1079.     U32                     MaxPacketSize;              /* 0Ch */
  1080.     U32                     HardwareAddressLow;         /* 10h */
  1081.     U32                     HardwareAddressHigh;        /* 14h */
  1082.     U32                     MaxWireSpeedLow;            /* 18h */
  1083.     U32                     MaxWireSpeedHigh;           /* 1Ch */
  1084.     U32                     BucketsRemaining;           /* 20h */
  1085.     U32                     MaxReplySize;               /* 24h */
  1086.     U32                     NegWireSpeedHigh;           /* 28h */
  1087.     U32                     NegWireSpeedLow;            /* 2Ch */
  1088. } fCONFIG_PAGE_LAN_1, MPI_POINTER PTR_CONFIG_PAGE_LAN_1,
  1089.   LANPage1_t, MPI_POINTER pLANPage1_t;
  1091. #define MPI_LAN_PAGE1_PAGEVERSION                       (0x03)
  1093. #define MPI_LAN_PAGE1_DEV_STATE_RESET                   (0x00)
  1094. #define MPI_LAN_PAGE1_DEV_STATE_OPERATIONAL             (0x01)
  1096. #endif