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h8.h
资源名称：SBC-2410X_kernel.tar.gz　[点击查看]
上传用户：lgb322
上传日期：2013-02-24
资源大小：30529k
文件大小：9k
源码类别：

嵌入式Linux

开发平台：

Unix_Linux

h8.h：源码内容
  1. /*
  2.  */
  4. #ifndef __H8_H__
  5. #define __H8_H__
  7. /*
  8.  * Register address and offsets
  9.  */
  10. #define H8_BASE_ADDR                   0x170            /* default */
  11. #define H8_IRQ        9                /* default */
  12. #define H8_STATUS_REG_OFF              0x4              
  13. #define H8_CMD_REG_OFF                 0x4
  14. #define H8_DATA_REG_OFF                0x0
  17. /* H8 register bit definitions */
  18. /* status register */
  19. #define H8_OFULL                       0x1              /* output data register full */
  20. #define H8_IFULL                       0x2              /* input data register full */
  21. #define H8_CMD                         0x8              /* command / not data */
  23. #define H8_INTR                        0xfa
  24. #define H8_NACK                        0xfc
  25. #define H8_BYTE_LEVEL_ACK              0xfd
  26. #define H8_CMD_ACK                     0xfe
  27. #define H8_SYNC_BYTE                   0x99
  29. /*
  30.  * H8 command definitions
  31.  */
  32. /* System info commands */
  33. #define H8_SYNC                         0x0
  34. #define H8_RD_SN                        0x1
  35. #define H8_RD_ENET_ADDR                 0x2
  36. #define H8_RD_HW_VER                    0x3
  37. #define H8_RD_MIC_VER                   0x4
  38. #define H8_RD_MAX_TEMP                  0x5
  39. #define H8_RD_MIN_TEMP                  0x6
  40. #define H8_RD_CURR_TEMP                 0x7
  41. #define H8_RD_SYS_VARIENT               0x8
  42. #define H8_RD_PWR_ON_CYCLES             0x9
  43. #define H8_RD_PWR_ON_SECS               0xa
  44. #define H8_RD_RESET_STATUS              0xb
  45. #define H8_RD_PWR_DN_STATUS             0xc
  46. #define H8_RD_EVENT_STATUS              0xd
  47. #define H8_RD_ROM_CKSM                  0xe
  48. #define H8_RD_EXT_STATUS                0xf
  49. #define H8_RD_USER_CFG                  0x10
  50. #define H8_RD_INT_BATT_VOLT             0x11
  51. #define H8_RD_DC_INPUT_VOLT             0x12
  52. #define H8_RD_HORIZ_PTR_VOLT            0x13
  53. #define H8_RD_VERT_PTR_VOLT             0x14
  54. #define H8_RD_EEPROM_STATUS             0x15
  55. #define H8_RD_ERR_STATUS                0x16
  56. #define H8_RD_NEW_BUSY_SPEED            0x17
  57. #define H8_RD_CONFIG_INTERFACE          0x18
  58. #define H8_RD_INT_BATT_STATUS           0x19
  59. #define H8_RD_EXT_BATT_STATUS           0x1a
  60. #define H8_RD_PWR_UP_STATUS             0x1b
  61. #define H8_RD_EVENT_STATUS_MASK         0x56
  63. /* Read/write/modify commands */
  64. #define H8_CTL_EMU_BITPORT              0x32
  65. #define H8_DEVICE_CONTROL               0x21
  66. #define H8_CTL_TFT_BRT_DC               0x22
  67. #define H8_CTL_WATCHDOG                 0x23
  68. #define H8_CTL_MIC_PROT                 0x24
  69. #define H8_CTL_INT_BATT_CHG             0x25
  70. #define H8_CTL_EXT_BATT_CHG             0x26
  71. #define H8_CTL_MARK_SPACE               0x27
  72. #define H8_CTL_MOUSE_SENSITIVITY        0x28
  73. #define H8_CTL_DIAG_MODE                0x29
  74. #define H8_CTL_IDLE_AND_BUSY_SPDS       0x2a
  75. #define H8_CTL_TFT_BRT_BATT             0x2b
  76. #define H8_CTL_UPPER_TEMP               0x2c
  77. #define H8_CTL_LOWER_TEMP               0x2d
  78. #define H8_CTL_TEMP_CUTOUT              0x2e
  79. #define H8_CTL_WAKEUP                   0x2f
  80. #define H8_CTL_CHG_THRESHOLD            0x30
  81. #define H8_CTL_TURBO_MODE               0x31
  82. #define H8_SET_DIAG_STATUS              0x40
  83. #define H8_SOFTWARE_RESET               0x41
  84. #define H8_RECAL_PTR                    0x42
  85. #define H8_SET_INT_BATT_PERCENT         0x43
  86. #define H8_WRT_CFG_INTERFACE_REG        0x45
  87. #define H8_WRT_EVENT_STATUS_MASK        0x57
  88. #define H8_ENTER_POST_MODE              0x46
  89. #define H8_EXIT_POST_MODE               0x47
  91. /* Block transfer commands */
  92. #define H8_RD_EEPROM                    0x50
  93. #define H8_WRT_EEPROM                   0x51
  94. #define H8_WRT_TO_STATUS_DISP           0x52
  95. #define H8_DEFINE_SPC_CHAR              0x53
  96.  
  97. /* Generic commands */
  98. #define H8_DEFINE_TABLE_STRING_ENTRY    0x60
  100. /* Battery control commands */
  101. #define H8_PERFORM_EMU_CMD              0x70
  102. #define H8_EMU_RD_REG                   0x71
  103. #define H8_EMU_WRT_REG                  0x72
  104. #define H8_EMU_RD_RAM                   0x73
  105. #define H8_EMU_WRT_RAM                  0x74
  106. #define H8_BQ_RD_REG                    0x75
  107. #define H8_BQ_WRT_REG                   0x76
  109. /* System admin commands */
  110. #define H8_PWR_OFF                      0x80
  112. /*
  113.  * H8 command related definitions
  114.  */
  116. /* device control argument bits */
  117. #define H8_ENAB_EXTSMI                  0x1
  118. #define H8_DISAB_IRQ                    0x2
  119. #define H8_ENAB_FLASH_WRT               0x4
  120. #define H8_ENAB_THERM                   0x8
  121. #define H8_ENAB_INT_PTR                 0x10
  122. #define H8_ENAB_LOW_SPD_IND             0x20
  123. #define H8_ENAB_EXT_PTR                 0x40
  124. #define H8_DISAB_PWR_OFF_SW             0x80
  125. #define H8_POWER_OFF 0x80
  127. /* H8 read event status bits */
  128. #define H8_DC_CHANGE                    0x1
  129. #define H8_INT_BATT_LOW                 0x2
  130. #define H8_INT_BATT_CHARGE_THRESHOLD    0x4
  131. #define H8_INT_BATT_CHARGE_STATE        0x8
  132. #define H8_INT_BATT_STATUS              0x10
  133. #define H8_EXT_BATT_CHARGE_STATE        0x20
  134. #define H8_EXT_BATT_LOW                 0x40
  135. #define H8_EXT_BATT_STATUS              0x80
  136. #define H8_THERMAL_THRESHOLD            0x100
  137. #define H8_WATCHDOG                     0x200
  138. #define H8_DOCKING_STATION_STATUS       0x400
  139. #define H8_EXT_MOUSE_OR_CASE_SWITCH     0x800
  140. #define H8_KEYBOARD                     0x1000
  141. #define H8_BATT_CHANGE_OVER             0x2000
  142. #define H8_POWER_BUTTON                 0x4000
  143. #define H8_SHUTDOWN                     0x8000
  145. /* H8 control idle and busy speeds */
  146. #define H8_SPEED_LOW                    0x1
  147. #define H8_SPEED_MED                    0x2
  148. #define H8_SPEED_HI                     0x3
  149. #define H8_SPEED_LOCKED                 0x80
  151. #define H8_MAX_CMD_SIZE                 18      
  152. #define H8_Q_ALLOC_AMOUNT               10      
  154. /* H8 state field values */
  155. #define H8_IDLE                         1
  156. #define H8_XMIT                         2
  157. #define H8_RCV                          3
  158. #define H8_RESYNC                       4
  159. #define H8_INTR_MODE                    5
  161. /* Mask values for control functions */
  162. #define UTH_HYSTERESIS                  5
  163. #define DEFAULT_UTHERMAL_THRESHOLD      115
  164. #define H8_TIMEOUT_INTERVAL 30
  165. #define H8_RUN                          4
  167. #define H8_GET_MAX_TEMP                 0x1
  168. #define H8_GET_CURR_TEMP                0x2
  169. #define H8_GET_UPPR_THRMAL_THOLD        0x4
  170. #define H8_GET_ETHERNET_ADDR            0x8
  171. #define H8_SYNC_OP                      0x10 
  172. #define H8_SET_UPPR_THRMAL_THOLD        0x20
  173. #define H8_GET_INT_BATT_STAT            0x40
  174. #define H8_GET_CPU_SPD                  0x80
  175. #define H8_MANAGE_UTHERM                0x100 
  176. #define H8_MANAGE_LTHERM                0x200 
  177. #define H8_HALT                         0x400 
  178. #define H8_CRASH                        0x800 
  179. #define H8_GET_EXT_STATUS               0x10000
  180. #define H8_MANAGE_QUIET                 0x20000
  181. #define H8_MANAGE_SPEEDUP               0x40000
  182. #define H8_MANAGE_BATTERY               0x80000
  183. #define H8_SYSTEM_DELAY_TEST            0x100000
  184. #define H8_POWER_SWITCH_TEST            0x200000
  186. /* CPU speeds and clock divisor values */
  187. #define MHZ_14                           5
  188. #define MHZ_28                           4
  189. #define MHZ_57                           3
  190. #define MHZ_115                          2
  191. #define MHZ_230                          0 
  193. /*
  194.  * H8 data
  195.  */
  196. struct h8_data {
  197.         u_int           ser_num;
  198.         u_char          ether_add[6];
  199.         u_short         hw_ver;
  200.         u_short         mic_ver;
  201.         u_short         max_tmp;
  202.         u_short         min_tmp;
  203.         u_short         cur_tmp;
  204.         u_int           sys_var;
  205.         u_int           pow_on;
  206.         u_int           pow_on_secs;
  207.         u_char          reset_status;
  208.         u_char          pwr_dn_status;
  209.         u_short         event_status;
  210.         u_short         rom_cksm;
  211.         u_short         ext_status;
  212.         u_short         u_cfg;
  213.         u_char          ibatt_volt;
  214.         u_char          dc_volt;
  215.         u_char          ptr_horiz;
  216.         u_char          ptr_vert;
  217.         u_char          eeprom_status;
  218.         u_char          error_status;
  219.         u_char          new_busy_speed;
  220.         u_char          cfg_interface;
  221.         u_short         int_batt_status;
  222.         u_short         ext_batt_status;
  223.         u_char          pow_up_status;
  224.         u_char          event_status_mask;
  225. };
  228. /*
  229.  * H8 command buffers
  230.  */
  231. typedef struct h8_cmd_q {
  232.         struct list_head link;          /* double linked list */
  233.         int             ncmd;           /* number of bytes in command */
  234.         int             nrsp;           /* number of bytes in response */
  235.         int             cnt;            /* number of bytes sent/received */
  236.         int             nacks;          /* number of byte level acks */
  237.         u_char          cmdbuf[H8_MAX_CMD_SIZE]; /* buffer to store command */
  238.         u_char          rcvbuf[H8_MAX_CMD_SIZE]; /* buffer to store response */
  239. } h8_cmd_q_t;
  241. union   intr_buf {
  242.         u_char  byte[2];
  243.         u_int   word;
  244. };
  246. #endif /* __H8_H_ */