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serial.c：源码内容

return -EBUSY;
info->flags |= ASYNC_CALLOUT_ACTIVE;
return 0;
}
/*
* If non-blocking mode is set, or the port is not enabled,
* then make the check up front and then exit.
*/
if ((filp->f_flags & O_NONBLOCK) ||
(tty->flags & (1 << TTY_IO_ERROR))) {
if (info->flags & ASYNC_CALLOUT_ACTIVE)
return -EBUSY;
info->flags |= ASYNC_NORMAL_ACTIVE;
return 0;
}
if (info->flags & ASYNC_CALLOUT_ACTIVE) {
if (state->normal_termios.c_cflag & CLOCAL)
do_clocal = 1;
} else {
if (tty->termios->c_cflag & CLOCAL)
do_clocal = 1;
}
/*
* Block waiting for the carrier detect and the line to become
* free (i.e., not in use by the callout). While we are in
* this loop, state->count is dropped by one, so that
* rs_close() knows when to free things. We restore it upon
* exit, either normal or abnormal.
*/
retval = 0;
add_wait_queue(&info->open_wait, &wait);
#ifdef SERIAL_DEBUG_OPEN
printk("block_til_ready before block: ttys%d, count = %dn",
state->line, state->count);
#endif
save_flags(flags); cli();
if (!tty_hung_up_p(filp)) {
extra_count = 1;
state->count--;
}
restore_flags(flags);
info->blocked_open++;
while (1) {
save_flags(flags); cli();
if (!(info->flags & ASYNC_CALLOUT_ACTIVE) &&
(tty->termios->c_cflag & CBAUD))
serial_out(info, UART_MCR,
serial_inp(info, UART_MCR) |
(UART_MCR_DTR | UART_MCR_RTS));
restore_flags(flags);
set_current_state(TASK_INTERRUPTIBLE);
if (tty_hung_up_p(filp) ||
!(info->flags & ASYNC_INITIALIZED)) {
#ifdef SERIAL_DO_RESTART
if (info->flags & ASYNC_HUP_NOTIFY)
retval = -EAGAIN;
else
retval = -ERESTARTSYS;
#else
retval = -EAGAIN;
#endif
break;
}
if (!(info->flags & ASYNC_CALLOUT_ACTIVE) &&
!(info->flags & ASYNC_CLOSING) &&
(do_clocal || (serial_in(info, UART_MSR) &
UART_MSR_DCD)))
break;
if (signal_pending(current)) {
retval = -ERESTARTSYS;
break;
}
#ifdef SERIAL_DEBUG_OPEN
printk("block_til_ready blocking: ttys%d, count = %dn",
info->line, state->count);
#endif
schedule();
}
set_current_state(TASK_RUNNING);
remove_wait_queue(&info->open_wait, &wait);
if (extra_count)
state->count++;
info->blocked_open--;
#ifdef SERIAL_DEBUG_OPEN
printk("block_til_ready after blocking: ttys%d, count = %dn",
info->line, state->count);
#endif
if (retval)
return retval;
info->flags |= ASYNC_NORMAL_ACTIVE;
return 0;
}
static int get_async_struct(int line, struct async_struct **ret_info)
{
struct async_struct *info;
struct serial_state *sstate;
sstate = rs_table + line;
sstate->count++;
if (sstate->info) {
*ret_info = sstate->info;
return 0;
}
info = kmalloc(sizeof(struct async_struct), GFP_KERNEL);
if (!info) {
sstate->count--;
return -ENOMEM;
}
memset(info, 0, sizeof(struct async_struct));
init_waitqueue_head(&info->open_wait);
init_waitqueue_head(&info->close_wait);
init_waitqueue_head(&info->delta_msr_wait);
info->magic = SERIAL_MAGIC;
info->port = sstate->port;
info->flags = sstate->flags;
info->io_type = sstate->io_type;
info->iomem_base = sstate->iomem_base;
info->iomem_reg_shift = sstate->iomem_reg_shift;
info->xmit_fifo_size = sstate->xmit_fifo_size;
info->line = line;
info->tqueue.routine = do_softint;
info->tqueue.data = info;
info->state = sstate;
if (sstate->info) {
kfree(info);
*ret_info = sstate->info;
return 0;
}
*ret_info = sstate->info = info;
return 0;
}
/*
* This routine is called whenever a serial port is opened. It
* enables interrupts for a serial port, linking in its async structure into
* the IRQ chain. It also performs the serial-specific
* initialization for the tty structure.
*
* Note that on failure, we don't decrement the module use count - the tty
* later will call rs_close, which will decrement it for us as long as
* tty->driver_data is set non-NULL. --rmk
*/
static int rs_open(struct tty_struct *tty, struct file * filp)
{
struct async_struct *info;
int retval, line;
unsigned long page;
MOD_INC_USE_COUNT;
line = MINOR(tty->device) - tty->driver.minor_start;
if ((line < 0) || (line >= NR_PORTS)) {
MOD_DEC_USE_COUNT;
return -ENODEV;
}
retval = get_async_struct(line, &info);
if (retval) {
MOD_DEC_USE_COUNT;
return retval;
}
tty->driver_data = info;
info->tty = tty;
if (serial_paranoia_check(info, tty->device, "rs_open"))
return -ENODEV;
#ifdef SERIAL_DEBUG_OPEN
printk("rs_open %s%d, count = %dn", tty->driver.name, info->line,
info->state->count);
#endif
#if (LINUX_VERSION_CODE > 0x20100)
info->tty->low_latency = (info->flags & ASYNC_LOW_LATENCY) ? 1 : 0;
#endif
/*
* This relies on lock_kernel() stuff so wants tidying for 2.5
*/
if (!tmp_buf) {
page = get_zeroed_page(GFP_KERNEL);
if (!page)
return -ENOMEM;
if (tmp_buf)
free_page(page);
else
tmp_buf = (unsigned char *) page;
}
/*
* If the port is the middle of closing, bail out now
*/
if (tty_hung_up_p(filp) ||
(info->flags & ASYNC_CLOSING)) {
if (info->flags & ASYNC_CLOSING)
interruptible_sleep_on(&info->close_wait);
#ifdef SERIAL_DO_RESTART
return ((info->flags & ASYNC_HUP_NOTIFY) ?
-EAGAIN : -ERESTARTSYS);
#else
return -EAGAIN;
#endif
}
/*
* Start up serial port
*/
retval = startup(info);
if (retval)
return retval;
retval = block_til_ready(tty, filp, info);
if (retval) {
#ifdef SERIAL_DEBUG_OPEN
printk("rs_open returning after block_til_ready with %dn",
retval);
#endif
return retval;
}
if ((info->state->count == 1) &&
(info->flags & ASYNC_SPLIT_TERMIOS)) {
if (tty->driver.subtype == SERIAL_TYPE_NORMAL)
*tty->termios = info->state->normal_termios;
else
*tty->termios = info->state->callout_termios;
change_speed(info, 0);
}
#ifdef CONFIG_SERIAL_CONSOLE
if (sercons.cflag && sercons.index == line) {
tty->termios->c_cflag = sercons.cflag;
sercons.cflag = 0;
change_speed(info, 0);
}
#endif
info->session = current->session;
info->pgrp = current->pgrp;
#ifdef SERIAL_DEBUG_OPEN
printk("rs_open ttys%d successful...", info->line);
#endif
return 0;
}
/*
* /proc fs routines....
*/
static inline int line_info(char *buf, struct serial_state *state)
{
struct async_struct *info = state->info, scr_info;
char stat_buf[30], control, status;
int ret;
unsigned long flags;
ret = sprintf(buf, "%d: uart:%s port:%lX irq:%d",
state->line, uart_config[state->type].name,
state->port, state->irq);
if (!state->port || (state->type == PORT_UNKNOWN)) {
ret += sprintf(buf+ret, "n");
return ret;
}
/*
* Figure out the current RS-232 lines
*/
if (!info) {
info = &scr_info; /* This is just for serial_{in,out} */
info->magic = SERIAL_MAGIC;
info->port = state->port;
info->flags = state->flags;
info->hub6 = state->hub6;
info->io_type = state->io_type;
info->iomem_base = state->iomem_base;
info->iomem_reg_shift = state->iomem_reg_shift;
info->quot = 0;
info->tty = 0;
}
save_flags(flags); cli();
status = serial_in(info, UART_MSR);
control = info != &scr_info ? info->MCR : serial_in(info, UART_MCR);
restore_flags(flags);
stat_buf[0] = 0;
stat_buf[1] = 0;
if (control & UART_MCR_RTS)
strcat(stat_buf, "|RTS");
if (status & UART_MSR_CTS)
strcat(stat_buf, "|CTS");
if (control & UART_MCR_DTR)
strcat(stat_buf, "|DTR");
if (status & UART_MSR_DSR)
strcat(stat_buf, "|DSR");
if (status & UART_MSR_DCD)
strcat(stat_buf, "|CD");
if (status & UART_MSR_RI)
strcat(stat_buf, "|RI");
if (info->quot) {
ret += sprintf(buf+ret, " baud:%d",
state->baud_base / info->quot);
}
ret += sprintf(buf+ret, " tx:%d rx:%d",
state->icount.tx, state->icount.rx);
if (state->icount.frame)
ret += sprintf(buf+ret, " fe:%d", state->icount.frame);
if (state->icount.parity)
ret += sprintf(buf+ret, " pe:%d", state->icount.parity);
if (state->icount.brk)
ret += sprintf(buf+ret, " brk:%d", state->icount.brk);
if (state->icount.overrun)
ret += sprintf(buf+ret, " oe:%d", state->icount.overrun);
/*
* Last thing is the RS-232 status lines
*/
ret += sprintf(buf+ret, " %sn", stat_buf+1);
return ret;
}
int rs_read_proc(char *page, char **start, off_t off, int count,
int *eof, void *data)
{
int i, len = 0, l;
off_t begin = 0;
len += sprintf(page, "serinfo:1.0 driver:%s%s revision:%sn",
serial_version, LOCAL_VERSTRING, serial_revdate);
for (i = 0; i < NR_PORTS && len < 4000; i++) {
l = line_info(page + len, &rs_table[i]);
len += l;
if (len+begin > off+count)
goto done;
if (len+begin < off) {
begin += len;
len = 0;
}
}
*eof = 1;
done:
if (off >= len+begin)
return 0;
*start = page + (off-begin);
return ((count < begin+len-off) ? count : begin+len-off);
}
/*
* ---------------------------------------------------------------------
* rs_init() and friends
*
* rs_init() is called at boot-time to initialize the serial driver.
* ---------------------------------------------------------------------
*/
/*
* This routine prints out the appropriate serial driver version
* number, and identifies which options were configured into this
* driver.
*/
static char serial_options[] __initdata =
#ifdef CONFIG_HUB6
" HUB-6"
#define SERIAL_OPT
#endif
#ifdef CONFIG_SERIAL_MANY_PORTS
" MANY_PORTS"
#define SERIAL_OPT
#endif
#ifdef CONFIG_SERIAL_MULTIPORT
" MULTIPORT"
#define SERIAL_OPT
#endif
#ifdef CONFIG_SERIAL_SHARE_IRQ
" SHARE_IRQ"
#define SERIAL_OPT
#endif
#ifdef CONFIG_SERIAL_DETECT_IRQ
" DETECT_IRQ"
#define SERIAL_OPT
#endif
#ifdef ENABLE_SERIAL_PCI
" SERIAL_PCI"
#define SERIAL_OPT
#endif
#ifdef ENABLE_SERIAL_PNP
" ISAPNP"
#define SERIAL_OPT
#endif
#ifdef ENABLE_SERIAL_ACPI
" SERIAL_ACPI"
#define SERIAL_OPT
#endif
#ifdef SERIAL_OPT
" enabledn";
#else
" no serial options enabledn";
#endif
#undef SERIAL_OPT
static _INLINE_ void show_serial_version(void)
{
printk(KERN_INFO "%s version %s%s (%s) with%s", serial_name,
serial_version, LOCAL_VERSTRING, serial_revdate,
serial_options);
}
/*
* This routine detect the IRQ of a serial port by clearing OUT2 when
* no UART interrupt are requested (IER = 0) (*GPL*). This seems to work at
* each time, as long as no other device permanently request the IRQ.
* If no IRQ is detected, or multiple IRQ appear, this function returns 0.
* The variable "state" and the field "state->port" should not be null.
*/
static unsigned detect_uart_irq (struct serial_state * state)
{
int irq;
unsigned long irqs;
unsigned char save_mcr, save_ier;
struct async_struct scr_info; /* serial_{in,out} because HUB6 */
#ifdef CONFIG_SERIAL_MANY_PORTS
unsigned char save_ICP=0; /* no warning */
unsigned short ICP=0;
if (state->flags & ASYNC_FOURPORT) {
ICP = (state->port & 0xFE0) | 0x01F;
save_ICP = inb_p(ICP);
outb_p(0x80, ICP);
(void) inb_p(ICP);
}
#endif
scr_info.magic = SERIAL_MAGIC;
scr_info.state = state;
scr_info.port = state->port;
scr_info.flags = state->flags;
#ifdef CONFIG_HUB6
scr_info.hub6 = state->hub6;
#endif
scr_info.io_type = state->io_type;
scr_info.iomem_base = state->iomem_base;
scr_info.iomem_reg_shift = state->iomem_reg_shift;
/* forget possible initially masked and pending IRQ */
probe_irq_off(probe_irq_on());
save_mcr = serial_inp(&scr_info, UART_MCR);
save_ier = serial_inp(&scr_info, UART_IER);
serial_outp(&scr_info, UART_MCR, UART_MCR_OUT1 | UART_MCR_OUT2);
irqs = probe_irq_on();
serial_outp(&scr_info, UART_MCR, 0);
udelay (10);
if (state->flags & ASYNC_FOURPORT) {
serial_outp(&scr_info, UART_MCR,
UART_MCR_DTR | UART_MCR_RTS);
} else {
serial_outp(&scr_info, UART_MCR,
UART_MCR_DTR | UART_MCR_RTS | UART_MCR_OUT2);
}
serial_outp(&scr_info, UART_IER, 0x0f); /* enable all intrs */
(void)serial_inp(&scr_info, UART_LSR);
(void)serial_inp(&scr_info, UART_RX);
(void)serial_inp(&scr_info, UART_IIR);
(void)serial_inp(&scr_info, UART_MSR);
serial_outp(&scr_info, UART_TX, 0xFF);
udelay (20);
irq = probe_irq_off(irqs);
serial_outp(&scr_info, UART_MCR, save_mcr);
serial_outp(&scr_info, UART_IER, save_ier);
#ifdef CONFIG_SERIAL_MANY_PORTS
if (state->flags & ASYNC_FOURPORT)
outb_p(save_ICP, ICP);
#endif
return (irq > 0)? irq : 0;
}
/*
* This is a quickie test to see how big the FIFO is.
* It doesn't work at all the time, more's the pity.
*/
static int size_fifo(struct async_struct *info)
{
unsigned char old_fcr, old_mcr, old_dll, old_dlm;
int count;
old_fcr = serial_inp(info, UART_FCR);
old_mcr = serial_inp(info, UART_MCR);
serial_outp(info, UART_FCR, UART_FCR_ENABLE_FIFO |
UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT);
serial_outp(info, UART_MCR, UART_MCR_LOOP);
serial_outp(info, UART_LCR, UART_LCR_DLAB);
old_dll = serial_inp(info, UART_DLL);
old_dlm = serial_inp(info, UART_DLM);
serial_outp(info, UART_DLL, 0x01);
serial_outp(info, UART_DLM, 0x00);
serial_outp(info, UART_LCR, 0x03);
for (count = 0; count < 256; count++)
serial_outp(info, UART_TX, count);
mdelay(20);
for (count = 0; (serial_inp(info, UART_LSR) & UART_LSR_DR) &&
(count < 256); count++)
serial_inp(info, UART_RX);
serial_outp(info, UART_FCR, old_fcr);
serial_outp(info, UART_MCR, old_mcr);
serial_outp(info, UART_LCR, UART_LCR_DLAB);
serial_outp(info, UART_DLL, old_dll);
serial_outp(info, UART_DLM, old_dlm);
return count;
}
/*
* This is a helper routine to autodetect StarTech/Exar/Oxsemi UART's.
* When this function is called we know it is at least a StarTech
* 16650 V2, but it might be one of several StarTech UARTs, or one of
* its clones. (We treat the broken original StarTech 16650 V1 as a
* 16550, and why not? Startech doesn't seem to even acknowledge its
* existence.)
*
* What evil have men's minds wrought...
*/
static void autoconfig_startech_uarts(struct async_struct *info,
struct serial_state *state,
unsigned long flags)
{
unsigned char scratch, scratch2, scratch3, scratch4;
/*
* First we check to see if it's an Oxford Semiconductor UART.
*
* If we have to do this here because some non-National
* Semiconductor clone chips lock up if you try writing to the
* LSR register (which serial_icr_read does)
*/
if (state->type == PORT_16550A) {
/*
* EFR [4] must be set else this test fails
*
* This shouldn't be necessary, but Mike Hudson
* (Exoray@isys.ca) claims that it's needed for 952
* dual UART's (which are not recommended for new designs).
*/
info->ACR = 0;
serial_out(info, UART_LCR, 0xBF);
serial_out(info, UART_EFR, 0x10);
serial_out(info, UART_LCR, 0x00);
/* Check for Oxford Semiconductor 16C950 */
scratch = serial_icr_read(info, UART_ID1);
scratch2 = serial_icr_read(info, UART_ID2);
scratch3 = serial_icr_read(info, UART_ID3);
if (scratch == 0x16 && scratch2 == 0xC9 &&
(scratch3 == 0x50 || scratch3 == 0x52 ||
scratch3 == 0x54)) {
state->type = PORT_16C950;
state->revision = serial_icr_read(info, UART_REV) |
(scratch3 << 8);
return;
}
}
/*
* We check for a XR16C850 by setting DLL and DLM to 0, and
* then reading back DLL and DLM. If DLM reads back 0x10,
* then the UART is a XR16C850 and the DLL contains the chip
* revision. If DLM reads back 0x14, then the UART is a
* XR16C854.
*
*/
/* Save the DLL and DLM */
serial_outp(info, UART_LCR, UART_LCR_DLAB);
scratch3 = serial_inp(info, UART_DLL);
scratch4 = serial_inp(info, UART_DLM);
serial_outp(info, UART_DLL, 0);
serial_outp(info, UART_DLM, 0);
scratch2 = serial_inp(info, UART_DLL);
scratch = serial_inp(info, UART_DLM);
serial_outp(info, UART_LCR, 0);
if (scratch == 0x10 || scratch == 0x14) {
if (scratch == 0x10)
state->revision = scratch2;
state->type = PORT_16850;
return;
}
/* Restore the DLL and DLM */
serial_outp(info, UART_LCR, UART_LCR_DLAB);
serial_outp(info, UART_DLL, scratch3);
serial_outp(info, UART_DLM, scratch4);
serial_outp(info, UART_LCR, 0);
/*
* We distinguish between the '654 and the '650 by counting
* how many bytes are in the FIFO. I'm using this for now,
* since that's the technique that was sent to me in the
* serial driver update, but I'm not convinced this works.
* I've had problems doing this in the past. -TYT
*/
if (size_fifo(info) == 64)
state->type = PORT_16654;
else
state->type = PORT_16650V2;
}
/*
* This routine is called by rs_init() to initialize a specific serial
* port. It determines what type of UART chip this serial port is
* using: 8250, 16450, 16550, 16550A. The important question is
* whether or not this UART is a 16550A or not, since this will
* determine whether or not we can use its FIFO features or not.
*/
static void autoconfig(struct serial_state * state)
{
unsigned char status1, status2, scratch, scratch2, scratch3;
unsigned char save_lcr, save_mcr;
struct async_struct *info, scr_info;
unsigned long flags;
state->type = PORT_UNKNOWN;
#ifdef SERIAL_DEBUG_AUTOCONF
printk("Testing ttyS%d (0x%04lx, 0x%04x)...n", state->line,
state->port, (unsigned) state->iomem_base);
#endif
if (!CONFIGURED_SERIAL_PORT(state))
return;
info = &scr_info; /* This is just for serial_{in,out} */
info->magic = SERIAL_MAGIC;
info->state = state;
info->port = state->port;
info->flags = state->flags;
#ifdef CONFIG_HUB6
info->hub6 = state->hub6;
#endif
info->io_type = state->io_type;
info->iomem_base = state->iomem_base;
info->iomem_reg_shift = state->iomem_reg_shift;
save_flags(flags); cli();
if (!(state->flags & ASYNC_BUGGY_UART) &&
!state->iomem_base) {
/*
* Do a simple existence test first; if we fail this,
* there's no point trying anything else.
*
* 0x80 is used as a nonsense port to prevent against
* false positives due to ISA bus float. The
* assumption is that 0x80 is a non-existent port;
* which should be safe since include/asm/io.h also
* makes this assumption.
*/
scratch = serial_inp(info, UART_IER);
serial_outp(info, UART_IER, 0);
#ifdef __i386__
outb(0xff, 0x080);
#endif
scratch2 = serial_inp(info, UART_IER);
serial_outp(info, UART_IER, 0x0F);
#ifdef __i386__
outb(0, 0x080);
#endif
scratch3 = serial_inp(info, UART_IER);
serial_outp(info, UART_IER, scratch);
if (scratch2 || scratch3 != 0x0F) {
#ifdef SERIAL_DEBUG_AUTOCONF
printk("serial: ttyS%d: simple autoconfig failed "
"(%02x, %02x)n", state->line,
scratch2, scratch3);
#endif
restore_flags(flags);
return; /* We failed; there's nothing here */
}
}
save_mcr = serial_in(info, UART_MCR);
save_lcr = serial_in(info, UART_LCR);
/*
* Check to see if a UART is really there. Certain broken
* internal modems based on the Rockwell chipset fail this
* test, because they apparently don't implement the loopback
* test mode. So this test is skipped on the COM 1 through
* COM 4 ports. This *should* be safe, since no board
* manufacturer would be stupid enough to design a board
* that conflicts with COM 1-4 --- we hope!
*/
if (!(state->flags & ASYNC_SKIP_TEST)) {
serial_outp(info, UART_MCR, UART_MCR_LOOP | 0x0A);
status1 = serial_inp(info, UART_MSR) & 0xF0;
serial_outp(info, UART_MCR, save_mcr);
if (status1 != 0x90) {
#ifdef SERIAL_DEBUG_AUTOCONF
printk("serial: ttyS%d: no UART loopback failedn",
state->line);
#endif
restore_flags(flags);
return;
}
}
serial_outp(info, UART_LCR, 0xBF); /* set up for StarTech test */
serial_outp(info, UART_EFR, 0); /* EFR is the same as FCR */
serial_outp(info, UART_LCR, 0);
serial_outp(info, UART_FCR, UART_FCR_ENABLE_FIFO);
scratch = serial_in(info, UART_IIR) >> 6;
switch (scratch) {
case 0:
state->type = PORT_16450;
break;
case 1:
state->type = PORT_UNKNOWN;
break;
case 2:
state->type = PORT_16550;
break;
case 3:
state->type = PORT_16550A;
break;
}
if (state->type == PORT_16550A) {
/* Check for Startech UART's */
serial_outp(info, UART_LCR, UART_LCR_DLAB);
if (serial_in(info, UART_EFR) == 0) {
state->type = PORT_16650;
} else {
serial_outp(info, UART_LCR, 0xBF);
if (serial_in(info, UART_EFR) == 0)
autoconfig_startech_uarts(info, state, flags);
}
}
if (state->type == PORT_16550A) {
/* Check for TI 16750 */
serial_outp(info, UART_LCR, save_lcr | UART_LCR_DLAB);
serial_outp(info, UART_FCR,
UART_FCR_ENABLE_FIFO | UART_FCR7_64BYTE);
scratch = serial_in(info, UART_IIR) >> 5;
if (scratch == 7) {
/*
* If this is a 16750, and not a cheap UART
* clone, then it should only go into 64 byte
* mode if the UART_FCR7_64BYTE bit was set
* while UART_LCR_DLAB was latched.
*/
serial_outp(info, UART_FCR, UART_FCR_ENABLE_FIFO);
serial_outp(info, UART_LCR, 0);
serial_outp(info, UART_FCR,
UART_FCR_ENABLE_FIFO | UART_FCR7_64BYTE);
scratch = serial_in(info, UART_IIR) >> 5;
if (scratch == 6)
state->type = PORT_16750;
}
serial_outp(info, UART_FCR, UART_FCR_ENABLE_FIFO);
}
#if defined(CONFIG_SERIAL_RSA) && defined(MODULE)
if (state->type == PORT_16550A) {
int i;
for (i = 0 ; i < PORT_RSA_MAX ; ++i) {
if (!probe_rsa[i] && !force_rsa[i])
break;
if (((probe_rsa[i] != state->port) ||
check_region(state->port + UART_RSA_BASE, 16)) &&
(force_rsa[i] != state->port))
continue;
if (!enable_rsa(info))
continue;
state->type = PORT_RSA;
state->baud_base = SERIAL_RSA_BAUD_BASE;
break;
}
}
#endif
serial_outp(info, UART_LCR, save_lcr);
if (state->type == PORT_16450) {
scratch = serial_in(info, UART_SCR);
serial_outp(info, UART_SCR, 0xa5);
status1 = serial_in(info, UART_SCR);
serial_outp(info, UART_SCR, 0x5a);
status2 = serial_in(info, UART_SCR);
serial_outp(info, UART_SCR, scratch);
if ((status1 != 0xa5) || (status2 != 0x5a))
state->type = PORT_8250;
}
state->xmit_fifo_size = uart_config[state->type].dfl_xmit_fifo_size;
if (state->type == PORT_UNKNOWN) {
restore_flags(flags);
return;
}
if (info->port) {
#ifdef CONFIG_SERIAL_RSA
if (state->type == PORT_RSA)
request_region(info->port + UART_RSA_BASE, 16,
"serial_rsa(auto)");
else
#endif
request_region(info->port,8,"serial(auto)");
}
/*
* Reset the UART.
*/
#ifdef CONFIG_SERIAL_RSA
if (state->type == PORT_RSA)
serial_outp(info, UART_RSA_FRR, 0);
#endif
serial_outp(info, UART_MCR, save_mcr);
serial_outp(info, UART_FCR, (UART_FCR_ENABLE_FIFO |
UART_FCR_CLEAR_RCVR |
UART_FCR_CLEAR_XMIT));
serial_outp(info, UART_FCR, 0);
(void)serial_in(info, UART_RX);
serial_outp(info, UART_IER, 0);
restore_flags(flags);
}
int register_serial(struct serial_struct *req);
void unregister_serial(int line);
#if (LINUX_VERSION_CODE > 0x20100)
EXPORT_SYMBOL(register_serial);
EXPORT_SYMBOL(unregister_serial);
#else
static struct symbol_table serial_syms = {
#include <linux/symtab_begin.h>
X(register_serial),
X(unregister_serial),
#include <linux/symtab_end.h>
};
#endif
#if defined(ENABLE_SERIAL_PCI) || defined(ENABLE_SERIAL_PNP)
static void __devinit printk_pnp_dev_id(unsigned short vendor,
unsigned short device)
{
printk("%c%c%c%x%x%x%x",
'A' + ((vendor >> 2) & 0x3f) - 1,
'A' + (((vendor & 3) << 3) | ((vendor >> 13) & 7)) - 1,
'A' + ((vendor >> 8) & 0x1f) - 1,
(device >> 4) & 0x0f,
device & 0x0f,
(device >> 12) & 0x0f,
(device >> 8) & 0x0f);
}
static _INLINE_ int get_pci_port(struct pci_dev *dev,
struct pci_board *board,
struct serial_struct *req,
int idx)
{
unsigned long port;
int base_idx;
int max_port;
int offset;
base_idx = SPCI_FL_GET_BASE(board->flags);
if (board->flags & SPCI_FL_BASE_TABLE)
base_idx += idx;
if (board->flags & SPCI_FL_REGION_SZ_CAP) {
max_port = pci_resource_len(dev, base_idx) / 8;
if (idx >= max_port)
return 1;
}
offset = board->first_uart_offset;
/* Timedia/SUNIX uses a mixture of BARs and offsets */
/* Ugh, this is ugly as all hell --- TYT */
if(dev->vendor == PCI_VENDOR_ID_TIMEDIA ) /* 0x1409 */
switch(idx) {
case 0: base_idx=0;
break;
case 1: base_idx=0; offset=8;
break;
case 2: base_idx=1;
break;
case 3: base_idx=1; offset=8;
break;
case 4: /* BAR 2*/
case 5: /* BAR 3 */
case 6: /* BAR 4*/
case 7: base_idx=idx-2; /* BAR 5*/
}
/* Some Titan cards are also a little weird */
if (dev->vendor == PCI_VENDOR_ID_TITAN &&
(dev->device == PCI_DEVICE_ID_TITAN_400L ||
dev->device == PCI_DEVICE_ID_TITAN_800L)) {
switch (idx) {
case 0: base_idx = 1;
break;
case 1: base_idx = 2;
break;
default:
base_idx = 4;
offset = 8 * (idx - 2);
}
}
port = pci_resource_start(dev, base_idx) + offset;
if ((board->flags & SPCI_FL_BASE_TABLE) == 0)
port += idx * (board->uart_offset ? board->uart_offset : 8);
if (IS_PCI_REGION_IOPORT(dev, base_idx)) {
req->port = port;
if (HIGH_BITS_OFFSET)
req->port_high = port >> HIGH_BITS_OFFSET;
else
req->port_high = 0;
return 0;
}
req->io_type = SERIAL_IO_MEM;
req->iomem_base = ioremap(port, board->uart_offset);
req->iomem_reg_shift = board->reg_shift;
req->port = 0;
return 0;
}
static _INLINE_ int get_pci_irq(struct pci_dev *dev,
struct pci_board *board,
int idx)
{
int base_idx;
if ((board->flags & SPCI_FL_IRQRESOURCE) == 0)
return dev->irq;
base_idx = SPCI_FL_GET_IRQBASE(board->flags);
if (board->flags & SPCI_FL_IRQ_TABLE)
base_idx += idx;
return PCI_IRQ_RESOURCE(dev, base_idx);
}
/*
* Common enabler code shared by both PCI and ISAPNP probes
*/
static void __devinit start_pci_pnp_board(struct pci_dev *dev,
struct pci_board *board)
{
int k, line;
struct serial_struct serial_req;
int base_baud;
if (PREPARE_FUNC(dev) && (PREPARE_FUNC(dev))(dev) < 0) {
printk("serial: PNP device '");
printk_pnp_dev_id(dev->vendor, dev->device);
printk("' prepare failedn");
return;
}
if (ACTIVATE_FUNC(dev) && (ACTIVATE_FUNC(dev))(dev) < 0) {
printk("serial: PNP device '");
printk_pnp_dev_id(dev->vendor, dev->device);
printk("' activate failedn");
return;
}
/*
* Run the initialization function, if any
*/
if (board->init_fn && ((board->init_fn)(dev, board, 1) != 0))
return;
/*
* Register the serial board in the array if we need to
* shutdown the board on a module unload or card removal
*/
if (DEACTIVATE_FUNC(dev) || board->init_fn) {
for (k=0; k < NR_PCI_BOARDS; k++)
if (serial_pci_board[k].dev == 0)
break;
if (k >= NR_PCI_BOARDS)
return;
serial_pci_board[k].board = *board;
serial_pci_board[k].dev = dev;
}
base_baud = board->base_baud;
if (!base_baud)
base_baud = BASE_BAUD;
memset(&serial_req, 0, sizeof(serial_req));
for (k=0; k < board->num_ports; k++) {
serial_req.irq = get_pci_irq(dev, board, k);
if (get_pci_port(dev, board, &serial_req, k))
break;
serial_req.flags = ASYNC_SKIP_TEST | ASYNC_AUTOPROBE;
#ifdef SERIAL_DEBUG_PCI
printk("Setup PCI/PNP port: port %x, irq %d, type %dn",
serial_req.port, serial_req.irq, serial_req.io_type);
#endif
line = register_serial(&serial_req);
if (line < 0)
break;
rs_table[line].baud_base = base_baud;
rs_table[line].dev = dev;
}
}
#endif /* ENABLE_SERIAL_PCI || ENABLE_SERIAL_PNP */
#ifdef ENABLE_SERIAL_PCI
/*
* Some PCI serial cards using the PLX 9050 PCI interface chip require
* that the card interrupt be explicitly enabled or disabled. This
* seems to be mainly needed on card using the PLX which also use I/O
* mapped memory.
*/
static int __devinit
pci_plx9050_fn(struct pci_dev *dev, struct pci_board *board, int enable)
{
u8 data, *p, irq_config;
int pci_config;
irq_config = 0x41;
pci_config = PCI_COMMAND_MEMORY;
if (dev->vendor == PCI_VENDOR_ID_PANACOM)
irq_config = 0x43;
if ((dev->vendor == PCI_VENDOR_ID_PLX) &&
(dev->device == PCI_DEVICE_ID_PLX_ROMULUS)) {
/*
* As the megawolf cards have the int pins active
* high, and have 2 UART chips, both ints must be
* enabled on the 9050. Also, the UARTS are set in
* 16450 mode by default, so we have to enable the
* 16C950 'enhanced' mode so that we can use the deep
* FIFOs
*/
irq_config = 0x5b;
pci_config = PCI_COMMAND_MEMORY | PCI_COMMAND_IO;
}
pci_read_config_byte(dev, PCI_COMMAND, &data);
if (enable)
pci_write_config_byte(dev, PCI_COMMAND,
data | pci_config);
/* enable/disable interrupts */
p = ioremap(pci_resource_start(dev, 0), 0x80);
writel(enable ? irq_config : 0x00, (unsigned long)p + 0x4c);
iounmap(p);
if (!enable)
pci_write_config_byte(dev, PCI_COMMAND,
data & ~pci_config);
return 0;
}
/*
* SIIG serial cards have an PCI interface chip which also controls
* the UART clocking frequency. Each UART can be clocked independently
* (except cards equiped with 4 UARTs) and initial clocking settings
* are stored in the EEPROM chip. It can cause problems because this
* version of serial driver doesn't support differently clocked UART's
* on single PCI card. To prevent this, initialization functions set
* high frequency clocking for all UART's on given card. It is safe (I
* hope) because it doesn't touch EEPROM settings to prevent conflicts
* with other OSes (like M$ DOS).
*
* SIIG support added by Andrey Panin <pazke@mail.tp.ru>, 10/1999
*
* There is two family of SIIG serial cards with different PCI
* interface chip and different configuration methods:
* - 10x cards have control registers in IO and/or memory space;
* - 20x cards have control registers in standard PCI configuration space.
*/
#define PCI_DEVICE_ID_SIIG_1S_10x (PCI_DEVICE_ID_SIIG_1S_10x_550 & 0xfffc)
#define PCI_DEVICE_ID_SIIG_2S_10x (PCI_DEVICE_ID_SIIG_2S_10x_550 & 0xfff8)
static int __devinit
pci_siig10x_fn(struct pci_dev *dev, struct pci_board *board, int enable)
{
u16 data, *p;
if (!enable) return 0;
p = ioremap(pci_resource_start(dev, 0), 0x80);
switch (dev->device & 0xfff8) {
case PCI_DEVICE_ID_SIIG_1S_10x: /* 1S */
data = 0xffdf;
break;
case PCI_DEVICE_ID_SIIG_2S_10x: /* 2S, 2S1P */
data = 0xf7ff;
break;
default: /* 1S1P, 4S */
data = 0xfffb;
break;
}
writew(readw((unsigned long) p + 0x28) & data, (unsigned long) p + 0x28);
iounmap(p);
return 0;
}
#define PCI_DEVICE_ID_SIIG_2S_20x (PCI_DEVICE_ID_SIIG_2S_20x_550 & 0xfffc)
#define PCI_DEVICE_ID_SIIG_2S1P_20x (PCI_DEVICE_ID_SIIG_2S1P_20x_550 & 0xfffc)
static int __devinit
pci_siig20x_fn(struct pci_dev *dev, struct pci_board *board, int enable)
{
u8 data;
if (!enable) return 0;
/* Change clock frequency for the first UART. */
pci_read_config_byte(dev, 0x6f, &data);
pci_write_config_byte(dev, 0x6f, data & 0xef);
/* If this card has 2 UART, we have to do the same with second UART. */
if (((dev->device & 0xfffc) == PCI_DEVICE_ID_SIIG_2S_20x) ||
((dev->device & 0xfffc) == PCI_DEVICE_ID_SIIG_2S1P_20x)) {
pci_read_config_byte(dev, 0x73, &data);
pci_write_config_byte(dev, 0x73, data & 0xef);
}
return 0;
}
/* Added for EKF Intel i960 serial boards */
static int __devinit
pci_inteli960ni_fn(struct pci_dev *dev,
struct pci_board *board,
int enable)
{
unsigned long oldval;
if (!(pci_get_subdevice(dev) & 0x1000))
return(-1);
if (!enable) /* is there something to deinit? */
return(0);
#ifdef SERIAL_DEBUG_PCI
printk(KERN_DEBUG " Subsystem ID %lx (intel 960)n",
(unsigned long) board->subdevice);
#endif
/* is firmware started? */
pci_read_config_dword(dev, 0x44, (void*) &oldval);
if (oldval == 0x00001000L) { /* RESET value */
printk(KERN_DEBUG "Local i960 firmware missing");
return(-1);
}
return(0);
}
/*
* Timedia has an explosion of boards, and to avoid the PCI table from
* growing *huge*, we use this function to collapse some 70 entries
* in the PCI table into one, for sanity's and compactness's sake.
*/
static unsigned short timedia_single_port[] = {
0x4025, 0x4027, 0x4028, 0x5025, 0x5027, 0 };
static unsigned short timedia_dual_port[] = {
0x0002, 0x4036, 0x4037, 0x4038, 0x4078, 0x4079, 0x4085,
0x4088, 0x4089, 0x5037, 0x5078, 0x5079, 0x5085, 0x6079,
0x7079, 0x8079, 0x8137, 0x8138, 0x8237, 0x8238, 0x9079,
0x9137, 0x9138, 0x9237, 0x9238, 0xA079, 0xB079, 0xC079,
0xD079, 0 };
static unsigned short timedia_quad_port[] = {
0x4055, 0x4056, 0x4095, 0x4096, 0x5056, 0x8156, 0x8157,
0x8256, 0x8257, 0x9056, 0x9156, 0x9157, 0x9158, 0x9159,
0x9256, 0x9257, 0xA056, 0xA157, 0xA158, 0xA159, 0xB056,
0xB157, 0 };
static unsigned short timedia_eight_port[] = {
0x4065, 0x4066, 0x5065, 0x5066, 0x8166, 0x9066, 0x9166,
0x9167, 0x9168, 0xA066, 0xA167, 0xA168, 0 };
static struct timedia_struct {
int num;
unsigned short *ids;
} timedia_data[] = {
{ 1, timedia_single_port },
{ 2, timedia_dual_port },
{ 4, timedia_quad_port },
{ 8, timedia_eight_port },
{ 0, 0 }
};
static int __devinit
pci_timedia_fn(struct pci_dev *dev, struct pci_board *board, int enable)
{
int i, j;
unsigned short *ids;
if (!enable)
return 0;
for (i=0; timedia_data[i].num; i++) {
ids = timedia_data[i].ids;
for (j=0; ids[j]; j++) {
if (pci_get_subdevice(dev) == ids[j]) {
board->num_ports = timedia_data[i].num;
return 0;
}
}
}
return 0;
}
static int __devinit
pci_xircom_fn(struct pci_dev *dev, struct pci_board *board, int enable)
{
__set_current_state(TASK_UNINTERRUPTIBLE);
schedule_timeout(HZ/10);
return 0;
}
/*
* This is the configuration table for all of the PCI serial boards
* which we support. It is directly indexed by the pci_board_num_t enum
* value, which is encoded in the pci_device_id PCI probe table's
* driver_data member.
*/
enum pci_board_num_t {
pbn_b0_1_115200,
pbn_default = 0,
pbn_b0_2_115200,
pbn_b0_4_115200,
pbn_b0_1_921600,
pbn_b0_2_921600,
pbn_b0_4_921600,
pbn_b0_bt_1_115200,
pbn_b0_bt_2_115200,
pbn_b0_bt_1_460800,
pbn_b0_bt_2_460800,
pbn_b1_1_115200,
pbn_b1_2_115200,
pbn_b1_4_115200,
pbn_b1_8_115200,
pbn_b1_2_921600,
pbn_b1_4_921600,
pbn_b1_8_921600,
pbn_b1_2_1382400,
pbn_b1_4_1382400,
pbn_b1_8_1382400,
pbn_b2_8_115200,
pbn_b2_4_460800,
pbn_b2_8_460800,
pbn_b2_16_460800,
pbn_b2_4_921600,
pbn_b2_8_921600,
pbn_b2_bt_1_115200,
pbn_b2_bt_2_115200,
pbn_b2_bt_4_115200,
pbn_b2_bt_2_921600,
pbn_panacom,
pbn_panacom2,
pbn_panacom4,
pbn_plx_romulus,
pbn_oxsemi,
pbn_timedia,
pbn_intel_i960,
pbn_sgi_ioc3,
#ifdef CONFIG_DDB5074
pbn_nec_nile4,
#endif
#if 0
pbn_dci_pccom8,
#endif
pbn_xircom_combo,
pbn_siig10x_0,
pbn_siig10x_1,
pbn_siig10x_2,
pbn_siig10x_4,
pbn_siig20x_0,
pbn_siig20x_2,
pbn_siig20x_4,
pbn_computone_4,
pbn_computone_6,
pbn_computone_8,
};
static struct pci_board pci_boards[] __devinitdata = {
/*
* PCI Flags, Number of Ports, Base (Maximum) Baud Rate,
* Offset to get to next UART's registers,
* Register shift to use for memory-mapped I/O,
* Initialization function, first UART offset
*/
/* Generic serial board, pbn_b0_1_115200, pbn_default */
{ SPCI_FL_BASE0, 1, 115200 }, /* pbn_b0_1_115200,
pbn_default */
{ SPCI_FL_BASE0, 2, 115200 }, /* pbn_b0_2_115200 */
{ SPCI_FL_BASE0, 4, 115200 }, /* pbn_b0_4_115200 */
{ SPCI_FL_BASE0, 1, 921600 }, /* pbn_b0_1_921600 */
{ SPCI_FL_BASE0, 2, 921600 }, /* pbn_b0_2_921600 */
{ SPCI_FL_BASE0, 4, 921600 }, /* pbn_b0_4_921600 */
{ SPCI_FL_BASE0 | SPCI_FL_BASE_TABLE, 1, 115200 }, /* pbn_b0_bt_1_115200 */
{ SPCI_FL_BASE0 | SPCI_FL_BASE_TABLE, 2, 115200 }, /* pbn_b0_bt_2_115200 */
{ SPCI_FL_BASE0 | SPCI_FL_BASE_TABLE, 1, 460800 }, /* pbn_b0_bt_1_460800 */
{ SPCI_FL_BASE0 | SPCI_FL_BASE_TABLE, 2, 460800 }, /* pbn_b0_bt_2_460800 */
{ SPCI_FL_BASE1, 1, 115200 }, /* pbn_b1_1_115200 */
{ SPCI_FL_BASE1, 2, 115200 }, /* pbn_b1_2_115200 */
{ SPCI_FL_BASE1, 4, 115200 }, /* pbn_b1_4_115200 */
{ SPCI_FL_BASE1, 8, 115200 }, /* pbn_b1_8_115200 */
{ SPCI_FL_BASE1, 2, 921600 }, /* pbn_b1_2_921600 */
{ SPCI_FL_BASE1, 4, 921600 }, /* pbn_b1_4_921600 */
{ SPCI_FL_BASE1, 8, 921600 }, /* pbn_b1_8_921600 */
{ SPCI_FL_BASE1, 2, 1382400 }, /* pbn_b1_2_1382400 */
{ SPCI_FL_BASE1, 4, 1382400 }, /* pbn_b1_4_1382400 */
{ SPCI_FL_BASE1, 8, 1382400 }, /* pbn_b1_8_1382400 */
{ SPCI_FL_BASE2, 8, 115200 }, /* pbn_b2_8_115200 */
{ SPCI_FL_BASE2, 4, 460800 }, /* pbn_b2_4_460800 */
{ SPCI_FL_BASE2, 8, 460800 }, /* pbn_b2_8_460800 */
{ SPCI_FL_BASE2, 16, 460800 }, /* pbn_b2_16_460800 */
{ SPCI_FL_BASE2, 4, 921600 }, /* pbn_b2_4_921600 */
{ SPCI_FL_BASE2, 8, 921600 }, /* pbn_b2_8_921600 */
{ SPCI_FL_BASE2 | SPCI_FL_BASE_TABLE, 1, 115200 }, /* pbn_b2_bt_1_115200 */
{ SPCI_FL_BASE2 | SPCI_FL_BASE_TABLE, 2, 115200 }, /* pbn_b2_bt_2_115200 */
{ SPCI_FL_BASE2 | SPCI_FL_BASE_TABLE, 4, 115200 }, /* pbn_b2_bt_4_115200 */
{ SPCI_FL_BASE2 | SPCI_FL_BASE_TABLE, 2, 921600 }, /* pbn_b2_bt_2_921600 */
{ SPCI_FL_BASE2, 2, 921600, /* IOMEM */ /* pbn_panacom */
0x400, 7, pci_plx9050_fn },
{ SPCI_FL_BASE2 | SPCI_FL_BASE_TABLE, 2, 921600, /* pbn_panacom2 */
0x400, 7, pci_plx9050_fn },
{ SPCI_FL_BASE2 | SPCI_FL_BASE_TABLE, 4, 921600, /* pbn_panacom4 */
0x400, 7, pci_plx9050_fn },
{ SPCI_FL_BASE2, 4, 921600, /* pbn_plx_romulus */
0x20, 2, pci_plx9050_fn, 0x03 },
/* This board uses the size of PCI Base region 0 to
* signal now many ports are available */
{ SPCI_FL_BASE0 | SPCI_FL_REGION_SZ_CAP, 32, 115200 }, /* pbn_oxsemi */
{ SPCI_FL_BASE_TABLE, 1, 921600, /* pbn_timedia */
0, 0, pci_timedia_fn },
/* EKF addition for i960 Boards form EKF with serial port */
{ SPCI_FL_BASE0, 32, 921600, /* max 256 ports */ /* pbn_intel_i960 */
8<<2, 2, pci_inteli960ni_fn, 0x10000},
{ SPCI_FL_BASE0 | SPCI_FL_IRQRESOURCE, /* pbn_sgi_ioc3 */
1, 458333, 0, 0, 0, 0x20178 },
#ifdef CONFIG_DDB5074
/*
* NEC Vrc-5074 (Nile 4) builtin UART.
* Conditionally compiled in since this is a motherboard device.
*/
{ SPCI_FL_BASE0, 1, 520833, /* pbn_nec_nile4 */
64, 3, NULL, 0x300 },
#endif
#if 0 /* PCI_DEVICE_ID_DCI_PCCOM8 ? */ /* pbn_dci_pccom8 */
{ SPCI_FL_BASE3, 8, 115200, 8 },
#endif
{ SPCI_FL_BASE0, 1, 115200, /* pbn_xircom_combo */
0, 0, pci_xircom_fn },
{ SPCI_FL_BASE2, 1, 460800, /* pbn_siig10x_0 */
0, 0, pci_siig10x_fn },
{ SPCI_FL_BASE2, 1, 921600, /* pbn_siig10x_1 */
0, 0, pci_siig10x_fn },
{ SPCI_FL_BASE2 | SPCI_FL_BASE_TABLE, 2, 921600, /* pbn_siig10x_2 */
0, 0, pci_siig10x_fn },
{ SPCI_FL_BASE2 | SPCI_FL_BASE_TABLE, 4, 921600, /* pbn_siig10x_4 */
0, 0, pci_siig10x_fn },
{ SPCI_FL_BASE0, 1, 921600, /* pbn_siix20x_0 */
0, 0, pci_siig20x_fn },
{ SPCI_FL_BASE0 | SPCI_FL_BASE_TABLE, 2, 921600, /* pbn_siix20x_2 */
0, 0, pci_siig20x_fn },
{ SPCI_FL_BASE0 | SPCI_FL_BASE_TABLE, 4, 921600, /* pbn_siix20x_4 */
0, 0, pci_siig20x_fn },
{ SPCI_FL_BASE0, 4, 921600, /* IOMEM */ /* pbn_computone_4 */
0x40, 2, NULL, 0x200 },
{ SPCI_FL_BASE0, 6, 921600, /* IOMEM */ /* pbn_computone_6 */
0x40, 2, NULL, 0x200 },
{ SPCI_FL_BASE0, 8, 921600, /* IOMEM */ /* pbn_computone_8 */
0x40, 2, NULL, 0x200 },
};
/*
* Given a complete unknown PCI device, try to use some heuristics to
* guess what the configuration might be, based on the pitiful PCI
* serial specs. Returns 0 on success, 1 on failure.
*/
static int __devinit serial_pci_guess_board(struct pci_dev *dev,
struct pci_board *board)
{
int num_iomem = 0, num_port = 0, first_port = -1;
int i;
/*
* If it is not a communications device or the programming
* interface is greater than 6, give up.
*
* (Should we try to make guesses for multiport serial devices
* later?)
*/
if ((((dev->class >> 8) != PCI_CLASS_COMMUNICATION_SERIAL) &&
((dev->class >> 8) != PCI_CLASS_COMMUNICATION_MODEM)) ||
(dev->class & 0xff) > 6)
return 1;
for (i=0; i < 6; i++) {
if (IS_PCI_REGION_IOPORT(dev, i)) {
num_port++;
if (first_port == -1)
first_port = i;
}
if (IS_PCI_REGION_IOMEM(dev, i))
num_iomem++;
}
/*
* If there is 1 or 0 iomem regions, and exactly one port, use
* it.
*/
if (num_iomem <= 1 && num_port == 1) {
board->flags = first_port;
return 0;
}
return 1;
}
static int __devinit serial_init_one(struct pci_dev *dev,
const struct pci_device_id *ent)
{
struct pci_board *board, tmp;
int rc;
board = &pci_boards[ent->driver_data];
rc = pci_enable_device(dev);
if (rc) return rc;
if (ent->driver_data == pbn_default &&
serial_pci_guess_board(dev, board))
return -ENODEV;
else if (serial_pci_guess_board(dev, &tmp) == 0) {
printk(KERN_INFO "Redundant entry in serial pci_table. "
"Please send the output ofn"
"lspci -vv, this message (%04x,%04x,%04x,%04x)n"
"and the manufacturer and name of "
"serial board or modem boardn"
"to serial-pci-info@lists.sourceforge.net.n",
dev->vendor, dev->device,
pci_get_subvendor(dev), pci_get_subdevice(dev));
}
start_pci_pnp_board(dev, board);
return 0;
}
static void __devexit serial_remove_one(struct pci_dev *dev)
{
int i;
/*
* Iterate through all of the ports finding those that belong
* to this PCI device.
*/
for(i = 0; i < NR_PORTS; i++) {
if (rs_table[i].dev != dev)
continue;
unregister_serial(i);
rs_table[i].dev = 0;
}
/*
* Now execute any board-specific shutdown procedure
*/
for (i=0; i < NR_PCI_BOARDS; i++) {
struct pci_board_inst *brd = &serial_pci_board[i];
if (serial_pci_board[i].dev != dev)
continue;
if (brd->board.init_fn)
(brd->board.init_fn)(brd->dev, &brd->board, 0);
if (DEACTIVATE_FUNC(brd->dev))
(DEACTIVATE_FUNC(brd->dev))(brd->dev);
serial_pci_board[i].dev = 0;
}
}
static struct pci_device_id serial_pci_tbl[] __devinitdata = {
{ PCI_VENDOR_ID_V3, PCI_DEVICE_ID_V3_V960,
PCI_SUBVENDOR_ID_CONNECT_TECH,
PCI_SUBDEVICE_ID_CONNECT_TECH_BH8_232, 0, 0,
pbn_b1_8_1382400 },
{ PCI_VENDOR_ID_V3, PCI_DEVICE_ID_V3_V960,
PCI_SUBVENDOR_ID_CONNECT_TECH,
PCI_SUBDEVICE_ID_CONNECT_TECH_BH4_232, 0, 0,
pbn_b1_4_1382400 },
{ PCI_VENDOR_ID_V3, PCI_DEVICE_ID_V3_V960,
PCI_SUBVENDOR_ID_CONNECT_TECH,
PCI_SUBDEVICE_ID_CONNECT_TECH_BH2_232, 0, 0,
pbn_b1_2_1382400 },
{ PCI_VENDOR_ID_V3, PCI_DEVICE_ID_V3_V351,
PCI_SUBVENDOR_ID_CONNECT_TECH,
PCI_SUBDEVICE_ID_CONNECT_TECH_BH8_232, 0, 0,
pbn_b1_8_1382400 },
{ PCI_VENDOR_ID_V3, PCI_DEVICE_ID_V3_V351,
PCI_SUBVENDOR_ID_CONNECT_TECH,
PCI_SUBDEVICE_ID_CONNECT_TECH_BH4_232, 0, 0,
pbn_b1_4_1382400 },
{ PCI_VENDOR_ID_V3, PCI_DEVICE_ID_V3_V351,
PCI_SUBVENDOR_ID_CONNECT_TECH,
PCI_SUBDEVICE_ID_CONNECT_TECH_BH2_232, 0, 0,
pbn_b1_2_1382400 },
{ PCI_VENDOR_ID_V3, PCI_DEVICE_ID_V3_V351,
PCI_SUBVENDOR_ID_CONNECT_TECH,
PCI_SUBDEVICE_ID_CONNECT_TECH_BH8_485, 0, 0,
pbn_b1_8_921600 },
{ PCI_VENDOR_ID_V3, PCI_DEVICE_ID_V3_V351,
PCI_SUBVENDOR_ID_CONNECT_TECH,
PCI_SUBDEVICE_ID_CONNECT_TECH_BH8_485_4_4, 0, 0,
pbn_b1_8_921600 },
{ PCI_VENDOR_ID_V3, PCI_DEVICE_ID_V3_V351,
PCI_SUBVENDOR_ID_CONNECT_TECH,
PCI_SUBDEVICE_ID_CONNECT_TECH_BH4_485, 0, 0,
pbn_b1_4_921600 },
{ PCI_VENDOR_ID_V3, PCI_DEVICE_ID_V3_V351,
PCI_SUBVENDOR_ID_CONNECT_TECH,
PCI_SUBDEVICE_ID_CONNECT_TECH_BH4_485_2_2, 0, 0,
pbn_b1_4_921600 },
{ PCI_VENDOR_ID_V3, PCI_DEVICE_ID_V3_V351,
PCI_SUBVENDOR_ID_CONNECT_TECH,
PCI_SUBDEVICE_ID_CONNECT_TECH_BH2_485, 0, 0,
pbn_b1_2_921600 },
{ PCI_VENDOR_ID_V3, PCI_DEVICE_ID_V3_V351,
PCI_SUBVENDOR_ID_CONNECT_TECH,
PCI_SUBDEVICE_ID_CONNECT_TECH_BH8_485_2_6, 0, 0,
pbn_b1_8_921600 },
{ PCI_VENDOR_ID_V3, PCI_DEVICE_ID_V3_V351,
PCI_SUBVENDOR_ID_CONNECT_TECH,
PCI_SUBDEVICE_ID_CONNECT_TECH_BH081101V1, 0, 0,
pbn_b1_8_921600 },
{ PCI_VENDOR_ID_V3, PCI_DEVICE_ID_V3_V351,
PCI_SUBVENDOR_ID_CONNECT_TECH,
PCI_SUBDEVICE_ID_CONNECT_TECH_BH041101V1, 0, 0,
pbn_b1_4_921600 },
{ PCI_VENDOR_ID_SEALEVEL, PCI_DEVICE_ID_SEALEVEL_U530,
PCI_ANY_ID, PCI_ANY_ID, 0, 0,
pbn_b2_bt_1_115200 },
{ PCI_VENDOR_ID_SEALEVEL, PCI_DEVICE_ID_SEALEVEL_UCOMM2,
PCI_ANY_ID, PCI_ANY_ID, 0, 0,
pbn_b2_bt_2_115200 },
{ PCI_VENDOR_ID_SEALEVEL, PCI_DEVICE_ID_SEALEVEL_UCOMM422,
PCI_ANY_ID, PCI_ANY_ID, 0, 0,
pbn_b2_bt_4_115200 },
{ PCI_VENDOR_ID_SEALEVEL, PCI_DEVICE_ID_SEALEVEL_UCOMM232,
PCI_ANY_ID, PCI_ANY_ID, 0, 0,
pbn_b2_bt_2_115200 },
{ PCI_VENDOR_ID_SEALEVEL, PCI_DEVICE_ID_SEALEVEL_COMM4,
PCI_ANY_ID, PCI_ANY_ID, 0, 0,
pbn_b2_bt_4_115200 },
{ PCI_VENDOR_ID_SEALEVEL, PCI_DEVICE_ID_SEALEVEL_COMM8,
PCI_ANY_ID, PCI_ANY_ID, 0, 0,
pbn_b2_8_115200 },
{ PCI_VENDOR_ID_PLX, PCI_DEVICE_ID_PLX_GTEK_SERIAL2,
PCI_ANY_ID, PCI_ANY_ID, 0, 0,
pbn_b2_bt_2_115200 },
{ PCI_VENDOR_ID_PLX, PCI_DEVICE_ID_PLX_SPCOM200,
PCI_ANY_ID, PCI_ANY_ID, 0, 0,
pbn_b2_bt_2_921600 },
/* VScom SPCOM800, from sl@s.pl */
{ PCI_VENDOR_ID_PLX, PCI_DEVICE_ID_PLX_SPCOM800,
PCI_ANY_ID, PCI_ANY_ID, 0, 0,
pbn_b2_8_921600 },
{ PCI_VENDOR_ID_PLX, PCI_DEVICE_ID_PLX_1077,
PCI_ANY_ID, PCI_ANY_ID, 0, 0,
pbn_b2_4_921600 },
{ PCI_VENDOR_ID_PLX, PCI_DEVICE_ID_PLX_9050,
PCI_SUBVENDOR_ID_KEYSPAN,
PCI_SUBDEVICE_ID_KEYSPAN_SX2, 0, 0,
pbn_panacom },
{ PCI_VENDOR_ID_PANACOM, PCI_DEVICE_ID_PANACOM_QUADMODEM,
PCI_ANY_ID, PCI_ANY_ID, 0, 0,
pbn_panacom4 },
{ PCI_VENDOR_ID_PANACOM, PCI_DEVICE_ID_PANACOM_DUALMODEM,
PCI_ANY_ID, PCI_ANY_ID, 0, 0,
pbn_panacom2 },
{ PCI_VENDOR_ID_PLX, PCI_DEVICE_ID_PLX_9050,
PCI_SUBVENDOR_ID_CHASE_PCIFAST,
PCI_SUBDEVICE_ID_CHASE_PCIFAST4, 0, 0,
pbn_b2_4_460800 },
{ PCI_VENDOR_ID_PLX, PCI_DEVICE_ID_PLX_9050,
PCI_SUBVENDOR_ID_CHASE_PCIFAST,
PCI_SUBDEVICE_ID_CHASE_PCIFAST8, 0, 0,
pbn_b2_8_460800 },
{ PCI_VENDOR_ID_PLX, PCI_DEVICE_ID_PLX_9050,
PCI_SUBVENDOR_ID_CHASE_PCIFAST,
PCI_SUBDEVICE_ID_CHASE_PCIFAST16, 0, 0,
pbn_b2_16_460800 },
{ PCI_VENDOR_ID_PLX, PCI_DEVICE_ID_PLX_9050,
PCI_SUBVENDOR_ID_CHASE_PCIFAST,
PCI_SUBDEVICE_ID_CHASE_PCIFAST16FMC, 0, 0,
pbn_b2_16_460800 },
{ PCI_VENDOR_ID_PLX, PCI_DEVICE_ID_PLX_9050,
PCI_SUBVENDOR_ID_CHASE_PCIRAS,
PCI_SUBDEVICE_ID_CHASE_PCIRAS4, 0, 0,
pbn_b2_4_460800 },
{ PCI_VENDOR_ID_PLX, PCI_DEVICE_ID_PLX_9050,
PCI_SUBVENDOR_ID_CHASE_PCIRAS,
PCI_SUBDEVICE_ID_CHASE_PCIRAS8, 0, 0,
pbn_b2_8_460800 },
/* Megawolf Romulus PCI Serial Card, from Mike Hudson */
/* (Exoray@isys.ca) */
{ PCI_VENDOR_ID_PLX, PCI_DEVICE_ID_PLX_ROMULUS,
0x10b5, 0x106a, 0, 0,
pbn_plx_romulus },
{ PCI_VENDOR_ID_QUATECH, PCI_DEVICE_ID_QUATECH_QSC100,
PCI_ANY_ID, PCI_ANY_ID, 0, 0,
pbn_b1_4_115200 },
{ PCI_VENDOR_ID_QUATECH, PCI_DEVICE_ID_QUATECH_DSC100,
PCI_ANY_ID, PCI_ANY_ID, 0, 0,
pbn_b1_2_115200 },
{ PCI_VENDOR_ID_QUATECH, PCI_DEVICE_ID_QUATECH_ESC100D,
PCI_ANY_ID, PCI_ANY_ID, 0, 0,
pbn_b1_8_115200 },
{ PCI_VENDOR_ID_QUATECH, PCI_DEVICE_ID_QUATECH_ESC100M,
PCI_ANY_ID, PCI_ANY_ID, 0, 0,
pbn_b1_8_115200 },
{ PCI_VENDOR_ID_SPECIALIX, PCI_DEVICE_ID_OXSEMI_16PCI954,
PCI_VENDOR_ID_SPECIALIX, PCI_SUBDEVICE_ID_SPECIALIX_SPEED4, 0, 0,
pbn_b0_4_921600 },
{ PCI_VENDOR_ID_OXSEMI, PCI_DEVICE_ID_OXSEMI_16PCI954,
PCI_ANY_ID, PCI_ANY_ID, 0, 0,
pbn_b0_4_115200 },
{ PCI_VENDOR_ID_OXSEMI, PCI_DEVICE_ID_OXSEMI_16PCI952,
PCI_ANY_ID, PCI_ANY_ID, 0, 0,
pbn_b0_2_115200 },
/* Digitan DS560-558, from jimd@esoft.com */
{ PCI_VENDOR_ID_ATT, PCI_DEVICE_ID_ATT_VENUS_MODEM,
PCI_ANY_ID, PCI_ANY_ID, 0, 0,
pbn_b1_1_115200 },
/* 3Com US Robotics 56k Voice Internal PCI model 5610 */
{ PCI_VENDOR_ID_USR, 0x1008,
PCI_ANY_ID, PCI_ANY_ID, },
/* Titan Electronic cards */
{ PCI_VENDOR_ID_TITAN, PCI_DEVICE_ID_TITAN_100,
PCI_ANY_ID, PCI_ANY_ID, 0, 0,
pbn_b0_1_921600 },
{ PCI_VENDOR_ID_TITAN, PCI_DEVICE_ID_TITAN_200,
PCI_ANY_ID, PCI_ANY_ID, 0, 0,
pbn_b0_2_921600 },
{ PCI_VENDOR_ID_TITAN, PCI_DEVICE_ID_TITAN_400,
PCI_ANY_ID, PCI_ANY_ID, 0, 0,
pbn_b0_4_921600 },
{ PCI_VENDOR_ID_TITAN, PCI_DEVICE_ID_TITAN_800B,
PCI_ANY_ID, PCI_ANY_ID, 0, 0,
pbn_b0_4_921600 },
{ PCI_VENDOR_ID_TITAN, PCI_DEVICE_ID_TITAN_100L,
PCI_ANY_ID, PCI_ANY_ID,
SPCI_FL_BASE1, 1, 921600 },
{ PCI_VENDOR_ID_TITAN, PCI_DEVICE_ID_TITAN_200L,
PCI_ANY_ID, PCI_ANY_ID,
SPCI_FL_BASE1 | SPCI_FL_BASE_TABLE, 2, 921600 },
/* The 400L and 800L have a custom hack in get_pci_port */
{ PCI_VENDOR_ID_TITAN, PCI_DEVICE_ID_TITAN_400L,
PCI_ANY_ID, PCI_ANY_ID,
SPCI_FL_BASE_TABLE, 4, 921600 },
{ PCI_VENDOR_ID_TITAN, PCI_DEVICE_ID_TITAN_800L,
PCI_ANY_ID, PCI_ANY_ID,
SPCI_FL_BASE_TABLE, 8, 921600 },
{ PCI_VENDOR_ID_SIIG, PCI_DEVICE_ID_SIIG_1S_10x_550,
PCI_ANY_ID, PCI_ANY_ID, 0, 0,
pbn_siig10x_0 },
{ PCI_VENDOR_ID_SIIG, PCI_DEVICE_ID_SIIG_1S_10x_650,
PCI_ANY_ID, PCI_ANY_ID, 0, 0,
pbn_siig10x_0 },
{ PCI_VENDOR_ID_SIIG, PCI_DEVICE_ID_SIIG_1S_10x_850,
PCI_ANY_ID, PCI_ANY_ID, 0, 0,
pbn_siig10x_0 },
{ PCI_VENDOR_ID_SIIG, PCI_DEVICE_ID_SIIG_1S1P_10x_550,
PCI_ANY_ID, PCI_ANY_ID, 0, 0,
pbn_siig10x_1 },
{ PCI_VENDOR_ID_SIIG, PCI_DEVICE_ID_SIIG_1S1P_10x_650,
PCI_ANY_ID, PCI_ANY_ID, 0, 0,
pbn_siig10x_1 },
{ PCI_VENDOR_ID_SIIG, PCI_DEVICE_ID_SIIG_1S1P_10x_850,
PCI_ANY_ID, PCI_ANY_ID, 0, 0,
pbn_siig10x_1 },
{ PCI_VENDOR_ID_SIIG, PCI_DEVICE_ID_SIIG_2S_10x_550,
PCI_ANY_ID, PCI_ANY_ID, 0, 0,
pbn_siig10x_2 },
{ PCI_VENDOR_ID_SIIG, PCI_DEVICE_ID_SIIG_2S_10x_650,
PCI_ANY_ID, PCI_ANY_ID, 0, 0,
pbn_siig10x_2 },
{ PCI_VENDOR_ID_SIIG, PCI_DEVICE_ID_SIIG_2S_10x_850,
PCI_ANY_ID, PCI_ANY_ID, 0, 0,
pbn_siig10x_2 },
{ PCI_VENDOR_ID_SIIG, PCI_DEVICE_ID_SIIG_2S1P_10x_550,
PCI_ANY_ID, PCI_ANY_ID, 0, 0,
pbn_siig10x_2 },
{ PCI_VENDOR_ID_SIIG, PCI_DEVICE_ID_SIIG_2S1P_10x_650,
PCI_ANY_ID, PCI_ANY_ID, 0, 0,
pbn_siig10x_2 },
{ PCI_VENDOR_ID_SIIG, PCI_DEVICE_ID_SIIG_2S1P_10x_850,
PCI_ANY_ID, PCI_ANY_ID, 0, 0,
pbn_siig10x_2 },
{ PCI_VENDOR_ID_SIIG, PCI_DEVICE_ID_SIIG_4S_10x_550,
PCI_ANY_ID, PCI_ANY_ID, 0, 0,
pbn_siig10x_4 },
{ PCI_VENDOR_ID_SIIG, PCI_DEVICE_ID_SIIG_4S_10x_650,
PCI_ANY_ID, PCI_ANY_ID, 0, 0,
pbn_siig10x_4 },
{ PCI_VENDOR_ID_SIIG, PCI_DEVICE_ID_SIIG_4S_10x_850,
PCI_ANY_ID, PCI_ANY_ID, 0, 0,
pbn_siig10x_4 },
{ PCI_VENDOR_ID_SIIG, PCI_DEVICE_ID_SIIG_1S_20x_550,
PCI_ANY_ID, PCI_ANY_ID, 0, 0,
pbn_siig20x_0 },
{ PCI_VENDOR_ID_SIIG, PCI_DEVICE_ID_SIIG_1S_20x_650,
PCI_ANY_ID, PCI_ANY_ID, 0, 0,
pbn_siig20x_0 },
{ PCI_VENDOR_ID_SIIG, PCI_DEVICE_ID_SIIG_1S_20x_850,
PCI_ANY_ID, PCI_ANY_ID, 0, 0,
pbn_siig20x_0 },
{ PCI_VENDOR_ID_SIIG, PCI_DEVICE_ID_SIIG_1S1P_20x_550,
PCI_ANY_ID, PCI_ANY_ID, 0, 0,
pbn_siig20x_0 },
{ PCI_VENDOR_ID_SIIG, PCI_DEVICE_ID_SIIG_1S1P_20x_650,
PCI_ANY_ID, PCI_ANY_ID, 0, 0,
pbn_siig20x_0 },
{ PCI_VENDOR_ID_SIIG, PCI_DEVICE_ID_SIIG_1S1P_20x_850,
PCI_ANY_ID, PCI_ANY_ID, 0, 0,
pbn_siig20x_0 },
{ PCI_VENDOR_ID_SIIG, PCI_DEVICE_ID_SIIG_2P1S_20x_550,
PCI_ANY_ID, PCI_ANY_ID, 0, 0,
pbn_siig20x_0 },
{ PCI_VENDOR_ID_SIIG, PCI_DEVICE_ID_SIIG_2P1S_20x_650,
PCI_ANY_ID, PCI_ANY_ID, 0, 0,
pbn_siig20x_0 },
{ PCI_VENDOR_ID_SIIG, PCI_DEVICE_ID_SIIG_2P1S_20x_850,
PCI_ANY_ID, PCI_ANY_ID, 0, 0,
pbn_siig20x_0 },
{ PCI_VENDOR_ID_SIIG, PCI_DEVICE_ID_SIIG_2S_20x_550,
PCI_ANY_ID, PCI_ANY_ID, 0, 0,
pbn_siig20x_2 },
{ PCI_VENDOR_ID_SIIG, PCI_DEVICE_ID_SIIG_2S_20x_650,
PCI_ANY_ID, PCI_ANY_ID, 0, 0,
pbn_siig20x_2 },
{ PCI_VENDOR_ID_SIIG, PCI_DEVICE_ID_SIIG_2S_20x_850,
PCI_ANY_ID, PCI_ANY_ID, 0, 0,
pbn_siig20x_2 },
{ PCI_VENDOR_ID_SIIG, PCI_DEVICE_ID_SIIG_2S1P_20x_550,
PCI_ANY_ID, PCI_ANY_ID, 0, 0,
pbn_siig20x_2 },
{ PCI_VENDOR_ID_SIIG, PCI_DEVICE_ID_SIIG_2S1P_20x_650,
PCI_ANY_ID, PCI_ANY_ID, 0, 0,
pbn_siig20x_2 },
{ PCI_VENDOR_ID_SIIG, PCI_DEVICE_ID_SIIG_2S1P_20x_850,
PCI_ANY_ID, PCI_ANY_ID, 0, 0,
pbn_siig20x_2 },
{ PCI_VENDOR_ID_SIIG, PCI_DEVICE_ID_SIIG_4S_20x_550,
PCI_ANY_ID, PCI_ANY_ID, 0, 0,
pbn_siig20x_4 },
{ PCI_VENDOR_ID_SIIG, PCI_DEVICE_ID_SIIG_4S_20x_650,
PCI_ANY_ID, PCI_ANY_ID, 0, 0,
pbn_siig20x_4 },
{ PCI_VENDOR_ID_SIIG, PCI_DEVICE_ID_SIIG_4S_20x_850,
PCI_ANY_ID, PCI_ANY_ID, 0, 0,
pbn_siig20x_4 },
/* Computone devices submitted by Doug McNash dmcnash@computone.com */
{ PCI_VENDOR_ID_COMPUTONE, PCI_DEVICE_ID_COMPUTONE_PG,
PCI_SUBVENDOR_ID_COMPUTONE, PCI_SUBDEVICE_ID_COMPUTONE_PG4,
0, 0, pbn_computone_4 },
{ PCI_VENDOR_ID_COMPUTONE, PCI_DEVICE_ID_COMPUTONE_PG,
PCI_SUBVENDOR_ID_COMPUTONE, PCI_SUBDEVICE_ID_COMPUTONE_PG8,
0, 0, pbn_computone_8 },
{ PCI_VENDOR_ID_COMPUTONE, PCI_DEVICE_ID_COMPUTONE_PG,
PCI_SUBVENDOR_ID_COMPUTONE, PCI_SUBDEVICE_ID_COMPUTONE_PG6,
0, 0, pbn_computone_6 },
{ PCI_VENDOR_ID_OXSEMI, PCI_DEVICE_ID_OXSEMI_16PCI95N,
PCI_ANY_ID, PCI_ANY_ID, 0, 0, pbn_oxsemi },
{ PCI_VENDOR_ID_TIMEDIA, PCI_DEVICE_ID_TIMEDIA_1889,
PCI_VENDOR_ID_TIMEDIA, PCI_ANY_ID, 0, 0, pbn_timedia },
{ PCI_VENDOR_ID_LAVA, PCI_DEVICE_ID_LAVA_DSERIAL,
PCI_ANY_ID, PCI_ANY_ID, 0, 0,
pbn_b0_bt_2_115200 },
{ PCI_VENDOR_ID_LAVA, PCI_DEVICE_ID_LAVA_QUATRO_A,
PCI_ANY_ID, PCI_ANY_ID, 0, 0,
pbn_b0_bt_2_115200 },
{ PCI_VENDOR_ID_LAVA, PCI_DEVICE_ID_LAVA_QUATRO_B,
PCI_ANY_ID, PCI_ANY_ID, 0, 0,
pbn_b0_bt_2_115200 },
{ PCI_VENDOR_ID_LAVA, PCI_DEVICE_ID_LAVA_PORT_PLUS,
PCI_ANY_ID, PCI_ANY_ID, 0, 0,
pbn_b0_bt_2_460800 },
{ PCI_VENDOR_ID_LAVA, PCI_DEVICE_ID_LAVA_QUAD_A,
PCI_ANY_ID, PCI_ANY_ID, 0, 0,
pbn_b0_bt_2_460800 },
{ PCI_VENDOR_ID_LAVA, PCI_DEVICE_ID_LAVA_QUAD_B,
PCI_ANY_ID, PCI_ANY_ID, 0, 0,
pbn_b0_bt_2_460800 },
{ PCI_VENDOR_ID_LAVA, PCI_DEVICE_ID_LAVA_SSERIAL,
PCI_ANY_ID, PCI_ANY_ID, 0, 0,
pbn_b0_bt_1_115200 },
{ PCI_VENDOR_ID_LAVA, PCI_DEVICE_ID_LAVA_PORT_650,
PCI_ANY_ID, PCI_ANY_ID, 0, 0,
pbn_b0_bt_1_460800 },
/* RAStel 2 port modem, gerg@moreton.com.au */
{ PCI_VENDOR_ID_MORETON, PCI_DEVICE_ID_RASTEL_2PORT,
PCI_ANY_ID, PCI_ANY_ID, 0, 0,
pbn_b2_bt_2_115200 },
/* EKF addition for i960 Boards form EKF with serial port */
{ PCI_VENDOR_ID_INTEL, 0x1960,
0xE4BF, PCI_ANY_ID, 0, 0,
pbn_intel_i960 },
/* Xircom Cardbus/Ethernet combos */
{ PCI_VENDOR_ID_XIRCOM, PCI_DEVICE_ID_XIRCOM_X3201_MDM,
PCI_ANY_ID, PCI_ANY_ID, 0, 0,
pbn_xircom_combo },
/*
* Untested PCI modems, sent in from various folks...
*/
/* Elsa Model 56K PCI Modem, from Andreas Rath <arh@01019freenet.de> */
{ PCI_VENDOR_ID_ROCKWELL, 0x1004,
0x1048, 0x1500, 0, 0,
pbn_b1_1_115200 },
{ PCI_VENDOR_ID_SGI, PCI_DEVICE_ID_SGI_IOC3,
0xFF00, 0, 0, 0,
pbn_sgi_ioc3 },
#ifdef CONFIG_DDB5074
/*
* NEC Vrc-5074 (Nile 4) builtin UART.
* Conditionally compiled in since this is a motherboard device.
*/
{ PCI_VENDOR_ID_NEC, PCI_DEVICE_ID_NEC_NILE4,
PCI_ANY_ID, PCI_ANY_ID, 0, 0,
pbn_nec_nile4 },
#endif
#if 0 /* PCI_DEVICE_ID_DCI_PCCOM8 ? */
{ PCI_VENDOR_ID_DCI, PCI_DEVICE_ID_DCI_PCCOM8,
PCI_ANY_ID, PCI_ANY_ID, 0, 0,
pbn_dci_pccom8 },
#endif
{ PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID,
PCI_CLASS_COMMUNICATION_SERIAL << 8, 0xffff00, },
{ PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID,
PCI_CLASS_COMMUNICATION_MODEM << 8, 0xffff00, },
{ 0, }
};
MODULE_DEVICE_TABLE(pci, serial_pci_tbl);
static struct pci_driver serial_pci_driver = {
name: "serial",
probe: serial_init_one,
remove: __devexit_p(serial_remove_one),
id_table: serial_pci_tbl,
};
/*
* Query PCI space for known serial boards
* If found, add them to the PCI device space in rs_table[]
*
* Accept a maximum of eight boards
*
*/
static void __devinit probe_serial_pci(void)
{
#ifdef SERIAL_DEBUG_PCI
printk(KERN_DEBUG "Entered probe_serial_pci()n");
#endif
/* Register call PCI serial devices. Null out
* the driver name upon failure, as a signal
* not to attempt to unregister the driver later
*/
if (pci_module_init (&serial_pci_driver) != 0)
serial_pci_driver.name = "";
#ifdef SERIAL_DEBUG_PCI
printk(KERN_DEBUG "Leaving probe_serial_pci() (probe finished)n");
#endif
return;
}
#endif /* ENABLE_SERIAL_PCI */
#ifdef ENABLE_SERIAL_PNP
struct pnp_board {
unsigned short vendor;
unsigned short device;
};
static struct pnp_board pnp_devices[] __devinitdata = {
/* Archtek America Corp. */
/* Archtek SmartLink Modem 3334BT Plug & Play */
{ ISAPNP_VENDOR('A', 'A', 'C'), ISAPNP_DEVICE(0x000F) },
/* Anchor Datacomm BV */
/* SXPro 144 External Data Fax Modem Plug & Play */
{ ISAPNP_VENDOR('A', 'D', 'C'), ISAPNP_DEVICE(0x0001) },
/* SXPro 288 External Data Fax Modem Plug & Play */
{ ISAPNP_VENDOR('A', 'D', 'C'), ISAPNP_DEVICE(0x0002) },
/* Rockwell 56K ACF II Fax+Data+Voice Modem */
{ ISAPNP_VENDOR('A', 'K', 'Y'), ISAPNP_DEVICE(0x1021) },
/* AZT3005 PnP SOUND DEVICE */
{ ISAPNP_VENDOR('A', 'Z', 'T'), ISAPNP_DEVICE(0x4001) },
/* Best Data Products Inc. Smart One 336F PnP Modem */
{ ISAPNP_VENDOR('B', 'D', 'P'), ISAPNP_DEVICE(0x3336) },
/* Boca Research */
/* Boca Complete Ofc Communicator 14.4 Data-FAX */
{ ISAPNP_VENDOR('B', 'R', 'I'), ISAPNP_DEVICE(0x0A49) },
/* Boca Research 33,600 ACF Modem */
{ ISAPNP_VENDOR('B', 'R', 'I'), ISAPNP_DEVICE(0x1400) },
/* Boca 33.6 Kbps Internal FD34FSVD */
{ ISAPNP_VENDOR('B', 'R', 'I'), ISAPNP_DEVICE(0x3400) },
/* Boca 33.6 Kbps Internal FD34FSVD */
{ ISAPNP_VENDOR('B', 'R', 'I'), ISAPNP_DEVICE(0x0A49) },
/* Best Data Products Inc. Smart One 336F PnP Modem */
{ ISAPNP_VENDOR('B', 'D', 'P'), ISAPNP_DEVICE(0x3336) },
/* Computer Peripherals Inc */
/* EuroViVa CommCenter-33.6 SP PnP */
{ ISAPNP_VENDOR('C', 'P', 'I'), ISAPNP_DEVICE(0x4050) },
/* Creative Labs */
/* Creative Labs Phone Blaster 28.8 DSVD PnP Voice */
{ ISAPNP_VENDOR('C', 'T', 'L'), ISAPNP_DEVICE(0x3001) },
/* Creative Labs Modem Blaster 28.8 DSVD PnP Voice */
{ ISAPNP_VENDOR('C', 'T', 'L'), ISAPNP_DEVICE(0x3011) },
/* Creative */
/* Creative Modem Blaster Flash56 DI5601-1 */
{ ISAPNP_VENDOR('D', 'M', 'B'), ISAPNP_DEVICE(0x1032) },
/* Creative Modem Blaster V.90 DI5660 */
{ ISAPNP_VENDOR('D', 'M', 'B'), ISAPNP_DEVICE(0x2001) },
/* FUJITSU */
/* Fujitsu 33600 PnP-I2 R Plug & Play */
{ ISAPNP_VENDOR('F', 'U', 'J'), ISAPNP_DEVICE(0x0202) },
/* Fujitsu FMV-FX431 Plug & Play */
{ ISAPNP_VENDOR('F', 'U', 'J'), ISAPNP_DEVICE(0x0205) },
/* Fujitsu 33600 PnP-I4 R Plug & Play */
{ ISAPNP_VENDOR('F', 'U', 'J'), ISAPNP_DEVICE(0x0206) },
/* Fujitsu Fax Voice 33600 PNP-I5 R Plug & Play */
{ ISAPNP_VENDOR('F', 'U', 'J'), ISAPNP_DEVICE(0x0209) },
/* Archtek America Corp. */
/* Archtek SmartLink Modem 3334BT Plug & Play */
{ ISAPNP_VENDOR('G', 'V', 'C'), ISAPNP_DEVICE(0x000F) },
/* Hayes */
/* Hayes Optima 288 V.34-V.FC + FAX + Voice Plug & Play */
{ ISAPNP_VENDOR('H', 'A', 'Y'), ISAPNP_DEVICE(0x0001) },
/* Hayes Optima 336 V.34 + FAX + Voice PnP */
{ ISAPNP_VENDOR('H', 'A', 'Y'), ISAPNP_DEVICE(0x000C) },
/* Hayes Optima 336B V.34 + FAX + Voice PnP */
{ ISAPNP_VENDOR('H', 'A', 'Y'), ISAPNP_DEVICE(0x000D) },
/* Hayes Accura 56K Ext Fax Modem PnP */
{ ISAPNP_VENDOR('H', 'A', 'Y'), ISAPNP_DEVICE(0x5670) },
/* Hayes Accura 56K Ext Fax Modem PnP */
{ ISAPNP_VENDOR('H', 'A', 'Y'), ISAPNP_DEVICE(0x5674) },
/* Hayes Accura 56K Fax Modem PnP */
{ ISAPNP_VENDOR('H', 'A', 'Y'), ISAPNP_DEVICE(0x5675) },
/* Hayes 288, V.34 + FAX */
{ ISAPNP_VENDOR('H', 'A', 'Y'), ISAPNP_DEVICE(0xF000) },
/* Hayes Optima 288 V.34 + FAX + Voice, Plug & Play */
{ ISAPNP_VENDOR('H', 'A', 'Y'), ISAPNP_DEVICE(0xF001) },
/* IBM */
/* IBM Thinkpad 701 Internal Modem Voice */
{ ISAPNP_VENDOR('I', 'B', 'M'), ISAPNP_DEVICE(0x0033) },
/* Intertex */
/* Intertex 28k8 33k6 Voice EXT PnP */
{ ISAPNP_VENDOR('I', 'X', 'D'), ISAPNP_DEVICE(0xC801) },
/* Intertex 33k6 56k Voice EXT PnP */
{ ISAPNP_VENDOR('I', 'X', 'D'), ISAPNP_DEVICE(0xC901) },
/* Intertex 28k8 33k6 Voice SP EXT PnP */
{ ISAPNP_VENDOR('I', 'X', 'D'), ISAPNP_DEVICE(0xD801) },
/* Intertex 33k6 56k Voice SP EXT PnP */
{ ISAPNP_VENDOR('I', 'X', 'D'), ISAPNP_DEVICE(0xD901) },
/* Intertex 28k8 33k6 Voice SP INT PnP */
{ ISAPNP_VENDOR('I', 'X', 'D'), ISAPNP_DEVICE(0xF401) },
/* Intertex 28k8 33k6 Voice SP EXT PnP */
{ ISAPNP_VENDOR('I', 'X', 'D'), ISAPNP_DEVICE(0xF801) },
/* Intertex 33k6 56k Voice SP EXT PnP */
{ ISAPNP_VENDOR('I', 'X', 'D'), ISAPNP_DEVICE(0xF901) },
/* Kortex International */
/* KORTEX 28800 Externe PnP */
{ ISAPNP_VENDOR('K', 'O', 'R'), ISAPNP_DEVICE(0x4522) },
/* KXPro 33.6 Vocal ASVD PnP */
{ ISAPNP_VENDOR('K', 'O', 'R'), ISAPNP_DEVICE(0xF661) },
/* Lasat */
/* LASAT Internet 33600 PnP */
{ ISAPNP_VENDOR('L', 'A', 'S'), ISAPNP_DEVICE(0x4040) },
/* Lasat Safire 560 PnP */
{ ISAPNP_VENDOR('L', 'A', 'S'), ISAPNP_DEVICE(0x4540) },
/* Lasat Safire 336 PnP */
{ ISAPNP_VENDOR('L', 'A', 'S'), ISAPNP_DEVICE(0x5440) },
/* Microcom, Inc. */
/* Microcom TravelPorte FAST V.34 Plug & Play */
{ ISAPNP_VENDOR('M', 'N', 'P'), ISAPNP_DEVICE(0x281) },
/* Microcom DeskPorte V.34 FAST or FAST+ Plug & Play */
{ ISAPNP_VENDOR('M', 'N', 'P'), ISAPNP_DEVICE(0x0336) },
/* Microcom DeskPorte FAST EP 28.8 Plug & Play */
{ ISAPNP_VENDOR('M', 'N', 'P'), ISAPNP_DEVICE(0x0339) },
/* Microcom DeskPorte 28.8P Plug & Play */
{ ISAPNP_VENDOR('M', 'N', 'P'), ISAPNP_DEVICE(0x0342) },
/* Microcom DeskPorte FAST ES 28.8 Plug & Play */
{ ISAPNP_VENDOR('M', 'N', 'P'), ISAPNP_DEVICE(0x0500) },
/* Microcom DeskPorte FAST ES 28.8 Plug & Play */
{ ISAPNP_VENDOR('M', 'N', 'P'), ISAPNP_DEVICE(0x0501) },
/* Microcom DeskPorte 28.8S Internal Plug & Play */
{ ISAPNP_VENDOR('M', 'N', 'P'), ISAPNP_DEVICE(0x0502) },
/* Motorola */
/* Motorola BitSURFR Plug & Play */
{ ISAPNP_VENDOR('M', 'O', 'T'), ISAPNP_DEVICE(0x1105) },
/* Motorola TA210 Plug & Play */
{ ISAPNP_VENDOR('M', 'O', 'T'), ISAPNP_DEVICE(0x1111) },
/* Motorola HMTA 200 (ISDN) Plug & Play */
{ ISAPNP_VENDOR('M', 'O', 'T'), ISAPNP_DEVICE(0x1114) },
/* Motorola BitSURFR Plug & Play */
{ ISAPNP_VENDOR('M', 'O', 'T'), ISAPNP_DEVICE(0x1115) },
/* Motorola Lifestyle 28.8 Internal */
{ ISAPNP_VENDOR('M', 'O', 'T'), ISAPNP_DEVICE(0x1190) },
/* Motorola V.3400 Plug & Play */
{ ISAPNP_VENDOR('M', 'O', 'T'), ISAPNP_DEVICE(0x1501) },
/* Motorola Lifestyle 28.8 V.34 Plug & Play */
{ ISAPNP_VENDOR('M', 'O', 'T'), ISAPNP_DEVICE(0x1502) },
/* Motorola Power 28.8 V.34 Plug & Play */
{ ISAPNP_VENDOR('M', 'O', 'T'), ISAPNP_DEVICE(0x1505) },
/* Motorola ModemSURFR External 28.8 Plug & Play */
{ ISAPNP_VENDOR('M', 'O', 'T'), ISAPNP_DEVICE(0x1509) },
/* Motorola Premier 33.6 Desktop Plug & Play */
{ ISAPNP_VENDOR('M', 'O', 'T'), ISAPNP_DEVICE(0x150A) },
/* Motorola VoiceSURFR 56K External PnP */
{ ISAPNP_VENDOR('M', 'O', 'T'), ISAPNP_DEVICE(0x150F) },
/* Motorola ModemSURFR 56K External PnP */
{ ISAPNP_VENDOR('M', 'O', 'T'), ISAPNP_DEVICE(0x1510) },
/* Motorola ModemSURFR 56K Internal PnP */
{ ISAPNP_VENDOR('M', 'O', 'T'), ISAPNP_DEVICE(0x1550) },
/* Motorola ModemSURFR Internal 28.8 Plug & Play */
{ ISAPNP_VENDOR('M', 'O', 'T'), ISAPNP_DEVICE(0x1560) },
/* Motorola Premier 33.6 Internal Plug & Play */
{ ISAPNP_VENDOR('M', 'O', 'T'), ISAPNP_DEVICE(0x1580) },
/* Motorola OnlineSURFR 28.8 Internal Plug & Play */
{ ISAPNP_VENDOR('M', 'O', 'T'), ISAPNP_DEVICE(0x15B0) },
/* Motorola VoiceSURFR 56K Internal PnP */
{ ISAPNP_VENDOR('M', 'O', 'T'), ISAPNP_DEVICE(0x15F0) },
/* Com 1 */
/* Deskline K56 Phone System PnP */
{ ISAPNP_VENDOR('M', 'V', 'X'), ISAPNP_DEVICE(0x00A1) },
/* PC Rider K56 Phone System PnP */
{ ISAPNP_VENDOR('M', 'V', 'X'), ISAPNP_DEVICE(0x00F2) },
/* Pace 56 Voice Internal Plug & Play Modem */
{ ISAPNP_VENDOR('P', 'M', 'C'), ISAPNP_DEVICE(0x2430) },
/* Generic */
/* Generic standard PC COM port */
{ ISAPNP_VENDOR('P', 'N', 'P'), ISAPNP_DEVICE(0x0500) },
/* Generic 16550A-compatible COM port */
{ ISAPNP_VENDOR('P', 'N', 'P'), ISAPNP_DEVICE(0x0501) },
/* Compaq 14400 Modem */
{ ISAPNP_VENDOR('P', 'N', 'P'), ISAPNP_DEVICE(0xC000) },
/* Compaq 2400/9600 Modem */
{ ISAPNP_VENDOR('P', 'N', 'P'), ISAPNP_DEVICE(0xC001) },
/* Dial-Up Networking Serial Cable between 2 PCs */
{ ISAPNP_VENDOR('P', 'N', 'P'), ISAPNP_DEVICE(0xC031) },
/* Dial-Up Networking Parallel Cable between 2 PCs */
{ ISAPNP_VENDOR('P', 'N', 'P'), ISAPNP_DEVICE(0xC032) },
/* Standard 9600 bps Modem */
{ ISAPNP_VENDOR('P', 'N', 'P'), ISAPNP_DEVICE(0xC100) },
/* Standard 14400 bps Modem */
{ ISAPNP_VENDOR('P', 'N', 'P'), ISAPNP_DEVICE(0xC101) },
/* Standard 28800 bps Modem*/
{ ISAPNP_VENDOR('P', 'N', 'P'), ISAPNP_DEVICE(0xC102) },
/* Standard Modem*/
{ ISAPNP_VENDOR('P', 'N', 'P'), ISAPNP_DEVICE(0xC103) },
/* Standard 9600 bps Modem*/
{ ISAPNP_VENDOR('P', 'N', 'P'), ISAPNP_DEVICE(0xC104) },
/* Standard 14400 bps Modem*/
{ ISAPNP_VENDOR('P', 'N', 'P'), ISAPNP_DEVICE(0xC105) },
/* Standard 28800 bps Modem*/
{ ISAPNP_VENDOR('P', 'N', 'P'), ISAPNP_DEVICE(0xC106) },
/* Standard Modem */
{ ISAPNP_VENDOR('P', 'N', 'P'), ISAPNP_DEVICE(0xC107) },
/* Standard 9600 bps Modem */
{ ISAPNP_VENDOR('P', 'N', 'P'), ISAPNP_DEVICE(0xC108) },
/* Standard 14400 bps Modem */
{ ISAPNP_VENDOR('P', 'N', 'P'), ISAPNP_DEVICE(0xC109) },
/* Standard 28800 bps Modem */
{ ISAPNP_VENDOR('P', 'N', 'P'), ISAPNP_DEVICE(0xC10A) },
/* Standard Modem */
{ ISAPNP_VENDOR('P', 'N', 'P'), ISAPNP_DEVICE(0xC10B) },
/* Standard 9600 bps Modem */
{ ISAPNP_VENDOR('P', 'N', 'P'), ISAPNP_DEVICE(0xC10C) },
/* Standard 14400 bps Modem */
{ ISAPNP_VENDOR('P', 'N', 'P'), ISAPNP_DEVICE(0xC10D) },
/* Standard 28800 bps Modem */
{ ISAPNP_VENDOR('P', 'N', 'P'), ISAPNP_DEVICE(0xC10E) },
/* Standard Modem */
{ ISAPNP_VENDOR('P', 'N', 'P'), ISAPNP_DEVICE(0xC10F) },
/* Standard PCMCIA Card Modem */
{ ISAPNP_VENDOR('P', 'N', 'P'), ISAPNP_DEVICE(0x2000) },
/* Rockwell */
/* Modular Technology */
/* Rockwell 33.6 DPF Internal PnP */
/* Modular Technology 33.6 Internal PnP */
{ ISAPNP_VENDOR('R', 'O', 'K'), ISAPNP_DEVICE(0x0030) },
/* Kortex International */
/* KORTEX 14400 Externe PnP */
{ ISAPNP_VENDOR('R', 'O', 'K'), ISAPNP_DEVICE(0x0100) },
/* Viking Components, Inc */
/* Viking 28.8 INTERNAL Fax+Data+Voice PnP */
{ ISAPNP_VENDOR('R', 'O', 'K'), ISAPNP_DEVICE(0x4920) },
/* Rockwell */
/* British Telecom */
/* Modular Technology */
/* Rockwell 33.6 DPF External PnP */
/* BT Prologue 33.6 External PnP */
/* Modular Technology 33.6 External PnP */
{ ISAPNP_VENDOR('R', 'S', 'S'), ISAPNP_DEVICE(0x00A0) },
/* Viking 56K FAX INT */
{ ISAPNP_VENDOR('R', 'S', 'S'), ISAPNP_DEVICE(0x0262) },
/* SupraExpress 28.8 Data/Fax PnP modem */
{ ISAPNP_VENDOR('S', 'U', 'P'), ISAPNP_DEVICE(0x1310) },
/* SupraExpress 33.6 Data/Fax PnP modem */
{ ISAPNP_VENDOR('S', 'U', 'P'), ISAPNP_DEVICE(0x1421) },
/* SupraExpress 33.6 Data/Fax PnP modem */
{ ISAPNP_VENDOR('S', 'U', 'P'), ISAPNP_DEVICE(0x1590) },
/* SupraExpress 33.6 Data/Fax PnP modem */
{ ISAPNP_VENDOR('S', 'U', 'P'), ISAPNP_DEVICE(0x1760) },
/* Phoebe Micro */
/* Phoebe Micro 33.6 Data Fax 1433VQH Plug & Play */
{ ISAPNP_VENDOR('T', 'E', 'X'), ISAPNP_DEVICE(0x0011) },
/* Archtek America Corp. */
/* Archtek SmartLink Modem 3334BT Plug & Play */
{ ISAPNP_VENDOR('U', 'A', 'C'), ISAPNP_DEVICE(0x000F) },
/* 3Com Corp. */
/* Gateway Telepath IIvi 33.6 */
{ ISAPNP_VENDOR('U', 'S', 'R'), ISAPNP_DEVICE(0x0000) },
/* Sportster Vi 14.4 PnP FAX Voicemail */
{ ISAPNP_VENDOR('U', 'S', 'R'), ISAPNP_DEVICE(0x0004) },
/* U.S. Robotics 33.6K Voice INT PnP */
{ ISAPNP_VENDOR('U', 'S', 'R'), ISAPNP_DEVICE(0x0006) },
/* U.S. Robotics 33.6K Voice EXT PnP */
{ ISAPNP_VENDOR('U', 'S', 'R'), ISAPNP_DEVICE(0x0007) },
/* U.S. Robotics 33.6K Voice INT PnP */
{ ISAPNP_VENDOR('U', 'S', 'R'), ISAPNP_DEVICE(0x2002) },
/* U.S. Robotics 56K Voice INT PnP */
{ ISAPNP_VENDOR('U', 'S', 'R'), ISAPNP_DEVICE(0x2070) },
/* U.S. Robotics 56K Voice EXT PnP */
{ ISAPNP_VENDOR('U', 'S', 'R'), ISAPNP_DEVICE(0x2080) },
/* U.S. Robotics 56K FAX INT */
{ ISAPNP_VENDOR('U', 'S', 'R'), ISAPNP_DEVICE(0x3031) },
/* U.S. Robotics 56K Voice INT PnP */
{ ISAPNP_VENDOR('U', 'S', 'R'), ISAPNP_DEVICE(0x3070) },
/* U.S. Robotics 56K Voice EXT PnP */
{ ISAPNP_VENDOR('U', 'S', 'R'), ISAPNP_DEVICE(0x3080) },
/* U.S. Robotics 56K Voice INT PnP */
{ ISAPNP_VENDOR('U', 'S', 'R'), ISAPNP_DEVICE(0x3090) },
/* U.S. Robotics 56K Message */
{ ISAPNP_VENDOR('U', 'S', 'R'), ISAPNP_DEVICE(0x9100) },
/* U.S. Robotics 56K FAX EXT PnP*/
{ ISAPNP_VENDOR('U', 'S', 'R'), ISAPNP_DEVICE(0x9160) },
/* U.S. Robotics 56K FAX INT PnP*/
{ ISAPNP_VENDOR('U', 'S', 'R'), ISAPNP_DEVICE(0x9170) },
/* U.S. Robotics 56K Voice EXT PnP*/
{ ISAPNP_VENDOR('U', 'S', 'R'), ISAPNP_DEVICE(0x9180) },
/* U.S. Robotics 56K Voice INT PnP*/
{ ISAPNP_VENDOR('U', 'S', 'R'), ISAPNP_DEVICE(0x9190) },
{ 0, }
};
static void inline avoid_irq_share(struct pci_dev *dev)
{
int i, map = 0x1FF8;
struct serial_state *state = rs_table;
struct isapnp_irq *irq;
struct isapnp_resources *res = dev->sysdata;
for (i = 0; i < NR_PORTS; i++) {
if (state->type != PORT_UNKNOWN)
clear_bit(state->irq, &map);
state++;
}
for ( ; res; res = res->alt)
for(irq = res->irq; irq; irq = irq->next)
irq->map = map;
}
static char *modem_names[] __devinitdata = {
"MODEM", "Modem", "modem", "FAX", "Fax", "fax",
"56K", "56k", "K56", "33.6", "28.8", "14.4",
"33,600", "28,800", "14,400", "33.600", "28.800", "14.400",
"33600", "28800", "14400", "V.90", "V.34", "V.32", 0
};
static int __devinit check_name(char *name)
{
char **tmp = modem_names;
while (*tmp) {
if (strstr(name, *tmp))
return 1;
tmp++;
}
return 0;
}
static int inline check_compatible_id(struct pci_dev *dev)
{
int i;
for (i = 0; i < DEVICE_COUNT_COMPATIBLE; i++)
if ((dev->vendor_compatible[i] ==
ISAPNP_VENDOR('P', 'N', 'P')) &&
(swab16(dev->device_compatible[i]) >= 0xc000) &&
(swab16(dev->device_compatible[i]) <= 0xdfff))
return 0;
return 1;
}
/*
* Given a complete unknown ISA PnP device, try to use some heuristics to
* detect modems. Currently use such heuristic set:
* - dev->name or dev->bus->name must contain "modem" substring;
* - device must have only one IO region (8 byte long) with base adress
* 0x2e8, 0x3e8, 0x2f8 or 0x3f8.
*
* Such detection looks very ugly, but can detect at least some of numerous
* ISA PnP modems, alternatively we must hardcode all modems in pnp_devices[]
* table.
*/
static int _INLINE_ serial_pnp_guess_board(struct pci_dev *dev,
struct pci_board *board)
{
struct isapnp_resources *res = (struct isapnp_resources *)dev->sysdata;
struct isapnp_resources *resa;
if (!(check_name(dev->name) || check_name(dev->bus->name)) &&
!(check_compatible_id(dev)))
return 1;
if (!res || res->next)
return 1;
for (resa = res->alt; resa; resa = resa->alt) {
struct isapnp_port *port;
for (port = res->port; port; port = port->next)
if ((port->size == 8) &&
((port->min == 0x2f8) ||
(port->min == 0x3f8) ||
(port->min == 0x2e8) ||
(port->min == 0x3e8)))
return 0;
}
return 1;
}
static void __devinit probe_serial_pnp(void)
{
struct pci_dev *dev = NULL;
struct pnp_board *pnp_board;
struct pci_board board;
#ifdef SERIAL_DEBUG_PNP
printk("Entered probe_serial_pnp()n");
#endif
if (!isapnp_present()) {
#ifdef SERIAL_DEBUG_PNP
printk("Leaving probe_serial_pnp() (no isapnp)n");
#endif
return;
}
isapnp_for_each_dev(dev) {
if (dev->active)
continue;
memset(&board, 0, sizeof(board));
board.flags = SPCI_FL_BASE0 | SPCI_FL_PNPDEFAULT;
board.num_ports = 1;
board.base_baud = 115200;
for (pnp_board = pnp_devices; pnp_board->vendor; pnp_board++)
if ((dev->vendor == pnp_board->vendor) &&
(dev->device == pnp_board->device))
break;
if (pnp_board->vendor) {
/* Special case that's more efficient to hardcode */
if ((pnp_board->vendor == ISAPNP_VENDOR('A', 'K', 'Y') &&
pnp_board->device == ISAPNP_DEVICE(0x1021)))
board.flags |= SPCI_FL_NO_SHIRQ;
} else {
if (serial_pnp_guess_board(dev, &board))
continue;
}
if (board.flags & SPCI_FL_NO_SHIRQ)
avoid_irq_share(dev);
start_pci_pnp_board(dev, &board);
}
#ifdef SERIAL_DEBUG_PNP
printk("Leaving probe_serial_pnp() (probe finished)n");
#endif
return;
}
#endif /* ENABLE_SERIAL_PNP */
/*
* The serial driver boot-time initialization code!
*/
static int __init rs_init(void)
{
int i;
struct serial_state * state;
init_bh(SERIAL_BH, do_serial_bh);
init_timer(&serial_timer);
serial_timer.function = rs_timer;
mod_timer(&serial_timer, jiffies + RS_STROBE_TIME);
for (i = 0; i < NR_IRQS; i++) {
IRQ_ports[i] = 0;
IRQ_timeout[i] = 0;
#ifdef CONFIG_SERIAL_MULTIPORT
memset(&rs_multiport[i], 0,
sizeof(struct rs_multiport_struct));
#endif
}
#ifdef CONFIG_SERIAL_CONSOLE
/*
* The interrupt of the serial console port
* can't be shared.
*/
if (sercons.flags & CON_CONSDEV) {
for(i = 0; i < NR_PORTS; i++)
if (i != sercons.index &&
rs_table[i].irq == rs_table[sercons.index].irq)
rs_table[i].irq = 0;
}
#endif
show_serial_version();
/* Initialize the tty_driver structure */
memset(&serial_driver, 0, sizeof(struct tty_driver));
serial_driver.magic = TTY_DRIVER_MAGIC;
#if (LINUX_VERSION_CODE > 0x20100)
serial_driver.driver_name = "serial";
#endif
#if (LINUX_VERSION_CODE > 0x2032D && defined(CONFIG_DEVFS_FS))
serial_driver.name = "tts/%d";
#else
serial_driver.name = "ttyS";
#endif
serial_driver.major = TTY_MAJOR;
serial_driver.minor_start = 64 + SERIAL_DEV_OFFSET;
serial_driver.name_base = SERIAL_DEV_OFFSET;
serial_driver.num = NR_PORTS;
serial_driver.type = TTY_DRIVER_TYPE_SERIAL;
serial_driver.subtype = SERIAL_TYPE_NORMAL;
serial_driver.init_termios = tty_std_termios;
serial_driver.init_termios.c_cflag =
B9600 | CS8 | CREAD | HUPCL | CLOCAL;
serial_driver.flags = TTY_DRIVER_REAL_RAW | TTY_DRIVER_NO_DEVFS;
serial_driver.refcount = &serial_refcount;
serial_driver.table = serial_table;
serial_driver.termios = serial_termios;
serial_driver.termios_locked = serial_termios_locked;
serial_driver.open = rs_open;
serial_driver.close = rs_close;
serial_driver.write = rs_write;
serial_driver.put_char = rs_put_char;
serial_driver.flush_chars = rs_flush_chars;
serial_driver.write_room = rs_write_room;
serial_driver.chars_in_buffer = rs_chars_in_buffer;
serial_driver.flush_buffer = rs_flush_buffer;
serial_driver.ioctl = rs_ioctl;
serial_driver.throttle = rs_throttle;
serial_driver.unthrottle = rs_unthrottle;
serial_driver.set_termios = rs_set_termios;
serial_driver.stop = rs_stop;
serial_driver.start = rs_start;
serial_driver.hangup = rs_hangup;
#if (LINUX_VERSION_CODE >= 131394) /* Linux 2.1.66 */
serial_driver.break_ctl = rs_break;
#endif
#if (LINUX_VERSION_CODE >= 131343)
serial_driver.send_xchar = rs_send_xchar;
serial_driver.wait_until_sent = rs_wait_until_sent;
serial_driver.read_proc = rs_read_proc;
#endif
/*
* The callout device is just like normal device except for
* major number and the subtype code.
*/
callout_driver = serial_driver;
#if (LINUX_VERSION_CODE > 0x2032D && defined(CONFIG_DEVFS_FS))
callout_driver.name = "cua/%d";
#else
callout_driver.name = "cua";
#endif
callout_driver.major = TTYAUX_MAJOR;
callout_driver.subtype = SERIAL_TYPE_CALLOUT;
#if (LINUX_VERSION_CODE >= 131343)
callout_driver.read_proc = 0;
callout_driver.proc_entry = 0;
#endif
if (tty_register_driver(&serial_driver))
panic("Couldn't register serial drivern");
if (tty_register_driver(&callout_driver))
panic("Couldn't register callout drivern");
for (i = 0, state = rs_table; i < NR_PORTS; i++,state++) {
state->magic = SSTATE_MAGIC;
state->line = i;
state->custom_divisor = 0;
state->close_delay = 5*HZ/10;
state->closing_wait = 30*HZ;
state->callout_termios = callout_driver.init_termios;
state->normal_termios = serial_driver.init_termios;
state->icount.cts = state->icount.dsr =
state->icount.rng = state->icount.dcd = 0;
state->icount.rx = state->icount.tx = 0;
state->icount.frame = state->icount.parity = 0;
state->icount.overrun = state->icount.brk = 0;
state->irq = irq_cannonicalize(state->irq);
if (state->hub6)
state->io_type = SERIAL_IO_HUB6;
if (state->port && check_region(state->port,8)) {
state->type = PORT_UNKNOWN;
continue;
}
#ifdef CONFIG_MCA
if ((state->flags & ASYNC_BOOT_ONLYMCA) && !MCA_bus)
continue;
#endif
if (state->flags & ASYNC_BOOT_AUTOCONF) {
state->type = PORT_UNKNOWN;
autoconfig(state);
}
}
for (i = 0, state = rs_table; i < NR_PORTS; i++,state++) {
if (state->type == PORT_UNKNOWN)
continue;
if ( (state->flags & ASYNC_BOOT_AUTOCONF)
&& (state->flags & ASYNC_AUTO_IRQ)
&& (state->port != 0 || state->iomem_base != 0))
state->irq = detect_uart_irq(state);
if (state->io_type == SERIAL_IO_MEM) {
printk(KERN_INFO"ttyS%02d%s at 0x%px (irq = %d) is a %sn",
state->line + SERIAL_DEV_OFFSET,
(state->flags & ASYNC_FOURPORT) ? " FourPort" : "",
state->iomem_base, state->irq,
uart_config[state->type].name);
}
else {
printk(KERN_INFO "ttyS%02d%s at 0x%04lx (irq = %d) is a %sn",
state->line + SERIAL_DEV_OFFSET,
(state->flags & ASYNC_FOURPORT) ? " FourPort" : "",
state->port, state->irq,
uart_config[state->type].name);
}
tty_register_devfs(&serial_driver, 0,
serial_driver.minor_start + state->line);
tty_register_devfs(&callout_driver, 0,
callout_driver.minor_start + state->line);
}
#ifdef ENABLE_SERIAL_PCI
probe_serial_pci();
#endif
#ifdef ENABLE_SERIAL_PNP
probe_serial_pnp();
#endif
return 0;
}
/*
* This is for use by architectures that know their serial console
* attributes only at run time. Not to be invoked after rs_init().
*/
int __init early_serial_setup(struct serial_struct *req)
{
int i = req->line;
if (i >= NR_IRQS)
return(-ENOENT);
rs_table[i].magic = 0;
rs_table[i].baud_base = req->baud_base;
rs_table[i].port = req->port;
if (HIGH_BITS_OFFSET)
rs_table[i].port += (unsigned long) req->port_high <<
HIGH_BITS_OFFSET;
rs_table[i].irq = req->irq;
rs_table[i].flags = req->flags;
rs_table[i].close_delay = req->close_delay;
rs_table[i].io_type = req->io_type;
rs_table[i].hub6 = req->hub6;
rs_table[i].iomem_base = req->iomem_base;
rs_table[i].iomem_reg_shift = req->iomem_reg_shift;
rs_table[i].type = req->type;
rs_table[i].xmit_fifo_size = req->xmit_fifo_size;
rs_table[i].custom_divisor = req->custom_divisor;
rs_table[i].closing_wait = req->closing_wait;
return(0);
}
/*
* register_serial and unregister_serial allows for 16x50 serial ports to be
* configured at run-time, to support PCMCIA modems.
*/
/**
* register_serial - configure a 16x50 serial port at runtime
* @req: request structure
*
* Configure the serial port specified by the request. If the
* port exists and is in use an error is returned. If the port
* is not currently in the table it is added.
*
* The port is then probed and if neccessary the IRQ is autodetected
* If this fails an error is returned.
*
* On success the port is ready to use and the line number is returned.
*/
int register_serial(struct serial_struct *req)
{
int i;
unsigned long flags;
struct serial_state *state;
struct async_struct *info;
unsigned long port;
port = req->port;
if (HIGH_BITS_OFFSET)
port += (unsigned long) req->port_high << HIGH_BITS_OFFSET;
save_flags(flags); cli();
for (i = 0; i < NR_PORTS; i++) {
if ((rs_table[i].port == port) &&
(rs_table[i].iomem_base == req->iomem_base))
break;
}
#ifdef __i386__
if (i == NR_PORTS) {
for (i = 4; i < NR_PORTS; i++)
if ((rs_table[i].type == PORT_UNKNOWN) &&
(rs_table[i].count == 0))
break;
}
#endif
if (i == NR_PORTS) {
for (i = 0; i < NR_PORTS; i++)
if ((rs_table[i].type == PORT_UNKNOWN) &&
(rs_table[i].count == 0))
break;
}
if (i == NR_PORTS) {
restore_flags(flags);
return -1;
}
state = &rs_table[i];
if (rs_table[i].count) {
restore_flags(flags);
printk("Couldn't configure serial #%d (port=%ld,irq=%d): "
"device already openn", i, port, req->irq);
return -1;
}
state->irq = req->irq;
state->port = port;
state->flags = req->flags;
state->io_type = req->io_type;
state->iomem_base = req->iomem_base;
state->iomem_reg_shift = req->iomem_reg_shift;
if (req->baud_base)
state->baud_base = req->baud_base;
if ((info = state->info) != NULL) {
info->port = port;
info->flags = req->flags;
info->io_type = req->io_type;
info->iomem_base = req->iomem_base;
info->iomem_reg_shift = req->iomem_reg_shift;
}
autoconfig(state);
if (state->type == PORT_UNKNOWN) {
restore_flags(flags);
printk("register_serial(): autoconfig failedn");
return -1;
}
restore_flags(flags);
if ((state->flags & ASYNC_AUTO_IRQ) && CONFIGURED_SERIAL_PORT(state))
state->irq = detect_uart_irq(state);
printk(KERN_INFO "ttyS%02d at %s 0x%04lx (irq = %d) is a %sn",
state->line + SERIAL_DEV_OFFSET,
state->iomem_base ? "iomem" : "port",
state->iomem_base ? (unsigned long)state->iomem_base :
state->port, state->irq, uart_config[state->type].name);
tty_register_devfs(&serial_driver, 0,
serial_driver.minor_start + state->line);
tty_register_devfs(&callout_driver, 0,
callout_driver.minor_start + state->line);
return state->line + SERIAL_DEV_OFFSET;
}
/**
* unregister_serial - deconfigure a 16x50 serial port
* @line: line to deconfigure
*
* The port specified is deconfigured and its resources are freed. Any
* user of the port is disconnected as if carrier was dropped. Line is
* the port number returned by register_serial().
*/
void unregister_serial(int line)
{
unsigned long flags;
struct serial_state *state = &rs_table[line];
save_flags(flags); cli();
if (state->info && state->info->tty)
tty_hangup(state->info->tty);
state->type = PORT_UNKNOWN;
printk(KERN_INFO "tty%02d unloadedn", state->line);
/* These will be hidden, because they are devices that will no longer
* be available to the system. (ie, PCMCIA modems, once ejected)
*/
tty_unregister_devfs(&serial_driver,
serial_driver.minor_start + state->line);
tty_unregister_devfs(&callout_driver,
callout_driver.minor_start + state->line);
restore_flags(flags);
}
static void __exit rs_fini(void)
{
unsigned long flags;
int e1, e2;
int i;
struct async_struct *info;
/* printk("Unloading %s: version %sn", serial_name, serial_version); */
del_timer_sync(&serial_timer);
save_flags(flags); cli();
remove_bh(SERIAL_BH);
if ((e1 = tty_unregister_driver(&serial_driver)))
printk("serial: failed to unregister serial driver (%d)n",
e1);
if ((e2 = tty_unregister_driver(&callout_driver)))
printk("serial: failed to unregister callout driver (%d)n",
e2);
restore_flags(flags);
for (i = 0; i < NR_PORTS; i++) {
if ((info = rs_table[i].info)) {
rs_table[i].info = NULL;
kfree(info);
}
if ((rs_table[i].type != PORT_UNKNOWN) && rs_table[i].port) {
#ifdef CONFIG_SERIAL_RSA
if (rs_table[i].type == PORT_RSA)
release_region(rs_table[i].port +
UART_RSA_BASE, 16);
else
#endif
release_region(rs_table[i].port, 8);
}
#if defined(ENABLE_SERIAL_PCI) || defined(ENABLE_SERIAL_PNP)
if (rs_table[i].iomem_base)
iounmap(rs_table[i].iomem_base);
#endif
}
#if defined(ENABLE_SERIAL_PCI) || defined(ENABLE_SERIAL_PNP)
for (i=0; i < NR_PCI_BOARDS; i++) {
struct pci_board_inst *brd = &serial_pci_board[i];
if (serial_pci_board[i].dev == 0)
continue;
if (brd->board.init_fn)
(brd->board.init_fn)(brd->dev, &brd->board, 0);
if (DEACTIVATE_FUNC(brd->dev))
(DEACTIVATE_FUNC(brd->dev))(brd->dev);
}
#endif
if (tmp_buf) {
unsigned long pg = (unsigned long) tmp_buf;
tmp_buf = NULL;
free_page(pg);
}
#ifdef ENABLE_SERIAL_PCI
if (serial_pci_driver.name[0])
pci_unregister_driver (&serial_pci_driver);
#endif
}
module_init(rs_init);
module_exit(rs_fini);
MODULE_DESCRIPTION("Standard/generic (dumb) serial driver");
MODULE_AUTHOR("Theodore Ts'o <tytso@mit.edu>");
MODULE_LICENSE("GPL");
/*
* ------------------------------------------------------------
* Serial console driver
* ------------------------------------------------------------
*/
#ifdef CONFIG_SERIAL_CONSOLE
#define BOTH_EMPTY (UART_LSR_TEMT | UART_LSR_THRE)
static struct async_struct async_sercons;
/*
* Wait for transmitter & holding register to empty
*/
static inline void wait_for_xmitr(struct async_struct *info)
{
unsigned int status, tmout = 1000000;
do {
status = serial_in(info, UART_LSR);
if (status & UART_LSR_BI)
lsr_break_flag = UART_LSR_BI;
if (--tmout == 0)
break;
} while((status & BOTH_EMPTY) != BOTH_EMPTY);
/* Wait for flow control if necessary */
if (info->flags & ASYNC_CONS_FLOW) {
tmout = 1000000;
while (--tmout &&
((serial_in(info, UART_MSR) & UART_MSR_CTS) == 0));
}
}
/*
* Print a string to the serial port trying not to disturb
* any possible real use of the port...
*
* The console must be locked when we get here.
*/
static void serial_console_write(struct console *co, const char *s,
unsigned count)
{
static struct async_struct *info = &async_sercons;
int ier;
unsigned i;
/*
* First save the IER then disable the interrupts
*/
ier = serial_in(info, UART_IER);
if (pxa_port(info->state->type))
serial_out(info, UART_IER, UART_IER_UUE);
else
serial_out(info, UART_IER, 0);
/*
* Now, do each character
*/
for (i = 0; i < count; i++, s++) {
wait_for_xmitr(info);
/*
* Send the character out.
* If a LF, also do CR...
*/
serial_out(info, UART_TX, *s);
if (*s == 10) {
wait_for_xmitr(info);
serial_out(info, UART_TX, 13);
}
}
/*
* Finally, Wait for transmitter & holding register to empty
* and restore the IER
*/
wait_for_xmitr(info);
serial_out(info, UART_IER, ier);
}
/*
* Receive character from the serial port
*/
static int serial_console_wait_key(struct console *co)
{
static struct async_struct *info;
int ier, c;
info = &async_sercons;
/*
* First save the IER then disable the interrupts so
* that the real driver for the port does not get the
* character.
*/
ier = serial_in(info, UART_IER);
if (pxa_port(info->state->type))
serial_out(info, UART_IER, UART_IER_UUE);
else
serial_out(info, UART_IER, 0);
while ((serial_in(info, UART_LSR) & UART_LSR_DR) == 0);
c = serial_in(info, UART_RX);
/*
* Restore the interrupts
*/
serial_out(info, UART_IER, ier);
return c;
}
static kdev_t serial_console_device(struct console *c)
{
return MKDEV(TTY_MAJOR, 64 + c->index);
}
/*
* Setup initial baud/bits/parity/flow control. We do two things here:
* - construct a cflag setting for the first rs_open()
* - initialize the serial port
* Return non-zero if we didn't find a serial port.
*/
static int __init serial_console_setup(struct console *co, char *options)
{
static struct async_struct *info;
struct serial_state *state;
unsigned cval;
int baud = 9600;
int bits = 8;
int parity = 'n';
int doflow = 0;
int cflag = CREAD | HUPCL | CLOCAL;
int quot = 0;
char *s;
if (options) {
baud = simple_strtoul(options, NULL, 10);
s = options;
while(*s >= '0' && *s <= '9')
s++;
if (*s) parity = *s++;
if (*s) bits = *s++ - '0';
if (*s) doflow = (*s++ == 'r');
}
/*
* Now construct a cflag setting.
*/
switch(baud) {
case 1200:
cflag |= B1200;
break;
case 2400:
cflag |= B2400;
break;
case 4800:
cflag |= B4800;
break;
case 19200:
cflag |= B19200;
break;
case 38400:
cflag |= B38400;
break;
case 57600:
cflag |= B57600;
break;
case 115200:
cflag |= B115200;
break;
case 9600:
default:
cflag |= B9600;
/*
* Set this to a sane value to prevent a divide error
*/
baud = 9600;
break;
}
switch(bits) {
case 7:
cflag |= CS7;
break;
default:
case 8:
cflag |= CS8;
break;
}
switch(parity) {
case 'o': case 'O':
cflag |= PARODD;
break;
case 'e': case 'E':
cflag |= PARENB;
break;
}
co->cflag = cflag;
/*
* Divisor, bytesize and parity
*/
state = rs_table + co->index;
if (doflow)
state->flags |= ASYNC_CONS_FLOW;
info = &async_sercons;
info->magic = SERIAL_MAGIC;
info->state = state;
info->port = state->port;
info->flags = state->flags;
#ifdef CONFIG_HUB6
info->hub6 = state->hub6;
#endif
info->io_type = state->io_type;
info->iomem_base = state->iomem_base;
info->iomem_reg_shift = state->iomem_reg_shift;
quot = state->baud_base / baud;
cval = cflag & (CSIZE | CSTOPB);
#if defined(__powerpc__) || defined(__alpha__)
cval >>= 8;
#else /* !__powerpc__ && !__alpha__ */
cval >>= 4;
#endif /* !__powerpc__ && !__alpha__ */
if (cflag & PARENB)
cval |= UART_LCR_PARITY;
if (!(cflag & PARODD))
cval |= UART_LCR_EPAR;
/*
* Disable UART interrupts, set DTR and RTS high
* and set speed.
*/
serial_out(info, UART_LCR, cval | UART_LCR_DLAB); /* set DLAB */
serial_out(info, UART_DLL, quot & 0xff); /* LS of divisor */
serial_out(info, UART_DLM, quot >> 8); /* MS of divisor */
serial_out(info, UART_LCR, cval); /* reset DLAB */
if (pxa_port(info->state->type))
serial_out(info, UART_IER, UART_IER_UUE);
else
serial_out(info, UART_IER, 0);
serial_out(info, UART_MCR, UART_MCR_DTR | UART_MCR_RTS);
/*
* If we read 0xff from the LSR, there is no UART here.
*/
if (serial_in(info, UART_LSR) == 0xff)
return -1;
return 0;
}
static struct console sercons = {
name: "ttyS",
write: serial_console_write,
device: serial_console_device,
wait_key: serial_console_wait_key,
setup: serial_console_setup,
flags: CON_PRINTBUFFER,
index: -1,
};
/*
* Register console.
*/
void __init serial_console_init(void)
{
register_console(&sercons);
}
#endif
/*
Local variables:
compile-command: "gcc -D__KERNEL__ -I../../include -Wall -Wstrict-prototypes -O2 -fomit-frame-pointer -fno-strict-aliasing -pipe -fno-strength-reduce -march=i586 -DMODULE -DMODVERSIONS -include ../../include/linux/modversions.h -DEXPORT_SYMTAB -c serial.c"
End:
*/