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D14.H
资源名称：USB_2.0.rar　[点击查看]
上传用户：ids068
上传日期：2013-04-04
资源大小：639k
文件大小：9k
源码类别：

USB编程

开发平台：

C/C++

D14.H：源码内容
  1. /****************************************Copyright (c)**************************************************
  2. **                               广州周立功单片机发展有限公司
  3. **                                     研    究    所
  4. **                                 http://www.zlgmcu.com
  5. **--------------当前版本修订------------------------------------------------------------------------------
  6. ** 修改人: 刘英斌
  7. ** 日　期:2003-03-13
  8. ** 描　述:ISP1581 V1.0
  9. **------------------------------------------------------------------------------------------------------
  10. ********************************************************************************************************/
  12. typedef union ADDRESS_REG
  13. {
  15. struct ADDRESS_BITS
  16. {
  18. UC DEVADDR : 7;
  19. UC DEVEN : 1;
  21. }BITS;
  23. UC VALUE;
  25. }ADDRESS_REG;
  28. typedef union USB_MODE
  29. {
  30. struct USB_MODE_BITS
  31. {
  34. UC SOFTCT : 1;
  35. UC PWROFF : 1;
  36. UC WKUPC : 1;
  37. UC GLINTE : 1;
  38. UC SFRESET : 1;
  39. UC GOSUSP : 1;
  40. UC SNDRSU : 1;
  41. UC DISGLBL : 1;
  43. }BITS;
  45. UC VALUE;
  47. }USB_MODE;
  49. typedef union INT_CONFIG
  50. {
  52. struct INT_CONFIG_BITS
  53. {
  55. UC INTPOL : 1;
  56. UC INTLVL : 1;
  57. UC DDBGMODOUT : 2;
  58. UC DDBGMODIN : 2;
  59. UC CDBGMOD : 2;
  61. }BITS;
  63. UC VALUE;
  65. }INT_CONFIG;
  68. typedef union INT_ENABLE
  69. {
  71. struct INT_ENABLE_BITS
  72. {
  74. UC IERST :  1;
  75. UC IESOF : 1;
  76. UC IEPSOF : 1;
  77. UC IESUSP : 1;
  78. UC IEHS_STA : 1;
  79. UC IEDMA : 1;
  80. UC RESERVED3 : 1;
  82. UC IEP0SETUP : 1;
  83. UC RESERVED2 :  1;
  84. UC IEP0RX : 1;
  85. UC IEP0TX : 1;
  86. UC IEP1RX : 1;
  87. UC IEP1TX : 1;
  88. UC IEP2RX : 1;
  89. UC IEP2TX : 1;
  91. UC IEP3RX : 1;
  92. UC IEP3TX : 1;
  93. UC IEP4RX : 1;
  94. UC IEP4TX : 1;
  95. UC IEP5RX : 1;
  96. UC IEP5TX : 1;
  97. UC IEP6RX : 1;
  98. UC IEP6TX : 1;
  100. UC IEP7RX : 1;
  101. UC IEP7TX : 1;
  102. UC RESERVED1 : 6;
  104. }BITS;
  106. UL VALUE;
  108. }INT_ENABLE;
  112. typedef union INTERRUPT_STATUS
  113. {
  114. struct INTERRUPT_STATUS_BITS
  115. {
  117. UC RESET :  1;
  118. UC SOF : 1;
  119. UC PSOF : 1;
  120. UC SUSP : 1;
  121. UC RESUME : 1;
  122. UC HS_STAT : 1;
  123. UC DMA : 1;
  124. UC RESERVED3 : 1;
  126. UC EP0SETUP : 1;
  127. UC RESERVED2 :  1;
  128. UC EP0RX : 1;
  129. UC EP0TX : 1;
  130. UC EP1RX : 1;
  131. UC EP1TX : 1;
  132. UC EP2RX : 1;
  133. UC EP2TX : 1;
  135. UC EP3RX : 1;
  136. UC EP3TX : 1;
  137. UC EP4RX : 1;
  138. UC EP4TX : 1;
  139. UC EP5RX : 1;
  140. UC EP5TX : 1;
  141. UC EP6RX : 1;
  142. UC EP6TX : 1;
  144. UC EP7RX : 1;
  145. UC EP7TX : 1;
  146. UC RESERVED1 : 6;
  148. }BITS;
  150. UL VALUE;
  152. }INTERRUPT_STATUS;
  154. typedef union ENDPT_MAXSIZE
  155. {
  156. struct ENDPT_MAXSIZE_BITS
  157. {
  159. UC FFOSZ7_0 : 8;
  160. UC FFOSZ10_8 : 3;
  161. UC NTRANS : 2;
  162. UC RESERVED2 : 3;
  164. }BITS;
  166. UI VALUE;
  168. }ENDPT_MAXSIZE;
  171. typedef union ENDPT_INDEX
  172. {
  173. struct ENDPT_INDEX_BITS
  174. {
  176. UC DIR : 1;
  177. UC ENDPIDX : 4;
  178. UC EP0SETUP : 1;
  179. UC RESERVED : 2;
  181. }BITS;
  183. UC VALUE;
  185. }ENDPT_INDEX;
  188. typedef union CONTROL
  189. {
  190. struct CONTROL_BITS
  191. {
  193. UC STALL : 1;
  194. UC STATUS : 1;
  195. UC RESERVED2 : 1;
  196. UC VENDP : 1;
  197. UC CLBUF : 1;
  198. UC RESERVED1 : 3;
  200. }BITS;
  202. UC VALUE;
  204. }CONTROL;
  207. typedef union ENDPT_TYPE
  208. {
  209. struct ENDPT_TYPE_BITS
  210. {
  212. UC ENDPTYP : 2;
  213. UC DBLBUF :  1;
  214. UC ENABLE : 1;
  215. UC ZERO_PKT_DIS: 1;
  216. UC RESERVED1 : 3;
  217. UC RESRVED2 : 8;
  219. }BITS;
  221. UI VALUE;
  223. }ENDPT_TYPE;
  226. typedef union ERROR_CODE
  227. {
  228. struct ERROR_CODE_BITS
  229. {
  231. UC RTOK : 1;
  232. UC ERROR : 4;
  233. UC RESERVED: 1;
  234. UC DATA01 : 1;
  235. UC UNREAD : 1;
  237. }BITS;
  239. UC VALUE;
  241. }ERROR_CODE;
  243. typedef union VALIDSHORT
  244. {
  245. struct VALIDSHORT_BITS
  246. {
  248. UC  RESERVED : 8;
  250. UC OUT0SH : 1;
  251. UC OUT1SH : 1;
  252. UC OUT2SH : 1;
  253. UC OUT3SH : 1;
  254. UC OUT4SH : 1;
  255. UC OUT5SH : 1;
  256. UC OUT6SH : 1;
  257. UC OUT7SH : 1;
  260. }BITS;
  262. UI VALUE;
  264. }VALIDSHORT;
  267. typedef union FRAME_NO
  268. {
  269. struct FRAME_NO_BITS
  270. {
  272. UC SOFL : 8;
  273. UC SOFH : 3;
  274. UC USOF : 3;
  275. UC RESERVED : 2;
  277. }BITS;
  279. UI VALUE;
  281. }FRAME_NO; 
  284. typedef union TESTMODE
  285. {
  286. struct TESTMODE_BITS
  287. {
  289. UC SE0_NAK : 1;
  290. UC JSTATE : 1;
  291. UC KSTATE : 1;
  292. UC PRBS : 1;
  293. UC FORCEFS : 1;
  294. UC LPBK : 1;
  295. UC PHYTEST : 1;
  296. UC FORCEHS : 1;
  298. }BITS;
  300. UC VALUE;
  302. }TESTMODE;
  305. typedef union GDMA_CONFIG
  306. {
  307. struct GDMA_CONFIG_BITS
  308. {
  310. UC WIDTH :  1;
  311. UC RES1 : 1;
  312. UC DMA_MODE : 2;
  313. UC BURST : 3;
  314. UC CNTENA : 1;
  316. }BITS;
  318. UC VALUE;
  320. }GDMA_CONFIG;
  322. typedef union UDMA_CONFIG
  323. {
  325. struct UDMA_CONFIG_BITS
  326. {
  328. UC PIO_MODE : 3;
  329. UC UDMA_MODE : 2;
  330. UC ATA_MODE : 1;
  331. UC IGNORE_IORDY: 1;
  332. UC RES2 : 1;
  334. }BITS;
  336. UC VALUE;
  338. }UDMA_CONFIG;
  340. typedef union DMA_HARDWARE
  341. {
  342. struct DMA_HARDWARE_BITS
  343. {
  345. UC READ_POL : 1;
  346. UC WRITE_POL : 1;
  347. UC DREQ_POL : 1;
  348. UC ACK_POL : 1;
  349. UC MASTER : 1;
  350. UC EOT_POL : 1;
  351. UC ENDIAN : 2;
  354. }BITS;
  356. UC VALUE;
  358. }DMA_HARDWARE;
  362. typedef union DMA_STROBE
  363. {
  365. struct DMA_STROBE_BITS
  366. {
  368. UC DMA_STROBE : 5;
  369. UC RES : 3;
  371. }BITS;
  373. UC VALUE;
  375. }DMA_STROBE;
  380. typedef union DMA_INT
  381. {
  382. struct DMA_INT_BITS
  383. {
  385. UC CMD_AUTO_COMPLETE : 1;
  386. UC INTRQ_PENDING : 1;
  387. UC TASKFILE_READ_COMPLETE : 1;
  388. UC BSY_DRQ_POLL_DONE : 1;
  389. UC START_READ_1F0_RD_FIFO : 1;
  390. UC RD_1F0_FIFO_EMPTY : 1;
  391. UC WR_1F0_FIFO_FULL : 1;
  392. UC WR_1F0_FIFO_EMPTY : 1;
  394. UC DMA_DONE : 1;
  395. UC PENDING_INTRQ : 1;
  396.          UC       INT_EOT                             :        1;
  397.          UC       EXT_EOT                             :        1;
  398. UC RES1 : 4;
  400. }BITS;
  402. UI VALUE;
  404. }DMA_INT;
  406. typedef union DMA_INT_ENABLE
  407. {
  408. struct DMA_INT_ENABLE_BITS
  409. {
  411. UC CMD_AUTO_COMPLETE : 1;
  412. UC INTRQ_PENDING : 1;
  413. UC TASKFILE_READ_COMPLETE : 1;
  414. UC BSY_DRQ_POLL_DONE : 1;
  415. UC START_READ_1F0_RD_FIFO : 1;
  416. UC RD_1F0_FIFO_EMPTY : 1;
  417. UC WR_1F0_FIFO_FULL : 1;
  418. UC WR_1F0_FIFO_EMPTY : 1;
  420. UC DMA_DONE : 1;
  421. UC RES1 : 7;
  423. }BITS;
  425. UI VALUE;
  427. }DMA_INT_ENABLE;
  436. /*
  437. typedef union DMA_ENDPT
  438. {
  440. struct DMA_ENDPT_BITS
  441. {
  443. UC DMADIR : 1;
  444. UC EDPIDX : 3;
  445. UC NOT_USED :  4;
  447. }BITS;
  449. UC VALUE;
  451. }DMA_ENDPT;
  452. */
  454. typedef union DMA_STATE_1
  455. {
  457. struct DMA_STATE_1_BITS
  458. {
  460. UC PIO_SEQ_STATE : 3;
  461. UC PIO_CMD_STATE : 5;
  463. }BITS;
  465. UC VALUE;
  467. }DMA_STATE_1;
  469. typedef union DMA_STATE_2
  470. {
  472. struct DMA_STATE_2_BITS
  473. {
  475. UC RES : 8;
  477. }BITS;
  479. UC VALUE;
  481. }DMA_STATE_2;
  484. typedef struct D14_CNTRL_REG
  485. {
  487. ADDRESS_REG D14_ADDRESS;
  489. UC DUMMY_01;
  490. UC DUMMY_02;
  491. UC DUMMY_03;
  493.   ENDPT_MAXSIZE D14_ENDPT_MAXPKTSIZE;
  495. UC DUMMY_06;
  496. UC DUMMY_07;
  498. ENDPT_TYPE D14_ENDPT_TYPE;
  500. UC DUMMY_0A;
  501. UC DUMMY_0B;
  503. USB_MODE D14_MODE;
  505. UC DUMMY_0D;
  506. UC DUMMY_0E;
  507. UC DUMMY_0F;
  509. INT_CONFIG D14_INT_CONFIG;
  511. UC DUMMY_11;
  512. UC DUMMY_12;
  513. UC DUMMY_13;
  515. INT_ENABLE D14_INT_ENABLE;
  518. INTERRUPT_STATUS D14_INT;
  521. UC D14_BUFFER_LENGTH_LSB;
  522. UC D14_BUFFER_LENGTH_MSB;
  524. UC DUMMY_1E;
  525. UC DUMMY_1F;
  527.    UC D14_DATA_PORT_LSB;
  528.    UC D14_DATA_PORT_MSB;
  530. UC DUMMY_22;
  531. UC DUMMY_23;
  533. VALIDSHORT D14_VALIDATE_SHORT;
  535. UC DUMMY_26;
  536. UC DUMMY_27;
  538. CONTROL D14_CONTROL_FUNCTION;
  540. UC DUMMY_29;
  541. UC DUMMY_2A;
  542. UC DUMMY_2B;
  544. UC D14_ENDPT_INDEX;
  546. UC DUMMY_2D;
  547. UC DUMMY_2E;
  548. UC DUMMY_2F;
  550. UC D14_DMA_COMMAND;
  552. UC DUMMY_31;
  553. UC DUMMY_32;
  554. UC DUMMY_33;
  556. UC D14_DMA_TRANSFER_COUNTER_LSB;
  557. UC D14_DMA_TRANSFER_COUNTER_BYTE2;
  558. UC D14_DMA_TRANSFER_COUNTER_BYTE3;
  559. UC D14_DMA_TRANSFER_COUNTER_MSB;
  561. GDMA_CONFIG D14_GDMA_CONFIG;
  562. UDMA_CONFIG D14_UDMA_CONFIG;
  564. UC DUMMY_3A;
  565. UC DUMMY_3B;
  567.   DMA_HARDWARE D14_DMA_HARDWARE;
  569. UC DUMMY_3D;
  570. UC DUMMY_3E;
  571. UC DUMMY_3F;
  573. UC D14_DATA_TASKFILE_LSB;
  574. UC DATA_TASKFILE_BYTE2;
  575. UC DATA_TASKFILE_BYTE3;
  576. UC DATA_TASKFILE_MSB;
  578. UC D14_CMD_STATUS_TASKFILE;
  580. UC DUMMY_45;
  581. UC DUMMY_46;
  582. UC DUMMY_47;
  584. UC D14_ERROR_FEATURE_TASKFILE;
  585. UC D14_INTERRUPT_TASKFILE;
  586. UC D14_SECTOR_NUMBER;
  587. UC D14_BYTECOUNT_LSB_TASKFILE;
  588. UC D14_BYTECOUNT_MSB_TASKFILE;
  589. UC D14_DRIVE_SELECT_TASKFILE;
  590. UC D14_ALT_STATUS_DEVCNTRL_TASKFILE;
  591. UC D14_TASKFILE;
  593. DMA_INT D14_DMA_INT;
  595. UC DUMMY_52;
  596. UC DUMMY_53;
  598. DMA_INT_ENABLE D14_DMA_INT_ENABLE;
  600. UC DUMMY_56;
  601. UC DUMMY_57;
  603. UC D14_DMA_ENDPOINT;
  605. UC DUMMY_59;
  606. UC DUMMY_5A;
  607. UC DUMMY_5B;
  609. DMA_STATE_1 D14_DMA_STATE_1;
  611. UC DUMMY_5D;
  612. UC DUMMY_5E;
  613. UC DUMMY_5F;
  615. DMA_STROBE DMA_STROBE_TIMING;
  617. UC DUMMY_61;
  618. UC DUMMY_62;
  619. UC DUMMY_63;
  621. UC UDMA_BYTE_COUNT_LSB;
  622. UC UDMA_BYTE_COUNT_MSB;
  624. UC DUMMY_66;
  625. UC COUNT_1F0;
  628. UC PMU_TRANSFER_COUNT_0;
  629. UC PMU_TRANSFER_COUNT_1;
  630. UC PMU_TRANSFER_COUNT_2;
  631. UC PMU_TRANSFER_COUNT_3;
  633. UC DUMMY_6C;
  634. UC DUMMY_6D;
  635. UC DUMMY_6E;
  636. UC DUMMY_6F;
  637.   
  638. UC D14_CHIP_ID_LSB;
  639. UC D14_CHIP_ID_MBYTE;
  640. UC D14_CHIP_ID_MSB;
  643. UC DUMMY_73;
  645. FRAME_NO D14_FRAME_NUMBER;
  647. UC DUMMY_76;
  648. UC DUMMY_77;
  650. UI D14_SCRATCH_REGISTER;
  652. UC DUMMY_7A;
  653. UC DUMMY_7B;
  655. UC D14_UNLOCK_DEVICE_LSB;
  656. UC D14_UNLOCK_DEVICE_MSB;
  658. UC DUMMY_7E;
  659. UC DUMMY_7F;
  661. ERROR_CODE D14_ERROR_CODE;
  663. UC DUMMY_81;
  664. UC DUMMY_82;
  665. UC DUMMY_83;
  667. TESTMODE D14_TEST_MODE;
  669. UC DUMMY_85;
  670. UC DUMMY_86;
  671. UC DUMMY_87;
  672. UC DUMMY_88;
  674. }D14_CNTRL_REG;