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KERNEL.H
资源名称：USB_2.0.rar　[点击查看]
上传用户：ids068
上传日期：2013-04-04
资源大小：639k
文件大小：12k
源码类别：

USB编程

开发平台：

C/C++

KERNEL.H：源码内容
  1. //***********************************************************************
  2. //                                                                                        *
  3. //                P H I L I P S   P R O P R I E T A R Y           *
  4. //                                                                      *
  5. //          COPYRIGHT (c)   1999 BY PHILIPS SINGAPORE (APIC).     *
  6. //                    --  ALL RIGHTS RESERVED  --                  *
  7. //                                                                      *
  8. //  File Name :       Kernel.h                                        *
  9. //  Author :       Albert Goh   *
  10. //  Created :       3 March 2000                                *
  11. //                                                                   *
  12. //***********************************************************************
  13. //***********************************************************************
  14. //                                                                      *
  15. // Kernel.h has the various external defintion and structure defintion  *
  16. //                                                                      *
  17. //***********************************************************************
  18. //***********************************************************************
  19. //                                                                      *
  20. //  Module History *
  21. //  ************** *
  22. // *
  23. //  Date    Version Author Changes *
  24. //  ==== ======= ====== ======= *
  25. //  030300   0.1  Albert Created     *
  26. //                                                                      *
  27. //                                                                      *
  28. //***********************************************************************
  29. //***********************************************************************
  30. //* *
  31. //*                       Variable Definition   *
  32. //* *
  33. //***********************************************************************
  35. sfr AUXR = 0x8e;
  36. sfr CKCON = 0x8f;
  38. #define MAX_BUF 64
  42. //#define                  CHAP9_COMPLIANT   15                //use for chapter 9 and 8 test
  43.                                                                //max packet size is 512
  45. //#define USB_ENABLED 3     //to test FIFO must disable DMA_ENABLED and PIO_ENABLED
  47. //USAGE FOR ATA AND ATAPI DEVICE
  49. //#define PIO_ENABLED 1   // to test PIO mode must disable DMA_ENABLED
  51. //#define MDMA_TRANSFER 5 //ATA MDMA Transfer Mode
  52. //#define UDMA_TRANSFER 6 //ATA UDMA Transfer Mode
  53. //#define PIO_TRANSFER 7 //ATA PIO Transfer Mode
  55. //#define DEVICE_ENABLED  8
  56. #define ATAPI_DEVICE 9
  60. //USAGE FOR THE GENERIC DMA MODE
  62. //#define DMA_ENABLED 2 //Select DMA Mode
  64. //#define GDMA_MODE 10 //GDMA Slave Mode 
  65. //#define MDMA_MODE 11 //MDMA Master Mode
  66. //#define MPIO_MODE 17 //Manual PIO Mode
  67. //#define PING_PONG 15 //set the descriptor to PID 1582
  70. #define           SBUS_RESET                  0         
  71. #define           SSUSPEND                    1
  72. #define           SPOWER                      2
  73. #define           SWAKEUP                     3
  74. #define           SCMD                        4
  75. #define           SREAD                       5
  76. #define           SWRITE                      6
  77. #define           SSTATUS                     7
  80. #define Crystal_Freq 24
  82. #define DEVICE_RESET 0x0C
  83. #define ENABLE_INTRQ 0x08
  84. #define DISABLE_INTRQ 0x0A
  87. #define SETUP_DMA_REQUEST     0x7104
  88. #define GET_FIRMWARE_VERSION    0x7204
  89. #define GET_SET_TWAIN_REQUEST   0x7304
  92. #define MASTER_DRIVE 0xA0
  93. #define ATA_MASTER 0
  94. #define ID_ATAPI_DEVICE 0xA1
  95. #define ID_ATA_DEVICE 0xEC
  96. #define ATAPI_SOFTRESET 0x08
  97. #define SET_FEATURE 0xEF
  98. #define INIT_DRIVE 0x91
  100. #define Transfer_Mode 0x03
  102. #define Read 0
  103. #define Write 1
  105. #define GDMA_Read 1
  106. #define GDMA_Write 0
  107. #define GDMA_Start 1
  108. #define GDMA_Stop 0
  110. #define OUT 0
  111. #define IN 1
  113. #define OFF 0
  114. #define ON 1
  116. #define Endpt_Zero 0
  117. #define Endpt_One 1
  118. #define Endpt_Two 2
  119. #define Endpt_Three 3
  120. #define Endpt_Four 4
  121. #define Endpt_Five 5
  122. #define Endpt_Six 6
  123. #define Endpt_Seven 7
  126. #define Control_Type 0
  127. #define Iso_Type 1
  128. #define Bulk_Type 2
  129. #define Int_Type 3
  131. /*
  132. #define Control_Type 0
  133. #define Iso_Type 3
  134. #define Bulk_Type 1
  135. #define Int_Type 2
  136. */
  138. /*
  139. #define Get_Status 0x00
  140. #define Clear_Feature 0x01
  141. #define Set_Feature 0x03
  142. #define Set_Address 0x05
  143. #define Get_Descriptor 0x06
  144. #define Set_Descriptor 0x07
  145. #define Get_Config 0x08
  146. #define Set_Config 0x09
  147. #define Get_Interface 0x0A
  148. #define Set_Interface 0x0B
  149. #define Synch_Frame 0x0C
  150. */
  152. #define USB_Default 0
  153. #define USB_Addressed 1
  154. #define USB_Configured 2
  157. #define ATAPI_Cmd_Packet_Phase          0x09
  158. #define ATAPI_Message_Phase 0x0B
  159. #define ATAPI_Read_Phase    0x0A
  160. #define ATAPI_Write_Phase   0x08
  161. #define ATAPI_Read_Phase_NODRQ    0x02
  162. #define ATAPI_Write_Phase_NODRQ   0x00
  163. #define ATAPI_Status_Phase 0x03
  164. #define Error_Phase   0xAA
  165. #define No_Data_Phase   0x55
  167. #define Data_Host2Device 0x00
  168. #define Data_Device2Host 0x80
  170. #define TransferData2Host 0x01
  171. #define TransferData2Device 0x02
  172. #define TransferNoData 0x00
  174. #define ATAPI_PACKET_COMMAND 0xA0
  177. #define GDMA_Read_Command 0x00
  178. #define GDMA_Write_Command 0x01
  179. #define UDMA_Read_Command 0x02
  180. #define UDMA_Write_Command 0x03
  181. #define PIO_Read_Command 0x04
  182. #define PIO_Write_Command 0x05
  183. #define MDMA_Read_Command 0x06
  184. #define MDMA_Write_Command 0x07
  185. #define PIO_Write_Complete 0x08
  186. #define PIO_Read_Complete  0x09
  187. #define READ_1F0 0x0A
  188. #define POLL_BUSY 0x0B
  189. #define UPDATE_TASKFILE 0x0C
  190. #define  DMA_VALIDATE_BUFFER        0x0E
  191. #define  DMA_CLEAR_BUFFER           0x0F
  192. #define  DMA_BUFFER_RESTART         0x10
  193. #define  DMA_RESET                  0x11
  194. #define  DMA_FLUSH                  0x12
  196. //for FPGA and old board
  197. /*
  198. #define DMA_Start  P16
  199. #define DMA_Wr_Rd P17
  200. #define DMA_Reset P14
  201. #define ISP1581_CS P15
  202. #define  ISP1581_RESET              P27
  203. #define  RESET_IDE                  P26
  204. #define HS_FS_LED P35
  205. */
  208. // for new Evalkit
  209. /*
  210. #define DMA_Start  P10
  211. #define DMA_Reset P11
  212. #define DMA_Wr_Rd P12
  213. #define  VBus_Sense     P21
  214. #define ISP1581_CS P15
  215. #define  ISP1581_RESET  P16
  216. #define  RESET_IDE      P17
  217. #define HS_FS_LED P20
  218. */
  220. sbit DMA_Start = P1^4;
  221. sbit DMA_Reset = P1^4;
  222. sbit DMA_Wr_Rd = P1^4;
  223. sbit   VBus_Sense =    P1^2;
  224. sbit RESET_IDE =     P1^4;
  226. sbit HS_FS_LED = P1^0;
  227. //sbit ISP1581_CS = P1^2;
  228. sbit ISP1581_RESET = P3^4;
  230. #define EA_DISABLE EA=0
  231. #define EA_ENABLE EA=1
  235. // for old Evalkit
  236. /*
  237. #define DMA_Start  P34
  238. #define DMA_Wr_Rd P10
  239. #define DMA_Reset P35
  240. #define ISP1581_CS P26
  241. #define  ISP1581_RESET              P25
  242. #define  RESET_IDE                  P24
  243. #define HS_FS_LED P23
  244. */
  248. #define GDMA_Test 1
  249. #define UDMA_Test 2
  250. #define MDMA_Test 3
  251. #define PIO_Test    4
  253. #define HIGH_SPEED 0
  254. #define FULL_SPEED 1
  255. #define HIGH_SPEED_LED          1
  256. #define FULL_SPEED_LED 0
  259. #define  TEST_MODE            0x0200
  260. #define  ENDPOINT_HALT        0
  261. #define  DEVICE_REMOTE_WAKEUP 1
  263. #define  TEST_J            1
  264. #define  TEST_K            2
  265. #define  TEST_SE0_NAK      3
  266. #define  TEST_PACKET       4
  267. #define  TEST_FORCE_ENABLE 5
  269. //***********************************************************************
  270. //* *
  271. //*                  Structure Variable Definition   *
  272. //* *
  273. //***********************************************************************
  275. typedef union KERNEL 
  276. {
  278. struct KERNEL_BITS
  279. {
  281. UC TIMER_ONOFF  :  1, // 8051 timer running state
  282. STATE :   3, //kernel current state
  283. MASTER_ATAPI_DRIVE :  1,
  284. MASTER_ATA_DRIVE :  1,
  285. MASTER_PRESENT :  1,
  286. SLAVE_PRESENT :  1;
  288. UC Manual_PIO : 1,
  289. Auto_PIO : 1,
  290. UDMA_Mode : 1,
  291. MDMA_Mode : 1,
  292. GDMA_Mode : 1,
  293. Timer_Expired : 1,
  294. Bus_Reset : 1;
  296. UC Error_Occur : 2,
  297. Init_Done : 1,
  298. In_Reset_Done : 1,
  299. Out_Reset_Done : 1,
  300. Tx_Done : 1,
  301. Dummy_Byte : 1,
  302. Endpt_Stall : 1;
  304. UC HS_FS_State : 1,
  305. MPIO_Out_Reset_Done           : 1,
  306. MPIO_In_Reset_Done  : 1,
  307. Register_Test : 1,
  308.                            Transfer_Error                      :        1,
  309.                            Transfer_Start                      :        1,
  310.                            ATAPI_DMA_END                       :        1;
  312. }BITS;
  314. ULI VALUE;
  317. }KERNEL;
  319. typedef struct DRIVE_CONFIG
  320. {
  322.     UI General_Config; //word 0
  323. UI PIO_Mode; //word 51
  324. UI MDMA_Mode; //word 63
  325. UI Advanced_PIO; //word 64
  326. UI UDMA_Mode; //word 88
  328. }DRIVE_CONFIG;
  331. typedef struct TIMER
  332. {
  334. UI mSEC_Scale;
  335. UI Hundred_mSEC_Scale;
  337. }TIMER;
  339. typedef struct FEATURE
  340. {
  342. UC SubCommand_Count;
  343. UC SubCommand_Number;
  344. UC SubCommand_Low;
  345. UC SubCommand_High;
  347. }FEATURE;
  349. typedef union DMA_INT_FLAG
  350. {
  351. struct DMA_FLAG_BITS
  352. {
  355. UC CMD_AUTO_COMPLETE : 1;
  356. UC CMD_INTRQ_OK : 1;
  357. UC TASKFILE_READ_COMPLETE : 1;
  358. UC BSY_DRQ_POLL_DONE : 1;
  359. UC START_READ_1F0_RD_FIFO : 1;
  360. UC RD_1F0_FIFO_EMPTY : 1;
  361. UC WR_1F0_FIFO_FULL : 1;
  362. UC WR_1F0_FIFO_EMPTY : 1;
  364. UC DMA_DONE : 1;
  365. UC INTRQ_SEEN : 1;
  366.          UC       INT_EOT                             :        1;
  367.          UC       EXT_EOT                             :        1;
  368. UC RES1 : 4;
  370. }BITS;
  372. UI VALUE;
  374. }DMA_INT_FLAG;
  378. typedef union DATA_SWAP 
  379. {
  380. UC byte[2];
  381. UI word;
  383. }DATA_SWAP;
  385. typedef union ATAPI_BYTECOUNT 
  386. {
  387. UC Byte[4];
  388. ULI VALUE;
  390. }ATAPI_BYTECOUNT;
  392. typedef union BYTECOUNT 
  393. {
  394. UC Byte[2];
  395. ULI VALUE;
  397. }BYTECOUNT;
  399. /*
  400. typedef union USB_ELEMENT
  401. {
  402. struct USB_ELEMENT_BITS
  403. {
  405. UI SOF_Count : 11,
  406.    uSOF_Count : 3;
  408. }BITS;
  410. // UI  Value;
  412. }USB_ELEMENT;
  413. */
  415. typedef union USB_INT_FLAG
  416. {
  418. struct USB_FLAG_BITS
  419. {
  421. UC RESET :  1;
  422. UC SOF : 1;
  423. UC PSOF : 1;
  424. UC SUSP : 1;
  425. UC RESUME : 1;
  426. UC HS_STAT : 1;
  427. UC DMA : 1;
  428. UC RESERVED3 : 1;
  430. UC EP0SETUP : 1;
  431. UC RESERVED2 :  1;
  432. UC EP0RX : 1;
  433. UC EP0TX : 1;
  434. UC EP1RX : 1;
  435. UC EP1TX : 1;
  436. UC EP2RX : 1;
  437. UC EP2TX : 1;
  439. UC EP3RX : 1;
  440. UC EP3TX : 1;
  441. UC EP4RX : 1;
  442. UC EP4TX : 1;
  443. UC EP5RX : 1;
  444. UC EP5TX : 1;
  445. UC EP6RX : 1;
  446. UC EP6TX : 1;
  448. UC EP7RX : 1;
  449. UC EP7TX : 1;
  450. UC RESERVED1 : 6;
  452. }BITS;
  455. UL VALUE;
  457. }USB_INT_FLAG;
  460. typedef struct USB_DEVICE_REQ
  461. {
  463. UC bmRequestType;
  464. UC bRequest;
  465. UI wValue;
  466. UI wIndex;
  467. UI wLength;
  469. }USB_DEVICE_REQ;
  472. typedef struct USB_DEVICE
  473. {
  475. struct USB_DEVICE_BITS
  476. {
  478. UC Remote_Wakeup : 1,
  479.    Halt : 1,
  480.    Self_Powered : 1,
  481.    Endpt_Halt : 1,
  482.    Test_Mode : 1,
  483.    State : 3;
  485. UC CBI_Detected : 1;
  488. UC DMA_Test_Mode : 8;
  490. UC Alter_Interface : 1,
  491. CBW_Rx : 1,
  492. CBW_Data : 1,
  493. DMA_State : 3,
  494. Big_Endian : 1;
  497. }BITS;
  499. }USB_DEVICE;
  502. typedef struct USBCBW
  503. {
  504.          union Signature
  505.          {
  506.          UC dCBWSignature[4];
  507.                   ULI VALUE;
  508.          
  509.          }Signature;
  510.                     
  511. UC  dCBWTag[4];
  513.          union Length
  514.          {
  515.          
  516.                   UC dCBWDataTransferLength[4];
  517.                   ULI VALUE;
  518.          
  519.          }Length;
  520.          
  521. UC  dCBWFlags;
  522. UC  bCBWLUN;
  523. UC  bCDBLength;
  525.          UC  CBWCDB[0x10];
  527. } USBCBW;
  529. typedef struct USB_CSW
  530. {
  531.          union Residue
  532.          {
  533.          UC dCSWDataResidue[4];
  534.                   ULI VALUE;
  535.          
  536.          }Residue;
  537.                     
  538. UC bCSWStatus;
  540. }USBCSW;
  543. typedef union FILESIZE
  544. {
  546.          struct filesize
  547.          {
  548.             UC       Address[3];
  549.             UC       FileSize[4];
  550.             UC       DIR;
  551.          
  552.          }Size; 
  553.          
  554.          UDI      Value;
  556. }FILESIZE;