D14.H
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上传日期:2013-04-04
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USB编程

开发平台:

C/C++

  1. //***********************************************************************
  2. //       *
  3. //                P H I L I P S   P R O P R I E T A R Y           *
  4. //                                                                      *
  5. //          COPYRIGHT (c)   1999 BY PHILIPS SINGAPORE (APIC).     *
  6. //                    --  ALL RIGHTS RESERVED  --                  *
  7. //                                                                      *
  8. //  File Name :       D14.h                                     *
  9. //  Author :       Albert Goh   *
  10. //  Created :       3 March 2000                                *
  11. //                                                                   *
  12. //***********************************************************************
  13. //***********************************************************************
  14. //                                                                      *
  15. // Kernel.h has the various external defintion and structure defintion  *
  16. //                                                                      *
  17. //***********************************************************************
  18. //***********************************************************************
  19. //                                                                      *
  20. //  Module History *
  21. //  ************** *
  22. // *
  23. //  Date    Version Author Changes *
  24. //  ==== ======= ====== ======= *
  25. //  030300   0.1  Albert Created     *
  26. //                                                                      *
  27. //                                                                      *
  28. //***********************************************************************
  29. //***********************************************************************
  30. //* *
  31. //*                  Structure Variable Definition   *
  32. //* *
  33. //***********************************************************************
  34. //***********************************************************************
  35. //*   *
  36. //*                   D14 Structure Definition *
  37. //* *
  38. //***********************************************************************
  39. typedef union ADDRESS_REG
  40. {
  41. struct ADDRESS_BITS
  42. {
  43. UC DEVADDR : 7;
  44. UC DEVEN : 1;
  45. }BITS;
  46. UC VALUE;
  47. }ADDRESS_REG;
  48. typedef union USB_MODE
  49. {
  50. struct USB_MODE_BITS
  51. {
  52. UC SOFTCT : 1;
  53. UC PWROFF : 1;
  54. UC WKUPC : 1;
  55. UC GLINTE : 1;
  56. UC SFRESET : 1;
  57. UC GOSUSP : 1;
  58. UC SNDRSU : 1;
  59. UC DISGLBL : 1;
  60. }BITS;
  61. UC VALUE;
  62. }USB_MODE;
  63. typedef union INT_CONFIG
  64. {
  65. struct INT_CONFIG_BITS
  66. {
  67. UC INTPOL : 1;
  68. UC INTLVL : 1;
  69. UC DDBGMODOUT : 2;
  70. UC DDBGMODIN : 2;
  71. UC CDBGMOD : 2;
  72. }BITS;
  73. UC VALUE;
  74. }INT_CONFIG;
  75. typedef union INT_ENABLE
  76. {
  77. struct INT_ENABLE_BITS
  78. {
  79. UC IERST :  1;
  80. UC IESOF : 1;
  81. UC IEPSOF : 1;
  82. UC IESUSP : 1;
  83. UC IEHS_STA : 1;
  84. UC IEDMA : 1;
  85. UC RESERVED3 : 1;
  86. UC IEP0SETUP : 1;
  87. UC RESERVED2 :  1;
  88. UC IEP0RX : 1;
  89. UC IEP0TX : 1;
  90. UC IEP1RX : 1;
  91. UC IEP1TX : 1;
  92. UC IEP2RX : 1;
  93. UC IEP2TX : 1;
  94. UC IEP3RX : 1;
  95. UC IEP3TX : 1;
  96. UC IEP4RX : 1;
  97. UC IEP4TX : 1;
  98. UC IEP5RX : 1;
  99. UC IEP5TX : 1;
  100. UC IEP6RX : 1;
  101. UC IEP6TX : 1;
  102. UC IEP7RX : 1;
  103. UC IEP7TX : 1;
  104. UC RESERVED1 : 6;
  105. }BITS;
  106. UL VALUE;
  107. }INT_ENABLE;
  108. typedef union INTERRUPT_STATUS
  109. {
  110. struct INTERRUPT_STATUS_BITS
  111. {
  112. UC RESET :  1;
  113. UC SOF : 1;
  114. UC PSOF : 1;
  115. UC SUSP : 1;
  116. UC RESUME : 1;
  117. UC HS_STAT : 1;
  118. UC DMA : 1;
  119. UC RESERVED3 : 1;
  120. UC EP0SETUP : 1;
  121. UC RESERVED2 :  1;
  122. UC EP0RX : 1;
  123. UC EP0TX : 1;
  124. UC EP1RX : 1;
  125. UC EP1TX : 1;
  126. UC EP2RX : 1;
  127. UC EP2TX : 1;
  128. UC EP3RX : 1;
  129. UC EP3TX : 1;
  130. UC EP4RX : 1;
  131. UC EP4TX : 1;
  132. UC EP5RX : 1;
  133. UC EP5TX : 1;
  134. UC EP6RX : 1;
  135. UC EP6TX : 1;
  136. UC EP7RX : 1;
  137. UC EP7TX : 1;
  138. UC RESERVED1 : 6;
  139. }BITS;
  140. UL VALUE;
  141. }INTERRUPT_STATUS;
  142. typedef union ENDPT_MAXSIZE
  143. {
  144. struct ENDPT_MAXSIZE_BITS
  145. {
  146. UC FFOSZ7_0 : 8;
  147. UC FFOSZ10_8 : 3;
  148. UC NTRANS : 2;
  149. UC RESERVED2 : 3;
  150. }BITS;
  151. UI VALUE;
  152. }ENDPT_MAXSIZE;
  153. typedef union ENDPT_INDEX
  154. {
  155. struct ENDPT_INDEX_BITS
  156. {
  157. UC DIR : 1;
  158. UC ENDPIDX : 4;
  159. UC EP0SETUP : 1;
  160. UC RESERVED : 2;
  161. }BITS;
  162. UC VALUE;
  163. }ENDPT_INDEX;
  164. typedef union CONTROL
  165. {
  166. struct CONTROL_BITS
  167. {
  168. UC STALL : 1;
  169. UC STATUS : 1;
  170. UC RESERVED2 : 1;
  171. UC VENDP : 1;
  172. UC CLBUF : 1;
  173. UC RESERVED1 : 3;
  174. }BITS;
  175. UC VALUE;
  176. }CONTROL;
  177. typedef union ENDPT_TYPE
  178. {
  179. struct ENDPT_TYPE_BITS
  180. {
  181. UC ENDPTYP : 2;
  182. UC DBLBUF :  1;
  183. UC ENABLE : 1;
  184. UC ZERO_PKT_DIS: 1;
  185. UC RESERVED1 : 3;
  186. UC RESRVED2 : 8;
  187. }BITS;
  188. UI VALUE;
  189. }ENDPT_TYPE;
  190. typedef union ERROR_CODE
  191. {
  192. struct ERROR_CODE_BITS
  193. {
  194. UC RTOK : 1;
  195. UC ERROR : 4;
  196. UC RESERVED: 1;
  197. UC DATA01 : 1;
  198. UC UNREAD : 1;
  199. }BITS;
  200. UC VALUE;
  201. }ERROR_CODE;
  202. typedef union VALIDSHORT
  203. {
  204. struct VALIDSHORT_BITS
  205. {
  206. UC  RESERVED : 8;
  207. UC OUT0SH : 1;
  208. UC OUT1SH : 1;
  209. UC OUT2SH : 1;
  210. UC OUT3SH : 1;
  211. UC OUT4SH : 1;
  212. UC OUT5SH : 1;
  213. UC OUT6SH : 1;
  214. UC OUT7SH : 1;
  215. }BITS;
  216. UI VALUE;
  217. }VALIDSHORT;
  218. typedef union FRAME_NO
  219. {
  220. struct FRAME_NO_BITS
  221. {
  222. UC SOFL : 8;
  223. UC SOFH : 3;
  224. UC USOF : 3;
  225. UC RESERVED : 2;
  226. }BITS;
  227. UI VALUE;
  228. }FRAME_NO; 
  229. typedef union TESTMODE
  230. {
  231. struct TESTMODE_BITS
  232. {
  233. UC SE0_NAK : 1;
  234. UC JSTATE : 1;
  235. UC KSTATE : 1;
  236. UC PRBS : 1;
  237. UC FORCEFS : 1;
  238. UC LPBK : 1;
  239. UC PHYTEST : 1;
  240. UC FORCEHS : 1;
  241. }BITS;
  242. UC VALUE;
  243. }TESTMODE;
  244. typedef union GDMA_CONFIG
  245. {
  246. struct GDMA_CONFIG_BITS
  247. {
  248. UC WIDTH :  1;
  249. UC RES1 : 1;
  250. UC DMA_MODE : 2;
  251. UC BURST : 3;
  252. UC CNTENA : 1;
  253. }BITS;
  254. UC VALUE;
  255. }GDMA_CONFIG;
  256. typedef union UDMA_CONFIG
  257. {
  258. struct UDMA_CONFIG_BITS
  259. {
  260. UC PIO_MODE : 3;
  261. UC UDMA_MODE : 2;
  262. UC ATA_MODE : 1;
  263. UC IGNORE_IORDY: 1;
  264. UC RES2 : 1;
  265. }BITS;
  266. UC VALUE;
  267. }UDMA_CONFIG;
  268. typedef union DMA_HARDWARE
  269. {
  270. struct DMA_HARDWARE_BITS
  271. {
  272. UC READ_POL : 1;
  273. UC WRITE_POL : 1;
  274. UC DREQ_POL : 1;
  275. UC ACK_POL : 1;
  276. UC MASTER : 1;
  277. UC EOT_POL : 1;
  278. UC ENDIAN : 2;
  279. }BITS;
  280. UC VALUE;
  281. }DMA_HARDWARE;
  282. typedef union DMA_STROBE
  283. {
  284. struct DMA_STROBE_BITS
  285. {
  286. UC DMA_STROBE : 5;
  287. UC RES : 3;
  288. }BITS;
  289. UC VALUE;
  290. }DMA_STROBE;
  291. typedef union DMA_INT
  292. {
  293. struct DMA_INT_BITS
  294. {
  295. UC CMD_AUTO_COMPLETE : 1;
  296. UC INTRQ_PENDING : 1;
  297. UC TASKFILE_READ_COMPLETE : 1;
  298. UC BSY_DRQ_POLL_DONE : 1;
  299. UC START_READ_1F0_RD_FIFO : 1;
  300. UC RD_1F0_FIFO_EMPTY : 1;
  301. UC WR_1F0_FIFO_FULL : 1;
  302. UC WR_1F0_FIFO_EMPTY : 1;
  303. UC DMA_DONE : 1;
  304. UC PENDING_INTRQ : 1;
  305.          UC       INT_EOT                             :        1;
  306.          UC       EXT_EOT                             :        1;
  307. UC RES1 : 4;
  308. }BITS;
  309. UI VALUE;
  310. }DMA_INT;
  311. typedef union DMA_INT_ENABLE
  312. {
  313. struct DMA_INT_ENABLE_BITS
  314. {
  315. UC CMD_AUTO_COMPLETE : 1;
  316. UC INTRQ_PENDING : 1;
  317. UC TASKFILE_READ_COMPLETE : 1;
  318. UC BSY_DRQ_POLL_DONE : 1;
  319. UC START_READ_1F0_RD_FIFO : 1;
  320. UC RD_1F0_FIFO_EMPTY : 1;
  321. UC WR_1F0_FIFO_FULL : 1;
  322. UC WR_1F0_FIFO_EMPTY : 1;
  323. UC DMA_DONE : 1;
  324. UC RES1 : 7;
  325. }BITS;
  326. UI VALUE;
  327. }DMA_INT_ENABLE;
  328. /*
  329. typedef union DMA_ENDPT
  330. {
  331. struct DMA_ENDPT_BITS
  332. {
  333. UC DMADIR : 1;
  334. UC EDPIDX : 3;
  335. UC NOT_USED :  4;
  336. }BITS;
  337. UC VALUE;
  338. }DMA_ENDPT;
  339. */
  340. typedef union DMA_STATE_1
  341. {
  342. struct DMA_STATE_1_BITS
  343. {
  344. UC PIO_SEQ_STATE : 3;
  345. UC PIO_CMD_STATE : 5;
  346. }BITS;
  347. UC VALUE;
  348. }DMA_STATE_1;
  349. typedef union DMA_STATE_2
  350. {
  351. struct DMA_STATE_2_BITS
  352. {
  353. UC RES : 8;
  354. }BITS;
  355. UC VALUE;
  356. }DMA_STATE_2;
  357. typedef struct D14_CNTRL_REG
  358. {
  359. ADDRESS_REG D14_ADDRESS;
  360. UC DUMMY_01;
  361. UC DUMMY_02;
  362. UC DUMMY_03;
  363.   ENDPT_MAXSIZE D14_ENDPT_MAXPKTSIZE;
  364. UC DUMMY_06;
  365. UC DUMMY_07;
  366. ENDPT_TYPE D14_ENDPT_TYPE;
  367. UC DUMMY_0A;
  368. UC DUMMY_0B;
  369. USB_MODE D14_MODE;
  370. UC DUMMY_0D;
  371. UC DUMMY_0E;
  372. UC DUMMY_0F;
  373. INT_CONFIG D14_INT_CONFIG;
  374. UC DUMMY_11;
  375. UC DUMMY_12;
  376. UC DUMMY_13;
  377. INT_ENABLE D14_INT_ENABLE;
  378. INTERRUPT_STATUS D14_INT;
  379. UC D14_BUFFER_LENGTH_LSB;
  380. UC D14_BUFFER_LENGTH_MSB;
  381. UC DUMMY_1E;
  382. UC DUMMY_1F;
  383.    UC D14_DATA_PORT_LSB;
  384.    UC D14_DATA_PORT_MSB;
  385. UC DUMMY_22;
  386. UC DUMMY_23;
  387. VALIDSHORT D14_VALIDATE_SHORT;
  388. UC DUMMY_26;
  389. UC DUMMY_27;
  390. CONTROL D14_CONTROL_FUNCTION;
  391. UC DUMMY_29;
  392. UC DUMMY_2A;
  393. UC DUMMY_2B;
  394. UC D14_ENDPT_INDEX;
  395. UC DUMMY_2D;
  396. UC DUMMY_2E;
  397. UC DUMMY_2F;
  398. UC D14_DMA_COMMAND;
  399. UC DUMMY_31;
  400. UC DUMMY_32;
  401. UC DUMMY_33;
  402. UC D14_DMA_TRANSFER_COUNTER_LSB;
  403. UC D14_DMA_TRANSFER_COUNTER_BYTE2;
  404. UC D14_DMA_TRANSFER_COUNTER_BYTE3;
  405. UC D14_DMA_TRANSFER_COUNTER_MSB;
  406. GDMA_CONFIG D14_GDMA_CONFIG;
  407. UDMA_CONFIG D14_UDMA_CONFIG;
  408. UC DUMMY_3A;
  409. UC DUMMY_3B;
  410.   DMA_HARDWARE D14_DMA_HARDWARE;
  411. UC DUMMY_3D;
  412. UC DUMMY_3E;
  413. UC DUMMY_3F;
  414. UC D14_DATA_TASKFILE_LSB;
  415. UC DATA_TASKFILE_BYTE2;
  416. UC DATA_TASKFILE_BYTE3;
  417. UC DATA_TASKFILE_MSB;
  418. UC D14_CMD_STATUS_TASKFILE;
  419. UC DUMMY_45;
  420. UC DUMMY_46;
  421. UC DUMMY_47;
  422. UC D14_ERROR_FEATURE_TASKFILE;
  423. UC D14_INTERRUPT_TASKFILE;
  424. UC D14_SECTOR_NUMBER;
  425. UC D14_BYTECOUNT_LSB_TASKFILE;
  426. UC D14_BYTECOUNT_MSB_TASKFILE;
  427. UC D14_DRIVE_SELECT_TASKFILE;
  428. UC D14_ALT_STATUS_DEVCNTRL_TASKFILE;
  429. UC D14_TASKFILE;
  430. DMA_INT D14_DMA_INT;
  431. UC DUMMY_52;
  432. UC DUMMY_53;
  433. DMA_INT_ENABLE D14_DMA_INT_ENABLE;
  434. UC DUMMY_56;
  435. UC DUMMY_57;
  436. UC D14_DMA_ENDPOINT;
  437. UC DUMMY_59;
  438. UC DUMMY_5A;
  439. UC DUMMY_5B;
  440. DMA_STATE_1 D14_DMA_STATE_1;
  441. UC DUMMY_5D;
  442. UC DUMMY_5E;
  443. UC DUMMY_5F;
  444. DMA_STROBE DMA_STROBE_TIMING;
  445. UC DUMMY_61;
  446. UC DUMMY_62;
  447. UC DUMMY_63;
  448. UC UDMA_BYTE_COUNT_LSB;
  449. UC UDMA_BYTE_COUNT_MSB;
  450. UC DUMMY_66;
  451. UC COUNT_1F0;
  452. UC PMU_TRANSFER_COUNT_0;
  453. UC PMU_TRANSFER_COUNT_1;
  454. UC PMU_TRANSFER_COUNT_2;
  455. UC PMU_TRANSFER_COUNT_3;
  456. UC DUMMY_6C;
  457. UC DUMMY_6D;
  458. UC DUMMY_6E;
  459. UC DUMMY_6F;
  460.   
  461. UC D14_CHIP_ID_LSB;
  462. UC D14_CHIP_ID_MBYTE;
  463. UC D14_CHIP_ID_MSB;
  464. UC DUMMY_73;
  465. FRAME_NO D14_FRAME_NUMBER;
  466. UC DUMMY_76;
  467. UC DUMMY_77;
  468. UI D14_SCRATCH_REGISTER;
  469. UC DUMMY_7A;
  470. UC DUMMY_7B;
  471. UC D14_UNLOCK_DEVICE_LSB;
  472. UC D14_UNLOCK_DEVICE_MSB;
  473. UC DUMMY_7E;
  474. UC DUMMY_7F;
  475. ERROR_CODE D14_ERROR_CODE;
  476. UC DUMMY_81;
  477. UC DUMMY_82;
  478. UC DUMMY_83;
  479. TESTMODE D14_TEST_MODE;
  480. UC DUMMY_85;
  481. UC DUMMY_86;
  482. UC DUMMY_87;
  483. UC DUMMY_88;
  484. }D14_CNTRL_REG;