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KERNEL.H
资源名称：USB_2.0.rar　[点击查看]
上传用户：ids068
上传日期：2013-04-04
资源大小：639k
文件大小：12k
源码类别：

USB编程

开发平台：

C/C++

KERNEL.H：源码内容
  1. //***********************************************************************
  2. //                                                                                        *
  3. //                P H I L I P S   P R O P R I E T A R Y           *
  4. //                                                                      *
  5. //          COPYRIGHT (c)   1999 BY PHILIPS SINGAPORE (APIC).     *
  6. //                    --  ALL RIGHTS RESERVED  --                  *
  7. //                                                                      *
  8. //  File Name :       Kernel.h                                        *
  9. //  Author :       Albert Goh   *
  10. //  Created :       3 March 2000                                *
  11. //                                                                   *
  12. //***********************************************************************
  13. //***********************************************************************
  14. //                                                                      *
  15. // Kernel.h has the various external defintion and structure defintion  *
  16. //                                                                      *
  17. //***********************************************************************
  18. //***********************************************************************
  19. //                                                                      *
  20. //  Module History *
  21. //  ************** *
  22. // *
  23. //  Date    Version Author Changes *
  24. //  ==== ======= ====== ======= *
  25. //  030300   0.1  Albert Created     *
  26. //                                                                      *
  27. //                                                                      *
  28. //***********************************************************************
  29. //***********************************************************************
  30. //* *
  31. //*                       Variable Definition   *
  32. //* *
  33. //***********************************************************************
  35. sfr AUXR = 0x8e;
  36. sfr CKCON = 0x8f;
  38. #define MAX_BUF 64
  42. //#define                  CHAP9_COMPLIANT   15                //use for chapter 9 and 8 test
  43.                                                                //max packet size is 512
  45. //#define USB_ENABLED 3     //to test FIFO must disable DMA_ENABLED and PIO_ENABLED
  47. //USAGE FOR ATA AND ATAPI DEVICE
  49. //#define PIO_ENABLED 1   // to test PIO mode must disable DMA_ENABLED
  51. //#define MDMA_TRANSFER 5 //ATA MDMA Transfer Mode
  52. //#define UDMA_TRANSFER 6 //ATA UDMA Transfer Mode
  53. //#define PIO_TRANSFER 7 //ATA PIO Transfer Mode
  55. //#define DEVICE_ENABLED  8
  56. #define ATAPI_DEVICE 9
  60. //USAGE FOR THE GENERIC DMA MODE
  62. //#define DMA_ENABLED 2 //Select DMA Mode
  64. //#define GDMA_MODE 10 //GDMA Slave Mode 
  65. //#define MDMA_MODE 11 //MDMA Master Mode
  66. //#define MPIO_MODE 17 //Manual PIO Mode
  67. //#define PING_PONG 15 //set the descriptor to PID 1582
  70. #define           SBUS_RESET                  0         
  71. #define           SSUSPEND                    1
  72. #define           SPOWER                      2
  73. #define           SWAKEUP                     3
  74. #define           SCMD                        4
  75. #define           SREAD                       5
  76. #define           SWRITE                      6
  77. #define           SSTATUS                     7
  80. #define Crystal_Freq 24
  82. #define DEVICE_RESET 0x0C
  83. #define ENABLE_INTRQ 0x08
  84. #define DISABLE_INTRQ 0x0A
  87. #define SETUP_DMA_REQUEST     0x7104
  88. #define GET_FIRMWARE_VERSION    0x7204
  89. #define GET_SET_TWAIN_REQUEST   0x7304
  90. #define GET_SET_EEPROM_REQUEST  0x7404
  94. #define MASTER_DRIVE 0xA0
  95. #define ATA_MASTER 0
  96. #define ID_ATAPI_DEVICE 0xA1
  97. #define ID_ATA_DEVICE 0xEC
  98. #define ATAPI_SOFTRESET 0x08
  99. #define SET_FEATURE 0xEF
  100. #define INIT_DRIVE 0x91
  102. #define Transfer_Mode 0x03
  104. #define Read 0
  105. #define Write 1
  107. #define GDMA_Read 1
  108. #define GDMA_Write 0
  109. #define GDMA_Start 1
  110. #define GDMA_Stop 0
  112. #define OUT 0
  113. #define IN 1
  115. #define OFF 0
  116. #define ON 1
  118. #define Endpt_Zero 0
  119. #define Endpt_One 1
  120. #define Endpt_Two 2
  121. #define Endpt_Three 3
  122. #define Endpt_Four 4
  123. #define Endpt_Five 5
  124. #define Endpt_Six 6
  125. #define Endpt_Seven 7
  128. #define Control_Type 0
  129. #define Iso_Type 1
  130. #define Bulk_Type 2
  131. #define Int_Type 3
  133. /*
  134. #define Control_Type 0
  135. #define Iso_Type 3
  136. #define Bulk_Type 1
  137. #define Int_Type 2
  138. */
  140. /*
  141. #define Get_Status 0x00
  142. #define Clear_Feature 0x01
  143. #define Set_Feature 0x03
  144. #define Set_Address 0x05
  145. #define Get_Descriptor 0x06
  146. #define Set_Descriptor 0x07
  147. #define Get_Config 0x08
  148. #define Set_Config 0x09
  149. #define Get_Interface 0x0A
  150. #define Set_Interface 0x0B
  151. #define Synch_Frame 0x0C
  152. */
  154. #define USB_Default 0
  155. #define USB_Addressed 1
  156. #define USB_Configured 2
  159. #define ATAPI_Cmd_Packet_Phase          0x09
  160. #define ATAPI_Message_Phase 0x0B
  161. #define ATAPI_Read_Phase    0x0A
  162. #define ATAPI_Write_Phase   0x08
  163. #define ATAPI_Read_Phase_NODRQ    0x02
  164. #define ATAPI_Write_Phase_NODRQ   0x00
  165. #define ATAPI_Status_Phase 0x03
  166. #define Error_Phase   0xAA
  167. #define No_Data_Phase   0x55
  169. #define Data_Host2Device 0x00
  170. #define Data_Device2Host 0x80
  172. #define TransferData2Host 0x01
  173. #define TransferData2Device 0x02
  174. #define TransferNoData 0x00
  176. #define ATAPI_PACKET_COMMAND 0xA0
  179. #define GDMA_Read_Command 0x00
  180. #define GDMA_Write_Command 0x01
  181. #define UDMA_Read_Command 0x02
  182. #define UDMA_Write_Command 0x03
  183. #define PIO_Read_Command 0x04
  184. #define PIO_Write_Command 0x05
  185. #define MDMA_Read_Command 0x06
  186. #define MDMA_Write_Command 0x07
  187. #define PIO_Write_Complete 0x08
  188. #define PIO_Read_Complete  0x09
  189. #define READ_1F0 0x0A
  190. #define POLL_BUSY 0x0B
  191. #define UPDATE_TASKFILE 0x0C
  192. #define  DMA_VALIDATE_BUFFER        0x0E
  193. #define  DMA_CLEAR_BUFFER           0x0F
  194. #define  DMA_BUFFER_RESTART         0x10
  195. #define  DMA_RESET                  0x11
  196. #define  DMA_FLUSH                  0x12
  198. //for FPGA and old board
  199. /*
  200. #define DMA_Start  P16
  201. #define DMA_Wr_Rd P17
  202. #define DMA_Reset P14
  203. #define ISP1581_CS P15
  204. #define  ISP1581_RESET              P27
  205. #define  RESET_IDE                  P26
  206. #define HS_FS_LED P35
  207. */
  210. // for new Evalkit
  211. /*
  212. #define DMA_Start  P10
  213. #define DMA_Reset P11
  214. #define DMA_Wr_Rd P12
  215. #define  VBus_Sense     P21
  216. #define ISP1581_CS P15
  217. #define  ISP1581_RESET  P16
  218. #define  RESET_IDE      P17
  219. #define HS_FS_LED P20
  220. */
  222. sbit DMA_Start = P1^4;
  223. sbit DMA_Reset = P1^4;
  224. sbit DMA_Wr_Rd = P1^4;
  225. sbit   VBus_Sense =    P1^2;
  226. sbit RESET_IDE =     P1^4;
  228. sbit HS_FS_LED = P1^0;
  229. sbit ISP1581_CS = P1^2;
  230. sbit ISP1581_RESET = P3^4;
  232. #define EA_DISABLE EA=0
  233. #define EA_ENABLE EA=1
  237. // for old Evalkit
  238. /*
  239. #define DMA_Start  P34
  240. #define DMA_Wr_Rd P10
  241. #define DMA_Reset P35
  242. #define ISP1581_CS P26
  243. #define  ISP1581_RESET              P25
  244. #define  RESET_IDE                  P24
  245. #define HS_FS_LED P23
  246. */
  250. #define GDMA_Test 1
  251. #define UDMA_Test 2
  252. #define MDMA_Test 3
  253. #define PIO_Test    4
  255. #define HIGH_SPEED 0
  256. #define FULL_SPEED 1
  257. #define HIGH_SPEED_LED          1
  258. #define FULL_SPEED_LED 0
  261. #define  TEST_MODE            0x0200
  262. #define  ENDPOINT_HALT        0
  263. #define  DEVICE_REMOTE_WAKEUP 1
  265. #define  TEST_J            1
  266. #define  TEST_K            2
  267. #define  TEST_SE0_NAK      3
  268. #define  TEST_PACKET       4
  269. #define  TEST_FORCE_ENABLE 5
  271. //***********************************************************************
  272. //* *
  273. //*                  Structure Variable Definition   *
  274. //* *
  275. //***********************************************************************
  277. typedef union KERNEL 
  278. {
  280. struct KERNEL_BITS
  281. {
  283. UC TIMER_ONOFF  :  1, // 8051 timer running state
  284. STATE :   3, //kernel current state
  285. MASTER_ATAPI_DRIVE :  1,
  286. MASTER_ATA_DRIVE :  1,
  287. MASTER_PRESENT :  1,
  288. SLAVE_PRESENT :  1;
  290. UC Manual_PIO : 1,
  291. Auto_PIO : 1,
  292. UDMA_Mode : 1,
  293. MDMA_Mode : 1,
  294. GDMA_Mode : 1,
  295. Timer_Expired : 1,
  296. Bus_Reset : 1;
  298. UC Error_Occur : 2,
  299. Init_Done : 1,
  300. In_Reset_Done : 1,
  301. Out_Reset_Done : 1,
  302. Tx_Done : 1,
  303. Dummy_Byte : 1,
  304. Endpt_Stall : 1;
  306. UC HS_FS_State : 1,
  307. MPIO_Out_Reset_Done           : 1,
  308. MPIO_In_Reset_Done  : 1,
  309. Register_Test : 1,
  310.                            Transfer_Error                      :        1,
  311.                            Transfer_Start                      :        1,
  312.                            ATAPI_DMA_END                       :        1;
  314. }BITS;
  316. ULI VALUE;
  319. }KERNEL;
  321. typedef struct DRIVE_CONFIG
  322. {
  324.     UI General_Config; //word 0
  325. UI PIO_Mode; //word 51
  326. UI MDMA_Mode; //word 63
  327. UI Advanced_PIO; //word 64
  328. UI UDMA_Mode; //word 88
  330. }DRIVE_CONFIG;
  333. typedef struct TIMER
  334. {
  336. UI mSEC_Scale;
  337. UI Hundred_mSEC_Scale;
  339. }TIMER;
  341. typedef struct FEATURE
  342. {
  344. UC SubCommand_Count;
  345. UC SubCommand_Number;
  346. UC SubCommand_Low;
  347. UC SubCommand_High;
  349. }FEATURE;
  351. typedef union DMA_INT_FLAG
  352. {
  353. struct DMA_FLAG_BITS
  354. {
  357. UC CMD_AUTO_COMPLETE : 1;
  358. UC CMD_INTRQ_OK : 1;
  359. UC TASKFILE_READ_COMPLETE : 1;
  360. UC BSY_DRQ_POLL_DONE : 1;
  361. UC START_READ_1F0_RD_FIFO : 1;
  362. UC RD_1F0_FIFO_EMPTY : 1;
  363. UC WR_1F0_FIFO_FULL : 1;
  364. UC WR_1F0_FIFO_EMPTY : 1;
  366. UC DMA_DONE : 1;
  367. UC INTRQ_SEEN : 1;
  368.          UC       INT_EOT                             :        1;
  369.          UC       EXT_EOT                             :        1;
  370. UC RES1 : 4;
  372. }BITS;
  374. UI VALUE;
  376. }DMA_INT_FLAG;
  380. typedef union DATA_SWAP 
  381. {
  382. UC byte[2];
  383. UI word;
  385. }DATA_SWAP;
  387. typedef union ATAPI_BYTECOUNT 
  388. {
  389. UC Byte[4];
  390. ULI VALUE;
  392. }ATAPI_BYTECOUNT;
  394. typedef union BYTECOUNT 
  395. {
  396. UC Byte[2];
  397. ULI VALUE;
  399. }BYTECOUNT;
  401. /*
  402. typedef union USB_ELEMENT
  403. {
  404. struct USB_ELEMENT_BITS
  405. {
  407. UI SOF_Count : 11,
  408.    uSOF_Count : 3;
  410. }BITS;
  412. // UI  Value;
  414. }USB_ELEMENT;
  415. */
  417. typedef union USB_INT_FLAG
  418. {
  420. struct USB_FLAG_BITS
  421. {
  423. UC RESET :  1;
  424. UC SOF : 1;
  425. UC PSOF : 1;
  426. UC SUSP : 1;
  427. UC RESUME : 1;
  428. UC HS_STAT : 1;
  429. UC DMA : 1;
  430. UC RESERVED3 : 1;
  432. UC EP0SETUP : 1;
  433. UC RESERVED2 :  1;
  434. UC EP0RX : 1;
  435. UC EP0TX : 1;
  436. UC EP1RX : 1;
  437. UC EP1TX : 1;
  438. UC EP2RX : 1;
  439. UC EP2TX : 1;
  441. UC EP3RX : 1;
  442. UC EP3TX : 1;
  443. UC EP4RX : 1;
  444. UC EP4TX : 1;
  445. UC EP5RX : 1;
  446. UC EP5TX : 1;
  447. UC EP6RX : 1;
  448. UC EP6TX : 1;
  450. UC EP7RX : 1;
  451. UC EP7TX : 1;
  452. UC RESERVED1 : 6;
  454. }BITS;
  457. UL VALUE;
  459. }USB_INT_FLAG;
  462. typedef struct USB_DEVICE_REQ
  463. {
  465. UC bmRequestType;
  466. UC bRequest;
  467. UI wValue;
  468. UI wIndex;
  469. UI wLength;
  471. }USB_DEVICE_REQ;
  474. typedef struct USB_DEVICE
  475. {
  477. struct USB_DEVICE_BITS
  478. {
  480. UC Remote_Wakeup : 1,
  481.    Halt : 1,
  482.    Self_Powered : 1,
  483.    Endpt_Halt : 1,
  484.    Test_Mode : 1,
  485.    State : 3;
  487. UC CBI_Detected : 1;
  490. UC DMA_Test_Mode : 8;
  492. UC Alter_Interface : 1,
  493. CBW_Rx : 1,
  494. CBW_Data : 1,
  495. DMA_State : 3,
  496. Big_Endian : 1;
  499. }BITS;
  501. }USB_DEVICE;
  504. typedef struct USBCBW
  505. {
  506.          union Signature
  507.          {
  508.          UC dCBWSignature[4];
  509.                   ULI VALUE;
  510.          
  511.          }Signature;
  512.                     
  513. UC  dCBWTag[4];
  515.          union Length
  516.          {
  517.          
  518.                   UC dCBWDataTransferLength[4];
  519.                   ULI VALUE;
  520.          
  521.          }Length;
  522.          
  523. UC  dCBWFlags;
  524. UC  bCBWLUN;
  525. UC  bCDBLength;
  527.          UC  CBWCDB[0x10];
  529. } USBCBW;
  531. typedef struct USB_CSW
  532. {
  533.          union Residue
  534.          {
  535.          UC dCSWDataResidue[4];
  536.                   ULI VALUE;
  537.          
  538.          }Residue;
  539.                     
  540. UC bCSWStatus;
  542. }USBCSW;
  545. typedef union FILESIZE
  546. {
  548.          struct filesize
  549.          {
  550.             UC       Address[3];
  551.             UC       FileSize[4];
  552.             UC       DIR;
  553.          
  554.          }Size; 
  555.          
  556.          UDI      Value;
  558. }FILESIZE;