evb64120A_Setup.c
上传用户:jlfgdled
上传日期:2013-04-10
资源大小:33168k
文件大小:5k
源码类别:

Linux/Unix编程

开发平台:

Unix_Linux

  1. /*
  2.  *  arch/mips/galileo/compressed/evb64120A_memSetup.c
  3.  *
  4.  *  By RidgeRun Inc, (Leveraged from Galileo's sbd.c)
  5.  *
  6.  *  Xfer an image from flash to ram.
  7.  *  For use with Galileo EVB64120A MIPS eval board.
  8.  */
  9. #include "ns16550.h"
  10. #include <linux/serial_reg.h>
  11. #include <asm/galileo-boards/evb64120A/pci.h>
  12. #include <asm/galileo-boards/evb64120A/core.h>
  13. void XferToRam(void);
  14. bool mapMemoryBanks0and1(unsigned int bank0Base, unsigned int bank0Length,
  15.  unsigned int bank1Base, unsigned int bank1Length);
  16. bool mapMemoryBanks2and3(unsigned int bank2Base, unsigned int bank2Length,
  17.  unsigned int bank3Base, unsigned int bank3Length);
  18. bool mapDevices0_1and2MemorySpace(unsigned int device0Base,
  19.   unsigned int device0Length,
  20.   unsigned int device1Base,
  21.   unsigned int device1Length,
  22.   unsigned int device2Base,
  23.   unsigned int device2Length);
  24. #define RUNNINGFROMFLASH
  25. #include "./xfer.c"
  26. /******************************
  27.  Routine:
  28.  Description:
  29.  ******************************/
  30. unsigned int readWord(unsigned int addr)
  31. {
  32. unsigned int tmp;
  33. tmp = *(unsigned int *) (addr | NONE_CACHEABLE);
  34. return WORDSWAP(tmp);
  35. }
  36. /******************************
  37.  Routine:
  38.  Description:
  39.  ******************************/
  40. void writeWord(unsigned int addr, unsigned int data)
  41. {
  42. *((unsigned int *) (addr | NONE_CACHEABLE)) = WORDSWAP(data);
  43. }
  44. /******************************
  45.  Routine:
  46.  Description:
  47.  ******************************/
  48. unsigned int GetExtendedMemorySize(void)
  49. {
  50. unsigned int address, data = 0x11223344, type;
  51. unsigned int bank1_ef = false, bank2_ef = false, bank3_ef = false;
  52. unsigned int bank0_size, bank2_size, bank3_size, total_size = 0;
  53. mapMemoryBanks0and1(0, 0x800000, 0x800000, 0x800000);
  54. mapMemoryBanks2and3(0x1000000, 0x800000, 0x1800000, 0x800000);
  55. type = readWord(0x14000810);
  56. switch (type) {
  57. case 16:
  58. bank0_size = 0x1000000;
  59. break;
  60. case 64:
  61. bank0_size = 0x4000000;
  62. break;
  63. case 128:
  64. bank0_size = 0x8000000;
  65. break;
  66. case 256:
  67. bank0_size = 0x10000000;
  68. break;
  69. default:
  70. bank0_size = 0x1000000;
  71. break;
  72. }
  73. type = readWord(0x14000814);
  74. switch (type) {
  75. case 16:
  76. bank2_size = 0x1000000;
  77. bank3_size = 0x1000000;
  78. break;
  79. case 64:
  80. bank2_size = 0x4000000;
  81. bank3_size = 0x4000000;
  82. break;
  83. case 128:
  84. bank2_size = 0x8000000;
  85. bank3_size = 0x8000000;
  86. break;
  87. case 256:
  88. bank2_size = 0x10000000;
  89. bank3_size = 0x10000000;
  90. break;
  91. default:
  92. bank2_size = 0x1000000;
  93. bank3_size = 0x1000000;
  94. break;
  95. }
  96. /* Check which banks exist */
  97. /* Bank 1 */
  98. for (address = 0xffff00; address < 0x1000000; address += 4)
  99. writeWord(address, data);
  100. for (address = 0xffff00; address < 0x1000000; address += 4) {
  101. if (readWord(address) != data)
  102. break;
  103. }
  104. if (address == 0x1000000)
  105. bank1_ef = true;
  106. // Bank 2
  107. for (address = 0x17fff00; address < 0x1800000; address += 4)
  108. writeWord(address, data);
  109. for (address = 0x17fff00; address < 0x1800000; address += 4) {
  110. if (readWord(address) != data)
  111. break;
  112. }
  113. if (address == 0x1800000)
  114. bank2_ef = true;
  115. else
  116. bank2_size = 0x0;
  117. // Bank 3
  118. for (address = 0x1ffff00; address < 0x2000000; address += 4)
  119. writeWord(address, data);
  120. for (address = 0x1ffff00; address < 0x2000000; address += 4) {
  121. if (readWord(address) != data)
  122. break;
  123. }
  124. if (address == 0x2000000)
  125. bank3_ef = true;
  126. // Reconfig the system with the new bank0 (and maybe bank1) size.
  127. if (bank0_size == 0x10000000)
  128. bank1_ef = false;
  129. if (bank1_ef == true) {
  130. mapMemoryBanks0and1(0, bank0_size, bank0_size, bank0_size);
  131. // Fix the PCI bars
  132. pci0MapMemoryBanks0_1(0, bank0_size * 2);
  133. pci1MapMemoryBanks0_1(0, bank0_size * 2);
  134. total_size += bank0_size * 2;
  135. } else {
  136. mapMemoryBanks0and1(0, bank0_size, bank0_size, 0);
  137. // Fix the PCI bars
  138. pci0MapMemoryBanks0_1(0, bank0_size);
  139. pci1MapMemoryBanks0_1(0, bank0_size);
  140. total_size += bank0_size;
  141. }
  142. if (total_size == 0x10000000) {
  143. bank2_ef = false;
  144. bank3_ef = false;
  145. } else {
  146. if ((total_size + bank2_size) > 0x10000000) {
  147. bank2_size = 0x10000000 - total_size;
  148. bank3_ef = false;
  149. } else {
  150. if (bank3_size + total_size + bank2_size >
  151.     0x10000000) {
  152. bank3_size =
  153.     0x10000000 - (total_size + bank2_size);
  154. }
  155. }
  156. }
  157. if (bank2_ef == true) {
  158. if (bank3_ef == true) {
  159. mapMemoryBanks2and3(total_size, bank2_size,
  160.     total_size + bank2_size,
  161.     bank3_size);
  162. // Fix the PCI bars
  163. pci0MapMemoryBanks2_3(total_size,
  164.       bank2_size + bank3_size);
  165. pci1MapMemoryBanks2_3(total_size,
  166.       bank2_size + bank3_size);
  167. total_size += (bank2_size + bank3_size);
  168. } else {
  169. mapMemoryBanks2and3(total_size, bank2_size,
  170.     total_size + bank2_size, 0);
  171. // Fix the PCI bars
  172. pci0MapMemoryBanks2_3(total_size, bank2_size);
  173. pci1MapMemoryBanks2_3(total_size, bank2_size);
  174. total_size += bank2_size;
  175. }
  176. } else {
  177. mapMemoryBanks2and3(total_size, 0, total_size, 0);
  178. pci0MapMemoryBanks2_3(total_size, 0);
  179. pci1MapMemoryBanks2_3(total_size, 0);
  180. }
  181. /* Reorganize the devices memory map */
  182. mapDevices0_1and2MemorySpace(0x1c000000, 0x800000, 0x1a000000,
  183.      0xc00000, 0x1d000000, 0x800000);
  184. XferToRam();
  185. return 0; // Not that we'll ever get to this line of code, but
  186. // it does satisfy a compiler warning.
  187. }