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regmapa_8202.h
资源名称：8202s.rar　[点击查看]
上传用户：poi891205
上传日期：2013-07-15
资源大小：9745k
文件大小：25k
源码类别：

DVD

开发平台：

C/C++

regmapa_8202.h：源码内容
  1. #define RF_STAMP                                 4*0
  2. #define RF_EMULATION                             4*1
  3. #define RF_RESET                                 4*2
  4. #define RF_RESET2                                4*3
  5. #define RF_PAD_CTRL                              4*4
  6. #define RF_SDRAM_CLKO_CFG                        4*5
  7. #define RF_SDRAM_CLKI_CFG                        4*6
  8. #define RF_SDRAM_CLKI_DLY_CFG                    4*7
  9. #define RF_CLK_MON_SEL                           4*8
  10. #define RF_CLK_MON_RESULT                        4*9
  11. #define RF_CLKEN0                                4*10
  12. #define RF_CLKEN1                                4*11
  13. #define RF_GCLKEN0                               4*12
  14. #define RF_GCLKEN1                               4*13
  15. #define RF_SYSCLK_DIV_SEL                        4*14
  16. #define RF_SYSCLK_SEL                            4*15
  17. #define RF_PLLV_CFG                              4*16
  18. #define RF_SFT_CFG0                              4*17
  19. #define RF_SFT_CFG1                              4*18
  20. #define RF_SFT_CFG2                              4*19
  21. #define RF_SFT_CFG3                              4*20
  22. #define RF_SFT_CFG4                              4*21
  23. #define RF_SFT_CFG5                              4*22
  24. #define RF_SFT_CFG6                              4*23
  25. #define RF_SFT_CFG7                              4*24
  26. #define RF_SFT_CFG8                              4*25
  27. #define RF_HW_BO                                 4*26
  28. #define RF_HW_CFG                                4*27
  29. #define RF_HW_CFG_CHG                            4*28
  30. #define RF_SFT_CFG9                              4*29
  31. #define RF_SFT_CFGA                              4*30
  32. #define RF_G0_RESERVED_1_1                       4*31
  33. #define RF_STC_15_0                              4*32
  34. #define RF_STC_31_16                             4*33
  35. #define RF_STC_32                                4*34
  36. #define RF_STC_DIVISOR                           4*35
  37. #define RF_RTC_15_0                              4*36
  38. #define RF_RTC_31_16                             4*37
  39. #define RF_RTC_DIVISOR                           4*38
  40. #define RF_STC_CONFIG                            4*39
  41. #define RF_TIMER0_CTRL                           4*40
  42. #define RF_TIMER0_CNT                            4*41
  43. #define RF_TIMER1_CTRL                           4*42
  44. #define RF_TIMER1_CNT                            4*43
  45. #define RF_TIMERW_CTRL                           4*44
  46. #define RF_TIMERW_CNT                            4*45
  47. #define RF_G1_UNUSED_1_2                         4*46
  48. #define RF_TIMER2_CTRL                           4*48
  49. #define RF_TIMER2_DIVISOR                        4*49
  50. #define RF_TIMER2_RELOAD                         4*50
  51. #define RF_TIMER2_CNT                            4*51
  52. #define RF_TIMER3_CTRL                           4*52
  53. #define RF_TIMER3_DIVISOR                        4*53
  54. #define RF_TIMER3_RELOAD                         4*54
  55. #define RF_TIMER3_CNT                            4*55
  56. #define RF_STCL_0                                4*56
  57. #define RF_STCL_1                                4*57
  58. #define RF_STCL_2                                4*58
  59. #define RF_ATC_0                                 4*59
  60. #define RF_ATC_1                                 4*60
  61. #define RF_ATC_2                                 4*61
  62. #define RF_G1_RESERVED_2                         4*62
  63. #define RF_INTR_MASK                             4*64
  64. #define RF_INTR_FLAG                             4*65
  65. #define RF_INTR_MASKED_FLAG                      4*66
  66. #define RF_INTR_CLEAR                            4*67
  67. #define RF_INTR_POLARITY                         4*68
  68. #define RF_INTR_EDGE                             4*69
  69. #define RF_INTR1_MASK                            4*70
  70. #define RF_INTR1_FLAG                            4*71
  71. #define RF_INTR1_MASKED_FLAG                     4*72
  72. #define RF_INTR1_CLEAR                           4*73
  73. #define RF_INTR1_POLARITY                        4*74
  74. #define RF_INTR1_EDGE                            4*75
  75. #define RF_LBC_CONTROL                           4*76
  76. #define RF_LBC_WATCHDOG                          4*77
  77. #define RF_REC_START                             4*78
  78. #define RF_REC_END                               4*79
  79. #define RF_REC_L_M                               4*80
  80. #define RF_G2_RESERVED_13                        4*81
  81. #define RF_RI_MISC_B0                            4*94
  82. #define RF_RI_MISC_B1                            4*95
  83. #define RF_SEQ_EXT                               4*96
  84. #define RF_H_SIZE                                4*97
  85. #define RF_V_SIZE                                4*98
  86. #define RF_G3_UNUSED                             4*99
  87. #define RF_PIC_CODING_TYPE                       4*100
  88. #define RF_PIC_F_CODE                            4*101
  89. #define RF_PIC_CODING_EXT0                       4*102
  90. #define RF_PIC_CODING_EXT1                       4*103
  91. #define RF_PIC_START                             4*104
  92. #define RF_DIS_PIC_ID                            4*105
  93. #define RF_DIS_SEQ_TAG                           4*106
  94. #define RF_G3_RESERVED_21                        4*107
  95. #define RF_VLD_CTRL                              4*128
  96. #define RF_VLD_STATUS                            4*129
  97. #define RF_VLD_DECODE_TIME                       4*130
  98. #define RF_G4_UNUSED                             4*131
  99. #define RF_VLD_MON0                              4*132
  100. #define RF_VLD_MON1                              4*133
  101. #define RF_VLD_MON2                              4*134
  102. #define RF_VLD_MON3                              4*135
  103. #define RF_JPEG_CONTROL                          4*136
  104. #define RF_JPEG_WRITE_ADDR                       4*137
  105. #define RF_JPEG_WRITE_DATA                       4*138
  106. #define RF_JPEG_READ_ADDR                        4*139
  107. #define RF_JPEG_READ_DATA                        4*140
  108. #define RF_ERROR_MB_THRESHOLD                    4*141
  109. #define RF_VLD_CONFIG                            4*142
  110. #define RF_VLD_TRB_TRD                           4*143
  111. #define RF_VLD_TRB_TRD_EXT                       4*144
  112. #define RF_VLD_2TRBP_2DP                         4*145
  113. #define RF_VLD_2TRBM_2DM                         4*146
  114. #define RF_VLD_PACKET_HEADER                     4*147
  115. #define RF_VLD_VOL_HEADER                        4*148
  116. #define RF_VLD_VOP_HEADER                        4*149
  117. #define RF_G4_RESERVED_9                         4*150
  118. #define RF_VLD_GOB_NUM                           4*159
  119. #define RF_MC_CONFIG                             4*160
  120. #define RF_REF0_LUMA                             4*161
  121. #define RF_REF0_CHROMA                           4*162
  122. #define RF_REF1_LUMA                             4*163
  123. #define RF_REF1_CHROMA                           4*164
  124. #define RF_BIDIR_LUMA                            4*165
  125. #define RF_BIDIR_CHROMA                          4*166
  126. #define RF_G5_RESERVED_0_5                       4*167
  127. #define RF_DIVX_MW_PAD                           4*172
  128. #define RF_VOP_ROUND_TYPE                        4*173
  129. #define RF_G5_RESERVED_1_10                      4*174
  130. #define RF_MC_SPARE_0                            4*184
  131. #define RF_MC_COMPRESS                           4*185
  132. #define RF_MC_PARDEC_START                       4*186
  133. #define RF_MC_PARDEC_END                         4*187
  134. #define RF_MC_MBWIDTH                            4*188
  135. #define RF_MC_PARDEC_EN                          4*189
  136. #define RF_MC_SPARE_6                            4*190
  137. #define RF_MC_SPARE_7                            4*191
  138. #define RF_SDCTRL_CFG0                           4*192
  139. #define RF_SDCTRL_CFG1                           4*193
  140. #define RF_SDCTRL_CFG2                           4*194
  141. #define RF_SDCTRL_MRS                            4*195
  142. #define RF_SDCTRL_SREF_CFG                       4*196
  143. #define RF_SDCTRL_CFG3                           4*197
  144. #define RF_SDCTRL_DATA_MON_ST                    4*198
  145. #define RF_SDCTRL_DATA_CYC_L                     4*199
  146. #define RF_SDCTRL_DATA_CYC_H                     4*200
  147. #define RF_SDCTRL_DATA_CNT_L                     4*201
  148. #define RF_SDCTRL_DATA_CNT_H                     4*202
  149. #define RF_SDCTRL_GCLK_DIS                       4*203
  150. #define RF_SDCTRL_AREF1_CFG                      4*204
  151. #define RF_SDCTRL_INT                            4*205
  152. #define RF_SDCTRL_INT_MASK                       4*206
  153. #define RF_SDCTRL_INT_STATUS                     4*207
  154. #define RF_SDCTRL_LMEM_BASE                      4*208
  155. #define RF_SDCTRL_LMEM_ROW_ST                    4*209
  156. #define RF_G6_UNUSED_0                           4*210
  157. #define RF_SDCTRL_CFG4                           4*211
  158. #define RF_G6_RESERVED_10                        4*212
  159. #define RF_SDCTRL_MISC_B0                        4*222
  160. #define RF_SDCTRL_MISC_B1                        4*223
  161. #define RF_DIS_X_START                           4*224
  162. #define RF_DIS_Y_START                           4*225
  163. #define RF_DIS_X_SIZE                            4*226
  164. #define RF_DIS_Y_SIZE                            4*227
  165. #define RF_V_OFFSET                              4*228
  166. #define RF_H_OFFSET                              4*229
  167. #define RF_VPP_BG_Y                              4*230
  168. #define RF_VPP_BG_CB_CR                          4*231
  169. #define RF_V_FILTER0_SETUP                       4*232
  170. #define RF_V_FILTER1_SETUP                       4*233
  171. #define RF_H_FILTER_SETUP                        4*234
  172. #define RF_VPP_CONFIG                            4*235
  173. #define RF_VPP_CONFIG1                           4*236
  174. #define RF_DS_FIELD_CONFIG                       4*237
  175. #define RF_DIP_CONFIG                            4*238
  176. #define RF_DIP_PARAM                             4*239
  177. #define RF_DIP_MV_PTR                            4*240
  178. #define RF_VPPREF0_LUMA                          4*241
  179. #define RF_VPPREF0_CHROMA                        4*242
  180. #define RF_VPPREF1_LUMA                          4*243
  181. #define RF_VPPREF1_CHROMA                        4*244
  182. #define RF_VPPBIDIR_LUMA                         4*245
  183. #define RF_VPPBIDIR_CHROMA                       4*246
  184. #define RF_DIP_REF_BASE                          4*247
  185. #define RF_DIP_PARAM_THRESHOLD                   4*248
  186. #define RF_DIP_PARAM_FADING                      4*249
  187. #define RF_VPP_ACT_REGION_TOP                    4*250
  188. #define RF_VPP_ACT_REGION_BOTTOM                 4*251
  189. #define RF_VPP_SPARE_0                           4*252
  190. #define RF_VPP_CLUT_AY                           4*253
  191. #define RF_VPP_CLUT_UV                           4*254
  192. #define RF_VPP_SPARE_1                           4*255
  193. #define RF_TV_MODE_6                             4*256
  194. #define RF_TV_SUBC_F_2                           4*262
  195. #define RF_TV_SUBC_P                             4*264
  196. #define RF_TV_LINE_T_2                           4*265
  197. #define RF_TV_LINE_B_2                           4*267
  198. #define RF_TV_CC_T                               4*269
  199. #define RF_TV_CC_B                               4*270
  200. #define RF_TV_CGMS_2                             4*271
  201. #define RF_TV_ID_STATUS                          4*273
  202. #define RF_TV_DAC_2                              4*274
  203. #define RF_TV_MISC_12                            4*276
  204. #define RF_DSP24_CONTROL                         4*288
  205. #define RF_DSP3DBG_MODE                          4*289
  206. #define RF_DSP3DBG_BREAK                         4*290
  207. #define RF_DSP3DBG_ADDR                          4*291
  208. #define RF_DSP3DBG_STEP                          4*292
  209. #define RF_DSP3DBG_RD_L                          4*293
  210. #define RF_DSP3DBG_RD_H                          4*294
  211. #define RF_DSP3DBG_WR_L                          4*295
  212. #define RF_DSP3DBG_WR_H                          4*296
  213. #define RF_DSP3DBG_PC                            4*297
  214. #define RF_ROM_L                                 4*298
  215. #define RF_ROM_H                                 4*299
  216. #define RF_DSP24YA                               4*300
  217. #define RF_PCMYA                                 4*301
  218. #define RF_AUDYA                                 4*302
  219. #define RF_G9_RESERVED                           4*303
  220. #define RF_DSP24_PORT_16                         4*304
  221. #define RF_OSD_TV_STD                            4*320
  222. #define RF_OSD_TV_OUT                            4*321
  223. #define RF_OSD_MIXER                             4*322
  224. #define RF_OSD_DISPLAY_STATUS                    4*323
  225. #define RF_OSD_EN                                4*324
  226. #define RF_OSD_TLINK_ADDR                        4*325
  227. #define RF_OSD_BLINK_ADDR                        4*326
  228. #define RF_Y_CLIP                                4*327
  229. #define RF_CB_CLIP                               4*328
  230. #define RF_OSD_BASE_ADDR                         4*329
  231. #define RF_OSD_MODE_12                           4*330
  232. #define RF_G10_RESERVED_10                       4*342
  233. #define RF_GRAPH_MODE                            4*352
  234. #define RF_GRAPH_STATUS                          4*353
  235. #define RF_DMA_MODE                              4*354
  236. #define RF_DMA_XADDR                             4*355
  237. #define RF_DMA_YADDR                             4*356
  238. #define RF_DMA_DONE                              4*357
  239. #define RF_G11_RESERVED_26                       4*358
  240. #define RF_G12_DVDDSP_VY                         4*384
  241. #define RF_G12_DVDDSP_VX                         4*385
  242. #define RF_DVDDSP_FUNCTION                       4*386
  243. #define RF_DVDDSP_ATA_CONFIG                     4*387
  244. #define RF_DVDDSP_BLOCKSIZE                      4*388
  245. #define RF_DVDDSP_BLOCKLENGTH                    4*389
  246. #define RF_G12_DVDDSP_RY                         4*390
  247. #define RF_DVDDSP_RX                             4*391
  248. #define RF_DVDDSP_PUBLIC                         4*392
  249. #define RF_DVDDSP_UDE_CONFIG                     4*393
  250. #define RF_DVDDSP_ATA_PIO_CYCLE                  4*394
  251. #define RF_DVDDSP_ATA_UDMA_CYCLE                 4*395
  252. #define RF_G12_RESERVED_4                        4*396
  253. #define RF_DVDDSP_MON_4                          4*400
  254. #define RF_G12_RESERVED1_12                      4*404
  255. #define RF_CSS_TK0                               4*416
  256. #define RF_CSS_TK1                               4*417
  257. #define RF_CSS_TK2                               4*418
  258. #define RF_CSS_TK3                               4*419
  259. #define RF_CSS_TBYTE                             4*420
  260. #define RF_CSS_PUBLIC                            4*421
  261. #define RF_CSS_CONFIG                            4*422
  262. #define RF_CSS_L0                                4*423
  263. #define RF_CSS_L1                                4*424
  264. #define RF_CSS_R0                                4*425
  265. #define RF_CSS_R1                                4*426
  266. #define RF_CPPM_AUKEY3                           4*427
  267. #define RF_CPPM_AUKEY2                           4*428
  268. #define RF_CPPM_AUKEY1                           4*429
  269. #define RF_CPPM_AUKEY0                           4*430
  270. #define RF_G13_RESERVED_17                       4*431
  271. #define RF_IOP_CONTROL                           4*448
  272. #define RF_IOP_STATUS                            4*449
  273. #define RF_IOP_BP                                4*450
  274. #define RF_IOP_REGSEL                            4*451
  275. #define RF_IOP_REGOUT                            4*452
  276. #define RF_IOP_MEMLIMIT                          4*453
  277. #define RF_G14_RESERVED_2                        4*454
  278. #define RF_IOP_DATA_8                            4*456
  279. #define RF_G14_RESERVED1_16                      4*464
  280. #define RF_SUP_FST_CMD_ADDR                      4*480
  281. #define RF_SUP_SND_CMD_ADDR                      4*481
  282. #define RF_SUP_H_SIZE                            4*482
  283. #define RF_SUP_MODE                              4*483
  284. #define RF_SUP_TV_MODE                           4*484
  285. #define RF_SUP_PANNING                           4*485
  286. #define RF_SUP_ASPECT_RATIO                      4*486
  287. #define RF_SUP_MON_5                             4*487
  288. #define RF_SUP_CONFIG                            4*492
  289. #define RF_SUP_BUFFER_LIMIT                      4*493
  290. #define RF_G15_RESERVED_18                       4*494
  291. #define RF_G16_RESERVED_32                       4*512
  292. #define RF_G17_RESERVED_32                       4*544
  293. #define RF_UART0_DATA                            4*576
  294. #define RF_UART0_LSR                             4*577
  295. #define RF_UART0_MSR                             4*578
  296. #define RF_UART0_LCR                             4*579
  297. #define RF_UART0_MCR                             4*580
  298. #define RF_UART0_DIV_L                           4*581
  299. #define RF_UART0_DIV_H                           4*582
  300. #define RF_UART0_ISC                             4*583
  301. #define RF_UART1_DATA                            4*584
  302. #define RF_UART1_LSR                             4*585
  303. #define RF_UART1_MSR                             4*586
  304. #define RF_UART1_LCR                             4*587
  305. #define RF_UART1_MCR                             4*588
  306. #define RF_UART1_DIV_L                           4*589
  307. #define RF_UART1_DIV_H                           4*590
  308. #define RF_UART1_ISC                             4*591
  309. #define RF_G18_RESERVED_16                       4*592
  310. #define RF_GPIO_MASTER_8                         4*608
  311. #define RF_GPIO_OE_8                             4*616
  312. #define RF_GPIO_OUT_8                            4*624
  313. #define RF_GPIO_IN_8                             4*632
  314. #define RF_CDDSP_CONFIG                          4*640
  315. #define RF_CDDSP_CONTROL                         4*641
  316. #define RF_CDDSP_MM_BCD                          4*642
  317. #define RF_CDDSP_SS_BCD                          4*643
  318. #define RF_CDDSP_FF_BCD                          4*644
  319. #define RF_CDDSP_STATUS                          4*645
  320. #define RF_CDDSP_MMSS                            4*646
  321. #define RF_CDDSP_FFMM                            4*647
  322. #define RF_G20_RESERVED_24                       4*648
  323. #define RF_TV_GAMMA_5                            4*672
  324. #define RF_TV_PCCON_18                           4*677
  325. #define RF_G21_RESERVED_9                        4*695
  326. #define RF_MBUS_BRIDGE_CONFIG                    4*704
  327. #define RF_EVBYA                                 4*705
  328. #define RF_OSDYA                                 4*706
  329. #define RF_CDWYA                                 4*707
  330. #define RF_CDRYA                                 4*708
  331. #define RF_SUPYA                                 4*709
  332. #define RF_EVBYA_LIMIT                           4*710
  333. #define RF_OSDYA_LIMIT                           4*711
  334. #define RF_CDWYA_LIMIT                           4*712
  335. #define RF_CDRYA_LIMIT                           4*713
  336. #define RF_SUPYA_LIMIT                           4*714
  337. #define RF_BS_YSTOP                              4*715
  338. #define RF_BS_RY                                 4*716
  339. #define RF_BS_YINIT                              4*717
  340. #define RF_BS_XINIT                              4*718
  341. #define RF_DVDDSP_VY                             4*719
  342. #define RF_DVDDSP_VX                             4*720
  343. #define RF_DVDDSP_RY                             4*721
  344. #define RF_CDR_VY                                4*722
  345. #define RF_CDR_VX                                4*723
  346. #define RF_SUPYA2                                4*724
  347. #define RF_SUPYA2_LIMIT                          4*725
  348. #define RF_IOPYA                                 4*726
  349. #define RF_CDRYA_XLIMIT                          4*727
  350. #define RF_MVCYA                                 4*728
  351. #define RF_G22_RESERVED_7                        4*729
  352. #define RF_G23_VPP_CONTRAST_ADJ_2                4*736
  353. #define RF_G23_VPP_CONTRAST_SLOPE_3              4*738
  354. #define RF_G23_VPP_HISTOGRAM_8                   4*741
  355. #define RF_G23_VPP_CHKSUM                        4*749
  356. #define RF_G23_VPP_MV_PTR                        4*750
  357. #define RF_G23_VPP_HUE_ADJ_2                     4*751
  358. #define RF_G23_RESERVED_15                       4*753
  359. #define RF_BUFCTL_8                              4*768
  360. #define RF_G24_RESERVED_24                       4*776
  361. #define RF_INVQ_QMX_PAR                          4*800
  362. #define RF_INVQ_MODE                             4*801
  363. #define RF_INVQ_CHKSUM                           4*802
  364. #define RF_G25_RESERVED_0_2                      4*803
  365. #define RF_INVQ_VOL_HEADER                       4*805
  366. #define RF_G25_RESERVED_1_26                     4*806
  367. #define RF_ROM_CONFIG                            4*832
  368. #define RF_WAIT_CYC1_0                           4*833
  369. #define RF_WAIT_CYC3_2                           4*834
  370. #define RF_OE_WAIT_CYC1_0                        4*835
  371. #define RF_OE_WAIT_CYC3_2                        4*836
  372. #define RF_WE_WAIT_CYC1_0                        4*837
  373. #define RF_WE_WAIT_CYC3_2                        4*838
  374. #define RF_IOCHRDY_WAIT_CYC                      4*839
  375. #define RF_ROM1_BASE                             4*840
  376. #define RF_ROM2_BASE                             4*841
  377. #define RF_ROM3_BASE                             4*842
  378. #define RF_PCMCIA_IORW_WAIT                      4*843
  379. #define RF_PCMCIA_CTRL                           4*844
  380. #define RF_G26_RESERVED1_8                       4*845
  381. #define RF_ADT_4                                 4*853
  382. #define RF_DAT_4                                 4*857
  383. #define RF_ADM_2                                 4*861
  384. #define RF_DAR                                   4*863
  385. #define RF_SBAR_CONFIG                           4*864
  386. #define RF_SBAR_PRR_16                           4*865
  387. #define RF_G27_RESERVED_2                        4*881
  388. #define RF_SBAR_SDRAM_ROM                        4*883
  389. #define RF_G27_RESERVED1_12                      4*884
  390. #define RF_RF_SDRAMIF_TBYA                       4*896
  391. #define RF_RF_SERVO_BAND_EN                      4*897
  392. #define RF_RF_SERVO_BAND_VAL                     4*898
  393. #define RF_G28_RESERVED_29                       4*899
  394. #define RF_RF_REGIF_ADDR                         4*928
  395. #define RF_RF_REGIF_WDATA                        4*929
  396. #define RF_RF_REGIF_RDATA                        4*930
  397. #define RF_RF_REGIF_SAMPLE_CTRL                  4*931
  398. #define RF_RF_REGIF_INTR_ADDR                    4*932
  399. #define RF_RF_REGIF_INTR_WDATA                   4*933
  400. #define RF_RF_REGIF_INTR_RDATA                   4*934
  401. #define RF_G29_RESERVED_25                       4*935
  402. #define RF_EMU_CFG_32                            4*960
  403. #define RF_AUD_RESET                             4*992
  404. #define RF_AUD_PCM_CFG                           4*993
  405. #define RF_AUD_SPDIF_CFG                         4*994
  406. #define RF_AUD_ENABLE                            4*995
  407. #define RF_AUD_ADC_STEREO_CFG                    4*996
  408. #define RF_AUD_ADC_MONO_CFG                      4*997
  409. #define RF_AUD_PCM_RAMP_DELTA                    4*998
  410. #define RF_AUD_PCM_RAMP_CFG                      4*999
  411. #define RF_AUD_PCM_RAMP_VALUE                    4*1000
  412. #define RF_AUD_SPDIF_PERIOD                      4*1001
  413. #define RF_AUD_FIFO_FLAG                         4*1002
  414. #define RF_AUD_CHN_PCM_CNT_10                    4*1003
  415. #define RF_AUD_XCK_CFG                           4*1013
  416. #define RF_AUD_PCM_BCK_CFG                       4*1014
  417. #define RF_AUD_IEC_BCLK_CFG                      4*1015
  418. #define RF_AUD_ADC_MCLK_CFG                      4*1016
  419. #define RF_AUD_DSP_RUN_CNT                       4*1017
  420. #define RF_AUD_DSP_STALL_CNT                     4*1018
  421. #define RF_AUD_DSP_RESET_FLAG                    4*1019
  422. #define RF_AUD_DSP_DEC_CNT_TOGGLE                4*1020
  423. #define RF_AUD_DSP_DEC_CNT                       4*1021
  424. #define RF_AUD_FPGA_V2_2                         4*1022
  425. #define RF_G32_RESERVED_32                       4*1024
  426. #define RF_G33_RESERVED_32                       4*1056
  427. #define RF_G34_RESERVED_32                       4*1088
  428. #define RF_G35_RESERVED_32                       4*1120
  429. #define RF_G36_RESERVED_32                       4*1152
  430. #define RF_G37_RESERVED_32                       4*1184
  431. #define RF_G38_RESERVED_32                       4*1216
  432. #define RF_G39_RESERVED_32                       4*1248
  433. #define RF_SDC_REQ_T_RESET                       4*1280
  434. #define RF_SDC_REQ_TIME_14_2                     4*1281
  435. #define RF_G40_RESERVED_3                        4*1309
  436. #define RF_SDC_DATA_CNT_14_2                     4*1312
  437. #define RF_SDC_N_REQ_CNT_2                       4*1340
  438. #define RF_SDC_CKE_CNT_2                         4*1342
  439. #define RF_G42_RESERVED_32                       4*1344
  440. #define RF_G43_RESERVED_32                       4*1376
  441. #define RF_G44_RESERVED_32                       4*1408
  442. #define RF_G45_RESERVED_32                       4*1440
  443. #define RF_G46_RESERVED_32                       4*1472
  444. #define RF_G47_RESERVED_32                       4*1504
  445. #define RF_G48_RESERVED_32                       4*1536
  446. #define RF_G49_RESERVED_32                       4*1568
  447. #define RF_G50_RESERVED_29                       4*1600
  448. #define RF_RISC_FPGA_VERSION_3                   4*1629
  449. #define RF_G51_RESERVED_29                       4*1632
  450. #define RF_BLOCK_FPGA_VERSION_3                  4*1661
  451. #define RF_G52_RESERVED_29                       4*1664
  452. #define RF_AUD_FPGA_VERSION_3                    4*1693
  453. #define RF_G53_RESERVED_32                       4*1696
  454. #define RF_G54_RESERVED_32                       4*1728
  455. #define RF_G55_RESERVED_32                       4*1760
  456. #define RF_G56_RESERVED_32                       4*1792
  457. #define RF_G57_RESERVED_32                       4*1824
  458. #define RF_G58_RESERVED_32                       4*1856
  459. #define RF_G59_RESERVED_32                       4*1888
  460. #define RF_G60_RESERVED_32                       4*1920
  461. #define RF_G61_RESERVED_32                       4*1952
  462. #define RF_G62_RESERVED_32                       4*1984
  463. #define RF_G63_RESERVED_32                       4*2016
  464. #define RF_GXX_RESERVED_192_32                   4*2048