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资源说明：The PowerPC 476FP embedded processor core is a 4-issue, 6-pipeline (floating-point [FP] L-pipe and integer L-pipe are shared), superscalar, 32-bit reduced instruction set computer (RISC) processor. The core supports the Power Instruction Set Architecture (ISA) Version 2.05. The architectural flexibility of this core enhances IBM application-specific integrated circuit (ASIC) solutions and applications. The core also supports memory coherency to broaden ASIC solutions into multiprocessing system environments and to increase its scalability for emerging wired communications, storage, and pervasive computing applications. Figure 1-1 shows the overall organization of the processor core.
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