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资源说明：MSL 即 Microsoft Library 是 DOS 版的 "WinHelp"，也就是现代版 Help Viewer 的始祖。
安装目录下有个 ini 文件，用来指定图书的路径，它即是目录。
文件来源自 http://wdl2.winworldpc.com/Abandonware%20SDKs/Microsoft Programmer's Library 1.3.7z
Microsoft Programmer's Library 1.3.iso
这就是 DOS 版的 MSDN！使用 DOSBOX 就可以运行此库。此库含一大古董级MS官方编程参考材料，主要针对 Windows 3.0 平台，真可谓之应用尽有：
MS Windows 3.0 SDK Guide to Programming
MS Windows 3.0 SDK Install. & Update Guide
MS Windows 3.0 SDK Programmer's Reference Vol. 1
MS Windows 3.0 SDK Programmer's Reference Vol. 2
MS Windows 3.0 SDK Tools
MS Windows 3.0 SDK Articles
All MS Windows 3.0 SDK Manuals
MS Windows 3.0 DDK Install. & Update Guide
MS Windows 3.0 DDK Adaptation Guide
MS Windows 3.0 DDK Virtual Device Adapt. Guide
MS Windows 3.0 DDK Printer & Font Kit
All MS Windows 3.0 DDK Manuals
MS Online User's Guide
Programming MS Windows
MS Windows Sample Code
MS KnowledgeBase - MS Windows
以及 Options => Library 菜单下提供的 9 个重要的参考资料，其中就有 C 和 MASM 这些重要的参考资料。这些是已安装的目录部分，鉴于 MASM 的重要性，特将其添加到压缩包内，免CD运行：
Windows References
OS/S References
Network References
MS-DOS References
MS Systems Journal
Hardware References
C References
MASM References
BASIC References
Pascal References
FORTUAN References
其中 C References 和 MASM References 包含：
Installing and Using MS MASM 6.0
MS MASM 6.0 Reference
MS MASM 6.0 Programmer's Guide
MS MASM 6.0 White Paper
QuickAssembler 2.01 Programmer's Guide
MS Mixed-Language Programming Guide
CodeView & Utilities User's Guide
MS Editor User's Guide
MS OnLine User's Guide
MASM Sample Code
MS KnowledgeBase - MASM
MS C 6.0 Advanced Programming Techniques
MS C 6.0 Installing and Using the P.D.S.
MS C 6.0 Reference
MS C 6.0 Run-Time Library Reference
MS C 6.0 Developer's Toolkit Reference
QuickC 2.5 Tool Kit
QuickC 2.5 C for Yourself
QuickC 2.5 Up and Running
QuickC 2.5 Update
MS Professional Advisor - Library Reference
MS Mixed-Language Programming Guide
CodeView & Utilities User's Guide
MS Editor User's Guide
MS OnLine User's Guide
MS QuickC Programming
Proficient C
C Sample Code
MS KnowledgeBase - C
些包囊括部分参考目录
Microsoft(R) Macro Assembler Reference
Document Conventions
Tools
Cross-References
Directives
Operators
Run-Time Operators
Processor
Coprocessor
Microsoft Macro Assembler - Programmer's Guide
Introduction
Chapter 1 Understanding Global Concepts
Chapter 2 Organizing MASM Segments
Chapter 3 Using Addresses and Pointers
Chapter 4 Defining and Using Integers
Chapter 5 Defining and Using Complex Data Types
Chapter 6 Using Floating-Point and Binary Coded Decimal Numbers
Chapter 7 Controlling Program Flow
Chapter 8 Sharing Data and Procedures among Modules and Libraries
Chapter 9 Using Macros
Chapter 10 Managing Projects with NMAKE
Chapter 11 Creating Help Files with HELPMAKE
Chapter 12 Linking Object Files with LINK
Chapter 13 Module-Definition Files
Chapter 14 Customizing the Microsoft Programmer's WorkBench
Chapter 15 Debugging Assembly-Language Programs with CodeView
Chapter 16 Converting C Header Files to MASM Include Files
Chapter 17 Writing OS/2 Applications
Chapter 18 Creating Dynamic-Link Libraries
Chapter 19 Writing Memory-Resident Software
Chapter 20 Mixed-Language Programming
Appendix A Differences between MASM 6.0 and 5.1
Appendix B BNF Grammar
Appendix C Generating and Reading Assembly Listings
Appendix D MASM Reserved Words
Appendix E Default Segment Names
Appendix F Error Messages
Glossary
INDEX
Microsoft Macro Assembler - White Paper
Table of Contents
Product Overview
The MASM 6.0 Assembler
Programmer's WorkBench
Integrated Documentation
Conclusion
System Requirements
Microsoft Mixed-Language Programming Guide
TABLE OF CONTENTS
INTRODUCTION
PART 1 --MIXED-LANGUAGE INTERFACES
CHAPTER 1 ELEMENTS OF MIXED-LANGUAGE PROGRAMMING
CHAPTER 2 BASIC CALLS TO HIGH-LEVEL LANGUAGES
CHAPTER 3 C CALLS TO HIGH-LEVEL LANGUAGES
CHAPTER 4 FORTRAN CALLS TO HIGH-LEVEL LANGUAGES
CHAPTER 5 PASCAL CALLS TO HIGH-LEVEL LANGUAGES
CHAPTER 6 ASSEMBLY-TO-HIGH-LEVEL INTERFACE
PART 2--DATA HANDLING REFERENCE
CHAPTER 7 PASSING BY REFERENCE OR VALUE
CHAPTER 8 NUMERICAL, LOGICAL, AND STRING DATA
CHAPTER 9 SPECIAL DATA TYPES
Index
Microsoft Codeview and Utilities User's Guide
Table of Contents
Introduction
Part 1 The CodeView Debugger
Chapter 1 Getting Started
Chapter 2 The CodeView Display
Chapter 3 Using Dialog Commands
Chapter 4 CodeView Expressions
Chapter 5 Executing Code
Chapter 6 Examining Data and Expressions
Chapter 7 Managing Breakpoints
Chapter 8 Managing Watch Statements
Chapter 9 Examining Code
Chapter 10 Modifying Code or Data
Chapter 11 CodeView Control Commands
Chapter 12 Debugging in Protected Mode
Part 2 Utilities
Chapter 13 Linking Object Files with LINK
Chapter 14 Incremental Linking with ILINK
Chapter 15 Managing Libraries with LIB
Chapter 16 NMAKE
Chapter 17 Using Other Utilities
Chapter 18 Linking for Windows and OS/2 Systems
Chapter 19 Using Module-Definition Files
Chapter 20 Creating Dual-Mode Programs with BIND
Chapter 21 Using EXEHDR
Appendix A Regular Expressions
Appendix B Using Exit Codes
Appendix C Error Messages
Glossary
Index
INTEL 80386 PROGRAMMER'S REFERENCE MANUAL 1986
Customer Support
Hardware Support Services
Software Support Services
Consulting Services
Customer Training
Training Center Locations
Table of Contents
Instruction Sets
Figures
Tables
Chapter 1 Introduction to the 80386
1.1 Organization of This Manual
1.2 Related Literature
1.3 Notational Conventions
Chapter 2 Basic Programming Model
2.1 Memory Organization and Segmentation
2.2 Data Types
2.3 Registers
2.4 Instruction Format
2.5 Operand Selection
2.6 Interrupts and Exceptions
Chapter 3 Applications Instruction Set
3.1 Data Movement Instructions
3.2 Binary Arithmetic Instructions
3.3 Decimal Arithmetic Instructions
3.4 Logical Instructions
3.5 Control Transfer Instructions
3.6 String and Character Translation Instructions
3.7 Instructions for Block-Structured Languages
3.8 Flag Control Instructions
3.9 Coprocessor Interface Instructions
3.10 Segment Register Instructions
3.11 Miscellaneous Instructions
Chapter 4 Systems Architecture
4.1 Systems Registers
4.2 Systems Instructions
Chapter 5 Memory Management
5.1 Segment Translation
5.2 Page Translation
5.3 Combining Segment and Page Translation
6.1 Why Protection?
6.2 Overview of 80386 Protection Mechanisms
6.3 Segment-Level Protection
6.4 Page-Level Protection
6.5 Combining Page and Segment Protection
Chapter 7 Multitasking
7.1 Task State Segment
7.2 TSS Descriptor
7.3 Task Register
7.4 Task Gate Descriptor
7.5 Task Switching
7.6 Task Linking
7.7 Task Address Space
Chapter 8 Input/Output
8.1 I/O Addressing
8.2 I/O Instructions
8.3 Protection and I/O
Chapter 9 Exceptions and Interrupts
9.1 Identifying Interrupts
9.2 Enabling and Disabling Interrupts
9.3 Priority Among Simultaneous Interrupts and Exceptions
9.4 Interrupt Descriptor Table
9.5 IDT Descriptors
9.6 Interrupt Tasks and Interrupt Procedures
9.7 Error Code
9.8 Exception Conditions
9.9 Exception Summary
9.10 Error Code Summary
Chapter 10 Initialization
10.1 Processor State After Reset
10.2 Software Initialization for Real-Address Mode
10.3 Switching to Protected Mode
10.4 Software Initialization for Protected Mode
10.5 Initialization Example
10.6 TLB Testing
Chapter 11 Coprocessing and Multiprocessing
11.1 Coprocessing
11.2 General Multiprocessing
Chapter 12 Debugging
12.1 Debugging Features of the Architecture
12.2 Debug Registers
12.3 Debug Exceptions
13.1 80286 Code Executes as a Subset of the 80386
13.2 Two ways to Execute 80286 Tasks
13.3 Differences From 80286
Chapter 14 80386 Real-Address Mode
14.1 Physical Address Formation
14.2 Registers and Instructions
14.3 Interrupt and Exception Handling
14.4 Entering and Leaving Real-Address Mode
14.5 Switching Back to Real-Address Mode
14.6 Real-Address Mode Exceptions
14.7 Differences From 8086
14.8 Differences From 80286 Real-Address Mode
Chapter 15 Virtual 8086 Mode
15.1 Executing 8086 Code
15.2 Structure of a V86 Task
15.3 Entering and Leaving V86 Mode
15.4 Additional Sensitive Instructions
15.5 Virtual I/O
15.6 Differences From 8086
15.7 Differences From 80286 Real-Address Mode
Chapter 16 Mixing 16-Bit and 32 Bit Code
16.1 How the 80386 Implements 16-Bit and 32-Bit Features
16.2 Mixing 32-Bit and 16-Bit Operations
16.3 Sharing Data Segments Among Mixed Code Segments
16.4 Transferring Control Among Mixed Code Segments
Chapter 17 80386 Instruction Set
17.1 Operand-Size and Address-Size Attributes
17.2 Instruction Format
AAA ASCII Adjust after Addition
AAD ASCII Adjust AX before Division
AAM ASCII Adjust AX after Multiply
AAS ASCII Adjust AL after Subtraction
ADC Add with Carry
ADD Add
AND Logical AND
ARPL Adjust RPL Field of Selector
BOUND Check Array Index Against Bounds
BSF Bit Scan Forward
BSR Bit Scan Reverse
BT Bit Test
BTC Bit Test and Complement
BTR Bit Test and Reset
BTS Bit Test and Set
CALL Call Procedure
CBW/CWDE Convert Byte to Word/Convert Word to Doubleword
CLC Clear Carry Flag
CLD Clear Direction Flag
CLI Clear Interrupt Flag
CLTS Clear Task-Switched Flag in CR0
CMC Complement Carry Flag
CMP Compare Two Operands
CMPS/CMPSB/CMPSW/CMPSD Compare String Operands
CWD/CDQ Convert Word to Doubleword/Convert Doubleword to
DAA Decimal Adjust AL after Addition
DAS Decimal Adjust AL after Subtraction
DEC Decrement by 1
DIV Unsigned Divide
ENTER Make Stack Frame for Procedure Parameters
HLT Halt
IDIV Signed Divide
IMUL Signed Multiply
IN Input from Port
INC Increment by 1
INS/INSB/INSW/INSD Input from Port to String
INT/INTO Call to Interrupt Procedure
IRET/IRETD Interrupt Return
Jcc Jump if Condition is Met
JMP Jump
LAHF Load Flags into AH Register
LAR Load Access Rights Byte
LEA Load Effective Address
LEAVE High Level Procedure Exit
LGDT/LIDT Load Global/Interrupt Descriptor Table Register
LGS/LSS/LDS/LES/LFS Load Full Pointer
LLDT Load Local Descriptor Table Register
LMSW Load Machine Status Word
LOCK Assert LOCK# Signal Prefix
LODS/LODSB/LODSW/LODSD Load String Operand
LOOP/LOOPcond Loop Control with CX Counter
LSL Load Segment Limit
LTR Load Task Register
MOV Move Data
MOV Move to/from Special Registers
MOVS/MOVSB/MOVSW/MOVSD Move Data from String to String
MOVSX Move with Sign-Extend
MOVZX Move with Zero-Extend
MUL Unsigned Multiplication of AL or AX
NEG Two's Complement Negation
NOP No Operation
NOT One's Complement Negation
OR Logical Inclusive OR
OUT Output to Port
OUTS/OUTSB/OUTSW/OUTSD Output String to Port
POP Pop a Word from the Stack
POPA/POPAD Pop all General Registers
POPF/POPFD Pop Stack into FLAGS or EFLAGS Register
PUSH Push Operand onto the Stack
PUSHA/PUSHAD Push all General Registers
PUSHF/PUSHFD Push Flags Register onto the Stack
RCL/RCR/ROL/ROR Rotate
REP/REPE/REPZ/REPNE/REPNZ Repeat Following String Operation
RET Return from Procedure
SAHF Store AH into Flags
SAL/SAR/SHL/SHR Shift Instructions
SBB Integer Subtraction with Borrow
SCAS/SCASB/SCASW/SCASD Compare String Data
SETcc Byte Set on Condition
SGDT/SIDT Store Global/Interrupt Descriptor Table Register
SHLD Double Precision Shift Left
SHRD Double Precision Shift Right
SLDT Store Local Descriptor Table Register
SMSW Store Machine Status Word
STC Set Carry Flag
STD Set Direction Flag
STI Set Interrupt Flag
STOS/STOSB/STOSW/STOSD Store String Data
STR Store Task Register
SUB Integer Subtraction
TEST Logical Compare
VERR, VERW Verify a Segment for Reading or Writing
WAIT Wait until BUSY# Pin is Inactive (HIGH)
XCHG Exchange Register/Memory with Register
XLAT/XLATB Table Look-up Translation
XOR Logical Exclusive OR
Appendix A Opcode Map
Key to Abbreviations
Codes for Addressing Method
Codes for Operant Type
Register Codes
Key to Codes
Status Flags' Functions
Key to Codes
Appendix D Condition Codes
Definition of Conditions
INTEL 80387 PROGRAMMER'S REFERENCE MANUAL 1987
Customer Support
Hardware Support Services
Software Support Services
Consulting Services
Customer Training
Training Center Locations
Preface
The 80386 Microsystem
The Organization of This Manual
Related Publications
Notational Conventions
Table of Contents
Figures
Tables
Chapter 1 Introduction to the 80387 Numerics Processor Extension
1.1 History
1.2 Performance
1.3 East of Use
1.4 Applications
1.5 Upgradability
1.6 Programming Interface
Chapter 2 80387 Numerics Processor Architecture
2.1 80387 Registers
2.2 Computation Fundamentals
Chapter 3 Special Computational Situations
3.1 Special Numeric Values
3.2 Numeric Exceptions
Chapter 4 The 80387 Instruction Set
4.1 Compatibility With the 80287 and 8087
4.2 Numeric Operands
4.3 Data Transfer Instructions
4.4 Nontranscendental Instructions
4.5 Comparison Instructions
4.6 Transcendental Instructions
4.7 Constant Instructions
4.8 Processor Control Instructions
5.1 Programming Facilities
5.2 Concurrent Processing With the 80387
Chapter 6 System-Level Numeric Programming
6.1 80386/80387 Architecture
6.2 Processor Initialization and Control
Chapter 7 Numeric Programming Examples
7.1 Conditional Branching Example
7.2 Exception Handling Examples
7.3 Flaoting-Point to ASCII Conversion Examples
7.4 Trigonometric Calculation Examples (Not Tested)
Appendix A Machine Instruction Encoding and Decoding
Appendix B Exception Summary
Appendix C Compatibility Between the 80387 and the 80287/8087
Appendix D Compatibility Between the 80387 and the 8087
Appendix E 80387 80-Bit CHMOS III Numeric Processor Extension
Appendix F PC/AT*-Compatible 80387 Connection
F.1 The PC/AT Interface
F.2 How to Achieve the Same Effect in an 80386 System
Glossary of 80387 and Floating-Point Terminology
INTEL 80286 PROGRAMMER'S REFERENCE MANUAL 1987
Preface
Notational Conventions
Table of Contents
Figures
Tables
Chapter 1 Introduction to the 80286
1.1 General Attributes
1.2 Modes of Operation
1.3 Advanced Features
1.4 Organization of This Book
1.5 Related Publications
Chapter 2 80286 Base Architecture
2.1 Memory Organization and Segmentation
2.2 Data Types
2.3 Registers
2.4 Addressing Modes
2.5 Input/Output
2.6 Interrupts and Exceptions
2.7 Hierarchy of Instruction Sets
Chapter 3 Basic Instruction Set
3.1 Data Movement Instructions
3.2 Flag Operation With the Basic Instruction Set
3.3 Arithmetic Instructions
3.4 Logical Instructions
3.5 Test and Compare Instructions
3.6 Control Transfer Instructions
3.7 Character Translation and String Instructions
3.8 Address Manipulation Instructions
3.9 Flag Control Instructions
3.10 Binary-Coded Decimal Arithmetic Instructions
3.11 Trusted Instructions
3.12 Processor Extension Instructions
Chapter 4 Extended Instruction Set
4.1 Block I/O Instructions
4.2 High-Level Instructions
Chapter 5 Real Address Mode
5.1 Addressing and Segmentation
5.2 Interrupt Handling
5.3 System Initialization
Chapter 6 Memory Management and Virtual Addressing
6.1 Memory Management Overview
6.2 Virtual Addresses
6.3 Descriptor Tables
6.4 Virtual-to-Physical Address Translation
6.5 Segments and Segment Descriptors
6.6 Memory Management Registers
7.1 Introduction
7.2 Memory Management and Protection
7.3 Privilege Levels and Protection
7.4 Segment Descriptor
7.5 Control Transfers
8.1 Introduction
8.2 Task State Segments and Descriptors
8.4 Task Linking
8.5 Task Gates
Chapter 9 Interrupts and Exceptions
9.1 Interrupt Descriptor Table
9.2 Hardware Initiated Interrupts
9.3 Software Initiated Interrupts
9.4 Interrupt Gates and Trap Gates
9.5 Task Gates and Interrupt Tasks
9.6 Protection Exceptions and Reserved Vectors
9.7 Additional Exceptions and Interrupts
Chapter 10 System Control and Initialization
10.1 System Flags and Registers
10.2 System Control Instructions
10.3 Privileged and Trusted Instructions
10.4 Initialization
Chapter 11 Advanced Topics
11.1 Virtual Memory Management
11.2 Special Segment Attributes
11.3 Pointer Validation
11.4 NPX Context Switching
11.5 Multiprocessor Condiderations
11.6 Shutdown
Appendix A 80286 System Initialization
Appendix B The 80286 Instruction Set
Opcode
Instruction
Clocks
Description
Flags Modified
Flags Undefined
Operation
Protected Mode Exceptions
Real Address Mode Exceptions
Protection Exceptions
Error Codes
#DF 8 Double Fault (Zero Error Code)
#GP 13 General Protection (Selector or Zero Error Code)
#MF 16 Math Fault (No Error Code)
#MP 9 Math Unit Protection Fault (No Error Code)
#NM 7 No Math Unit Available (No Error Code)
#NP 11 Not Present (Selector Error Code)
#SS 12 Stack Fault (Selector or Zero Error Code)
#TS 10 Invalid Task State Segment (Selector Error Code)
#UD 6 Undefined Opcode (No Error Code)
Privilege Level and Task Switching on the 80286
Software Compatibility Considerations
Hardware Compatibility Considerations
Appendix D 80286/80386 Software Compatibility Considerations
INTEL 80287 PROGRAMMER'S REFERENCE MANUAL 1987
An Introduction to the 80287
Notational Conventions
Table of Contents
Chapter 1 Overview of Numeric Processing
Introduction to the 80287 Numeric Processor Extension
80287 Numeric Processor Architecture
Computation Fundamentals
Special Computational Situations
Chapter 2 Programming Numeric Applications
The 80287 NPX Instruction Set
Programming Facilities
Concurrent Processing with the 80287
Chapter 3 System-Level Numeric Programming
80287 Architecture
Processor Initialization and Control
Chapter 4 Numeric Programming Examples
Conditional Branching Examples
Exception Handling Examples
Floating-Point to ASCII Conversion Examples
Trigonometric Calculation Examples
Appendix A Machine Instruction Encoding and Decoding
Appendix B Compatibility Between the 80287 NPX and the 8087
Appencix C Implementing the IEEE P754 Standard
Options Implemented in the 80287
Areas of the Standard Implemented in Software
Additional Software to Meet the Standard
Glossary of 80287 and Floating-Point Terminology
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