开通博客赚积分
发布资源赚积分
分类

源码开发语言/平台
当前位置：首页 > 源码/资料 > 压缩解压 > 查看源码
NandFlash.h
资源名称：SDK_M5661.rar　[点击查看]
上传用户：hjhsjcl
上传日期：2020-09-25
资源大小：11378k
文件大小：29k
源码类别：

压缩解压

开发平台：

C++ Builder

NandFlash.h：源码内容
  2. //1 ========= New Nandflash structure
  3. #if(NEW_FLASH)
  5. /*==========================================================================
  6. Copyright (c) 2004 ALi Corporation. All Rights Reserved
  8. File: NandFlash.h
  10. content: 
  12. History: Created by David Chiu 2004/3/30
  13. ==========================================================================*/
  14. #ifdef _NAND_FLASH_H_
  15. #define EXTERN
  16. #else
  17. #define EXTERN extern
  18. #endif
  20. //Allen060623 new_nf start
  21. //-------------------------------------------------------------------
  22. // Definition:
  23. //-------------------------------------------------------------------
  26. #if(_PM_INIT_|_PM_SYS_|(_PM_USB_&!_PM_MTP_)|_PM_MPTEST_|(SETTING_FOR_ICE_START)|(_PM_HST_&!_HOST_COPY_)|_PM_SAVE_|_PM_MTP_INIT_|SETTING_PM_DEL_DEBUG)  //Tne050412#1 
  27. #define _NAND_API_INIT_ 1
  28. #if(_PM_INIT_|_PM_USB_MSC_|SETTING_FOR_ISP_START)
  29. #define _NAND_INIT_PROCESS_ 1
  30. #else
  31. #define _NAND_INIT_PROCESS_ 0
  32. #endif
  33. #else
  34. #define _NAND_API_INIT_ 0
  35. #define _NAND_INIT_PROCESS_ 0
  36. #endif
  38. #if(_PM_SYS_)
  39. #define _NAND_API_ERASE_ 1
  40. #else
  41. #define _NAND_API_ERASE_ 0
  42. #endif
  44. #if(_PM_USB_|_PM_MPTEST_)
  45. #if(_PM_MTP_)
  46. #define _NAND_API_ATAPI_ 0
  47. #define _NAND_API_USB_ 0
  48. #else
  49. #define _NAND_API_USB_ 1
  50. #define _NAND_API_ATAPI_ 1
  51. #endif
  52. #else
  53. #define _NAND_API_USB_ 0
  54. #define _NAND_API_ATAPI_ 0
  55. #endif
  57. #define _NAND_COMMON_ 1
  58. #define _NAND_API_WRITE_ 1
  59. #define _NAND_API_READ_ 1
  60. #define _NAND_API_FINISHJOB_ 1
  62. #if(_PM_REC_)
  63. #define _NAND_API_STEPJOB_ 0
  64. #else
  65. #define _NAND_API_STEPJOB_ 0
  66. #endif
  68. #if(_PM_USB_MSC_|_PM_REC_) //060706: rec
  69. #define _NAND_FUNC_WL_ENABLE_ 1
  70. #define _NAND_FUNC_BADBLOCK_RECYCLE_ 1 //Allen060703
  71. #else
  72. #define _NAND_FUNC_WL_ENABLE_ 0
  73. #define _NAND_FUNC_BADBLOCK_RECYCLE_ 0 //Allen060703
  74. #endif
  76. #if(_NAND_FUNC_WL_ENABLE_)
  77. #define _NAND_API_RELOADWLC_ 1
  78. #else
  79. #define _NAND_API_RELOADWLC_ 0
  80. #endif
  82. #if(_PM_REC_|_PM_INIT_CHK_)
  83. #define _NAND_API_RW_SETTING_ 1
  84. #else
  85. #define _NAND_API_RW_SETTING_ 0
  86. #endif
  88. //
  89. // gxbNandInitStage
  90. //
  91. // 0: none
  92. // 1: NandInitPre done
  93. // 2: NandIdentify done
  94. // 3: NandInitGetConfig done
  95. // 4: NandInitBuildLUT done
  96. #define NDINIT_INIT 0
  97. #define NDINIT_PRE_DONE 1
  98. #define NDINIT_IDENT_DONE 2
  99. #define NDINIT_CONFIG_DONE 3
  100. #define NDINIT_LUT_DONE 4
  101. #define NDINIT_DONE NDINIT_LUT_DONE
  103. #define SRAM_CACHE_0_PATH 8
  104. #define SRAM_CACHE_1_PATH 12
  105. //Allen060623 new_nf end
  107. //Allen060627 debug
  108. //#define _WL_DEBUG_ 060720
  109. #ifdef _WL_DEBUG_
  110. EXTERN XDWORD gxdwDoWlNumber;
  111. EXTERN XWORD gxwWLCReset;
  112. EXTERN XWORD gxwProgramError;
  113. EXTERN XWORD gxwEraseError;
  115. EXTERN XBYTE gxbUsbWriteFail; //060628
  116. EXTERN XBYTE gxbUsbReadFail; //060628
  117. EXTERN XBYTE gxbSaveLutFail; //060628
  119. EXTERN XBYTE gxbBadBlockNum; //060629;
  120. #endif
  121. //Allen060627 debug
  123. //-------------------------------------------------------------------
  124. // Function prototype
  125. //-------------------------------------------------------------------
  126. //050407 allen
  127. //
  128. // USB API
  129. //
  130. EXTERN API void NandReadCapa(void);
  131. EXTERN API bit PhyAccessNand_pm(BYTE bType);
  132. EXTERN API bit EraseNandBlock(WORD wStartBlk, BYTE bBlkLen) large;
  133. EXTERN API bit UsbAccessDataSram(WORD wRaAddr, WORD wLen, bit fWrite) large;
  134. EXTERN API bit ReadSecurity(BYTE n);
  135. EXTERN API bit WriteSecurity(BYTE n) large; //Allen051102
  136. EXTERN API bit PhyBlockEraseAll(BYTE) large;//050323
  137. EXTERN API void PhyWriteConfig(void) large;
  138. EXTERN API void ReadBadBlock(BYTE bType);
  139. EXTERN API void GetIniDefectBlock(BYTE, BYTE) large; //Allen051221#1 060829
  140. EXTERN API void ReadDevice(void);
  141. EXTERN API bit DumpNandRawData() large; //Allen051124
  142. EXTERN API void ReadWearLevelingCount(BYTE bZone) large;
  143. EXTERN API bit NandIdentify(bit fEnableMultiBank) large; //Scott0601004
  146. //Ted 0203 start
  147. #if(_PM_INIT_)
  148. EXTERN bit UpgradeBlock0(WORD wStorLba, PBYTE pbTempRedu) large;
  149. EXTERN void EraseBlock0(void);
  150. #endif
  151. //Ted 0203 end
  153. //
  154. // PM API
  155. //
  156. EXTERN API bit  NandInit(BYTE) large;
  158. #if(_NAND_API_WRITE_)
  159. EXTERN API bit NandWrite(void);
  160. #endif
  162. #if(_NAND_API_READ_)
  163. EXTERN API bit NandRead(void);
  164. #endif
  166. #if(_NAND_API_FINISHJOB_)
  167. EXTERN API bit NandFinishJob(void);
  168. #endif
  170. #if(_NAND_API_STEPJOB_)
  171. EXTERN API bit NandStepJob(void);
  172. #endif
  174. #if(_NAND_API_ERASE_)
  175. EXTERN API void NandEraseBlock(WORD wLogBlk);
  176. #endif
  178. #if(_NAND_API_RELOADWLC_)
  179. EXTERN API void NandReloadCnt(void); //allen060517L call after loadprogram
  180. #endif
  182. #if(_NAND_API_USB_)
  183. EXTERN bit NandFlash0Read(void);
  184. EXTERN bit NandFlash0Write(void);
  185. #endif
  187. EXTERN bit SmPollingReady(void); //Allen060619
  189. EXTERN void ScanPM(void) large; //Nick061204  //NandRestore //Scott061212
  190. //Scott061212 Start
  191. #define RESTORE_STEP_NUM 4
  192. #define FIXED_RESTORE_BLK 2
  194. //NandRestore step define
  195. #define FullStep 1  //Restore a block with full step mode
  196. #define OneStep 2 //Restore a block with one step mode
  197. #define FinishAllBlk 3 //Restore all blocks with full step mode
  198. #define FisnishRemainStep 4  //finish restoring a block with one step mode
  199. #define PM_SCAN 0x80 //bit 7 use for disquitish scan PM or not //Nick061204
  202. #define SRAM_RESTORE_FLAG 0x90
  203. #define SRAM_RESTORE_ORG_BFFLAG 0x92
  204. #define SRAM_RESTORE_ORG_LOGBLK 0x94
  205. #define SRAM_RESTORE_ORG_PHYBLK 0x96
  206. #define SRAM_RESTORE_NEW_PHYBLK 0x98
  209. EXTERN XBYTE gxbRestoreNewZone, gxbRestoreOrgZone;
  211. //Absolute addressing Start
  212. /*
  213. #define RestoreFlag 1
  214. #define gfNandRestore 2
  215. #define gfNandRestoreFlag 4
  216. #define gxbECCErr2Bit 8 
  217. #define RESTORE_BLK_POOL_SIZE 3 
  219. EXTERN XWORD gwBlk;
  220. EXTERN XBYTE gbZone;
  221. EXTERN XBYTE gbii;
  223. EXTERN XWORD gxwRestoreBlkPool[RESTORE_BLK_POOL_SIZE];
  224. EXTERN XBYTE gxbRestoreBlkNum;
  225. EXTERN XBYTE gxbCurrentRestoreStep;
  226. EXTERN XBYTE gxbRestoreCopy;
  227. EXTERN XBYTE gxbNandRestoreFlag; //setting flag
  228. EXTERN XBYTE gxbRestoreSetPage;
  229. EXTERN XBYTE gxbRestoreCMD;
  230. EXTERN XWORD gxwRestoreNewBlk, gxwRestoreSetBlk; 
  232. EXTERN XWORD gxwRestoreOrgBlk, gxwRestoreLogOrgBlk;
  233. EXTERN XBYTE gxbBFFlag;
  234. */
  235. //Absolute addressing End
  239. #if(_PM_INIT_CHK_|_PM_INIT_) 
  240. EXTERN XWORD gxwRedu67[4];
  241. #endif
  243. #if(_PM_INIT_CHK_) //Scott061212
  244. EXTERN API void CheckNandReStore(void) large; 
  245. #endif
  247. #if(_PM_INIT_)
  248. EXTERN API void RecoverNandReStore(void) large;
  249. #endif
  251. EXTERN API void ChkErr2BitSMReset() large;
  252. EXTERN API bit NandRestore() large;
  254. //Scott061212 End
  258. #undef EXTERN
  260. //-------------------------------------------------------------------
  261. // Definition
  262. //-------------------------------------------------------------------
  263. //
  264. // Define NAND Command
  265. //
  266. #define NAND_CMD_READ 0x00
  267. #define NAND_CMD_READ2 0x01
  268. #define NAND_CMD_READ_DUMMY 0x03
  269. #define NAND_CMD_READ_CYCLE_2 0x30
  270. #define NAND_CMD_READ3 0x50
  271. #define NAND_CMD_READ_COPYBACK 0x35
  272. #define NAND_CMD_ID_READ 0x90
  273. #define NAND_CMD_ID_READ_EXT 0x91 //050303
  274. #define NAND_CMD_RESET 0xFF
  275. #define NAND_CMD_PROGRAM 0x80
  276. #define NAND_CMD_PROGRAM_CONFIRM 0x10
  277. #define NAND_CMD_PROGRAM_DUMMY 0x11
  278. #define NAND_CMD_PROGRAM_CACHE 0x15
  279. #define NAND_CMD_COPYBACK_PROGRAM 0x85
  280. #define NAND512_CMD_COPYBACK_PROGRAM 0x8A //NAND512
  281. #define NAND_CMD_BLOCK_ERASE 0x60
  282. #define NAND_CMD_ERASE 0xD0
  283. #define NAND_CMD_RANDOM_INPUT 0x85
  284. #define NAND_CMD_RANDOM_OUTPUT 0x05
  285. #define NAND_CMD_RANDOM_OUTPUT2 0xE0
  286. #define NAND_CMD_STS_READ 0x70
  287. #define NAND_CMD_STS_READ_71 0x71
  294. //-------------------------------------------------------------------
  295. // Macro define
  296. //-------------------------------------------------------------------
  297. //GPIOE[3]: SM_RDY => Nand0,1 share 1 wire
  298. /*#define Nand0Ready(void) Allen060619 test
  299. {
  300. while (!(obSMCTRL & NAND_READY)) {}
  301. }*/
  302. #define Nand0Ready SmPollingReady //Allen060619
  304. /////////////////050303 start
  305. #define NandCmd(CMD)
  306. {
  307. obSMCTRL=NAND_COMMAND;
  308. obSMDATALO=CMD;
  309. obSMCTRL=NAND_NORMAL;
  310. }
  312. #define Nand2KAddr()
  313. {
  314. obSMCTRL = NAND_ADDRESS;
  315. obSMDATALO = gwColAddress & 0xFF;
  316. obSMDATALO = (gwColAddress >> 8) & 0xFF;
  317. obSMDATALO = *((BYTE*)&gdwRowAddr+3);
  318. obSMDATALO = *((BYTE*)&gdwRowAddr+2);
  319. if (gfRowAddr3Cycle)
  320. obSMDATALO = *((BYTE*)&gdwRowAddr+1);
  321. obSMCTRL = NAND_DATA;
  322. }
  323. #define Nand2KRowAddr()
  324. {
  325. obSMCTRL = NAND_ADDRESS;
  326. obSMDATALO = *((BYTE*)&gdwRowAddr+3);
  327. obSMDATALO = *((BYTE*)&gdwRowAddr+2);
  328. if (gfRowAddr3Cycle)
  329. obSMDATALO = *((BYTE*)&gdwRowAddr+1);
  330. obSMCTRL = NAND_DATA;
  331. }
  333. #define Nand512Addr()
  334. {
  335. obSMCTRL = NAND_ADDRESS;
  336. obSMDATALO = 0x00;
  337. obSMDATALO = *((BYTE *)&gdwRowAddr + 3);
  338. obSMDATALO = *((BYTE *)&gdwRowAddr + 2);
  339. if(gfRowAddr3Cycle) 
  340. obSMDATALO = *((BYTE*)&gdwRowAddr+1);
  341. obSMCTRL = NAND_DATA;
  342. }
  343. #define Nand512RowAddr()
  344. {
  345. obSMCTRL = NAND_ADDRESS;
  346. obSMDATALO = *((BYTE *)&gdwRowAddr + 3);
  347. obSMDATALO = *((BYTE *)&gdwRowAddr + 2);
  348. if(gfRowAddr3Cycle) 
  349. obSMDATALO = *((BYTE*)&gdwRowAddr+1);
  350. obSMCTRL = NAND_DATA;
  351. }
  352. /////////////////050303 end
  354. //NAND512 start
  355. //041223 start: gwColAddress del
  356. #define Nand512Read1(void)
  357. {
  358. obSMCTRL = NAND_COMMAND;
  359. obSMDATALO = NAND_CMD_READ;
  360. obSMCTRL = NAND_ADDRESS;
  361. obSMDATALO = 0x00;
  362. obSMDATALO = *((BYTE *)&gdwRowAddr + 3);
  363. obSMDATALO = *((BYTE *)&gdwRowAddr + 2);
  364. if(gfRowAddr3Cycle)
  365. obSMDATALO = *((BYTE*)&gdwRowAddr+1);
  366. obSMCTRL = NAND_DATA;
  367. }
  369. #define Nand512Read2(void)
  370. {
  371. obSMCTRL = NAND_COMMAND;
  372. obSMDATALO = NAND_CMD_READ2;
  373. obSMCTRL = NAND_ADDRESS;
  374. obSMDATALO = 0x00;
  375. obSMDATALO = *((BYTE *)&gdwRowAddr + 3);
  376. obSMDATALO = *((BYTE *)&gdwRowAddr + 2);
  377. if(gfRowAddr3Cycle)
  378. obSMDATALO = *((BYTE*)&gdwRowAddr+1);
  379. obSMCTRL = NAND_DATA;
  380. }
  382. #define Nand512Read3(void)
  383. {
  384. obSMCTRL = NAND_COMMAND;
  385. obSMDATALO = NAND_CMD_READ3;
  386. obSMCTRL = NAND_ADDRESS;
  387. obSMDATALO = 0x00;
  388. obSMDATALO = *((BYTE *)&gdwRowAddr + 3);
  389. obSMDATALO = *((BYTE *)&gdwRowAddr + 2);
  390. if(gfRowAddr3Cycle)
  391. obSMDATALO = *((BYTE*)&gdwRowAddr+1);
  392. obSMCTRL = NAND_DATA;
  393. }
  395. #define Nand512Write(void)
  396. {
  397. obSMCTRL = NAND_COMMAND;
  398. obSMDATALO = NAND_CMD_PROGRAM;
  399. obSMCTRL = NAND_ADDRESS;
  400. obSMDATALO = 0x00;
  401. obSMDATALO = *((BYTE *)&gdwRowAddr + 3);
  402. obSMDATALO = *((BYTE *)&gdwRowAddr + 2);
  403. if(gfRowAddr3Cycle)
  404. obSMDATALO=*((BYTE *)&gdwRowAddr + 1);
  405. obSMCTRL = NAND_DATA;
  406. }
  408. #define Nand512ReadCopyBack(void)
  409. {
  410. obSMCTRL = NAND_COMMAND;
  411. obSMDATALO = NAND_CMD_READ;
  412. obSMCTRL = NAND_ADDRESS;
  413. obSMDATALO = 0x00;
  414. obSMDATALO = *((BYTE *)&gdwRowAddr + 3);
  415. obSMDATALO = *((BYTE *)&gdwRowAddr + 2);
  416. if(gfRowAddr3Cycle)
  417. obSMDATALO=*((BYTE *)&gdwRowAddr + 1);
  418. obSMCTRL = NAND_NORMAL;
  419. }
  421. #define Nand512WriteCopyBack(void)
  422. {
  423. obSMCTRL = NAND_COMMAND;
  424. obSMDATALO = NAND512_CMD_COPYBACK_PROGRAM;
  425. obSMCTRL = NAND_ADDRESS;
  426. obSMDATALO = 0x00;
  427. obSMDATALO = *((BYTE *)&gdwRowAddr + 3);
  428. obSMDATALO = *((BYTE *)&gdwRowAddr + 2);
  429. if(gfRowAddr3Cycle)
  430. obSMDATALO=*((BYTE *)&gdwRowAddr + 1);
  431. obSMCTRL = NAND_COMMAND;
  432. obSMDATALO = NAND_CMD_PROGRAM_CONFIRM;
  433. obSMCTRL = NAND_DATA;
  434. }
  436. #define Nand512BlockErase(void)
  437. {
  438. obSMCTRL = NAND_COMMAND;
  439. obSMDATALO = NAND_CMD_BLOCK_ERASE;
  440. obSMCTRL = NAND_ADDRESS;
  441. obSMDATALO = *((BYTE *)&gdwRowAddr + 3);
  442. obSMDATALO = *((BYTE *)&gdwRowAddr + 2);
  443. if(gfRowAddr3Cycle)
  444. obSMDATALO=*((BYTE *)&gdwRowAddr + 1);
  445. obSMCTRL = NAND_COMMAND;
  446. obSMDATALO = NAND_CMD_ERASE;
  447. obSMCTRL = NAND_NORMAL;
  448. }
  449. //041223 end: gwColAddress del
  450. //NAND512 end
  452. #define Nand0Reset(void)
  453. {
  454. obSMCTRL = NAND_COMMAND;
  455. obSMDATALO = NAND_CMD_RESET;
  456. obSMCTRL = NAND_DATA;
  457. Nand0Ready();
  458. obSMCTRL = NAND_NORMAL;
  459. }
  461. #define Nand2KRead(void)
  462. {
  463. obSMCTRL = NAND_COMMAND;
  464. obSMDATALO = NAND_CMD_READ;
  465. obSMCTRL = NAND_ADDRESS;
  466. obSMDATALO = gwColAddress & 0xFF;
  467. obSMDATALO = (gwColAddress >> 8) & 0xFF;
  468. obSMDATALO = *((BYTE*)&gdwRowAddr+3);
  469. obSMDATALO = *((BYTE*)&gdwRowAddr+2);
  470. if (gfRowAddr3Cycle)
  471. obSMDATALO = *((BYTE*)&gdwRowAddr+1);
  472. obSMCTRL = NAND_COMMAND;
  473. obSMDATALO = NAND_CMD_READ_CYCLE_2;
  474. obSMCTRL = NAND_DATA;
  475. }
  477. #define Nand2KWrite(void)
  478. {
  479. obSMCTRL = NAND_COMMAND;
  480. obSMDATALO = NAND_CMD_PROGRAM;
  481. obSMCTRL = NAND_ADDRESS;
  482. obSMDATALO = gwColAddress & 0xFF;
  483. obSMDATALO = (gwColAddress >> 8) & 0xFF;
  484. obSMDATALO = *((BYTE*)&gdwRowAddr+3);
  485. obSMDATALO = *((BYTE*)&gdwRowAddr+2);
  486. if (gfRowAddr3Cycle)
  487. obSMDATALO = *((BYTE*)&gdwRowAddr+1);
  488. obSMCTRL = NAND_DATA;
  489. }
  491. #define Nand0WriteConfirm(void)
  492. {
  493. obSMCTRL = NAND_COMMAND;
  494. obSMDATALO = NAND_CMD_PROGRAM_CONFIRM;
  495. obSMCTRL = NAND_NORMAL;
  496. }
  498. #define Nand2KReadCopyBack(void)
  499. {
  500. obSMCTRL = NAND_COMMAND;
  501. obSMDATALO = NAND_CMD_READ;
  502. obSMCTRL = NAND_ADDRESS;
  503. obSMDATALO = gwColAddress & 0xFF;
  504. obSMDATALO = (gwColAddress >> 8) & 0xFF;
  505. obSMDATALO = *((BYTE*)&gdwRowAddr+3);
  506. obSMDATALO = *((BYTE*)&gdwRowAddr+2);
  507. if (gfRowAddr3Cycle)
  508. obSMDATALO = *((BYTE*)&gdwRowAddr+1);
  509. obSMCTRL = NAND_COMMAND;
  510. obSMDATALO = NAND_CMD_READ_COPYBACK;
  511. obSMCTRL = NAND_DATA;
  512. }
  514. #define Nand2KWriteCopyBack(void)
  515. {
  516. obSMCTRL = NAND_COMMAND;
  517. obSMDATALO = NAND_CMD_COPYBACK_PROGRAM;
  518. obSMCTRL = NAND_ADDRESS;
  519. obSMDATALO = gwColAddress & 0xFF;
  520. obSMDATALO = (gwColAddress >> 8) & 0xFF;
  521. obSMDATALO = *((BYTE*)&gdwRowAddr+3);
  522. obSMDATALO = *((BYTE*)&gdwRowAddr+2);
  523. if (gfRowAddr3Cycle)
  524. obSMDATALO = *((BYTE*)&gdwRowAddr+1);
  525. obSMCTRL = NAND_COMMAND;
  526. obSMDATALO = NAND_CMD_PROGRAM_CONFIRM;
  527. obSMCTRL = NAND_DATA;
  528. }
  530. #define Nand2KBlockErase(void)
  531. {
  532. obSMCTRL = NAND_COMMAND;
  533. obSMDATALO = NAND_CMD_BLOCK_ERASE;
  534. obSMCTRL = NAND_ADDRESS;
  535. obSMDATALO = *((BYTE*)&gdwRowAddr+3);
  536. obSMDATALO = *((BYTE*)&gdwRowAddr+2);
  537. if (gfRowAddr3Cycle)
  538. obSMDATALO = *((BYTE*)&gdwRowAddr+1);
  539. obSMCTRL = NAND_COMMAND;
  540. obSMDATALO = NAND_CMD_ERASE;
  541. obSMCTRL = NAND_NORMAL;
  542. }
  544. #define Nand0ReadStatus(void)
  545. {
  546. obSMCTRL = NAND_COMMAND;
  547. obSMDATALO = NAND_CMD_STS_READ;
  548. obSMCTRL = NAND_DATA;
  549. Nand0Ready();
  550. gxbNandStatus = obSMDATALO;
  551. obSMCTRL = NAND_NORMAL;
  552. }
  554. //******* AG **************************
  556. #define Nand0ReadStatus71(void)
  557. {
  558. obSMCTRL = NAND_COMMAND;
  559. obSMDATALO = NAND_CMD_STS_READ_71;
  560. obSMCTRL = NAND_DATA;
  561. Nand0Ready();
  562. gxbNandStatus = obSMDATALO;
  563. obSMCTRL = NAND_NORMAL;
  564. }
  566. //*************************************
  569. #define Set512PointerA()
  570. {
  571. obSMCTRL = NAND_COMMAND;
  572. obSMDATALO = NAND_CMD_READ;
  573. }
  574. #define Set512PointerB()
  575. {
  576. obSMCTRL = NAND_COMMAND;
  577. obSMDATALO = NAND_CMD_READ2;
  578. }
  579. #define Set512PointerC()
  580. {
  581. obSMCTRL = NAND_COMMAND;
  582. obSMDATALO = NAND_CMD_READ3;
  583. }
  587. #else
  588. //1 =============== Old Nand Flash Structure
  590. /*==========================================================================
  591. Copyright (c) 2004 ALi Corporation. All Rights Reserved
  593. File: NandFlash.h
  595. content: 
  597. History: Created by David Chiu 2004/3/30
  598. ==========================================================================*/
  599. #ifdef _NAND_FLASH_H_
  600. #define EXTERN
  601. #else
  602. #define EXTERN extern
  603. #endif
  605. #if( _PM_PLAY_|_PM_MTP_) //for DRM add code model adjust //Nick061120 add _PM_MTP_
  606. #define L_S_MODEL_DEF large
  607. #else
  608. #define L_S_MODEL_DEF
  609. #endif
  611. //-------------------------------------------------------------------
  612. // Function prototype
  613. //-------------------------------------------------------------------
  614. //050407 allen
  615. //
  616. // USB API
  617. //
  618. EXTERN API void NandReadCapa(void);
  619. //EXTERN API bit NandFormatCapa(XBYTE type);//Yen_Lung050629 //Nick060530 mark it
  620. EXTERN API bit PhyAccessNand_pm(BYTE bType);
  621. EXTERN API bit EraseNandBlock(WORD wStartBlk, BYTE bBlkLen);
  622. EXTERN API bit UsbAccessDataSram(WORD wRaAddr, WORD wLen, bit fWrite);
  623. EXTERN API bit ReadSecurity(BYTE n);
  624. EXTERN API bit WriteSecurity(BYTE n) large; //Allen051102
  625. EXTERN API bit PhyBlockEraseAll(BYTE) large;//050323
  626. EXTERN API void PhyWriteConfig(void) large;
  627. EXTERN API void ReadBadBlock(BYTE bType);
  628. EXTERN API void GetIniDefectBlock(BYTE) large; //Allen051221#1
  629. EXTERN API void ReadDevice(void);
  630. EXTERN API bit DumpNandRawData() large; //Allen051124
  633. #if(_PM_REC_)
  634. EXTERN BOOL gfNandStepJobEn;
  635. #endif
  638. //Ted 0203 start
  639. #if(_PM_INIT_)
  640. EXTERN bit UpgradeBlock0(WORD wStorLba, PBYTE pbTempRedu) large;
  641. EXTERN void EraseBlock0(void);
  642. #endif
  643. //Ted 0203 end
  645. //
  646. // PM API
  647. //
  648. EXTERN API bit  NandInit(void);
  649. EXTERN API bit NandWrite(void);
  650. EXTERN API bit NandRead(void);
  651. EXTERN API bit NandFinishJob(void);
  652. EXTERN API bit NandStepJob(void); //allen050602#1
  653. EXTERN API void NandEraseBlock(WORD wLogBlk);
  654. EXTERN API void NandPowerOff(void);
  656. #if(USE_SPECIAL_REC_PRC) //Scott060607 Start
  657. EXTERN API void CallLUT0(BYTE bType) large;
  658. EXTERN API bit PhyWritePagefromSram(BYTE bStorPath, bit fConfirm, BYTE bLen) large;
  659. EXTERN API bit PhyReadPageToSram(BYTE bStorPath, BYTE bLen) large;
  660. EXTERN API void SetRowAddress(WORD wBlk,BYTE bPage);
  661. EXTERN API void ConvertZoneAddress(BYTE bZone);
  662. EXTERN API void PhyErase1Block(bit fCheckStatus) large;
  663. #endif //Scott060607 End
  665. //vicky050504#1
  666. EXTERN API void  NandInitPre(void);
  668. //
  669. // Nand Module use
  670. //
  671. EXTERN bit NandFlash0Read(void);
  672. EXTERN bit NandFlash0Write(void);
  673. //EXTERN bit Nand0LeftJob(BYTE) L_S_MODEL_DEF; 050729: local function, not API.
  675. //-------------------------------------------------------------------
  676. // Global variables and Extern global variables
  677. //-------------------------------------------------------------------
  678. //Scott061114 Start
  679. //#define RESTORE_BLK_POOL_SIZE 3 //Nick061120 mark it
  680. #define RESTORE_STEP_NUM 4
  681. #define FIXED_RESTORE_BLK 2
  683. #define SHIFT_PHYBLOCK_ZONE 10 //Nick061120
  684. #define MASK_PHYBLOCK_ZONE 0x3FF //Nick061120
  686. //Nick061120 start
  687. //NandRestore step define
  688. #define FullStep 1  //Restore a block with full step mode
  689. #define OneStep 2 //Restore a block with one step mode
  690. #define FinishAllBlk 3 //Restore all blocks with full step mode
  691. #define FisnishRemainStep 4  //finish restoring a block with one step mode
  692. #define PM_SCAN 0x80 //bit 7 use for disquitish scan PM or not //Nick061204
  693. //Nick061120 end
  696. EXTERN XBYTE gxbRestoreNewZone, gxbRestoreOrgZone;
  698. //Nick061120 start have been absolute addressed
  699. /*
  700. //Absolute addressing Start
  701. EXTERN XWORD gxwRestoreBlkPool[RESTORE_BLK_POOL_SIZE];
  702. EXTERN XBYTE gxbRestoreBlkNum;
  703. EXTERN XBYTE gxbCurrentRestoreStep;
  704. EXTERN XBYTE gxbRestoreCopy;
  705. EXTERN XBYTE gxbBFFlag;  
  706. EXTERN XWORD gxwRestoreNewBlk, gxwRestoreOrgBlk, gxwRestoreLogOrgBlk, gxwRestoreSetBlk; 
  707. EXTERN BOOL  gfNandRestoreFlag;  //find a BF_RESTORE block
  708. EXTERN XBYTE gxbNandRestoreFlag; //setting flag
  709. EXTERN XBYTE gxbRestoreSetPage;
  710. EXTERN BOOL  gfNandRestore; //if add a block to restore pool
  711. EXTERN XBYTE gxbRestoreCMD;
  712. //Absolute addressing End
  713. */
  715. //Scott061123 Start
  716. #if(_PM_INIT_CHK_|_PM_INIT_) //Scott061207
  717. EXTERN XWORD gxwRedu67[4];
  718. #endif
  719. //Scott061123 End
  721. //Nick061120 end
  722. //Scott061204 Start
  723. #if(_PM_INIT_)
  724. EXTERN API void RecoverNandReStore(void) large;
  725. #endif
  726. //Scott061204 End
  727. EXTERN API void ChkErr2BitSMReset() large; //Scott061205
  729. EXTERN API void AddRestoreBlk() large;  
  730. EXTERN API bit NandRestore() large;
  731. EXTERN API bit Batch0CopyBack(BYTE StartPage, BYTE EndPage) L_S_MODEL_DEF;
  732. //Scott061114 End
  734. #if(_PM_INIT_CHK_) //Scott061212
  735. EXTERN API void CheckNandReStore(void) large; 
  736. #endif
  739. EXTERN void ScanPM(void) large; //Nick061204  //NandRestore
  741. //EXTERN IDWORD gdwRowAddr; allen 050402: abs
  742. EXTERN void SM_Reset(void); //Nick061208
  743. #undef EXTERN
  744. //Vicky050323#3
  745. /*
  746. //GPIOB0
  747. #define SystemPowerOff() { obGPIOBDAT |= 0x01;
  748. obGPIOBDIR |= 0x01;
  749. }
  750. //redraw 7 times
  751. #define SystemPowerOn() { if(obGPIOBDAT&0x01)
  752. {
  753. obGPIOBDAT &= 0xFE;
  754. obGPIOBDIR |= 0x01;
  755. gbDrawUsbUi|=0x07;
  756. }
  757. }
  758. */
  759. //-------------------------------------------------------------------
  760. // Definition
  761. //-------------------------------------------------------------------
  762. //
  763. // Define NAND Command
  764. //
  765. #define NAND_CMD_READ 0x00
  766. #define NAND_CMD_READ2 0x01
  767. #define NAND_CMD_READ_DUMMY 0x03
  768. #define NAND_CMD_READ_CYCLE_2 0x30
  769. #define NAND_CMD_READ3 0x50
  770. #define NAND_CMD_READ_COPYBACK 0x35
  771. #define NAND_CMD_ID_READ 0x90
  772. #define NAND_CMD_ID_READ_EXT 0x91 //050303
  773. #define NAND_CMD_RESET 0xFF
  774. #define NAND_CMD_PROGRAM 0x80
  775. #define NAND_CMD_PROGRAM_CONFIRM 0x10
  776. #define NAND_CMD_PROGRAM_DUMMY 0x11
  777. #define NAND_CMD_PROGRAM_CACHE 0x15
  778. #define NAND_CMD_COPYBACK_PROGRAM 0x85
  779. #define NAND512_CMD_COPYBACK_PROGRAM 0x8A //NAND512
  780. #define NAND_CMD_BLOCK_ERASE 0x60
  781. #define NAND_CMD_ERASE 0xD0
  782. #define NAND_CMD_RANDOM_INPUT 0x85
  783. #define NAND_CMD_RANDOM_OUTPUT 0x05
  784. #define NAND_CMD_RANDOM_OUTPUT2 0xE0
  785. #define NAND_CMD_STS_READ 0x70
  786. #define NAND_CMD_STS_READ_71 0x71
  793. //-------------------------------------------------------------------
  794. // Macro define
  795. //-------------------------------------------------------------------
  796. //GPIOE[3]: SM_RDY => Nand0,1 share 1 wire
  797. #define Nand0Ready(void)
  798. {
  799. while (!(obSMCTRL & NAND_READY)) {}
  800. }
  802. /////////////////050303 start
  803. #define NandCmd(CMD)
  804. {
  805. obSMCTRL=NAND_COMMAND;
  806. obSMDATALO=CMD;
  807. obSMCTRL=NAND_NORMAL;
  808. }
  810. #define Nand2KAddr()
  811. {
  812. obSMCTRL = NAND_ADDRESS;
  813. obSMDATALO = gwColAddress & 0xFF;
  814. obSMDATALO = (gwColAddress >> 8) & 0xFF;
  815. obSMDATALO = *((BYTE*)&gdwRowAddr+3);
  816. obSMDATALO = *((BYTE*)&gdwRowAddr+2);
  817. if (gfRowAddr3Cycle)
  818. obSMDATALO = *((BYTE*)&gdwRowAddr+1);
  819. obSMCTRL = NAND_DATA;
  820. }
  821. #define Nand2KRowAddr()
  822. {
  823. obSMCTRL = NAND_ADDRESS;
  824. obSMDATALO = *((BYTE*)&gdwRowAddr+3);
  825. obSMDATALO = *((BYTE*)&gdwRowAddr+2);
  826. if (gfRowAddr3Cycle)
  827. obSMDATALO = *((BYTE*)&gdwRowAddr+1);
  828. obSMCTRL = NAND_DATA;
  829. }
  831. #define Nand512Addr()
  832. {
  833. obSMCTRL = NAND_ADDRESS;
  834. obSMDATALO = 0x00;
  835. obSMDATALO = *((BYTE *)&gdwRowAddr + 3);
  836. obSMDATALO = *((BYTE *)&gdwRowAddr + 2);
  837. if(gfRowAddr3Cycle) 
  838. obSMDATALO = *((BYTE*)&gdwRowAddr+1);
  839. obSMCTRL = NAND_DATA;
  840. }
  841. #define Nand512RowAddr()
  842. {
  843. obSMCTRL = NAND_ADDRESS;
  844. obSMDATALO = *((BYTE *)&gdwRowAddr + 3);
  845. obSMDATALO = *((BYTE *)&gdwRowAddr + 2);
  846. if(gfRowAddr3Cycle) 
  847. obSMDATALO = *((BYTE*)&gdwRowAddr+1);
  848. obSMCTRL = NAND_DATA;
  849. }
  850. /////////////////050303 end
  852. //NAND512 start
  853. //041223 start: gwColAddress del
  854. #define Nand512Read1(void)
  855. {
  856. obSMCTRL = NAND_COMMAND;
  857. obSMDATALO = NAND_CMD_READ;
  858. obSMCTRL = NAND_ADDRESS;
  859. obSMDATALO = 0x00;
  860. obSMDATALO = *((BYTE *)&gdwRowAddr + 3);
  861. obSMDATALO = *((BYTE *)&gdwRowAddr + 2);
  862. if(gfRowAddr3Cycle)
  863. obSMDATALO = *((BYTE*)&gdwRowAddr+1);
  864. obSMCTRL = NAND_DATA;
  865. }
  867. #define Nand512Read2(void)
  868. {
  869. obSMCTRL = NAND_COMMAND;
  870. obSMDATALO = NAND_CMD_READ2;
  871. obSMCTRL = NAND_ADDRESS;
  872. obSMDATALO = 0x00;
  873. obSMDATALO = *((BYTE *)&gdwRowAddr + 3);
  874. obSMDATALO = *((BYTE *)&gdwRowAddr + 2);
  875. if(gfRowAddr3Cycle)
  876. obSMDATALO = *((BYTE*)&gdwRowAddr+1);
  877. obSMCTRL = NAND_DATA;
  878. }
  880. #define Nand512Read3(void)
  881. {
  882. obSMCTRL = NAND_COMMAND;
  883. obSMDATALO = NAND_CMD_READ3;
  884. obSMCTRL = NAND_ADDRESS;
  885. obSMDATALO = 0x00;
  886. obSMDATALO = *((BYTE *)&gdwRowAddr + 3);
  887. obSMDATALO = *((BYTE *)&gdwRowAddr + 2);
  888. if(gfRowAddr3Cycle)
  889. obSMDATALO = *((BYTE*)&gdwRowAddr+1);
  890. obSMCTRL = NAND_DATA;
  891. }
  893. #define Nand512Write(void)
  894. {
  895. obSMCTRL = NAND_COMMAND;
  896. obSMDATALO = NAND_CMD_PROGRAM;
  897. obSMCTRL = NAND_ADDRESS;
  898. obSMDATALO = 0x00;
  899. obSMDATALO = *((BYTE *)&gdwRowAddr + 3);
  900. obSMDATALO = *((BYTE *)&gdwRowAddr + 2);
  901. if(gfRowAddr3Cycle)
  902. obSMDATALO=*((BYTE *)&gdwRowAddr + 1);
  903. obSMCTRL = NAND_DATA;
  904. }
  906. #define Nand512ReadCopyBack(void)
  907. {
  908. obSMCTRL = NAND_COMMAND;
  909. obSMDATALO = NAND_CMD_READ;
  910. obSMCTRL = NAND_ADDRESS;
  911. obSMDATALO = 0x00;
  912. obSMDATALO = *((BYTE *)&gdwRowAddr + 3);
  913. obSMDATALO = *((BYTE *)&gdwRowAddr + 2);
  914. if(gfRowAddr3Cycle)
  915. obSMDATALO=*((BYTE *)&gdwRowAddr + 1);
  916. obSMCTRL = NAND_NORMAL;
  917. }
  919. #define Nand512WriteCopyBack(void)
  920. {
  921. obSMCTRL = NAND_COMMAND;
  922. obSMDATALO = NAND512_CMD_COPYBACK_PROGRAM;
  923. obSMCTRL = NAND_ADDRESS;
  924. obSMDATALO = 0x00;
  925. obSMDATALO = *((BYTE *)&gdwRowAddr + 3);
  926. obSMDATALO = *((BYTE *)&gdwRowAddr + 2);
  927. if(gfRowAddr3Cycle)
  928. obSMDATALO=*((BYTE *)&gdwRowAddr + 1);
  929. obSMCTRL = NAND_COMMAND;
  930. obSMDATALO = NAND_CMD_PROGRAM_CONFIRM;
  931. obSMCTRL = NAND_DATA;
  932. }
  934. #define Nand512BlockErase(void)
  935. {
  936. obSMCTRL = NAND_COMMAND;
  937. obSMDATALO = NAND_CMD_BLOCK_ERASE;
  938. obSMCTRL = NAND_ADDRESS;
  939. obSMDATALO = *((BYTE *)&gdwRowAddr + 3);
  940. obSMDATALO = *((BYTE *)&gdwRowAddr + 2);
  941. if(gfRowAddr3Cycle)
  942. obSMDATALO=*((BYTE *)&gdwRowAddr + 1);
  943. obSMCTRL = NAND_COMMAND;
  944. obSMDATALO = NAND_CMD_ERASE;
  945. obSMCTRL = NAND_NORMAL;
  946. }
  947. //041223 end: gwColAddress del
  948. //NAND512 end
  950. #define Nand0Reset(void)
  951. {
  952. obSMCTRL = NAND_COMMAND;
  953. obSMDATALO = NAND_CMD_RESET;
  954. obSMCTRL = NAND_DATA;
  955. Nand0Ready();
  956. obSMCTRL = NAND_NORMAL;
  957. }
  959. #define Nand2KRead(void)
  960. {
  961. obSMCTRL = NAND_COMMAND;
  962. obSMDATALO = NAND_CMD_READ;
  963. obSMCTRL = NAND_ADDRESS;
  964. obSMDATALO = gwColAddress & 0xFF;
  965. obSMDATALO = (gwColAddress >> 8) & 0xFF;
  966. obSMDATALO = *((BYTE*)&gdwRowAddr+3);
  967. obSMDATALO = *((BYTE*)&gdwRowAddr+2);
  968. if (gfRowAddr3Cycle)
  969. obSMDATALO = *((BYTE*)&gdwRowAddr+1);
  970. obSMCTRL = NAND_COMMAND;
  971. obSMDATALO = NAND_CMD_READ_CYCLE_2;
  972. obSMCTRL = NAND_DATA;
  973. }
  975. #define Nand2KWrite(void)
  976. {
  977. obSMCTRL = NAND_COMMAND;
  978. obSMDATALO = NAND_CMD_PROGRAM;
  979. obSMCTRL = NAND_ADDRESS;
  980. obSMDATALO = gwColAddress & 0xFF;
  981. obSMDATALO = (gwColAddress >> 8) & 0xFF;
  982. obSMDATALO = *((BYTE*)&gdwRowAddr+3);
  983. obSMDATALO = *((BYTE*)&gdwRowAddr+2);
  984. if (gfRowAddr3Cycle)
  985. obSMDATALO = *((BYTE*)&gdwRowAddr+1);
  986. obSMCTRL = NAND_DATA;
  987. }
  989. #define Nand0WriteConfirm(void)
  990. {
  991. obSMCTRL = NAND_COMMAND;
  992. obSMDATALO = NAND_CMD_PROGRAM_CONFIRM;
  993. obSMCTRL = NAND_NORMAL;
  994. }
  996. #define Nand2KReadCopyBack(void)
  997. {
  998. obSMCTRL = NAND_COMMAND;
  999. obSMDATALO = NAND_CMD_READ;
  1000. obSMCTRL = NAND_ADDRESS;
  1001. obSMDATALO = gwColAddress & 0xFF;
  1002. obSMDATALO = (gwColAddress >> 8) & 0xFF;
  1003. obSMDATALO = *((BYTE*)&gdwRowAddr+3);
  1004. obSMDATALO = *((BYTE*)&gdwRowAddr+2);
  1005. if (gfRowAddr3Cycle)
  1006. obSMDATALO = *((BYTE*)&gdwRowAddr+1);
  1007. obSMCTRL = NAND_COMMAND;
  1008. obSMDATALO = NAND_CMD_READ_COPYBACK;
  1009. obSMCTRL = NAND_DATA;
  1010. }
  1012. #define Nand2KWriteCopyBack(void)
  1013. {
  1014. obSMCTRL = NAND_COMMAND;
  1015. obSMDATALO = NAND_CMD_COPYBACK_PROGRAM;
  1016. obSMCTRL = NAND_ADDRESS;
  1017. obSMDATALO = gwColAddress & 0xFF;
  1018. obSMDATALO = (gwColAddress >> 8) & 0xFF;
  1019. obSMDATALO = *((BYTE*)&gdwRowAddr+3);
  1020. obSMDATALO = *((BYTE*)&gdwRowAddr+2);
  1021. if (gfRowAddr3Cycle)
  1022. obSMDATALO = *((BYTE*)&gdwRowAddr+1);
  1023. obSMCTRL = NAND_COMMAND;
  1024. obSMDATALO = NAND_CMD_PROGRAM_CONFIRM;
  1025. obSMCTRL = NAND_DATA;
  1026. }
  1028. #define Nand2KBlockErase(void)
  1029. {
  1030. obSMCTRL = NAND_COMMAND;
  1031. obSMDATALO = NAND_CMD_BLOCK_ERASE;
  1032. obSMCTRL = NAND_ADDRESS;
  1033. obSMDATALO = *((BYTE*)&gdwRowAddr+3);
  1034. obSMDATALO = *((BYTE*)&gdwRowAddr+2);
  1035. if (gfRowAddr3Cycle)
  1036. obSMDATALO = *((BYTE*)&gdwRowAddr+1);
  1037. obSMCTRL = NAND_COMMAND;
  1038. obSMDATALO = NAND_CMD_ERASE;
  1039. obSMCTRL = NAND_NORMAL;
  1040. }
  1042. #define Nand0ReadStatus(void)
  1043. {
  1044. obSMCTRL = NAND_COMMAND;
  1045. obSMDATALO = NAND_CMD_STS_READ;
  1046. obSMCTRL = NAND_DATA;
  1047. Nand0Ready();
  1048. gbNandStatus = obSMDATALO;
  1049. obSMCTRL = NAND_NORMAL;
  1050. }
  1052. //******* AG **************************
  1054. #define Nand0ReadStatus71(void)
  1055. {
  1056. obSMCTRL = NAND_COMMAND;
  1057. obSMDATALO = NAND_CMD_STS_READ_71;
  1058. obSMCTRL = NAND_DATA;
  1059. Nand0Ready();
  1060. gbNandStatus = obSMDATALO;
  1061. obSMCTRL = NAND_NORMAL;
  1062. }
  1064. //*************************************
  1067. #define Set512PointerA()
  1068. {
  1069. obSMCTRL = NAND_COMMAND;
  1070. obSMDATALO = NAND_CMD_READ;
  1071. }
  1072. #define Set512PointerB()
  1073. {
  1074. obSMCTRL = NAND_COMMAND;
  1075. obSMDATALO = NAND_CMD_READ2;
  1076. }
  1077. #define Set512PointerC()
  1078. {
  1079. obSMCTRL = NAND_COMMAND;
  1080. obSMDATALO = NAND_CMD_READ3;
  1081. }
  1083. //2  For old nandflash to remove definition in new flash structure
  1085. #define _NAND_API_RELOADWLC_ 0
  1086. #define _NAND_API_RW_SETTING_ 0
  1090. #endif