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sym53c8xx.c：源码内容

** Prepare io register values used by ncr_init()
** according to selected and supported features.
*/
static int __init ncr_prepare_setting(ncb_p np, ncr_nvram *nvram)
{
u_char burst_max;
u_long period;
int i;
/*
** Wide ?
*/
np->maxwide = (np->features & FE_WIDE)? 1 : 0;
/*
* Guess the frequency of the chip's clock.
*/
if (np->features & (FE_ULTRA3 | FE_ULTRA2))
np->clock_khz = 160000;
else if (np->features & FE_ULTRA)
np->clock_khz = 80000;
else
np->clock_khz = 40000;
/*
* Get the clock multiplier factor.
*/
if (np->features & FE_QUAD)
np->multiplier = 4;
else if (np->features & FE_DBLR)
np->multiplier = 2;
else
np->multiplier = 1;
/*
* Measure SCSI clock frequency for chips
* it may vary from assumed one.
*/
if (np->features & FE_VARCLK)
ncr_getclock(np, np->multiplier);
/*
* Divisor to be used for async (timer pre-scaler).
*
* Note: For C1010 the async divisor is 2(8) if he
* quadrupler is disabled (enabled).
*/
if ( (np->device_id == PCI_DEVICE_ID_LSI_53C1010) ||
(np->device_id == PCI_DEVICE_ID_LSI_53C1010_66)) {
np->rv_scntl3 = 0;
}
else
{
i = np->clock_divn - 1;
while (--i >= 0) {
if (10ul * SCSI_NCR_MIN_ASYNC * np->clock_khz
> div_10M[i]) {
++i;
break;
}
}
np->rv_scntl3 = i+1;
}
/*
* Save the ultra3 register for the C1010/C1010_66
*/
np->rv_scntl4 = np->sv_scntl4;
/*
* Minimum synchronous period factor supported by the chip.
* Btw, 'period' is in tenths of nanoseconds.
*/
period = (4 * div_10M[0] + np->clock_khz - 1) / np->clock_khz;
if (period <= 250) np->minsync = 10;
else if (period <= 303) np->minsync = 11;
else if (period <= 500) np->minsync = 12;
else np->minsync = (period + 40 - 1) / 40;
/*
* Fix up. If sync. factor is 10 (160000Khz clock) and chip
* supports ultra3, then min. sync. period 12.5ns and the factor is 9
* Also keep track of the maximum offset in ST mode which may differ
* from the maximum offset in DT mode. For now hardcoded to 31.
*/
if (np->features & FE_ULTRA3) {
if (np->minsync == 10)
np->minsync = 9;
np->maxoffs_st = 31;
}
else
np->maxoffs_st = np->maxoffs;
/*
* Check against chip SCSI standard support (SCSI-2,ULTRA,ULTRA2).
*
* Transfer period minimums: SCSI-1 200 (50); Fast 100 (25)
* Ultra 50 (12); Ultra2 (6); Ultra3 (3)
*/
if (np->minsync < 25 && !(np->features & (FE_ULTRA|FE_ULTRA2|FE_ULTRA3)))
np->minsync = 25;
else if (np->minsync < 12 && (np->features & FE_ULTRA))
np->minsync = 12;
else if (np->minsync < 10 && (np->features & FE_ULTRA2))
np->minsync = 10;
else if (np->minsync < 9 && (np->features & FE_ULTRA3))
np->minsync = 9;
/*
* Maximum synchronous period factor supported by the chip.
*/
period = (11 * div_10M[np->clock_divn - 1]) / (4 * np->clock_khz);
np->maxsync = period > 2540 ? 254 : period / 10;
/*
** 64 bit (53C895A or 53C896) ?
*/
if (np->features & FE_DAC) {
if (np->features & FE_DAC_IN_USE)
np->rv_ccntl1 |= (XTIMOD | EXTIBMV);
else
np->rv_ccntl1 |= (DDAC);
}
/*
** Phase mismatch handled by SCRIPTS (53C895A, 53C896 or C1010) ?
*/
if (np->features & FE_NOPM)
np->rv_ccntl0 |= (ENPMJ);
/*
** Prepare initial value of other IO registers
*/
#if defined SCSI_NCR_TRUST_BIOS_SETTING
np->rv_scntl0 = np->sv_scntl0;
np->rv_dmode = np->sv_dmode;
np->rv_dcntl = np->sv_dcntl;
np->rv_ctest3 = np->sv_ctest3;
np->rv_ctest4 = np->sv_ctest4;
np->rv_ctest5 = np->sv_ctest5;
burst_max = burst_code(np->sv_dmode, np->sv_ctest4, np->sv_ctest5);
#else
/*
** Select burst length (dwords)
*/
burst_max = driver_setup.burst_max;
if (burst_max == 255)
burst_max = burst_code(np->sv_dmode, np->sv_ctest4, np->sv_ctest5);
if (burst_max > 7)
burst_max = 7;
if (burst_max > np->maxburst)
burst_max = np->maxburst;
/*
** DEL 352 - 53C810 Rev x11 - Part Number 609-0392140 - ITEM 2.
** This chip and the 860 Rev 1 may wrongly use PCI cache line
** based transactions on LOAD/STORE instructions. So we have
** to prevent these chips from using such PCI transactions in
** this driver. The generic sym53c8xx driver that does not use
** LOAD/STORE instructions does not need this work-around.
*/
if ((np->device_id == PCI_DEVICE_ID_NCR_53C810 &&
np->revision_id >= 0x10 && np->revision_id <= 0x11) ||
(np->device_id == PCI_DEVICE_ID_NCR_53C860 &&
np->revision_id <= 0x1))
np->features &= ~(FE_WRIE|FE_ERL|FE_ERMP);
/*
** DEL ? - 53C1010 Rev 1 - Part Number 609-0393638
** 64-bit Slave Cycles must be disabled.
*/
if ( ((np->device_id == PCI_DEVICE_ID_LSI_53C1010) && (np->revision_id < 0x02) )
|| (np->device_id == PCI_DEVICE_ID_LSI_53C1010_66 ) )
np->rv_ccntl1 |= 0x10;
/*
** Select all supported special features.
** If we are using on-board RAM for scripts, prefetch (PFEN)
** does not help, but burst op fetch (BOF) does.
** Disabling PFEN makes sure BOF will be used.
*/
if (np->features & FE_ERL)
np->rv_dmode |= ERL; /* Enable Read Line */
if (np->features & FE_BOF)
np->rv_dmode |= BOF; /* Burst Opcode Fetch */
if (np->features & FE_ERMP)
np->rv_dmode |= ERMP; /* Enable Read Multiple */
#if 1
if ((np->features & FE_PFEN) && !np->base2_ba)
#else
if (np->features & FE_PFEN)
#endif
np->rv_dcntl |= PFEN; /* Prefetch Enable */
if (np->features & FE_CLSE)
np->rv_dcntl |= CLSE; /* Cache Line Size Enable */
if (np->features & FE_WRIE)
np->rv_ctest3 |= WRIE; /* Write and Invalidate */
if ( (np->device_id != PCI_DEVICE_ID_LSI_53C1010) &&
(np->device_id != PCI_DEVICE_ID_LSI_53C1010_66) &&
(np->features & FE_DFS))
np->rv_ctest5 |= DFS; /* Dma Fifo Size */
/* C1010/C1010_66 always large fifo */
/*
** Select some other
*/
if (driver_setup.master_parity)
np->rv_ctest4 |= MPEE; /* Master parity checking */
if (driver_setup.scsi_parity)
np->rv_scntl0 |= 0x0a; /* full arb., ena parity, par->ATN */
#ifdef SCSI_NCR_NVRAM_SUPPORT
/*
** Get parity checking, host ID and verbose mode from NVRAM
**/
if (nvram) {
switch(nvram->type) {
case SCSI_NCR_TEKRAM_NVRAM:
np->myaddr = nvram->data.Tekram.host_id & 0x0f;
break;
case SCSI_NCR_SYMBIOS_NVRAM:
if (!(nvram->data.Symbios.flags & SYMBIOS_PARITY_ENABLE))
np->rv_scntl0 &= ~0x0a;
np->myaddr = nvram->data.Symbios.host_id & 0x0f;
if (nvram->data.Symbios.flags & SYMBIOS_VERBOSE_MSGS)
np->verbose += 1;
break;
}
}
#endif
/*
** Get SCSI addr of host adapter (set by bios?).
*/
if (np->myaddr == 255) {
np->myaddr = INB(nc_scid) & 0x07;
if (!np->myaddr)
np->myaddr = SCSI_NCR_MYADDR;
}
#endif /* SCSI_NCR_TRUST_BIOS_SETTING */
/*
* Prepare initial io register bits for burst length
*/
ncr_init_burst(np, burst_max);
/*
** Set SCSI BUS mode.
**
** - ULTRA2 chips (895/895A/896)
** and ULTRA 3 chips (1010) report the current
** BUS mode through the STEST4 IO register.
** - For previous generation chips (825/825A/875),
** user has to tell us how to check against HVD,
** since a 100% safe algorithm is not possible.
*/
np->scsi_mode = SMODE_SE;
if (np->features & (FE_ULTRA2 | FE_ULTRA3))
np->scsi_mode = (np->sv_stest4 & SMODE);
else if (np->features & FE_DIFF) {
switch(driver_setup.diff_support) {
case 4: /* Trust previous settings if present, then GPIO3 */
if (np->sv_scntl3) {
if (np->sv_stest2 & 0x20)
np->scsi_mode = SMODE_HVD;
break;
}
case 3: /* SYMBIOS controllers report HVD through GPIO3 */
if (nvram && nvram->type != SCSI_NCR_SYMBIOS_NVRAM)
break;
if (INB(nc_gpreg) & 0x08)
break;
case 2: /* Set HVD unconditionally */
np->scsi_mode = SMODE_HVD;
case 1: /* Trust previous settings for HVD */
if (np->sv_stest2 & 0x20)
np->scsi_mode = SMODE_HVD;
break;
default:/* Don't care about HVD */
break;
}
}
if (np->scsi_mode == SMODE_HVD)
np->rv_stest2 |= 0x20;
/*
** Set LED support from SCRIPTS.
** Ignore this feature for boards known to use a
** specific GPIO wiring and for the 895A or 896
** that drive the LED directly.
** Also probe initial setting of GPIO0 as output.
*/
if ((driver_setup.led_pin ||
(nvram && nvram->type == SCSI_NCR_SYMBIOS_NVRAM)) &&
!(np->features & FE_LEDC) && !(np->sv_gpcntl & 0x01))
np->features |= FE_LED0;
/*
** Set irq mode.
*/
switch(driver_setup.irqm & 3) {
case 2:
np->rv_dcntl |= IRQM;
break;
case 1:
np->rv_dcntl |= (np->sv_dcntl & IRQM);
break;
default:
break;
}
/*
** Configure targets according to driver setup.
** If NVRAM present get targets setup from NVRAM.
** Allow to override sync, wide and NOSCAN from
** boot command line.
*/
for (i = 0 ; i < MAX_TARGET ; i++) {
tcb_p tp = &np->target[i];
tp->usrsync = 255;
#ifdef SCSI_NCR_NVRAM_SUPPORT
if (nvram) {
switch(nvram->type) {
case SCSI_NCR_TEKRAM_NVRAM:
ncr_Tekram_setup_target(np, i, &nvram->data.Tekram);
break;
case SCSI_NCR_SYMBIOS_NVRAM:
ncr_Symbios_setup_target(np, i, &nvram->data.Symbios);
break;
}
if (driver_setup.use_nvram & 0x2)
tp->usrsync = driver_setup.default_sync;
if (driver_setup.use_nvram & 0x4)
tp->usrwide = driver_setup.max_wide;
if (driver_setup.use_nvram & 0x8)
tp->usrflag &= ~UF_NOSCAN;
}
else {
#else
if (1) {
#endif
tp->usrsync = driver_setup.default_sync;
tp->usrwide = driver_setup.max_wide;
tp->usrtags = MAX_TAGS;
if (!driver_setup.disconnection)
np->target[i].usrflag = UF_NODISC;
}
}
/*
** Announce all that stuff to user.
*/
i = nvram ? nvram->type : 0;
printk(KERN_INFO "%s: %sID %d, Fast-%d%s%sn", ncr_name(np),
i == SCSI_NCR_SYMBIOS_NVRAM ? "Symbios format NVRAM, " :
(i == SCSI_NCR_TEKRAM_NVRAM ? "Tekram format NVRAM, " : ""),
np->myaddr,
np->minsync < 10 ? 80 :
(np->minsync < 12 ? 40 : (np->minsync < 25 ? 20 : 10) ),
(np->rv_scntl0 & 0xa) ? ", Parity Checking" : ", NO Parity",
(np->rv_stest2 & 0x20) ? ", Differential" : "");
if (bootverbose > 1) {
printk (KERN_INFO "%s: initial SCNTL3/DMODE/DCNTL/CTEST3/4/5 = "
"(hex) %02x/%02x/%02x/%02x/%02x/%02xn",
ncr_name(np), np->sv_scntl3, np->sv_dmode, np->sv_dcntl,
np->sv_ctest3, np->sv_ctest4, np->sv_ctest5);
printk (KERN_INFO "%s: final SCNTL3/DMODE/DCNTL/CTEST3/4/5 = "
"(hex) %02x/%02x/%02x/%02x/%02x/%02xn",
ncr_name(np), np->rv_scntl3, np->rv_dmode, np->rv_dcntl,
np->rv_ctest3, np->rv_ctest4, np->rv_ctest5);
}
if (bootverbose && np->base2_ba)
printk (KERN_INFO "%s: on-chip RAM at 0x%lxn",
ncr_name(np), np->base2_ba);
return 0;
}
#ifdef SCSI_NCR_DEBUG_NVRAM
void __init ncr_display_Symbios_nvram(ncb_p np, Symbios_nvram *nvram)
{
int i;
/* display Symbios nvram host data */
printk(KERN_DEBUG "%s: HOST ID=%d%s%s%s%s%sn",
ncr_name(np), nvram->host_id & 0x0f,
(nvram->flags & SYMBIOS_SCAM_ENABLE) ? " SCAM" :"",
(nvram->flags & SYMBIOS_PARITY_ENABLE) ? " PARITY" :"",
(nvram->flags & SYMBIOS_VERBOSE_MSGS) ? " VERBOSE" :"",
(nvram->flags & SYMBIOS_CHS_MAPPING) ? " CHS_ALT" :"",
(nvram->flags1 & SYMBIOS_SCAN_HI_LO) ? " HI_LO" :"");
/* display Symbios nvram drive data */
for (i = 0 ; i < 15 ; i++) {
struct Symbios_target *tn = &nvram->target[i];
printk(KERN_DEBUG "%s-%d:%s%s%s%s WIDTH=%d SYNC=%d TMO=%dn",
ncr_name(np), i,
(tn->flags & SYMBIOS_DISCONNECT_ENABLE) ? " DISC" : "",
(tn->flags & SYMBIOS_SCAN_AT_BOOT_TIME) ? " SCAN_BOOT" : "",
(tn->flags & SYMBIOS_SCAN_LUNS) ? " SCAN_LUNS" : "",
(tn->flags & SYMBIOS_QUEUE_TAGS_ENABLED)? " TCQ" : "",
tn->bus_width,
tn->sync_period / 4,
tn->timeout);
}
}
static u_char Tekram_boot_delay[7] __initdata = {3, 5, 10, 20, 30, 60, 120};
void __init ncr_display_Tekram_nvram(ncb_p np, Tekram_nvram *nvram)
{
int i, tags, boot_delay;
char *rem;
/* display Tekram nvram host data */
tags = 2 << nvram->max_tags_index;
boot_delay = 0;
if (nvram->boot_delay_index < 6)
boot_delay = Tekram_boot_delay[nvram->boot_delay_index];
switch((nvram->flags & TEKRAM_REMOVABLE_FLAGS) >> 6) {
default:
case 0: rem = ""; break;
case 1: rem = " REMOVABLE=boot device"; break;
case 2: rem = " REMOVABLE=all"; break;
}
printk(KERN_DEBUG
"%s: HOST ID=%d%s%s%s%s%s%s%s%s%s BOOT DELAY=%d tags=%dn",
ncr_name(np), nvram->host_id & 0x0f,
(nvram->flags1 & SYMBIOS_SCAM_ENABLE) ? " SCAM" :"",
(nvram->flags & TEKRAM_MORE_THAN_2_DRIVES) ? " >2DRIVES" :"",
(nvram->flags & TEKRAM_DRIVES_SUP_1GB) ? " >1GB" :"",
(nvram->flags & TEKRAM_RESET_ON_POWER_ON) ? " RESET" :"",
(nvram->flags & TEKRAM_ACTIVE_NEGATION) ? " ACT_NEG" :"",
(nvram->flags & TEKRAM_IMMEDIATE_SEEK) ? " IMM_SEEK" :"",
(nvram->flags & TEKRAM_SCAN_LUNS) ? " SCAN_LUNS" :"",
(nvram->flags1 & TEKRAM_F2_F6_ENABLED) ? " F2_F6" :"",
rem, boot_delay, tags);
/* display Tekram nvram drive data */
for (i = 0; i <= 15; i++) {
int sync, j;
struct Tekram_target *tn = &nvram->target[i];
j = tn->sync_index & 0xf;
sync = Tekram_sync[j];
printk(KERN_DEBUG "%s-%d:%s%s%s%s%s%s PERIOD=%dn",
ncr_name(np), i,
(tn->flags & TEKRAM_PARITY_CHECK) ? " PARITY" : "",
(tn->flags & TEKRAM_SYNC_NEGO) ? " SYNC" : "",
(tn->flags & TEKRAM_DISCONNECT_ENABLE) ? " DISC" : "",
(tn->flags & TEKRAM_START_CMD) ? " START" : "",
(tn->flags & TEKRAM_TAGGED_COMMANDS) ? " TCQ" : "",
(tn->flags & TEKRAM_WIDE_NEGO) ? " WIDE" : "",
sync);
}
}
#endif /* SCSI_NCR_DEBUG_NVRAM */
/*
** Host attach and initialisations.
**
** Allocate host data and ncb structure.
** Request IO region and remap MMIO region.
** Do chip initialization.
** If all is OK, install interrupt handling and
** start the timer daemon.
*/
static int __init
ncr_attach (Scsi_Host_Template *tpnt, int unit, ncr_device *device)
{
struct host_data *host_data;
ncb_p np = 0;
struct Scsi_Host *instance = 0;
u_long flags = 0;
ncr_nvram *nvram = device->nvram;
int i;
printk(KERN_INFO NAME53C "%s-%d: rev 0x%x on pci bus %d device %d function %d "
#ifdef __sparc__
"irq %sn",
#else
"irq %dn",
#endif
device->chip.name, unit, device->chip.revision_id,
device->slot.bus, (device->slot.device_fn & 0xf8) >> 3,
device->slot.device_fn & 7,
#ifdef __sparc__
__irq_itoa(device->slot.irq));
#else
device->slot.irq);
#endif
/*
** Allocate host_data structure
*/
if (!(instance = scsi_register(tpnt, sizeof(*host_data))))
goto attach_error;
host_data = (struct host_data *) instance->hostdata;
/*
** Allocate the host control block.
*/
np = __m_calloc_dma(device->pdev, sizeof(struct ncb), "NCB");
if (!np)
goto attach_error;
NCR_INIT_LOCK_NCB(np);
np->pdev = device->pdev;
np->p_ncb = vtobus(np);
host_data->ncb = np;
/*
** Store input informations in the host data structure.
*/
strncpy(np->chip_name, device->chip.name, sizeof(np->chip_name) - 1);
np->unit = unit;
np->verbose = driver_setup.verbose;
sprintf(np->inst_name, NAME53C "%s-%d", np->chip_name, np->unit);
np->device_id = device->chip.device_id;
np->revision_id = device->chip.revision_id;
np->bus = device->slot.bus;
np->device_fn = device->slot.device_fn;
np->features = device->chip.features;
np->clock_divn = device->chip.nr_divisor;
np->maxoffs = device->chip.offset_max;
np->maxburst = device->chip.burst_max;
np->myaddr = device->host_id;
/*
** Allocate the start queue.
*/
np->squeue = (ncrcmd *)
m_calloc_dma(sizeof(ncrcmd)*(MAX_START*2), "SQUEUE");
if (!np->squeue)
goto attach_error;
np->p_squeue = vtobus(np->squeue);
/*
** Allocate the done queue.
*/
np->dqueue = (ncrcmd *)
m_calloc_dma(sizeof(ncrcmd)*(MAX_START*2), "DQUEUE");
if (!np->dqueue)
goto attach_error;
/*
** Allocate the target bus address array.
*/
np->targtbl = (u_int32 *) m_calloc_dma(256, "TARGTBL");
if (!np->targtbl)
goto attach_error;
/*
** Allocate SCRIPTS areas
*/
np->script0 = (struct script *)
m_calloc_dma(sizeof(struct script), "SCRIPT");
if (!np->script0)
goto attach_error;
np->scripth0 = (struct scripth *)
m_calloc_dma(sizeof(struct scripth), "SCRIPTH");
if (!np->scripth0)
goto attach_error;
/*
** Initialyze the CCB free queue and,
** allocate some CCB. We need at least ONE.
*/
xpt_que_init(&np->free_ccbq);
xpt_que_init(&np->b0_ccbq);
if (!ncr_alloc_ccb(np))
goto attach_error;
/*
** Initialize timer structure
**
*/
init_timer(&np->timer);
np->timer.data = (unsigned long) np;
np->timer.function = sym53c8xx_timeout;
/*
** Try to map the controller chip to
** virtual and physical memory.
*/
np->base_ba = device->slot.base;
np->base_ws = (np->features & FE_IO256)? 256 : 128;
np->base2_ba = (np->features & FE_RAM)? device->slot.base_2 : 0;
#ifndef SCSI_NCR_IOMAPPED
np->base_va = remap_pci_mem(device->slot.base_c, np->base_ws);
if (!np->base_va) {
printk(KERN_ERR "%s: can't map PCI MMIO regionn",ncr_name(np));
goto attach_error;
}
else if (bootverbose > 1)
printk(KERN_INFO "%s: using memory mapped IOn", ncr_name(np));
/*
** Make the controller's registers available.
** Now the INB INW INL OUTB OUTW OUTL macros
** can be used safely.
*/
np->reg = (struct ncr_reg *) np->base_va;
#endif /* !defined SCSI_NCR_IOMAPPED */
/*
** If on-chip RAM is used, make sure SCRIPTS isn't too large.
*/
if (np->base2_ba && sizeof(struct script) > 4096) {
printk(KERN_ERR "%s: script too large.n", ncr_name(np));
goto attach_error;
}
/*
** Try to map the controller chip into iospace.
*/
if (device->slot.io_port) {
request_region(device->slot.io_port, np->base_ws, NAME53C8XX);
np->base_io = device->slot.io_port;
}
#ifdef SCSI_NCR_NVRAM_SUPPORT
if (nvram) {
switch(nvram->type) {
case SCSI_NCR_SYMBIOS_NVRAM:
#ifdef SCSI_NCR_DEBUG_NVRAM
ncr_display_Symbios_nvram(np, &nvram->data.Symbios);
#endif
break;
case SCSI_NCR_TEKRAM_NVRAM:
#ifdef SCSI_NCR_DEBUG_NVRAM
ncr_display_Tekram_nvram(np, &nvram->data.Tekram);
#endif
break;
default:
nvram = 0;
#ifdef SCSI_NCR_DEBUG_NVRAM
printk(KERN_DEBUG "%s: NVRAM: None or invalid data.n", ncr_name(np));
#endif
}
}
#endif
/*
** Save setting of some IO registers, so we will
** be able to probe specific implementations.
*/
ncr_save_initial_setting (np);
/*
** Reset the chip now, since it has been reported
** that SCSI clock calibration may not work properly
** if the chip is currently active.
*/
ncr_chip_reset (np);
/*
** Do chip dependent initialization.
*/
(void) ncr_prepare_setting(np, nvram);
/*
** Check the PCI clock frequency if needed.
**
** Must be done after ncr_prepare_setting since it destroys
** STEST1 that is used to probe for the clock multiplier.
**
** The range is currently [22688 - 45375 Khz], given
** the values used by ncr_getclock().
** This calibration of the frequecy measurement
** algorithm against the PCI clock frequency is only
** performed if the driver has had to measure the SCSI
** clock due to other heuristics not having been enough
** to deduce the SCSI clock frequency.
**
** When the chip has been initialized correctly by the
** SCSI BIOS, the driver deduces the presence of the
** clock multiplier and the value of the SCSI clock from
** initial values of IO registers, and therefore no
** clock measurement is performed.
** Normally the driver should never have to measure any
** clock, unless the controller may use a 80 MHz clock
** or has a clock multiplier and any of the following
** condition is met:
**
** - No SCSI BIOS is present.
** - SCSI BIOS did'nt enable the multiplier for some reason.
** - User has disabled the controller from the SCSI BIOS.
** - User booted the O/S from another O/S that did'nt enable
** the multiplier for some reason.
**
** As a result, the driver may only have to measure some
** frequency in very unusual situations.
**
** For this reality test against the PCI clock to really
** protect against flaws in the udelay() calibration or
** driver problem that affect the clock measurement
** algorithm, the actual PCI clock frequency must be 33 MHz.
*/
i = np->pciclock_max ? ncr_getpciclock(np) : 0;
if (i && (i < np->pciclock_min || i > np->pciclock_max)) {
printk(KERN_ERR "%s: PCI clock (%u KHz) is out of range "
"[%u KHz - %u KHz].n",
ncr_name(np), i, np->pciclock_min, np->pciclock_max);
goto attach_error;
}
/*
** Patch script to physical addresses
*/
ncr_script_fill (&script0, &scripth0);
np->p_script = vtobus(np->script0);
np->p_scripth = vtobus(np->scripth0);
np->p_scripth0 = np->p_scripth;
if (np->base2_ba) {
np->p_script = np->base2_ba;
if (np->features & FE_RAM8K) {
np->base2_ws = 8192;
np->p_scripth = np->p_script + 4096;
#if BITS_PER_LONG > 32
np->scr_ram_seg = cpu_to_scr(np->base2_ba >> 32);
#endif
}
else
np->base2_ws = 4096;
#ifndef SCSI_NCR_PCI_MEM_NOT_SUPPORTED
np->base2_va =
remap_pci_mem(device->slot.base_2_c, np->base2_ws);
if (!np->base2_va) {
printk(KERN_ERR "%s: can't map PCI MEMORY regionn",
ncr_name(np));
goto attach_error;
}
#endif
}
ncr_script_copy_and_bind (np, (ncrcmd *) &script0, (ncrcmd *) np->script0, sizeof(struct script));
ncr_script_copy_and_bind (np, (ncrcmd *) &scripth0, (ncrcmd *) np->scripth0, sizeof(struct scripth));
/*
** Patch some variables in SCRIPTS
*/
np->scripth0->pm0_data_addr[0] =
cpu_to_scr(NCB_SCRIPT_PHYS(np, pm0_data));
np->scripth0->pm1_data_addr[0] =
cpu_to_scr(NCB_SCRIPT_PHYS(np, pm1_data));
/*
** Patch if not Ultra 3 - Do not write to scntl4
*/
if (np->features & FE_ULTRA3) {
np->script0->resel_scntl4[0] = cpu_to_scr(SCR_LOAD_REL (scntl4, 1));
np->script0->resel_scntl4[1] = cpu_to_scr(offsetof(struct tcb, uval));
}
#ifdef SCSI_NCR_PCI_MEM_NOT_SUPPORTED
np->scripth0->script0_ba[0] = cpu_to_scr(vtobus(np->script0));
np->scripth0->script0_ba64[0] = cpu_to_scr(vtobus(np->script0));
np->scripth0->scripth0_ba64[0] = cpu_to_scr(vtobus(np->scripth0));
np->scripth0->ram_seg64[0] = np->scr_ram_seg;
#endif
/*
** Prepare the idle and invalid task actions.
*/
np->idletask.start = cpu_to_scr(NCB_SCRIPT_PHYS (np, idle));
np->idletask.restart = cpu_to_scr(NCB_SCRIPTH_PHYS (np, bad_i_t_l));
np->p_idletask = NCB_PHYS(np, idletask);
np->notask.start = cpu_to_scr(NCB_SCRIPT_PHYS (np, idle));
np->notask.restart = cpu_to_scr(NCB_SCRIPTH_PHYS (np, bad_i_t_l));
np->p_notask = NCB_PHYS(np, notask);
np->bad_i_t_l.start = cpu_to_scr(NCB_SCRIPT_PHYS (np, idle));
np->bad_i_t_l.restart = cpu_to_scr(NCB_SCRIPTH_PHYS (np, bad_i_t_l));
np->p_bad_i_t_l = NCB_PHYS(np, bad_i_t_l);
np->bad_i_t_l_q.start = cpu_to_scr(NCB_SCRIPT_PHYS (np, idle));
np->bad_i_t_l_q.restart = cpu_to_scr(NCB_SCRIPTH_PHYS (np,bad_i_t_l_q));
np->p_bad_i_t_l_q = NCB_PHYS(np, bad_i_t_l_q);
/*
** Allocate and prepare the bad lun table.
*/
np->badluntbl = m_calloc_dma(256, "BADLUNTBL");
if (!np->badluntbl)
goto attach_error;
assert (offsetof(struct lcb, resel_task) == 0);
np->resel_badlun = cpu_to_scr(NCB_SCRIPTH_PHYS(np, resel_bad_lun));
for (i = 0 ; i < 64 ; i++)
np->badluntbl[i] = cpu_to_scr(NCB_PHYS(np, resel_badlun));
/*
** Prepare the target bus address array.
*/
np->scripth0->targtbl[0] = cpu_to_scr(vtobus(np->targtbl));
for (i = 0 ; i < MAX_TARGET ; i++) {
np->targtbl[i] = cpu_to_scr(NCB_PHYS(np, target[i]));
np->target[i].b_luntbl = cpu_to_scr(vtobus(np->badluntbl));
np->target[i].b_lun0 = cpu_to_scr(NCB_PHYS(np, resel_badlun));
}
/*
** Patch the script for LED support.
*/
if (np->features & FE_LED0) {
np->script0->idle[0] =
cpu_to_scr(SCR_REG_REG(gpreg, SCR_OR, 0x01));
np->script0->reselected[0] =
cpu_to_scr(SCR_REG_REG(gpreg, SCR_AND, 0xfe));
np->script0->start[0] =
cpu_to_scr(SCR_REG_REG(gpreg, SCR_AND, 0xfe));
}
/*
** Patch the script to provide an extra clock cycle on
** data out phase - 53C1010_66MHz part only.
** (Fixed in rev. 1 of the chip)
*/
if (np->device_id == PCI_DEVICE_ID_LSI_53C1010_66 &&
np->revision_id < 1){
np->script0->datao_phase[0] =
cpu_to_scr(SCR_REG_REG(scntl4, SCR_OR, 0x0c));
}
#ifdef SCSI_NCR_IARB_SUPPORT
/*
** If user does not want to use IMMEDIATE ARBITRATION
** when we are reselected while attempting to arbitrate,
** patch the SCRIPTS accordingly with a SCRIPT NO_OP.
*/
if (!(driver_setup.iarb & 1))
np->script0->ungetjob[0] = cpu_to_scr(SCR_NO_OP);
/*
** If user wants IARB to be set when we win arbitration
** and have other jobs, compute the max number of consecutive
** settings of IARB hint before we leave devices a chance to
** arbitrate for reselection.
*/
np->iarb_max = (driver_setup.iarb >> 4);
#endif
/*
** DEL 472 - 53C896 Rev 1 - Part Number 609-0393055 - ITEM 5.
*/
if (np->device_id == PCI_DEVICE_ID_NCR_53C896 &&
np->revision_id <= 0x1 && (np->features & FE_NOPM)) {
np->scatter = ncr_scatter_896R1;
np->script0->datai_phase[0] = cpu_to_scr(SCR_JUMP);
np->script0->datai_phase[1] =
cpu_to_scr(NCB_SCRIPTH_PHYS (np, tweak_pmj));
np->script0->datao_phase[0] = cpu_to_scr(SCR_JUMP);
np->script0->datao_phase[1] =
cpu_to_scr(NCB_SCRIPTH_PHYS (np, tweak_pmj));
}
else
#ifdef DEBUG_896R1
np->scatter = ncr_scatter_896R1;
#else
np->scatter = ncr_scatter;
#endif
/*
** Reset chip.
** We should use ncr_soft_reset(), but we donnot want to do
** so, since we may not be safe if ABRT interrupt occurs due
** to the BIOS or previous O/S having enable this interrupt.
**
** For C1010 need to set ABRT bit prior to SRST if SCRIPTs
** are running. Not true in this case.
*/
ncr_chip_reset(np);
/*
** Now check the cache handling of the pci chipset.
*/
if (ncr_snooptest (np)) {
printk (KERN_ERR "CACHE INCORRECTLY CONFIGURED.n");
goto attach_error;
};
/*
** Install the interrupt handler.
** If we synchonize the C code with SCRIPTS on interrupt,
** we donnot want to share the INTR line at all.
*/
if (request_irq(device->slot.irq, sym53c8xx_intr,
#ifdef SCSI_NCR_PCIQ_SYNC_ON_INTR
((driver_setup.irqm & 0x20) ? 0 : SA_INTERRUPT),
#else
((driver_setup.irqm & 0x10) ? 0 : SA_SHIRQ) |
#if LINUX_VERSION_CODE < LinuxVersionCode(2,2,0)
((driver_setup.irqm & 0x20) ? 0 : SA_INTERRUPT),
#else
0,
#endif
#endif
NAME53C8XX, np)) {
printk(KERN_ERR "%s: request irq %d failuren",
ncr_name(np), device->slot.irq);
goto attach_error;
}
np->irq = device->slot.irq;
/*
** After SCSI devices have been opened, we cannot
** reset the bus safely, so we do it here.
** Interrupt handler does the real work.
** Process the reset exception,
** if interrupts are not enabled yet.
** Then enable disconnects.
*/
NCR_LOCK_NCB(np, flags);
if (ncr_reset_scsi_bus(np, 0, driver_setup.settle_delay) != 0) {
printk(KERN_ERR "%s: FATAL ERROR: CHECK SCSI BUS - CABLES, TERMINATION, DEVICE POWER etc.!n", ncr_name(np));
NCR_UNLOCK_NCB(np, flags);
goto attach_error;
}
ncr_exception (np);
/*
** The middle-level SCSI driver does not
** wait for devices to settle.
** Wait synchronously if more than 2 seconds.
*/
if (driver_setup.settle_delay > 2) {
printk(KERN_INFO "%s: waiting %d seconds for scsi devices to settle...n",
ncr_name(np), driver_setup.settle_delay);
MDELAY (1000 * driver_setup.settle_delay);
}
/*
** start the timeout daemon
*/
np->lasttime=0;
ncr_timeout (np);
/*
** use SIMPLE TAG messages by default
*/
#ifdef SCSI_NCR_ALWAYS_SIMPLE_TAG
np->order = M_SIMPLE_TAG;
#endif
/*
** Done.
*/
if (!first_host)
first_host = instance;
/*
** Fill Linux host instance structure
** and return success.
*/
instance->max_channel = 0;
instance->this_id = np->myaddr;
instance->max_id = np->maxwide ? 16 : 8;
instance->max_lun = MAX_LUN;
#ifndef SCSI_NCR_IOMAPPED
#if LINUX_VERSION_CODE >= LinuxVersionCode(2,3,29)
instance->base = (unsigned long) np->reg;
#else
instance->base = (char *) np->reg;
#endif
#endif
instance->irq = np->irq;
instance->unique_id = np->base_io;
instance->io_port = np->base_io;
instance->n_io_port = np->base_ws;
instance->dma_channel = 0;
instance->cmd_per_lun = MAX_TAGS;
instance->can_queue = (MAX_START-4);
scsi_set_pci_device(instance, device->pdev);
np->check_integrity = 0;
#ifdef SCSI_NCR_INTEGRITY_CHECKING
instance->check_integrity = 0;
#ifdef SCSI_NCR_ENABLE_INTEGRITY_CHECK
if ( !(driver_setup.bus_check & 0x04) ) {
np->check_integrity = 1;
instance->check_integrity = 1;
}
#endif
#endif
instance->select_queue_depths = sym53c8xx_select_queue_depths;
NCR_UNLOCK_NCB(np, flags);
/*
** Now let the generic SCSI driver
** look for the SCSI devices on the bus ..
*/
return 0;
attach_error:
if (!instance) return -1;
printk(KERN_INFO "%s: giving up ...n", ncr_name(np));
if (np)
ncr_free_resources(np);
scsi_unregister(instance);
return -1;
}
/*
** Free controller resources.
*/
static void ncr_free_resources(ncb_p np)
{
ccb_p cp;
tcb_p tp;
lcb_p lp;
int target, lun;
if (np->irq)
free_irq(np->irq, np);
if (np->base_io)
release_region(np->base_io, np->base_ws);
#ifndef SCSI_NCR_PCI_MEM_NOT_SUPPORTED
if (np->base_va)
unmap_pci_mem(np->base_va, np->base_ws);
if (np->base2_va)
unmap_pci_mem(np->base2_va, np->base2_ws);
#endif
if (np->scripth0)
m_free_dma(np->scripth0, sizeof(struct scripth), "SCRIPTH");
if (np->script0)
m_free_dma(np->script0, sizeof(struct script), "SCRIPT");
if (np->squeue)
m_free_dma(np->squeue, sizeof(ncrcmd)*(MAX_START*2), "SQUEUE");
if (np->dqueue)
m_free_dma(np->dqueue, sizeof(ncrcmd)*(MAX_START*2),"DQUEUE");
while ((cp = np->ccbc) != NULL) {
np->ccbc = cp->link_ccb;
m_free_dma(cp, sizeof(*cp), "CCB");
}
if (np->badluntbl)
m_free_dma(np->badluntbl, 256,"BADLUNTBL");
for (target = 0; target < MAX_TARGET ; target++) {
tp = &np->target[target];
for (lun = 0 ; lun < MAX_LUN ; lun++) {
lp = ncr_lp(np, tp, lun);
if (!lp)
continue;
if (lp->tasktbl != &lp->tasktbl_0)
m_free_dma(lp->tasktbl, MAX_TASKS*4, "TASKTBL");
if (lp->cb_tags)
m_free(lp->cb_tags, MAX_TAGS, "CB_TAGS");
m_free_dma(lp, sizeof(*lp), "LCB");
}
#if MAX_LUN > 1
if (tp->lmp)
m_free(tp->lmp, MAX_LUN * sizeof(lcb_p), "LMP");
if (tp->luntbl)
m_free_dma(tp->luntbl, 256, "LUNTBL");
#endif
}
if (np->targtbl)
m_free_dma(np->targtbl, 256, "TARGTBL");
m_free_dma(np, sizeof(*np), "NCB");
}
/*==========================================================
**
**
** Done SCSI commands list management.
**
** We donnot enter the scsi_done() callback immediately
** after a command has been seen as completed but we
** insert it into a list which is flushed outside any kind
** of driver critical section.
** This allows to do minimal stuff under interrupt and
** inside critical sections and to also avoid locking up
** on recursive calls to driver entry points under SMP.
** In fact, the only kernel point which is entered by the
** driver with a driver lock set is get_free_pages(GFP_ATOMIC...)
** that shall not reenter the driver under any circumstance.
**
**==========================================================
*/
static inline void ncr_queue_done_cmd(ncb_p np, Scsi_Cmnd *cmd)
{
unmap_scsi_data(np, cmd);
cmd->host_scribble = (char *) np->done_list;
np->done_list = cmd;
}
static inline void ncr_flush_done_cmds(Scsi_Cmnd *lcmd)
{
Scsi_Cmnd *cmd;
while (lcmd) {
cmd = lcmd;
lcmd = (Scsi_Cmnd *) cmd->host_scribble;
cmd->scsi_done(cmd);
}
}
/*==========================================================
**
**
** Prepare the next negotiation message for integrity check,
** if needed.
**
** Fill in the part of message buffer that contains the
** negotiation and the nego_status field of the CCB.
** Returns the size of the message in bytes.
**
** If tp->ppr_negotiation is 1 and a M_REJECT occurs, then
** we disable ppr_negotiation. If the first ppr_negotiation is
** successful, set this flag to 2.
**
**==========================================================
*/
#ifdef SCSI_NCR_INTEGRITY_CHECKING
static int ncr_ic_nego(ncb_p np, ccb_p cp, Scsi_Cmnd *cmd, u_char *msgptr)
{
tcb_p tp = &np->target[cp->target];
int msglen = 0;
int nego = 0;
u_char new_width, new_offset, new_period;
u_char no_increase;
if (tp->ppr_negotiation == 1) /* PPR message successful */
tp->ppr_negotiation = 2;
if (tp->inq_done) {
if (!tp->ic_maximums_set) {
tp->ic_maximums_set = 1;
/*
* Check against target, host and user limits
*/
if ( (tp->inq_byte7 & INQ7_WIDE16) &&
np->maxwide && tp->usrwide)
tp->ic_max_width = 1;
else
tp->ic_max_width = 0;
if ((tp->inq_byte7 & INQ7_SYNC) && tp->maxoffs)
tp->ic_min_sync = (tp->minsync < np->minsync) ?
np->minsync : tp->minsync;
else
tp->ic_min_sync = 255;
tp->period = 1;
tp->widedone = 1;
/*
* Enable PPR negotiation - only if Ultra3 support
* is accessible.
*/
#if 0
if (tp->ic_max_width && (tp->ic_min_sync != 255 ))
tp->ppr_negotiation = 1;
#endif
tp->ppr_negotiation = 0;
if (np->features & FE_ULTRA3) {
if (tp->ic_max_width && (tp->ic_min_sync == 0x09))
tp->ppr_negotiation = 1;
}
if (!tp->ppr_negotiation)
cmd->ic_nego &= ~NS_PPR;
}
if (DEBUG_FLAGS & DEBUG_IC) {
printk("%s: cmd->ic_nego %d, 1st byte 0x%2Xn",
ncr_name(np), cmd->ic_nego, cmd->cmnd[0]);
}
/* Previous command recorded a parity or an initiator
* detected error condition. Force bus to narrow for this
* target. Clear flag. Negotation on request sense.
* Note: kernel forces 2 bus resets :o( but clears itself out.
* Minor bug? in scsi_obsolete.c (ugly)
*/
if (np->check_integ_par) {
printk("%s: Parity Error. Target set to narrow.n",
ncr_name(np));
tp->ic_max_width = 0;
tp->widedone = tp->period = 0;
}
/* Initializing:
* If ic_nego == NS_PPR, we are in the initial test for
* PPR messaging support. If driver flag is clear, then
* either we don't support PPR nego (narrow or async device)
* or this is the second TUR and we have had a M. REJECT
* or unexpected disconnect on the first PPR negotiation.
* Do not negotiate, reset nego flags (in case a reset has
* occurred), clear ic_nego and return.
* General case: Kernel will clear flag on a fallback.
* Do only SDTR or WDTR in the future.
*/
if (!tp->ppr_negotiation && (cmd->ic_nego == NS_PPR )) {
tp->ppr_negotiation = 0;
cmd->ic_nego &= ~NS_PPR;
tp->widedone = tp->period = 1;
return msglen;
}
else if (( tp->ppr_negotiation && !(cmd->ic_nego & NS_PPR )) ||
(!tp->ppr_negotiation && (cmd->ic_nego & NS_PPR )) ) {
tp->ppr_negotiation = 0;
cmd->ic_nego &= ~NS_PPR;
}
/*
* Always check the PPR nego. flag bit if ppr_negotiation
* is set. If the ic_nego PPR bit is clear,
* there must have been a fallback. Do only
* WDTR / SDTR in the future.
*/
if ((tp->ppr_negotiation) && (!(cmd->ic_nego & NS_PPR)))
tp->ppr_negotiation = 0;
/* In case of a bus reset, ncr_negotiate will reset
* the flags tp->widedone and tp->period to 0, forcing
* a new negotiation. Do WDTR then SDTR. If PPR, do both.
* Do NOT increase the period. It is possible for the Scsi_Cmnd
* flags to be set to increase the period when a bus reset
* occurs - we don't want to change anything.
*/
no_increase = 0;
if (tp->ppr_negotiation && (!tp->widedone) && (!tp->period) ) {
cmd->ic_nego = NS_PPR;
tp->widedone = tp->period = 1;
no_increase = 1;
}
else if (!tp->widedone) {
cmd->ic_nego = NS_WIDE;
tp->widedone = 1;
no_increase = 1;
}
else if (!tp->period) {
cmd->ic_nego = NS_SYNC;
tp->period = 1;
no_increase = 1;
}
new_width = cmd->ic_nego_width & tp->ic_max_width;
switch (cmd->ic_nego_sync) {
case 2: /* increase the period */
if (!no_increase) {
if (tp->ic_min_sync <= 0x09)
tp->ic_min_sync = 0x0A;
else if (tp->ic_min_sync <= 0x0A)
tp->ic_min_sync = 0x0C;
else if (tp->ic_min_sync <= 0x0C)
tp->ic_min_sync = 0x19;
else if (tp->ic_min_sync <= 0x19)
tp->ic_min_sync *= 2;
else {
tp->ic_min_sync = 255;
cmd->ic_nego_sync = 0;
tp->maxoffs = 0;
}
}
new_period = tp->maxoffs?tp->ic_min_sync:0;
new_offset = tp->maxoffs;
break;
case 1: /* nego. to maximum */
new_period = tp->maxoffs?tp->ic_min_sync:0;
new_offset = tp->maxoffs;
break;
case 0: /* nego to async */
default:
new_period = 0;
new_offset = 0;
break;
};
nego = NS_NOCHANGE;
if (tp->ppr_negotiation) {
u_char options_byte = 0;
/*
** Must make sure data is consistent.
** If period is 9 and sync, must be wide and DT bit set.
** else period must be larger. If the width is 0,
** reset bus to wide but increase the period to 0x0A.
** Note: The strange else clause is due to the integrity check.
** If fails at 0x09, wide, the I.C. code will redo at the same
** speed but a narrow bus. The driver must take care of slowing
** the bus speed down.
**
** The maximum offset in ST mode is 31, in DT mode 62 (1010/1010_66 only)
*/
if ( (new_period==0x09) && new_offset) {
if (new_width)
options_byte = 0x02;
else {
tp->ic_min_sync = 0x0A;
new_period = 0x0A;
cmd->ic_nego_width = 1;
new_width = 1;
}
}
if (!options_byte && new_offset > np->maxoffs_st)
new_offset = np->maxoffs_st;
nego = NS_PPR;
msgptr[msglen++] = M_EXTENDED;
msgptr[msglen++] = 6;
msgptr[msglen++] = M_X_PPR_REQ;
msgptr[msglen++] = new_period;
msgptr[msglen++] = 0;
msgptr[msglen++] = new_offset;
msgptr[msglen++] = new_width;
msgptr[msglen++] = options_byte;
}
else {
switch (cmd->ic_nego & ~NS_PPR) {
case NS_WIDE:
/*
** WDTR negotiation on if device supports
** wide or if wide device forced narrow
** due to a parity error.
*/
cmd->ic_nego_width &= tp->ic_max_width;
if (tp->ic_max_width | np->check_integ_par) {
nego = NS_WIDE;
msgptr[msglen++] = M_EXTENDED;
msgptr[msglen++] = 2;
msgptr[msglen++] = M_X_WIDE_REQ;
msgptr[msglen++] = new_width;
}
break;
case NS_SYNC:
/*
** negotiate synchronous transfers
** Target must support sync transfers.
** Min. period = 0x0A, maximum offset of 31=0x1f.
*/
if (tp->inq_byte7 & INQ7_SYNC) {
if (new_offset && (new_period < 0x0A)) {
tp->ic_min_sync = 0x0A;
new_period = 0x0A;
}
if (new_offset > np->maxoffs_st)
new_offset = np->maxoffs_st;
nego = NS_SYNC;
msgptr[msglen++] = M_EXTENDED;
msgptr[msglen++] = 3;
msgptr[msglen++] = M_X_SYNC_REQ;
msgptr[msglen++] = new_period;
msgptr[msglen++] = new_offset;
}
else
cmd->ic_nego_sync = 0;
break;
case NS_NOCHANGE:
break;
}
}
};
cp->nego_status = nego;
np->check_integ_par = 0;
if (nego) {
tp->nego_cp = cp;
if (DEBUG_FLAGS & DEBUG_NEGO) {
ncr_print_msg(cp, nego == NS_WIDE ?
"wide/narrow msgout":
(nego == NS_SYNC ? "sync/async msgout" : "ppr msgout"),
msgptr);
};
};
return msglen;
}
#endif /* SCSI_NCR_INTEGRITY_CHECKING */
/*==========================================================
**
**
** Prepare the next negotiation message if needed.
**
** Fill in the part of message buffer that contains the
** negotiation and the nego_status field of the CCB.
** Returns the size of the message in bytes.
**
**
**==========================================================
*/
static int ncr_prepare_nego(ncb_p np, ccb_p cp, u_char *msgptr)
{
tcb_p tp = &np->target[cp->target];
int msglen = 0;
int nego = 0;
u_char width, offset, factor, last_byte;
if (!np->check_integrity) {
/* If integrity checking disabled, enable PPR messaging
* if device supports wide, sync and ultra 3
*/
if (tp->ppr_negotiation == 1) /* PPR message successful */
tp->ppr_negotiation = 2;
if ((tp->inq_done) && (!tp->ic_maximums_set)) {
tp->ic_maximums_set = 1;
/*
* Issue PPR only if board is capable
* and set-up for Ultra3 transfers.
*/
tp->ppr_negotiation = 0;
if ( (np->features & FE_ULTRA3) &&
(tp->usrwide) && (tp->maxoffs) &&
(tp->minsync == 0x09) )
tp->ppr_negotiation = 1;
}
}
if (tp->inq_done) {
/*
* Get the current width, offset and period
*/
ncr_get_xfer_info( np, tp, &factor,
&offset, &width);
/*
** negotiate wide transfers ?
*/
if (!tp->widedone) {
if (tp->inq_byte7 & INQ7_WIDE16) {
if (tp->ppr_negotiation)
nego = NS_PPR;
else
nego = NS_WIDE;
width = tp->usrwide;
#ifdef SCSI_NCR_INTEGRITY_CHECKING
if (tp->ic_done)
width &= tp->ic_max_width;
#endif
} else
tp->widedone=1;
};
/*
** negotiate synchronous transfers?
*/
if ((nego != NS_WIDE) && !tp->period) {
if (tp->inq_byte7 & INQ7_SYNC) {
if (tp->ppr_negotiation)
nego = NS_PPR;
else
nego = NS_SYNC;
/* Check for async flag */
if (tp->maxoffs == 0) {
offset = 0;
factor = 0;
}
else {
offset = tp->maxoffs;
factor = tp->minsync;
#ifdef SCSI_NCR_INTEGRITY_CHECKING
if ((tp->ic_done) &&
(factor < tp->ic_min_sync))
factor = tp->ic_min_sync;
#endif
}
} else {
offset = 0;
factor = 0;
tp->period =0xffff;
PRINT_TARGET(np, cp->target);
printk ("target did not report SYNC.n");
};
};
};
switch (nego) {
case NS_PPR:
/*
** Must make sure data is consistent.
** If period is 9 and sync, must be wide and DT bit set
** else period must be larger.
** Maximum offset is 31=0x1f is ST mode, 62 if DT mode
*/
last_byte = 0;
if ( (factor==9) && offset) {
if (!width) {
factor = 0x0A;
}
else
last_byte = 0x02;
}
if (!last_byte && offset > np->maxoffs_st)
offset = np->maxoffs_st;
msgptr[msglen++] = M_EXTENDED;
msgptr[msglen++] = 6;
msgptr[msglen++] = M_X_PPR_REQ;
msgptr[msglen++] = factor;
msgptr[msglen++] = 0;
msgptr[msglen++] = offset;
msgptr[msglen++] = width;
msgptr[msglen++] = last_byte;
break;
case NS_SYNC:
/*
** Never negotiate faster than Ultra 2 (25ns periods)
*/
if (offset && (factor < 0x0A)) {
factor = 0x0A;
tp->minsync = 0x0A;
}
if (offset > np->maxoffs_st)
offset = np->maxoffs_st;
msgptr[msglen++] = M_EXTENDED;
msgptr[msglen++] = 3;
msgptr[msglen++] = M_X_SYNC_REQ;
msgptr[msglen++] = factor;
msgptr[msglen++] = offset;
break;
case NS_WIDE:
msgptr[msglen++] = M_EXTENDED;
msgptr[msglen++] = 2;
msgptr[msglen++] = M_X_WIDE_REQ;
msgptr[msglen++] = width;
break;
};
cp->nego_status = nego;
if (nego) {
tp->nego_cp = cp;
if (DEBUG_FLAGS & DEBUG_NEGO) {
ncr_print_msg(cp, nego == NS_WIDE ?
"wide msgout":
(nego == NS_SYNC ? "sync msgout" : "ppr msgout"),
msgptr);
};
};
return msglen;
}
/*==========================================================
**
**
** Start execution of a SCSI command.
** This is called from the generic SCSI driver.
**
**
**==========================================================
*/
static int ncr_queue_command (ncb_p np, Scsi_Cmnd *cmd)
{
/* Scsi_Device *device = cmd->device; */
tcb_p tp = &np->target[cmd->target];
lcb_p lp = ncr_lp(np, tp, cmd->lun);
ccb_p cp;
u_char idmsg, *msgptr;
u_int msglen;
int direction;
u_int32 lastp, goalp;
/*---------------------------------------------
**
** Some shortcuts ...
**
**---------------------------------------------
*/
if ((cmd->target == np->myaddr ) ||
(cmd->target >= MAX_TARGET) ||
(cmd->lun >= MAX_LUN )) {
return(DID_BAD_TARGET);
}
/*---------------------------------------------
**
** Complete the 1st TEST UNIT READY command
** with error condition if the device is
** flagged NOSCAN, in order to speed up
** the boot.
**
**---------------------------------------------
*/
if ((cmd->cmnd[0] == 0 || cmd->cmnd[0] == 0x12) &&
(tp->usrflag & UF_NOSCAN)) {
tp->usrflag &= ~UF_NOSCAN;
return DID_BAD_TARGET;
}
if (DEBUG_FLAGS & DEBUG_TINY) {
PRINT_ADDR(cmd);
printk ("CMD=%x ", cmd->cmnd[0]);
}
/*---------------------------------------------------
**
** Assign a ccb / bind cmd.
** If resetting, shorten settle_time if necessary
** in order to avoid spurious timeouts.
** If resetting or no free ccb,
** insert cmd into the waiting list.
**
**----------------------------------------------------
*/
if (np->settle_time && cmd->timeout_per_command >= HZ) {
u_long tlimit = ktime_get(cmd->timeout_per_command - HZ);
if (ktime_dif(np->settle_time, tlimit) > 0)
np->settle_time = tlimit;
}
if (np->settle_time || !(cp=ncr_get_ccb (np, cmd->target, cmd->lun))) {
insert_into_waiting_list(np, cmd);
return(DID_OK);
}
cp->cmd = cmd;
/*---------------------------------------------------
**
** Enable tagged queue if asked by scsi ioctl
**
**----------------------------------------------------
*/
#if 0 /* This stuff was only useful for linux-1.2.13 */
if (lp && !lp->numtags && cmd->device && cmd->device->tagged_queue) {
lp->numtags = tp->usrtags;
ncr_setup_tags (np, cp->target, cp->lun);
}
#endif
/*----------------------------------------------------
**
** Build the identify / tag / sdtr message
**
**----------------------------------------------------
*/
idmsg = M_IDENTIFY | cp->lun;
if (cp ->tag != NO_TAG || (lp && !(tp->usrflag & UF_NODISC)))
idmsg |= 0x40;
msgptr = cp->scsi_smsg;
msglen = 0;
msgptr[msglen++] = idmsg;
if (cp->tag != NO_TAG) {
char order = np->order;
/*
** Force ordered tag if necessary to avoid timeouts
** and to preserve interactivity.
*/
if (lp && ktime_exp(lp->tags_stime)) {
lp->tags_si = !(lp->tags_si);
if (lp->tags_sum[lp->tags_si]) {
order = M_ORDERED_TAG;
if ((DEBUG_FLAGS & DEBUG_TAGS)||bootverbose>0){
PRINT_ADDR(cmd);
printk("ordered tag forced.n");
}
}
lp->tags_stime = ktime_get(3*HZ);
}
if (order == 0) {
/*
** Ordered write ops, unordered read ops.
*/
switch (cmd->cmnd[0]) {
case 0x08: /* READ_SMALL (6) */
case 0x28: /* READ_BIG (10) */
case 0xa8: /* READ_HUGE (12) */
order = M_SIMPLE_TAG;
break;
default:
order = M_ORDERED_TAG;
}
}
msgptr[msglen++] = order;
/*
** For less than 128 tags, actual tags are numbered
** 1,3,5,..2*MAXTAGS+1,since we may have to deal
** with devices that have problems with #TAG 0 or too
** great #TAG numbers. For more tags (up to 256),
** we use directly our tag number.
*/
#if MAX_TASKS > (512/4)
msgptr[msglen++] = cp->tag;
#else
msgptr[msglen++] = (cp->tag << 1) + 1;
#endif
}
cp->host_flags = 0;
/*----------------------------------------------------
**
** Build the data descriptors
**
**----------------------------------------------------
*/
direction = scsi_data_direction(cmd);
if (direction != SCSI_DATA_NONE) {
cp->segments = np->scatter (np, cp, cp->cmd);
if (cp->segments < 0) {
ncr_free_ccb(np, cp);
return(DID_ERROR);
}
}
else {
cp->data_len = 0;
cp->segments = 0;
}
/*---------------------------------------------------
**
** negotiation required?
**
** (nego_status is filled by ncr_prepare_nego())
**
**---------------------------------------------------
*/
cp->nego_status = 0;
#ifdef SCSI_NCR_INTEGRITY_CHECKING
if ((np->check_integrity && tp->ic_done) || !np->check_integrity) {
if ((!tp->widedone || !tp->period) && !tp->nego_cp && lp) {
msglen += ncr_prepare_nego (np, cp, msgptr + msglen);
}
}
else if (np->check_integrity && (cmd->ic_in_progress)) {
msglen += ncr_ic_nego (np, cp, cmd, msgptr + msglen);
}
else if (np->check_integrity && cmd->ic_complete) {
u_long current_period;
u_char current_offset, current_width, current_factor;
ncr_get_xfer_info (np, tp, &current_factor,
&current_offset, &current_width);
tp->ic_max_width = current_width;
tp->ic_min_sync = current_factor;
if (current_factor == 9) current_period = 125;
else if (current_factor == 10) current_period = 250;
else if (current_factor == 11) current_period = 303;
else if (current_factor == 12) current_period = 500;
else current_period = current_factor * 40;
/*
* Negotiation for this target is complete. Update flags.
*/
tp->period = current_period;
tp->widedone = 1;
tp->ic_done = 1;
printk("%s: Integrity Check Complete: n", ncr_name(np));
printk("%s: %s %s SCSI", ncr_name(np),
current_offset?"SYNC":"ASYNC",
tp->ic_max_width?"WIDE":"NARROW");
if (current_offset) {
u_long mbs = 10000 * (tp->ic_max_width + 1);
printk(" %d.%d MB/s",
(int) (mbs / current_period), (int) (mbs % current_period));
printk(" (%d ns, %d offset)n",
(int) current_period/10, current_offset);
}
else
printk(" %d MB/s. n ", (tp->ic_max_width+1)*5);
}
#else
if ((!tp->widedone || !tp->period) && !tp->nego_cp && lp) {
msglen += ncr_prepare_nego (np, cp, msgptr + msglen);
}
#endif /* SCSI_NCR_INTEGRITY_CHECKING */
/*----------------------------------------------------
**
** Determine xfer direction.
**
**----------------------------------------------------
*/
if (!cp->data_len)
direction = SCSI_DATA_NONE;
/*
** If data direction is UNKNOWN, speculate DATA_READ
** but prepare alternate pointers for WRITE in case
** of our speculation will be just wrong.
** SCRIPTS will swap values if needed.
*/
switch(direction) {
case SCSI_DATA_UNKNOWN:
case SCSI_DATA_WRITE:
goalp = NCB_SCRIPT_PHYS (np, data_out2) + 8;
lastp = goalp - 8 - (cp->segments * (SCR_SG_SIZE*4));
if (direction != SCSI_DATA_UNKNOWN)
break;
cp->phys.header.wgoalp = cpu_to_scr(goalp);
cp->phys.header.wlastp = cpu_to_scr(lastp);
/* fall through */
case SCSI_DATA_READ:
cp->host_flags |= HF_DATA_IN;
goalp = NCB_SCRIPT_PHYS (np, data_in2) + 8;
lastp = goalp - 8 - (cp->segments * (SCR_SG_SIZE*4));
break;
default:
case SCSI_DATA_NONE:
lastp = goalp = NCB_SCRIPTH_PHYS (np, no_data);
break;
}
/*
** Set all pointers values needed by SCRIPTS.
** If direction is unknown, start at data_io.
*/
cp->phys.header.lastp = cpu_to_scr(lastp);
cp->phys.header.goalp = cpu_to_scr(goalp);
if (direction == SCSI_DATA_UNKNOWN)
cp->phys.header.savep =
cpu_to_scr(NCB_SCRIPTH_PHYS (np, data_io));
else
cp->phys.header.savep= cpu_to_scr(lastp);
/*
** Save the initial data pointer in order to be able
** to redo the command.
** We also have to save the initial lastp, since it
** will be changed to DATA_IO if we don't know the data
** direction and the device completes the command with
** QUEUE FULL status (without entering the data phase).
*/
cp->startp = cp->phys.header.savep;
cp->lastp0 = cp->phys.header.lastp;
/*----------------------------------------------------
**
** fill in ccb
**
**----------------------------------------------------
**
**
** physical -> virtual backlink
** Generic SCSI command
*/
/*
** Startqueue
*/
cp->phys.header.go.start = cpu_to_scr(NCB_SCRIPT_PHYS (np,select));
cp->phys.header.go.restart = cpu_to_scr(NCB_SCRIPT_PHYS (np,resel_dsa));
/*
** select
*/
cp->phys.select.sel_id = cp->target;
cp->phys.select.sel_scntl3 = tp->wval;
cp->phys.select.sel_sxfer = tp->sval;
cp->phys.select.sel_scntl4 = tp->uval;
/*
** message
*/
cp->phys.smsg.addr = cpu_to_scr(CCB_PHYS (cp, scsi_smsg));
cp->phys.smsg.size = cpu_to_scr(msglen);
/*
** command
*/
memcpy(cp->cdb_buf, cmd->cmnd, MIN(cmd->cmd_len, sizeof(cp->cdb_buf)));
cp->phys.cmd.addr = cpu_to_scr(CCB_PHYS (cp, cdb_buf[0]));
cp->phys.cmd.size = cpu_to_scr(cmd->cmd_len);
/*
** status
*/
cp->actualquirks = tp->quirks;
cp->host_status = cp->nego_status ? HS_NEGOTIATE : HS_BUSY;
cp->scsi_status = S_ILLEGAL;
cp->xerr_status = 0;
cp->extra_bytes = 0;
/*
** extreme data pointer.
** shall be positive, so -1 is lower than lowest.:)
*/
cp->ext_sg = -1;
cp->ext_ofs = 0;
/*----------------------------------------------------
**
** Critical region: start this job.
**
**----------------------------------------------------
*/
/*
** activate this job.
*/
/*
** insert next CCBs into start queue.
** 2 max at a time is enough to flush the CCB wait queue.
*/
if (lp)
ncr_start_next_ccb(np, lp, 2);
else
ncr_put_start_queue(np, cp);
/*
** Command is successfully queued.
*/
return(DID_OK);
}
/*==========================================================
**
**
** Insert a CCB into the start queue and wake up the
** SCRIPTS processor.
**
**
**==========================================================
*/
static void ncr_start_next_ccb(ncb_p np, lcb_p lp, int maxn)
{
XPT_QUEHEAD *qp;
ccb_p cp;
while (maxn-- && lp->queuedccbs < lp->queuedepth) {
qp = xpt_remque_head(&lp->wait_ccbq);
if (!qp)
break;
++lp->queuedccbs;
cp = xpt_que_entry(qp, struct ccb, link_ccbq);
xpt_insque_tail(qp, &lp->busy_ccbq);
lp->tasktbl[cp->tag == NO_TAG ? 0 : cp->tag] =
cpu_to_scr(cp->p_ccb);
ncr_put_start_queue(np, cp);
}
}
static void ncr_put_start_queue(ncb_p np, ccb_p cp)
{
u_short qidx;
#ifdef SCSI_NCR_IARB_SUPPORT
/*
** If the previously queued CCB is not yet done,
** set the IARB hint. The SCRIPTS will go with IARB
** for this job when starting the previous one.
** We leave devices a chance to win arbitration by
** not using more than 'iarb_max' consecutive
** immediate arbitrations.
*/
if (np->last_cp && np->iarb_count < np->iarb_max) {
np->last_cp->host_flags |= HF_HINT_IARB;
++np->iarb_count;
}
else
np->iarb_count = 0;
np->last_cp = cp;
#endif
/*
** insert into start queue.
*/
qidx = np->squeueput + 2;
if (qidx >= MAX_START*2) qidx = 0;
np->squeue [qidx] = cpu_to_scr(np->p_idletask);
MEMORY_BARRIER();
np->squeue [np->squeueput] = cpu_to_scr(cp->p_ccb);
np->squeueput = qidx;
cp->queued = 1;
if (DEBUG_FLAGS & DEBUG_QUEUE)
printk ("%s: queuepos=%d.n", ncr_name (np), np->squeueput);
/*
** Script processor may be waiting for reselect.
** Wake it up.
*/
MEMORY_BARRIER();
OUTB (nc_istat, SIGP|np->istat_sem);
}
/*==========================================================
**
** Soft reset the chip.
**
** Some 896 and 876 chip revisions may hang-up if we set
** the SRST (soft reset) bit at the wrong time when SCRIPTS
** are running.
** So, we need to abort the current operation prior to
** soft resetting the chip.
**
**==========================================================
*/
static void ncr_chip_reset (ncb_p np)
{
OUTB (nc_istat, SRST);
UDELAY (10);
OUTB (nc_istat, 0);
}
static void ncr_soft_reset(ncb_p np)
{
u_char istat;
int i;
if (!(np->features & FE_ISTAT1) || !(INB (nc_istat1) & SRUN))
goto do_chip_reset;
OUTB (nc_istat, CABRT);
for (i = 100000 ; i ; --i) {
istat = INB (nc_istat);
if (istat & SIP) {
INW (nc_sist);
}
else if (istat & DIP) {
if (INB (nc_dstat) & ABRT);
break;
}
UDELAY(5);
}
OUTB (nc_istat, 0);
if (!i)
printk("%s: unable to abort current chip operation, "
"ISTAT=0x%02x.n", ncr_name(np), istat);
do_chip_reset:
ncr_chip_reset(np);
}
/*==========================================================
**
**
** Start reset process.
** The interrupt handler will reinitialize the chip.
** The timeout handler will wait for settle_time before
** clearing it and so resuming command processing.
**
**
**==========================================================
*/
static void ncr_start_reset(ncb_p np)
{
(void) ncr_reset_scsi_bus(np, 1, driver_setup.settle_delay);
}
static int ncr_reset_scsi_bus(ncb_p np, int enab_int, int settle_delay)
{
u_int32 term;
int retv = 0;
np->settle_time = ktime_get(settle_delay * HZ);
if (bootverbose > 1)
printk("%s: resetting, "
"command processing suspended for %d secondsn",
ncr_name(np), settle_delay);
ncr_soft_reset(np); /* Soft reset the chip */
UDELAY (2000); /* The 895/6 need time for the bus mode to settle */
if (enab_int)
OUTW (nc_sien, RST);
/*
** Enable Tolerant, reset IRQD if present and
** properly set IRQ mode, prior to resetting the bus.
*/
OUTB (nc_stest3, TE);
OUTB (nc_dcntl, (np->rv_dcntl & IRQM));
OUTB (nc_scntl1, CRST);
UDELAY (200);
if (!driver_setup.bus_check)
goto out;
/*
** Check for no terminators or SCSI bus shorts to ground.
** Read SCSI data bus, data parity bits and control signals.
** We are expecting RESET to be TRUE and other signals to be
** FALSE.
*/
term = INB(nc_sstat0);
term = ((term & 2) << 7) + ((term & 1) << 17); /* rst sdp0 */
term |= ((INB(nc_sstat2) & 0x01) << 26) | /* sdp1 */
((INW(nc_sbdl) & 0xff) << 9) | /* d7-0 */
((INW(nc_sbdl) & 0xff00) << 10) | /* d15-8 */
INB(nc_sbcl); /* req ack bsy sel atn msg cd io */
if (!(np->features & FE_WIDE))
term &= 0x3ffff;
if (term != (2<<7)) {
printk("%s: suspicious SCSI data while resetting the BUS.n",
ncr_name(np));
printk("%s: %sdp0,d7-0,rst,req,ack,bsy,sel,atn,msg,c/d,i/o = "
"0x%lx, expecting 0x%lxn",
ncr_name(np),
(np->features & FE_WIDE) ? "dp1,d15-8," : "",
(u_long)term, (u_long)(2<<7));
if (driver_setup.bus_check == 1)
retv = 1;
}
out:
OUTB (nc_scntl1, 0);
return retv;
}
/*==========================================================
**
**
** Reset the SCSI BUS.
** This is called from the generic SCSI driver.
**
**
**==========================================================
*/
static int ncr_reset_bus (ncb_p np, Scsi_Cmnd *cmd, int sync_reset)
{
/* Scsi_Device *device = cmd->device; */
ccb_p cp;
int found;
/*
* Return immediately if reset is in progress.
*/
if (np->settle_time) {
return SCSI_RESET_PUNT;
}
/*
* Start the reset process.
* The script processor is then assumed to be stopped.
* Commands will now be queued in the waiting list until a settle
* delay of 2 seconds will be completed.
*/
ncr_start_reset(np);
/*
* First, look in the wakeup list
*/
for (found=0, cp=np->ccbc; cp; cp=cp->link_ccb) {
/*
** look for the ccb of this command.
*/
if (cp->host_status == HS_IDLE) continue;
if (cp->cmd == cmd) {
found = 1;
break;
}
}
/*
* Then, look in the waiting list
*/
if (!found && retrieve_from_waiting_list(0, np, cmd))
found = 1;
/*
* Wake-up all awaiting commands with DID_RESET.
*/
reset_waiting_list(np);
/*
* Wake-up all pending commands with HS_RESET -> DID_RESET.
*/
ncr_wakeup(np, HS_RESET);
/*
* If the involved command was not in a driver queue, and the
* scsi driver told us reset is synchronous, and the command is not
* currently in the waiting list, complete it with DID_RESET status,
* in order to keep it alive.
*/
if (!found && sync_reset && !retrieve_from_waiting_list(0, np, cmd)) {
SetScsiResult(cmd, DID_RESET, 0);
ncr_queue_done_cmd(np, cmd);
}
return SCSI_RESET_SUCCESS;
}
/*==========================================================
**
**
** Abort an SCSI command.
** This is called from the generic SCSI driver.
**
**
**==========================================================
*/
static int ncr_abort_command (ncb_p np, Scsi_Cmnd *cmd)
{
/* Scsi_Device *device = cmd->device; */
ccb_p cp;
/*
* First, look for the scsi command in the waiting list
*/
if (remove_from_waiting_list(np, cmd)) {
SetScsiAbortResult(cmd);
ncr_queue_done_cmd(np, cmd);
return SCSI_ABORT_SUCCESS;
}
/*
* Then, look in the wakeup list
*/
for (cp=np->ccbc; cp; cp=cp->link_ccb) {
/*
** look for the ccb of this command.
*/
if (cp->host_status == HS_IDLE) continue;
if (cp->cmd == cmd)
break;
}
if (!cp) {
return SCSI_ABORT_NOT_RUNNING;
}
/*
** Keep track we have to abort this job.
*/
cp->to_abort = 1;
/*
** Tell the SCRIPTS processor to stop
** and synchronize with us.
*/
np->istat_sem = SEM;
/*
** If there are no requests, the script
** processor will sleep on SEL_WAIT_RESEL.
** Let's wake it up, since it may have to work.
*/
OUTB (nc_istat, SIGP|SEM);
/*
** Tell user we are working for him.
*/
return SCSI_ABORT_PENDING;
}
/*==========================================================
**
** Linux release module stuff.
**
** Called before unloading the module
** Detach the host.
** We have to free resources and halt the NCR chip
**
**==========================================================
*/
#ifdef MODULE
static int ncr_detach(ncb_p np)
{
int i;
printk("%s: detaching ...n", ncr_name(np));
/*
** Stop the ncr_timeout process
** Set release_stage to 1 and wait that ncr_timeout() set it to 2.
*/
np->release_stage = 1;
for (i = 50 ; i && np->release_stage != 2 ; i--) MDELAY (100);
if (np->release_stage != 2)
printk("%s: the timer seems to be already stoppedn",
ncr_name(np));
else np->release_stage = 2;
/*
** Reset NCR chip.
** We should use ncr_soft_reset(), but we donnot want to do
** so, since we may not be safe if interrupts occur.
*/
printk("%s: resetting chipn", ncr_name(np));
ncr_chip_reset(np);
/*
** Restore bios setting for automatic clock detection.
*/
OUTB(nc_dmode, np->sv_dmode);
OUTB(nc_dcntl, np->sv_dcntl);
OUTB(nc_ctest3, np->sv_ctest3);
OUTB(nc_ctest4, np->sv_ctest4);
OUTB(nc_ctest5, np->sv_ctest5);
OUTB(nc_gpcntl, np->sv_gpcntl);
OUTB(nc_stest2, np->sv_stest2);
ncr_selectclock(np, np->sv_scntl3);
/*
** Free host resources
*/
ncr_free_resources(np);
return 1;
}
#endif
/*==========================================================
**
**
** Complete execution of a SCSI command.
** Signal completion to the generic SCSI driver.
**
**
**==========================================================
*/
void ncr_complete (ncb_p np, ccb_p cp)
{
Scsi_Cmnd *cmd;
tcb_p tp;
lcb_p lp;
/*
** Sanity check
*/
if (!cp || !cp->cmd)
return;
/*
** Print some debugging info.
*/
if (DEBUG_FLAGS & DEBUG_TINY)
printk ("CCB=%lx STAT=%x/%xn", (unsigned long)cp,
cp->host_status,cp->scsi_status);
/*
** Get command, target and lun pointers.
*/
cmd = cp->cmd;
cp->cmd = NULL;
tp = &np->target[cp->target];
lp = ncr_lp(np, tp, cp->lun);
/*
** We donnot queue more than 1 ccb per target
** with negotiation at any time. If this ccb was
** used for negotiation, clear this info in the tcb.
*/
if (cp == tp->nego_cp)
tp->nego_cp = 0;
#ifdef SCSI_NCR_IARB_SUPPORT
/*
** We just complete the last queued CCB.
** Clear this info that is no more relevant.
*/
if (cp == np->last_cp)
np->last_cp = 0;
#endif
/*
** If auto-sense performed, change scsi status,
** Otherwise, compute the residual.
*/
if (cp->host_flags & HF_AUTO_SENSE) {
cp->scsi_status = cp->sv_scsi_status;
cp->xerr_status = cp->sv_xerr_status;
}
else {
cp->resid = 0;
if (cp->xerr_status ||
cp->phys.header.lastp != cp->phys.header.goalp)
cp->resid = ncr_compute_residual(np, cp);
}
/*
** Check for extended errors.
*/
if (cp->xerr_status) {
if (cp->xerr_status & XE_PARITY_ERR) {
PRINT_ADDR(cmd);
printk ("unrecovered SCSI parity error.n");
}
if (cp->xerr_status & XE_EXTRA_DATA) {
PRINT_ADDR(cmd);
printk ("extraneous data discarded.n");
}
if (cp->xerr_status & XE_BAD_PHASE) {
PRINT_ADDR(cmd);
printk ("illegal scsi phase (4/5).n");
}
if (cp->xerr_status & XE_SODL_UNRUN) {
PRINT_ADDR(cmd);
printk ("ODD transfer in DATA OUT phase.n");
}
if (cp->xerr_status & XE_SWIDE_OVRUN){
PRINT_ADDR(cmd);
printk ("ODD transfer in DATA IN phase.n");
}
if (cp->host_status==HS_COMPLETE)
cp->host_status = HS_FAIL;
}
/*
** Print out any error for debugging purpose.
*/
if (DEBUG_FLAGS & (DEBUG_RESULT|DEBUG_TINY)) {
if (cp->host_status!=HS_COMPLETE || cp->scsi_status!=S_GOOD ||
cp->resid) {
PRINT_ADDR(cmd);
printk ("ERROR: cmd=%x host_status=%x scsi_status=%x "
"data_len=%d residual=%dn",
cmd->cmnd[0], cp->host_status, cp->scsi_status,
cp->data_len, cp->resid);
}
}
#if LINUX_VERSION_CODE >= LinuxVersionCode(2,3,99)
/*
** Move residual byte count to user structure.
*/
cmd->resid = cp->resid;
#endif
/*
** Check the status.
*/
if ( (cp->host_status == HS_COMPLETE)
&& (cp->scsi_status == S_GOOD ||
cp->scsi_status == S_COND_MET)) {
/*
** All went well (GOOD status).
** CONDITION MET status is returned on
** `Pre-Fetch' or `Search data' success.
*/
SetScsiResult(cmd, DID_OK, cp->scsi_status);
/*
** Allocate the lcb if not yet.
*/
if (!lp)
ncr_alloc_lcb (np, cp->target, cp->lun);
/*
** On standard INQUIRY response (EVPD and CmDt
** not set), setup logical unit according to
** announced capabilities (we need the 1rst 8 bytes).
*/
if (cmd->cmnd[0] == 0x12 && !(cmd->cmnd[1] & 0x3) &&
cmd->request_bufflen - cp->resid > 7 && !cmd->use_sg) {
sync_scsi_data(np, cmd); /* SYNC the data */
ncr_setup_lcb (np, cp->target, cp->lun,
(char *) cmd->request_buffer);
}
/*
** If tags was reduced due to queue full,
** increase tags if 1000 good status received.
*/
if (lp && lp->usetags && lp->numtags < lp->maxtags) {
++lp->num_good;
if (lp->num_good >= 1000) {
lp->num_good = 0;
++lp->numtags;
ncr_setup_tags (np, cp->target, cp->lun);
}
}
} else if ((cp->host_status == HS_COMPLETE)
&& (cp->scsi_status == S_CHECK_COND)) {
/*
** Check condition code
*/
SetScsiResult(cmd, DID_OK, S_CHECK_COND);
if (DEBUG_FLAGS & (DEBUG_RESULT|DEBUG_TINY)) {
PRINT_ADDR(cmd);
ncr_printl_hex("sense data:", cmd->sense_buffer, 14);
}
} else if ((cp->host_status == HS_COMPLETE)
&& (cp->scsi_status == S_CONFLICT)) {
/*
** Reservation Conflict condition code
*/
SetScsiResult(cmd, DID_OK, S_CONFLICT);
} else if ((cp->host_status == HS_COMPLETE)
&& (cp->scsi_status == S_BUSY ||
cp->scsi_status == S_QUEUE_FULL)) {
/*
** Target is busy.
*/
SetScsiResult(cmd, DID_OK, cp->scsi_status);
} else if ((cp->host_status == HS_SEL_TIMEOUT)
|| (cp->host_status == HS_TIMEOUT)) {
/*
** No response
*/
SetScsiResult(cmd, DID_TIME_OUT, cp->scsi_status);
} else if (cp->host_status == HS_RESET) {
/*
** SCSI bus reset
*/
SetScsiResult(cmd, DID_RESET, cp->scsi_status);
} else if (cp->host_status == HS_ABORTED) {
/*
** Transfer aborted
*/
SetScsiAbortResult(cmd);
} else {
int did_status;
/*
** Other protocol messes
*/
PRINT_ADDR(cmd);
printk ("COMMAND FAILED (%x %x) @%p.n",
cp->host_status, cp->scsi_status, cp);
did_status = DID_ERROR;
if (cp->xerr_status & XE_PARITY_ERR)
did_status = DID_PARITY;
SetScsiResult(cmd, did_status, cp->scsi_status);
}
/*
** trace output
*/
if (tp->usrflag & UF_TRACE) {
PRINT_ADDR(cmd);
printk (" CMD:");
ncr_print_hex(cmd->cmnd, cmd->cmd_len);
if (cp->host_status==HS_COMPLETE) {
switch (cp->scsi_status) {
case S_GOOD:
printk (" GOOD");
break;
case S_CHECK_COND:
printk (" SENSE:");
ncr_print_hex(cmd->sense_buffer, 14);
break;
default:
printk (" STAT: %xn", cp->scsi_status);
break;
}
} else printk (" HOSTERROR: %x", cp->host_status);
printk ("n");
}
/*
** Free this ccb
*/
ncr_free_ccb (np, cp);
/*
** requeue awaiting scsi commands for this lun.
*/
if (lp && lp->queuedccbs < lp->queuedepth &&
!xpt_que_empty(&lp->wait_ccbq))
ncr_start_next_ccb(np, lp, 2);
/*
** requeue awaiting scsi commands for this controller.
*/
if (np->waiting_list)
requeue_waiting_list(np);
/*
** signal completion to generic driver.
*/
ncr_queue_done_cmd(np, cmd);
}
/*==========================================================
**
**
** Signal all (or one) control block done.
**
**
**==========================================================
*/
/*
** The NCR has completed CCBs.
** Look at the DONE QUEUE.
**
** On architectures that may reorder LOAD/STORE operations,
** a memory barrier may be needed after the reading of the
** so-called `flag' and prior to dealing with the data.
*/
int ncr_wakeup_done (ncb_p np)
{
ccb_p cp;
int i, n;
u_long dsa;
n = 0;
i = np->dqueueget;
while (1) {
dsa = scr_to_cpu(np->dqueue[i]);
if (!dsa)
break;
np->dqueue[i] = 0;
if ((i = i+2) >= MAX_START*2)
i = 0;
cp = ncr_ccb_from_dsa(np, dsa);
if (cp) {
MEMORY_BARRIER();
ncr_complete (np, cp);
++n;
}
else
printk (KERN_ERR "%s: bad DSA (%lx) in done queue.n",
ncr_name(np), dsa);
}
np->dqueueget = i;
return n;
}
/*
** Complete all active CCBs.
*/
void ncr_wakeup (ncb_p np, u_long code)
{
ccb_p cp = np->ccbc;
while (cp) {
if (cp->host_status != HS_IDLE) {
cp->host_status = code;
ncr_complete (np, cp);
}
cp = cp->link_ccb;
}
}
/*==========================================================
**
**
** Start NCR chip.
**
**
**==========================================================
*/
void ncr_init (ncb_p np, int reset, char * msg, u_long code)
{
int i;
u_long phys;
/*
** Reset chip if asked, otherwise just clear fifos.
*/
if (reset)
ncr_soft_reset(np);
else {
OUTB (nc_stest3, TE|CSF);
OUTONB (nc_ctest3, CLF);
}
/*
** Message.
*/
if (msg) printk (KERN_INFO "%s: restart (%s).n", ncr_name (np), msg);
/*
** Clear Start Queue
*/
phys = np->p_squeue;
np->queuedepth = MAX_START - 1; /* 1 entry needed as end marker */
for (i = 0; i < MAX_START*2; i += 2) {
np->squeue[i] = cpu_to_scr(np->p_idletask);
np->squeue[i+1] = cpu_to_scr(phys + (i+2)*4);
}
np->squeue[MAX_START*2-1] = cpu_to_scr(phys);
/*
** Start at first entry.
*/
np->squeueput = 0;
np->scripth0->startpos[0] = cpu_to_scr(phys);
/*
** Clear Done Queue
*/
phys = vtobus(np->dqueue);
for (i = 0; i < MAX_START*2; i += 2) {
np->dqueue[i] = 0;
np->dqueue[i+1] = cpu_to_scr(phys + (i+2)*4);
}
np->dqueue[MAX_START*2-1] = cpu_to_scr(phys);
/*
** Start at first entry.
*/
np->scripth0->done_pos[0] = cpu_to_scr(phys);
np->dqueueget = 0;
/*
** Wakeup all pending jobs.
*/
ncr_wakeup (np, code);
/*
** Init chip.
*/
OUTB (nc_istat, 0x00 ); /* Remove Reset, abort */
UDELAY (2000); /* The 895 needs time for the bus mode to settle */
OUTB (nc_scntl0, np->rv_scntl0 | 0xc0);
/* full arb., ena parity, par->ATN */
OUTB (nc_scntl1, 0x00); /* odd parity, and remove CRST!! */
ncr_selectclock(np, np->rv_scntl3); /* Select SCSI clock */
OUTB (nc_scid , RRE|np->myaddr); /* Adapter SCSI address */
OUTW (nc_respid, 1ul<<np->myaddr); /* Id to respond to */
OUTB (nc_istat , SIGP ); /* Signal Process */
OUTB (nc_dmode , np->rv_dmode); /* Burst length, dma mode */
OUTB (nc_ctest5, np->rv_ctest5); /* Large fifo + large burst */
OUTB (nc_dcntl , NOCOM|np->rv_dcntl); /* Protect SFBR */
OUTB (nc_ctest3, np->rv_ctest3); /* Write and invalidate */
OUTB (nc_ctest4, np->rv_ctest4); /* Master parity checking */
if ((np->device_id != PCI_DEVICE_ID_LSI_53C1010) &&
(np->device_id != PCI_DEVICE_ID_LSI_53C1010_66)){
OUTB (nc_stest2, EXT|np->rv_stest2);
/* Extended Sreq/Sack filtering, not supported in C1010/C1010_66 */
}
OUTB (nc_stest3, TE); /* TolerANT enable */
OUTB (nc_stime0, 0x0c); /* HTH disabled STO 0.25 sec */
/*
** DEL 441 - 53C876 Rev 5 - Part Number 609-0392787/2788 - ITEM 2.
** Disable overlapped arbitration for all dual-function
** devices, regardless revision id.
** We may consider it is a post-chip-design feature. ;-)
**
** Errata applies to all 896 and 1010 parts.
*/
if (np->device_id == PCI_DEVICE_ID_NCR_53C875)
OUTB (nc_ctest0, (1<<5));
else if (np->device_id == PCI_DEVICE_ID_NCR_53C896 ||
np->device_id == PCI_DEVICE_ID_LSI_53C1010 ||
np->device_id == PCI_DEVICE_ID_LSI_53C1010_66 )
np->rv_ccntl0 |= DPR;
/*
** C1010_66MHz rev 0 part requies AIPCNTL1 bit 3 to be set.
*/
if (np->device_id == PCI_DEVICE_ID_LSI_53C1010_66)
OUTB(nc_aipcntl1, (1<<3));
/*
** Write CCNTL0/CCNTL1 for chips capable of 64 bit addressing
** and/or hardware phase mismatch, since only such chips
** seem to support those IO registers.
*/
if (np->features & (FE_DAC | FE_NOPM)) {
OUTB (nc_ccntl0, np->rv_ccntl0);
OUTB (nc_ccntl1, np->rv_ccntl1);
}
/*
** If phase mismatch handled by scripts (53C895A or 53C896
** or 53C1010 or 53C1010_66), set PM jump addresses.
*/
if (np->features & FE_NOPM) {
printk(KERN_INFO "%s: handling phase mismatch from SCRIPTS.n",
ncr_name(np));
OUTL (nc_pmjad1, NCB_SCRIPTH_PHYS (np, pm_handle));
OUTL (nc_pmjad2, NCB_SCRIPTH_PHYS (np, pm_handle));
}
/*
** Enable GPIO0 pin for writing if LED support from SCRIPTS.
** Also set GPIO5 and clear GPIO6 if hardware LED control.
*/
if (np->features & FE_LED0)
OUTB(nc_gpcntl, INB(nc_gpcntl) & ~0x01);
else if (np->features & FE_LEDC)
OUTB(nc_gpcntl, (INB(nc_gpcntl) & ~0x41) | 0x20);
/*
** enable ints
*/
OUTW (nc_sien , STO|HTH|MA|SGE|UDC|RST|PAR);
OUTB (nc_dien , MDPE|BF|SSI|SIR|IID);
/*
** For 895/895A/896/c1010
** Enable SBMC interrupt and save current SCSI bus mode.
*/
if ( (np->features & FE_ULTRA2) || (np->features & FE_ULTRA3) ) {
OUTONW (nc_sien, SBMC);
np->scsi_mode = INB (nc_stest4) & SMODE;
}
/*
** Fill in target structure.
** Reinitialize usrsync.
** Reinitialize usrwide.
** Prepare sync negotiation according to actual SCSI bus mode.
*/
for (i=0;i<MAX_TARGET;i++) {
tcb_p tp = &np->target[i];
tp->to_reset = 0;
tp->sval = 0;
tp->wval = np->rv_scntl3;
tp->uval = np->rv_scntl4;
if (tp->usrsync != 255) {
if (tp->usrsync <= np->maxsync) {
if (tp->usrsync < np->minsync) {
tp->usrsync = np->minsync;
}
}
else
tp->usrsync = 255;
};
if (tp->usrwide > np->maxwide)
tp->usrwide = np->maxwide;
ncr_negotiate (np, tp);
}
/*
** Download SCSI SCRIPTS to on-chip RAM if present,
** and start script processor.
** We do the download preferently from the CPU.
** For platforms that may not support PCI memory mapping,
** we use a simple SCRIPTS that performs MEMORY MOVEs.
*/
if (np->base2_ba) {
if (bootverbose)
printk ("%s: Downloading SCSI SCRIPTS.n",
ncr_name(np));
#ifdef SCSI_NCR_PCI_MEM_NOT_SUPPORTED
if (np->base2_ws == 8192)
phys = NCB_SCRIPTH0_PHYS (np, start_ram64);
else
phys = NCB_SCRIPTH_PHYS (np, start_ram);
#else
if (np->base2_ws == 8192) {
memcpy_to_pci(np->base2_va + 4096,
np->scripth0, sizeof(struct scripth));
OUTL (nc_mmws, np->scr_ram_seg);
OUTL (nc_mmrs, np->scr_ram_seg);
OUTL (nc_sfs, np->scr_ram_seg);
phys = NCB_SCRIPTH_PHYS (np, start64);
}
else
phys = NCB_SCRIPT_PHYS (np, init);
memcpy_to_pci(np->base2_va, np->script0, sizeof(struct script));
#endif /* SCSI_NCR_PCI_MEM_NOT_SUPPORTED */
}
else
phys = NCB_SCRIPT_PHYS (np, init);
np->istat_sem = 0;
OUTL (nc_dsa, np->p_ncb);
OUTL_DSP (phys);
}
/*==========================================================
**
** Prepare the negotiation values for wide and
** synchronous transfers.
**
**==========================================================
*/
static void ncr_negotiate (struct ncb* np, struct tcb* tp)
{
/*
** minsync unit is 4ns !
*/
u_long minsync = tp->usrsync;
/*
** SCSI bus mode limit
*/
if (np->scsi_mode && np->scsi_mode == SMODE_SE) {
if (minsync < 12) minsync = 12;
}
/*
** our limit ..
*/
if (minsync < np->minsync)
minsync = np->minsync;
/*
** divider limit
*/
if (minsync > np->maxsync)
minsync = 255;
tp->minsync = minsync;
tp->maxoffs = (minsync<255 ? np->maxoffs : 0);
/*
** period=0: has to negotiate sync transfer
*/
tp->period=0;
/*
** widedone=0: has to negotiate wide transfer
*/
tp->widedone=0;
}
/*==========================================================
**
** Get clock factor and sync divisor for a given
** synchronous factor period.
** Returns the clock factor (in sxfer) and scntl3
** synchronous divisor field.
**
**==========================================================
*/
static void ncr_getsync(ncb_p np, u_char sfac, u_char *fakp, u_char *scntl3p)
{
u_long clk = np->clock_khz; /* SCSI clock frequency in kHz */
int div = np->clock_divn; /* Number of divisors supported */
u_long fak; /* Sync factor in sxfer */
u_long per; /* Period in tenths of ns */
u_long kpc; /* (per * clk) */
/*
** Compute the synchronous period in tenths of nano-seconds
** from sfac.
**
** Note, if sfac == 9, DT is being used. Double the period of 125
** to 250.
*/
if (sfac <= 10) per = 250;
else if (sfac == 11) per = 303;
else if (sfac == 12) per = 500;
else per = 40 * sfac;
/*
** Look for the greatest clock divisor that allows an
** input speed faster than the period.
*/
kpc = per * clk;
while (--div >= 0)
if (kpc >= (div_10M[div] << 2)) break;
/*
** Calculate the lowest clock factor that allows an output
** speed not faster than the period.
*/
fak = (kpc - 1) / div_10M[div] + 1;
#if 0 /* This optimization does not seem very useful */
per = (fak * div_10M[div]) / clk;
/*
** Why not to try the immediate lower divisor and to choose
** the one that allows the fastest output speed ?
** We dont want input speed too much greater than output speed.
*/
if (div >= 1 && fak < 8) {
u_long fak2, per2;
fak2 = (kpc - 1) / div_10M[div-1] + 1;
per2 = (fak2 * div_10M[div-1]) / clk;
if (per2 < per && fak2 <= 8) {
fak = fak2;
per = per2;
--div;
}
}
#endif
if (fak < 4) fak = 4; /* Should never happen, too bad ... */
/*
** Compute and return sync parameters for the ncr
*/
*fakp = fak - 4;
/*
** If sfac < 25, and 8xx parts, desire that the chip operate at
** least at Ultra speeds. Must set bit 7 of scntl3.
** For C1010, do not set this bit. If operating at Ultra3 speeds,
** set the U3EN bit instead.
*/
if ((np->device_id == PCI_DEVICE_ID_LSI_53C1010) ||
(np->device_id == PCI_DEVICE_ID_LSI_53C1010_66)) {
*scntl3p = (div+1) << 4;
*fakp = 0;
}
else {
*scntl3p = ((div+1) << 4) + (sfac < 25 ? 0x80 : 0);
*fakp = fak - 4;
}
}
/*==========================================================
**
** Utility routine to return the current bus width
** synchronous period and offset.
** Utilizes target sval, wval and uval
**
**==========================================================
*/
static void ncr_get_xfer_info(ncb_p np, tcb_p tp, u_char *factor,
u_char *offset, u_char *width)
{
u_char idiv;
u_long period;
*width = (tp->wval & EWS) ? 1 : 0;
if ((np->device_id == PCI_DEVICE_ID_LSI_53C1010) ||
(np->device_id == PCI_DEVICE_ID_LSI_53C1010_66))
*offset = (tp->sval & 0x3f);
else
*offset = (tp->sval & 0x1f);
/*
* Midlayer signal to the driver that all of the scsi commands
* for the integrity check have completed. Save the negotiated
* parameters (extracted from sval, wval and uval).
* See ncr_setsync for alg. details.
*/
idiv = (tp->wval>>4) & 0x07;
if ( *offset && idiv ) {
if ((np->device_id == PCI_DEVICE_ID_LSI_53C1010) ||
(np->device_id == PCI_DEVICE_ID_LSI_53C1010_66)){
if (tp->uval & 0x80)
period = (2*div_10M[idiv-1])/np->clock_khz;
else
period = (4*div_10M[idiv-1])/np->clock_khz;
}
else
period = (((tp->sval>>5)+4)*div_10M[idiv-1])/np->clock_khz;
}
else
period = 0xffff;
if (period <= 125) *factor = 9;
else if (period <= 250) *factor = 10;
else if (period <= 303) *factor = 11;
else if (period <= 500) *factor = 12;
else *factor = (period + 40 - 1) / 40;
}
/*==========================================================
**
** Set actual values, sync status and patch all ccbs of
** a target according to new sync/wide agreement.
**
**==========================================================
*/
static void ncr_set_sync_wide_status (ncb_p np, u_char target)
{
ccb_p cp = np->ccbc;
tcb_p tp = &np->target[target];
/*
** set actual value and sync_status
**
** TEMP register contains current scripts address
** which is data type/direction/dependent.
*/
OUTB (nc_sxfer, tp->sval);
OUTB (nc_scntl3, tp->wval);
if ((np->device_id == PCI_DEVICE_ID_LSI_53C1010) ||
(np->device_id == PCI_DEVICE_ID_LSI_53C1010_66))
OUTB (nc_scntl4, tp->uval);
/*
** patch ALL ccbs of this target.
*/
for (cp = np->ccbc; cp; cp = cp->link_ccb) {
if (cp->host_status == HS_IDLE)
continue;
if (cp->target != target)
continue;
cp->phys.select.sel_scntl3 = tp->wval;
cp->phys.select.sel_sxfer = tp->sval;
if ((np->device_id == PCI_DEVICE_ID_LSI_53C1010) ||
(np->device_id == PCI_DEVICE_ID_LSI_53C1010_66))
cp->phys.select.sel_scntl4 = tp->uval;
};
}
/*==========================================================
**
** Switch sync mode for current job and it's target
**
**==========================================================
*/
static void ncr_setsync (ncb_p np, ccb_p cp, u_char scntl3, u_char sxfer,
u_char scntl4)
{
tcb_p tp;
u_char target = INB (nc_sdid) & 0x0f;
u_char idiv;
u_char offset;
assert (cp);
if (!cp) return;
assert (target == (cp->target & 0xf));
tp = &np->target[target];
if ((np->device_id == PCI_DEVICE_ID_LSI_53C1010) ||
(np->device_id == PCI_DEVICE_ID_LSI_53C1010_66)) {
offset = sxfer & 0x3f; /* bits 5-0 */
scntl3 = (scntl3 & 0xf0) | (tp->wval & EWS);
scntl4 = (scntl4 & 0x80);
}
else {
offset = sxfer & 0x1f; /* bits 4-0 */
if (!scntl3 || !offset)
scntl3 = np->rv_scntl3;
scntl3 = (scntl3 & 0xf0) | (tp->wval & EWS) |
(np->rv_scntl3 & 0x07);
}
/*
** Deduce the value of controller sync period from scntl3.
** period is in tenths of nano-seconds.
*/
idiv = ((scntl3 >> 4) & 0x7);
if ( offset && idiv) {
if ((np->device_id == PCI_DEVICE_ID_LSI_53C1010) ||
(np->device_id == PCI_DEVICE_ID_LSI_53C1010_66)) {
/* Note: If extra data hold clocks are used,
* the formulas below must be modified.
* When scntl4 == 0, ST mode.
*/
if (scntl4 & 0x80)
tp->period = (2*div_10M[idiv-1])/np->clock_khz;
else
tp->period = (4*div_10M[idiv-1])/np->clock_khz;
}
else
tp->period = (((sxfer>>5)+4)*div_10M[idiv-1])/np->clock_khz;
}
else
tp->period = 0xffff;
/*
** Stop there if sync parameters are unchanged
*/
if (tp->sval == sxfer && tp->wval == scntl3 && tp->uval == scntl4) return;
tp->sval = sxfer;
tp->wval = scntl3;
tp->uval = scntl4;
/*
** Bells and whistles ;-)
** Donnot announce negotiations due to auto-sense,
** unless user really want us to be verbose. :)
*/
if ( bootverbose < 2 && (cp->host_flags & HF_AUTO_SENSE))
goto next;
PRINT_TARGET(np, target);
if (offset) {
unsigned f10 = 100000 << (tp->widedone ? tp->widedone -1 : 0);
unsigned mb10 = (f10 + tp->period/2) / tp->period;
char *scsi;
/*
** Disable extended Sreq/Sack filtering
*/
if ((tp->period <= 2000) &&
(np->device_id != PCI_DEVICE_ID_LSI_53C1010) &&
(np->device_id != PCI_DEVICE_ID_LSI_53C1010_66))
OUTOFFB (nc_stest2, EXT);
/*
** Bells and whistles ;-)
*/
if (tp->period < 250) scsi = "FAST-80";
else if (tp->period < 500) scsi = "FAST-40";
else if (tp->period < 1000) scsi = "FAST-20";
else if (tp->period < 2000) scsi = "FAST-10";
else scsi = "FAST-5";
printk ("%s %sSCSI %d.%d MB/s (%d.%d ns, offset %d)n", scsi,
tp->widedone > 1 ? "WIDE " : "",
mb10 / 10, mb10 % 10, tp->period / 10, tp->period % 10,
offset);
} else
printk ("%sasynchronous.n", tp->widedone > 1 ? "wide " : "");
next:
/*
** set actual value and sync_status
** patch ALL ccbs of this target.
*/
ncr_set_sync_wide_status(np, target);
}
/*==========================================================
**
** Switch wide mode for current job and it's target
** SCSI specs say: a SCSI device that accepts a WDTR
** message shall reset the synchronous agreement to
** asynchronous mode.
**
**==========================================================
*/
static void ncr_setwide (ncb_p np, ccb_p cp, u_char wide, u_char ack)
{
u_short target = INB (nc_sdid) & 0x0f;
tcb_p tp;
u_char scntl3;
u_char sxfer;
assert (cp);
if (!cp) return;
assert (target == (cp->target & 0xf));
tp = &np->target[target];
tp->widedone = wide+1;
scntl3 = (tp->wval & (~EWS)) | (wide ? EWS : 0);
sxfer = ack ? 0 : tp->sval;
/*
** Stop there if sync/wide parameters are unchanged
*/
if (tp->sval == sxfer && tp->wval == scntl3) return;
tp->sval = sxfer;
tp->wval = scntl3;
/*
** Bells and whistles ;-)
*/
if (bootverbose >= 2) {
PRINT_TARGET(np, target);
if (scntl3 & EWS)
printk ("WIDE SCSI (16 bit) enabled.n");
else
printk ("WIDE SCSI disabled.n");
}
/*
** set actual value and sync_status
** patch ALL ccbs of this target.
*/
ncr_set_sync_wide_status(np, target);
}
/*==========================================================
**
** Switch sync/wide mode for current job and it's target
** PPR negotiations only
**
**==========================================================
*/
static void ncr_setsyncwide (ncb_p np, ccb_p cp, u_char scntl3, u_char sxfer,
u_char scntl4, u_char wide)
{
tcb_p tp;
u_char target = INB (nc_sdid) & 0x0f;
u_char idiv;
u_char offset;
assert (cp);
if (!cp) return;
assert (target == (cp->target & 0xf));
tp = &np->target[target];
tp->widedone = wide+1;
if ((np->device_id == PCI_DEVICE_ID_LSI_53C1010) ||
(np->device_id == PCI_DEVICE_ID_LSI_53C1010_66)) {
offset = sxfer & 0x3f; /* bits 5-0 */
scntl3 = (scntl3 & 0xf0) | (wide ? EWS : 0);
scntl4 = (scntl4 & 0x80);
}
else {
offset = sxfer & 0x1f; /* bits 4-0 */
if (!scntl3 || !offset)
scntl3 = np->rv_scntl3;
scntl3 = (scntl3 & 0xf0) | (wide ? EWS : 0) |
(np->rv_scntl3 & 0x07);
}
/*
** Deduce the value of controller sync period from scntl3.
** period is in tenths of nano-seconds.
*/
idiv = ((scntl3 >> 4) & 0x7);
if ( offset && idiv) {
if ((np->device_id == PCI_DEVICE_ID_LSI_53C1010) ||
(np->device_id == PCI_DEVICE_ID_LSI_53C1010_66)) {
/* Note: If extra data hold clocks are used,
* the formulas below must be modified.
* When scntl4 == 0, ST mode.
*/
if (scntl4 & 0x80)
tp->period = (2*div_10M[idiv-1])/np->clock_khz;
else
tp->period = (4*div_10M[idiv-1])/np->clock_khz;
}
else
tp->period = (((sxfer>>5)+4)*div_10M[idiv-1])/np->clock_khz;
}
else
tp->period = 0xffff;
/*
** Stop there if sync parameters are unchanged
*/
if (tp->sval == sxfer && tp->wval == scntl3 && tp->uval == scntl4) return;
tp->sval = sxfer;
tp->wval = scntl3;
tp->uval = scntl4;
/*
** Bells and whistles ;-)
** Donnot announce negotiations due to auto-sense,
** unless user really want us to be verbose. :)
*/
if ( bootverbose < 2 && (cp->host_flags & HF_AUTO_SENSE))
goto next;
PRINT_TARGET(np, target);
if (offset) {
unsigned f10 = 100000 << (tp->widedone ? tp->widedone -1 : 0);
unsigned mb10 = (f10 + tp->period/2) / tp->period;
char *scsi;
/*
** Disable extended Sreq/Sack filtering
*/
if ((tp->period <= 2000) &&
(np->device_id != PCI_DEVICE_ID_LSI_53C1010) &&
(np->device_id != PCI_DEVICE_ID_LSI_53C1010_66))
OUTOFFB (nc_stest2, EXT);
/*
** Bells and whistles ;-)
*/
if (tp->period < 250) scsi = "FAST-80";
else if (tp->period < 500) scsi = "FAST-40";
else if (tp->period < 1000) scsi = "FAST-20";
else if (tp->period < 2000) scsi = "FAST-10";
else scsi = "FAST-5";
printk ("%s %sSCSI %d.%d MB/s (%d.%d ns, offset %d)n", scsi,
tp->widedone > 1 ? "WIDE " : "",
mb10 / 10, mb10 % 10, tp->period / 10, tp->period % 10,
offset);
} else
printk ("%sasynchronous.n", tp->widedone > 1 ? "wide " : "");
next:
/*
** set actual value and sync_status
** patch ALL ccbs of this target.
*/
ncr_set_sync_wide_status(np, target);
}
/*==========================================================
**
** Switch tagged mode for a target.
**
**==========================================================
*/
static void ncr_setup_tags (ncb_p np, u_char tn, u_char ln)
{
tcb_p tp = &np->target[tn];
lcb_p lp = ncr_lp(np, tp, ln);
u_short reqtags, maxdepth;
/*
** Just in case ...
*/
if ((!tp) || (!lp))
return;
/*
** If SCSI device queue depth is not yet set, leave here.
*/
if (!lp->scdev_depth)
return;
/*
** Donnot allow more tags than the SCSI driver can queue
** for this device.
** Donnot allow more tags than we can handle.
*/
maxdepth = lp->scdev_depth;
if (maxdepth > lp->maxnxs) maxdepth = lp->maxnxs;
if (lp->maxtags > maxdepth) lp->maxtags = maxdepth;
if (lp->numtags > maxdepth) lp->numtags = maxdepth;
/*
** only devices conformant to ANSI Version >= 2
** only devices capable of tagged commands
** only if enabled by user ..
*/
if ((lp->inq_byte7 & INQ7_QUEUE) && lp->numtags > 1) {
reqtags = lp->numtags;
} else {
reqtags = 1;
};
/*
** Update max number of tags
*/
lp->numtags = reqtags;
if (lp->numtags > lp->maxtags)
lp->maxtags = lp->numtags;
/*
** If we want to switch tag mode, we must wait
** for no CCB to be active.
*/
if (reqtags > 1 && lp->usetags) { /* Stay in tagged mode */
if (lp->queuedepth == reqtags) /* Already announced */
return;
lp->queuedepth = reqtags;
}
else if (reqtags <= 1 && !lp->usetags) { /* Stay in untagged mode */
lp->queuedepth = reqtags;
return;
}
else { /* Want to switch tag mode */
if (lp->busyccbs) /* If not yet safe, return */
return;
lp->queuedepth = reqtags;
lp->usetags = reqtags > 1 ? 1 : 0;
}
/*
** Patch the lun mini-script, according to tag mode.
*/
lp->resel_task = lp->usetags?
cpu_to_scr(NCB_SCRIPT_PHYS(np, resel_tag)) :
cpu_to_scr(NCB_SCRIPT_PHYS(np, resel_notag));
/*
** Announce change to user.
*/
if (bootverbose) {
PRINT_LUN(np, tn, ln);
if (lp->usetags)
printk("tagged command queue depth set to %dn", reqtags);
else
printk("tagged command queueing disabledn");
}
}
/*----------------------------------------------------
**
** handle user commands
**
**----------------------------------------------------
*/
#ifdef SCSI_NCR_USER_COMMAND_SUPPORT
static void ncr_usercmd (ncb_p np)
{
u_char t;
tcb_p tp;
int ln;
u_long size;
switch (np->user.cmd) {
case 0: return;
case UC_SETDEBUG:
#ifdef SCSI_NCR_DEBUG_INFO_SUPPORT
ncr_debug = np->user.data;
#endif
break;
case UC_SETORDER:
np->order = np->user.data;
break;
case UC_SETVERBOSE:
np->verbose = np->user.data;
break;
default:
/*
** We assume that other commands apply to targets.
** This should always be the case and avoid the below
** 4 lines to be repeated 5 times.
*/
for (t = 0; t < MAX_TARGET; t++) {
if (!((np->user.target >> t) & 1))
continue;
tp = &np->target[t];
switch (np->user.cmd) {
case UC_SETSYNC:
tp->usrsync = np->user.data;
ncr_negotiate (np, tp);
break;
case UC_SETWIDE:
size = np->user.data;
if (size > np->maxwide)
size=np->maxwide;
tp->usrwide = size;
ncr_negotiate (np, tp);
break;
case UC_SETTAGS:
tp->usrtags = np->user.data;
for (ln = 0; ln < MAX_LUN; ln++) {
lcb_p lp;
lp = ncr_lp(np, tp, ln);
if (!lp)
continue;
lp->numtags = np->user.data;
lp->maxtags = lp->numtags;
ncr_setup_tags (np, t, ln);
}
break;
case UC_RESETDEV:
tp->to_reset = 1;
np->istat_sem = SEM;
OUTB (nc_istat, SIGP|SEM);
break;
case UC_CLEARDEV:
for (ln = 0; ln < MAX_LUN; ln++) {
lcb_p lp;
lp = ncr_lp(np, tp, ln);
if (lp)
lp->to_clear = 1;
}
np->istat_sem = SEM;
OUTB (nc_istat, SIGP|SEM);
break;
case UC_SETFLAG:
tp->usrflag = np->user.data;
break;
}
}
break;
}
np->user.cmd=0;
}
#endif
/*==========================================================
**
**
** ncr timeout handler.
**
**
**==========================================================
**
** Misused to keep the driver running when
** interrupts are not configured correctly.
**
**----------------------------------------------------------
*/
static void ncr_timeout (ncb_p np)
{
u_long thistime = ktime_get(0);
/*
** If release process in progress, let's go
** Set the release stage from 1 to 2 to synchronize
** with the release process.
*/
if (np->release_stage) {
if (np->release_stage == 1) np->release_stage = 2;
return;
}
#ifdef SCSI_NCR_PCIQ_BROKEN_INTR
np->timer.expires = ktime_get((HZ+9)/10);
#else
np->timer.expires = ktime_get(SCSI_NCR_TIMER_INTERVAL);
#endif
add_timer(&np->timer);
/*
** If we are resetting the ncr, wait for settle_time before
** clearing it. Then command processing will be resumed.
*/
if (np->settle_time) {
if (np->settle_time <= thistime) {
if (bootverbose > 1)
printk("%s: command processing resumedn", ncr_name(np));
np->settle_time = 0;
requeue_waiting_list(np);
}
return;
}
/*
** Nothing to do for now, but that may come.
*/
if (np->lasttime + 4*HZ < thistime) {
np->lasttime = thistime;
}
#ifdef SCSI_NCR_PCIQ_MAY_MISS_COMPLETIONS
/*
** Some way-broken PCI bridges may lead to
** completions being lost when the clearing
** of the INTFLY flag by the CPU occurs
** concurrently with the chip raising this flag.
** If this ever happen, lost completions will
** be reaped here.
*/
ncr_wakeup_done(np);
#endif
#ifdef SCSI_NCR_PCIQ_BROKEN_INTR
if (INB(nc_istat) & (INTF|SIP|DIP)) {
/*
** Process pending interrupts.
*/
if (DEBUG_FLAGS & DEBUG_TINY) printk ("{");
ncr_exception (np);
if (DEBUG_FLAGS & DEBUG_TINY) printk ("}");
}
#endif /* SCSI_NCR_PCIQ_BROKEN_INTR */
}
/*==========================================================
**
** log message for real hard errors
**
** "ncr0 targ 0?: ERROR (ds:si) (so-si-sd) (sxfer/scntl3) @ name (dsp:dbc)."
** " reg: r0 r1 r2 r3 r4 r5 r6 ..... rf."
**
** exception register:
** ds: dstat
** si: sist
**
** SCSI bus lines:
** so: control lines as driver by NCR.
** si: control lines as seen by NCR.
** sd: scsi data lines as seen by NCR.
**
** wide/fastmode:
** sxfer: (see the manual)
** scntl3: (see the manual)
**
** current script command:
** dsp: script address (relative to start of script).
** dbc: first word of script command.
**
** First 24 register of the chip:
** r0..rf
**
**==========================================================
*/
static void ncr_log_hard_error(ncb_p np, u_short sist, u_char dstat)
{
u_int32 dsp;
int script_ofs;
int script_size;
char *script_name;
u_char *script_base;
int i;
dsp = INL (nc_dsp);
if (dsp > np->p_script && dsp <= np->p_script + sizeof(struct script)) {
script_ofs = dsp - np->p_script;
script_size = sizeof(struct script);
script_base = (u_char *) np->script0;
script_name = "script";
}
else if (np->p_scripth < dsp &&
dsp <= np->p_scripth + sizeof(struct scripth)) {
script_ofs = dsp - np->p_scripth;
script_size = sizeof(struct scripth);
script_base = (u_char *) np->scripth0;
script_name = "scripth";
} else {
script_ofs = dsp;
script_size = 0;
script_base = 0;
script_name = "mem";
}
printk ("%s:%d: ERROR (%x:%x) (%x-%x-%x) (%x/%x) @ (%s %x:%08x).n",
ncr_name (np), (unsigned)INB (nc_sdid)&0x0f, dstat, sist,
(unsigned)INB (nc_socl), (unsigned)INB (nc_sbcl), (unsigned)INB (nc_sbdl),
(unsigned)INB (nc_sxfer),(unsigned)INB (nc_scntl3), script_name, script_ofs,
(unsigned)INL (nc_dbc));
if (((script_ofs & 3) == 0) &&
(unsigned)script_ofs < script_size) {
printk ("%s: script cmd = %08xn", ncr_name(np),
scr_to_cpu((int) *(ncrcmd *)(script_base + script_ofs)));
}
printk ("%s: regdump:", ncr_name(np));
for (i=0; i<24;i++)
printk (" %02x", (unsigned)INB_OFF(i));
printk (".n");
}
/*============================================================
**
** ncr chip exception handler.
**
**============================================================
**
** In normal situations, interrupt conditions occur one at
** a time. But when something bad happens on the SCSI BUS,
** the chip may raise several interrupt flags before
** stopping and interrupting the CPU. The additionnal
** interrupt flags are stacked in some extra registers
** after the SIP and/or DIP flag has been raised in the
** ISTAT. After the CPU has read the interrupt condition
** flag from SIST or DSTAT, the chip unstacks the other
** interrupt flags and sets the corresponding bits in
** SIST or DSTAT. Since the chip starts stacking once the
** SIP or DIP flag is set, there is a small window of time
** where the stacking does not occur.
**
** Typically, multiple interrupt conditions may happen in
** the following situations:
**
** - SCSI parity error + Phase mismatch (PAR|MA)
** When an parity error is detected in input phase
** and the device switches to msg-in phase inside a
** block MOV.
** - SCSI parity error + Unexpected disconnect (PAR|UDC)
** When a stupid device does not want to handle the
** recovery of an SCSI parity error.
** - Some combinations of STO, PAR, UDC, ...
** When using non compliant SCSI stuff, when user is
** doing non compliant hot tampering on the BUS, when
** something really bad happens to a device, etc ...
**
** The heuristic suggested by SYMBIOS to handle
** multiple interrupts is to try unstacking all
** interrupts conditions and to handle them on some
** priority based on error severity.
** This will work when the unstacking has been
** successful, but we cannot be 100 % sure of that,
** since the CPU may have been faster to unstack than
** the chip is able to stack. Hmmm ... But it seems that
** such a situation is very unlikely to happen.
**
** If this happen, for example STO catched by the CPU
** then UDC happenning before the CPU have restarted
** the SCRIPTS, the driver may wrongly complete the
** same command on UDC, since the SCRIPTS didn't restart
** and the DSA still points to the same command.
** We avoid this situation by setting the DSA to an
** invalid value when the CCB is completed and before
** restarting the SCRIPTS.
**
** Another issue is that we need some section of our
** recovery procedures to be somehow uninterruptible and
** that the SCRIPTS processor does not provides such a
** feature. For this reason, we handle recovery preferently
** from the C code and check against some SCRIPTS
** critical sections from the C code.
**
** Hopefully, the interrupt handling of the driver is now
** able to resist to weird BUS error conditions, but donnot
** ask me for any guarantee that it will never fail. :-)
** Use at your own decision and risk.
**
**============================================================
*/
void ncr_exception (ncb_p np)
{
u_char istat, istatc;
u_char dstat;
u_short sist;
int i;
/*
** interrupt on the fly ?
**
** A `dummy read' is needed to ensure that the
** clear of the INTF flag reaches the device
** before the scanning of the DONE queue.
*/
istat = INB (nc_istat);
if (istat & INTF) {
OUTB (nc_istat, (istat & SIGP) | INTF | np->istat_sem);
istat = INB (nc_istat); /* DUMMY READ */
if (DEBUG_FLAGS & DEBUG_TINY) printk ("F ");
(void)ncr_wakeup_done (np);
};
if (!(istat & (SIP|DIP)))
return;
#if 0 /* We should never get this one */
if (istat & CABRT)
OUTB (nc_istat, CABRT);
#endif
/*
** Steinbach's Guideline for Systems Programming:
** Never test for an error condition you don't know how to handle.
*/
/*========================================================
** PAR and MA interrupts may occur at the same time,
** and we need to know of both in order to handle
** this situation properly. We try to unstack SCSI
** interrupts for that reason. BTW, I dislike a LOT
** such a loop inside the interrupt routine.
** Even if DMA interrupt stacking is very unlikely to
** happen, we also try unstacking these ones, since
** this has no performance impact.
**=========================================================
*/
sist = 0;
dstat = 0;
istatc = istat;
do {
if (istatc & SIP)
sist |= INW (nc_sist);
if (istatc & DIP)
dstat |= INB (nc_dstat);
istatc = INB (nc_istat);
istat |= istatc;
} while (istatc & (SIP|DIP));
if (DEBUG_FLAGS & DEBUG_TINY)
printk ("<%d|%x:%x|%x:%x>",
(int)INB(nc_scr0),
dstat,sist,
(unsigned)INL(nc_dsp),
(unsigned)INL(nc_dbc));
/*
** On paper, a memory barrier may be needed here.
** And since we are paranoid ... :)
*/
MEMORY_BARRIER();
/*========================================================
** First, interrupts we want to service cleanly.
**
** Phase mismatch (MA) is the most frequent interrupt
** for chip earlier than the 896 and so we have to service
** it as quickly as possible.
** A SCSI parity error (PAR) may be combined with a phase
** mismatch condition (MA).
** Programmed interrupts (SIR) are used to call the C code
** from SCRIPTS.
** The single step interrupt (SSI) is not used in this
** driver.
**=========================================================
*/
if (!(sist & (STO|GEN|HTH|SGE|UDC|SBMC|RST)) &&
!(dstat & (MDPE|BF|ABRT|IID))) {
if (sist & PAR) ncr_int_par (np, sist);
else if (sist & MA) ncr_int_ma (np);
else if (dstat & SIR) ncr_int_sir (np);
else if (dstat & SSI) OUTONB_STD ();
else goto unknown_int;
return;
};
/*========================================================
** Now, interrupts that donnot happen in normal
** situations and that we may need to recover from.
**
** On SCSI RESET (RST), we reset everything.
** On SCSI BUS MODE CHANGE (SBMC), we complete all
** active CCBs with RESET status, prepare all devices
** for negotiating again and restart the SCRIPTS.
** On STO and UDC, we complete the CCB with the corres-
** ponding status and restart the SCRIPTS.
**=========================================================
*/
if (sist & RST) {
ncr_init (np, 1, bootverbose ? "scsi reset" : NULL, HS_RESET);
return;
};
OUTB (nc_ctest3, np->rv_ctest3 | CLF); /* clear dma fifo */
OUTB (nc_stest3, TE|CSF); /* clear scsi fifo */
if (!(sist & (GEN|HTH|SGE)) &&
!(dstat & (MDPE|BF|ABRT|IID))) {
if (sist & SBMC) ncr_int_sbmc (np);
else if (sist & STO) ncr_int_sto (np);
else if (sist & UDC) ncr_int_udc (np);
else goto unknown_int;
return;
};
/*=========================================================
** Now, interrupts we are not able to recover cleanly.
**
** Do the register dump.
** Log message for hard errors.
** Reset everything.
**=========================================================
*/
if (ktime_exp(np->regtime)) {
np->regtime = ktime_get(10*HZ);
for (i = 0; i<sizeof(np->regdump); i++)
((char*)&np->regdump)[i] = INB_OFF(i);
np->regdump.nc_dstat = dstat;
np->regdump.nc_sist = sist;
};
ncr_log_hard_error(np, sist, dstat);
if ((np->device_id == PCI_DEVICE_ID_LSI_53C1010) ||
(np->device_id == PCI_DEVICE_ID_LSI_53C1010_66)) {
u_char ctest4_o, ctest4_m;
u_char shadow;
/*
* Get shadow register data
* Write 1 to ctest4
*/
ctest4_o = INB(nc_ctest4);
OUTB(nc_ctest4, ctest4_o | 0x10);
ctest4_m = INB(nc_ctest4);
shadow = INW_OFF(0x42);
OUTB(nc_ctest4, ctest4_o);
printk("%s: ctest4/sist original 0x%x/0x%X mod: 0x%X/0x%xn",
ncr_name(np), ctest4_o, sist, ctest4_m, shadow);
}
if ((sist & (GEN|HTH|SGE)) ||
(dstat & (MDPE|BF|ABRT|IID))) {
ncr_start_reset(np);
return;
};
unknown_int:
/*=========================================================
** We just miss the cause of the interrupt. :(
** Print a message. The timeout will do the real work.
**=========================================================
*/
printk( "%s: unknown interrupt(s) ignored, "
"ISTAT=0x%x DSTAT=0x%x SIST=0x%xn",
ncr_name(np), istat, dstat, sist);
}
/*==========================================================
**
** generic recovery from scsi interrupt
**
**==========================================================
**
** The doc says that when the chip gets an SCSI interrupt,
** it tries to stop in an orderly fashion, by completing
** an instruction fetch that had started or by flushing
** the DMA fifo for a write to memory that was executing.
** Such a fashion is not enough to know if the instruction
** that was just before the current DSP value has been
** executed or not.
**
** There are 3 small SCRIPTS sections that deal with the
** start queue and the done queue that may break any
** assomption from the C code if we are interrupted
** inside, so we reset if it happens. Btw, since these
** SCRIPTS sections are executed while the SCRIPTS hasn't
** started SCSI operations, it is very unlikely to happen.
**
** All the driver data structures are supposed to be
** allocated from the same 4 GB memory window, so there
** is a 1 to 1 relationship between DSA and driver data
** structures. Since we are careful :) to invalidate the
** DSA when we complete a command or when the SCRIPTS
** pushes a DSA into a queue, we can trust it when it
** points to a CCB.
**
**----------------------------------------------------------
*/
static void ncr_recover_scsi_int (ncb_p np, u_char hsts)
{
u_int32 dsp = INL (nc_dsp);
u_int32 dsa = INL (nc_dsa);
ccb_p cp = ncr_ccb_from_dsa(np, dsa);
/*
** If we haven't been interrupted inside the SCRIPTS
** critical pathes, we can safely restart the SCRIPTS
** and trust the DSA value if it matches a CCB.
*/
if ((!(dsp > NCB_SCRIPT_PHYS (np, getjob_begin) &&
dsp < NCB_SCRIPT_PHYS (np, getjob_end) + 1)) &&
(!(dsp > NCB_SCRIPT_PHYS (np, ungetjob) &&
dsp < NCB_SCRIPT_PHYS (np, reselect) + 1)) &&
(!(dsp > NCB_SCRIPTH_PHYS (np, sel_for_abort) &&
dsp < NCB_SCRIPTH_PHYS (np, sel_for_abort_1) + 1)) &&
(!(dsp > NCB_SCRIPT_PHYS (np, done) &&
dsp < NCB_SCRIPT_PHYS (np, done_end) + 1))) {
if (cp) {
cp->host_status = hsts;
ncr_complete (np, cp);
}
OUTL (nc_dsa, DSA_INVALID);
OUTB (nc_ctest3, np->rv_ctest3 | CLF); /* clear dma fifo */
OUTB (nc_stest3, TE|CSF); /* clear scsi fifo */
OUTL_DSP (NCB_SCRIPT_PHYS (np, start));
}
else
goto reset_all;
return;
reset_all:
ncr_start_reset(np);
}
/*==========================================================
**
** ncr chip exception handler for selection timeout
**
**==========================================================
**
** There seems to be a bug in the 53c810.
** Although a STO-Interrupt is pending,
** it continues executing script commands.
** But it will fail and interrupt (IID) on
** the next instruction where it's looking
** for a valid phase.
**
**----------------------------------------------------------
*/
void ncr_int_sto (ncb_p np)
{
u_int32 dsp = INL (nc_dsp);
if (DEBUG_FLAGS & DEBUG_TINY) printk ("T");
if (dsp == NCB_SCRIPT_PHYS (np, wf_sel_done) + 8 ||
!(driver_setup.recovery & 1))
ncr_recover_scsi_int(np, HS_SEL_TIMEOUT);
else
ncr_start_reset(np);
}
/*==========================================================
**
** ncr chip exception handler for unexpected disconnect
**
**==========================================================
**
**----------------------------------------------------------
*/
void ncr_int_udc (ncb_p np)
{
u_int32 dsa = INL (nc_dsa);
ccb_p cp = ncr_ccb_from_dsa(np, dsa);
/*
* Fix Up. Some disks respond to a PPR negotation with
* a bus free instead of a message reject.
* Disable ppr negotiation if this is first time
* tried ppr negotiation.
*/
if (cp) {
tcb_p tp = &np->target[cp->target];
if (tp->ppr_negotiation == 1)
tp->ppr_negotiation = 0;
}
printk ("%s: unexpected disconnectn", ncr_name(np));
ncr_recover_scsi_int(np, HS_UNEXPECTED);
}
/*==========================================================
**
** ncr chip exception handler for SCSI bus mode change
**
**==========================================================
**
** spi2-r12 11.2.3 says a transceiver mode change must
** generate a reset event and a device that detects a reset
** event shall initiate a hard reset. It says also that a
** device that detects a mode change shall set data transfer
** mode to eight bit asynchronous, etc...
** So, just resetting should be enough.
**
**
**----------------------------------------------------------
*/
static void ncr_int_sbmc (ncb_p np)
{
u_char scsi_mode = INB (nc_stest4) & SMODE;
printk("%s: SCSI bus mode change from %x to %x.n",
ncr_name(np), np->scsi_mode, scsi_mode);
np->scsi_mode = scsi_mode;
/*
** Suspend command processing for 1 second and
** reinitialize all except the chip.
*/
np->settle_time = ktime_get(1*HZ);
ncr_init (np, 0, bootverbose ? "scsi mode change" : NULL, HS_RESET);
}
/*==========================================================
**
** ncr chip exception handler for SCSI parity error.
**
**==========================================================
**
** When the chip detects a SCSI parity error and is
** currently executing a (CH)MOV instruction, it does
** not interrupt immediately, but tries to finish the
** transfer of the current scatter entry before
** interrupting. The following situations may occur:
**
** - The complete scatter entry has been transferred
** without the device having changed phase.
** The chip will then interrupt with the DSP pointing
** to the instruction that follows the MOV.
**
** - A phase mismatch occurs before the MOV finished
** and phase errors are to be handled by the C code.
** The chip will then interrupt with both PAR and MA
** conditions set.
**
** - A phase mismatch occurs before the MOV finished and
** phase errors are to be handled by SCRIPTS (895A or 896).
** The chip will load the DSP with the phase mismatch
** JUMP address and interrupt the host processor.
**
**----------------------------------------------------------
*/
static void ncr_int_par (ncb_p np, u_short sist)
{
u_char hsts = INB (HS_PRT);
u_int32 dsp = INL (nc_dsp);
u_int32 dbc = INL (nc_dbc);
u_int32 dsa = INL (nc_dsa);
u_char sbcl = INB (nc_sbcl);
u_char cmd = dbc >> 24;
int phase = cmd & 7;
ccb_p cp = ncr_ccb_from_dsa(np, dsa);
printk("%s: SCSI parity error detected: SCR1=%d DBC=%x SBCL=%xn",
ncr_name(np), hsts, dbc, sbcl);
/*
** Check that the chip is connected to the SCSI BUS.
*/
if (!(INB (nc_scntl1) & ISCON)) {
if (!(driver_setup.recovery & 1)) {
ncr_recover_scsi_int(np, HS_FAIL);
return;
}
goto reset_all;
}
/*
** If the nexus is not clearly identified, reset the bus.
** We will try to do better later.
*/
if (!cp)
goto reset_all;
/*
** Check instruction was a MOV, direction was INPUT and
** ATN is asserted.
*/
if ((cmd & 0xc0) || !(phase & 1) || !(sbcl & 0x8))
goto reset_all;
/*
** Keep track of the parity error.
*/
OUTONB (HF_PRT, HF_EXT_ERR);
cp->xerr_status |= XE_PARITY_ERR;
/*
** Prepare the message to send to the device.
*/
np->msgout[0] = (phase == 7) ? M_PARITY : M_ID_ERROR;
#ifdef SCSI_NCR_INTEGRITY_CHECKING
/*
** Save error message. For integrity check use only.
*/
if (np->check_integrity)
np->check_integ_par = np->msgout[0];
#endif
/*
** If the old phase was DATA IN or DT DATA IN phase,
** we have to deal with the 3 situations described above.
** For other input phases (MSG IN and STATUS), the device
** must resend the whole thing that failed parity checking
** or signal error. So, jumping to dispatcher should be OK.
*/
if ((phase == 1) || (phase == 5)) {
/* Phase mismatch handled by SCRIPTS */
if (dsp == NCB_SCRIPTH_PHYS (np, pm_handle))
OUTL_DSP (dsp);
/* Phase mismatch handled by the C code */
else if (sist & MA)
ncr_int_ma (np);
/* No phase mismatch occurred */
else {
OUTL (nc_temp, dsp);
OUTL_DSP (NCB_SCRIPT_PHYS (np, dispatch));
}
}
else
OUTL_DSP (NCB_SCRIPT_PHYS (np, clrack));
return;
reset_all:
ncr_start_reset(np);
return;
}
/*==========================================================
**
**
** ncr chip exception handler for phase errors.
**
**
**==========================================================
**
** We have to construct a new transfer descriptor,
** to transfer the rest of the current block.
**
**----------------------------------------------------------
*/
static void ncr_int_ma (ncb_p np)
{
u_int32 dbc;
u_int32 rest;
u_int32 dsp;
u_int32 dsa;
u_int32 nxtdsp;
u_int32 *vdsp;
u_int32 oadr, olen;
u_int32 *tblp;
u_int32 newcmd;
u_int delta;
u_char cmd;
u_char hflags, hflags0;
struct pm_ctx *pm;
ccb_p cp;
dsp = INL (nc_dsp);
dbc = INL (nc_dbc);
dsa = INL (nc_dsa);
cmd = dbc >> 24;
rest = dbc & 0xffffff;
delta = 0;
/*
** locate matching cp.
*/
cp = ncr_ccb_from_dsa(np, dsa);
if (DEBUG_FLAGS & DEBUG_PHASE)
printk("CCB = %2x %2x %2x %2x %2x %2xn",
cp->cmd->cmnd[0], cp->cmd->cmnd[1], cp->cmd->cmnd[2],
cp->cmd->cmnd[3], cp->cmd->cmnd[4], cp->cmd->cmnd[5]);
/*
** Donnot take into account dma fifo and various buffers in
** INPUT phase since the chip flushes everything before
** raising the MA interrupt for interrupted INPUT phases.
** For DATA IN phase, we will check for the SWIDE later.
*/
if ((cmd & 7) != 1 && (cmd & 7) != 5) {
u_int32 dfifo;
u_char ss0, ss2;
/*
** If C1010, DFBC contains number of bytes in DMA fifo.
** else read DFIFO, CTEST[4-6] using 1 PCI bus ownership.
*/
if ((np->device_id == PCI_DEVICE_ID_LSI_53C1010) ||
(np->device_id == PCI_DEVICE_ID_LSI_53C1010_66))
delta = INL(nc_dfbc) & 0xffff;
else {
dfifo = INL(nc_dfifo);
/*
** Calculate remaining bytes in DMA fifo.
** C1010 - always large fifo, value in dfbc
** Otherwise, (CTEST5 = dfifo >> 16)
*/
if (dfifo & (DFS << 16))
delta = ((((dfifo >> 8) & 0x300) |
(dfifo & 0xff)) - rest) & 0x3ff;
else
delta = ((dfifo & 0xff) - rest) & 0x7f;
/*
** The data in the dma fifo has not been
** transferred to the target -> add the amount
** to the rest and clear the data.
** Check the sstat2 register in case of wide
** transfer.
*/
}
rest += delta;
ss0 = INB (nc_sstat0);
if (ss0 & OLF) rest++;
if ((np->device_id != PCI_DEVICE_ID_LSI_53C1010) &&
(np->device_id != PCI_DEVICE_ID_LSI_53C1010_66) && (ss0 & ORF))
rest++;
if (cp && (cp->phys.select.sel_scntl3 & EWS)) {
ss2 = INB (nc_sstat2);
if (ss2 & OLF1) rest++;
if ((np->device_id != PCI_DEVICE_ID_LSI_53C1010) &&
(np->device_id != PCI_DEVICE_ID_LSI_53C1010_66) && (ss2 & ORF))
rest++;
};
/*
** Clear fifos.
*/
OUTB (nc_ctest3, np->rv_ctest3 | CLF); /* dma fifo */
OUTB (nc_stest3, TE|CSF); /* scsi fifo */
}
/*
** log the information
*/
if (DEBUG_FLAGS & (DEBUG_TINY|DEBUG_PHASE))
printk ("P%x%x RL=%d D=%d ", cmd&7, INB(nc_sbcl)&7,
(unsigned) rest, (unsigned) delta);
/*
** try to find the interrupted script command,
** and the address at which to continue.
*/
vdsp = 0;
nxtdsp = 0;
if (dsp > np->p_script &&
dsp <= np->p_script + sizeof(struct script)) {
vdsp = (u_int32 *)((char*)np->script0 + (dsp-np->p_script-8));
nxtdsp = dsp;
}
else if (dsp > np->p_scripth &&
dsp <= np->p_scripth + sizeof(struct scripth)) {
vdsp = (u_int32 *)((char*)np->scripth0 + (dsp-np->p_scripth-8));
nxtdsp = dsp;
}
/*
** log the information
*/
if (DEBUG_FLAGS & DEBUG_PHASE) {
printk ("nCP=%p DSP=%x NXT=%x VDSP=%p CMD=%x ",
cp, (unsigned)dsp, (unsigned)nxtdsp, vdsp, cmd);
};
if (!vdsp) {
printk ("%s: interrupted SCRIPT address not found.n",
ncr_name (np));
goto reset_all;
}
if (!cp) {
printk ("%s: SCSI phase error fixup: CCB already dequeued.n",
ncr_name (np));
goto reset_all;
}
/*
** get old startaddress and old length.
*/
oadr = scr_to_cpu(vdsp[1]);
if (cmd & 0x10) { /* Table indirect */
tblp = (u_int32 *) ((char*) &cp->phys + oadr);
olen = scr_to_cpu(tblp[0]);
oadr = scr_to_cpu(tblp[1]);
} else {
tblp = (u_int32 *) 0;
olen = scr_to_cpu(vdsp[0]) & 0xffffff;
};
if (DEBUG_FLAGS & DEBUG_PHASE) {
printk ("OCMD=%xnTBLP=%p OLEN=%x OADR=%xn",
(unsigned) (scr_to_cpu(vdsp[0]) >> 24),
tblp,
(unsigned) olen,
(unsigned) oadr);
};
/*
** check cmd against assumed interrupted script command.
** If dt data phase, the MOVE instruction hasn't bit 4 of
** the phase.
*/
if (((cmd & 2) ? cmd : (cmd & ~4)) != (scr_to_cpu(vdsp[0]) >> 24)) {
PRINT_ADDR(cp->cmd);
printk ("internal error: cmd=%02x != %02x=(vdsp[0] >> 24)n",
(unsigned)cmd, (unsigned)scr_to_cpu(vdsp[0]) >> 24);
goto reset_all;
};
/*
** if old phase not dataphase, leave here.
** C/D line is low if data.
*/
if (cmd & 0x02) {
PRINT_ADDR(cp->cmd);
printk ("phase change %x-%x %d@%08x resid=%d.n",
cmd&7, INB(nc_sbcl)&7, (unsigned)olen,
(unsigned)oadr, (unsigned)rest);
goto unexpected_phase;
};
/*
** Choose the correct PM save area.
**
** Look at the PM_SAVE SCRIPT if you want to understand
** this stuff. The equivalent code is implemented in
** SCRIPTS for the 895A and 896 that are able to handle
** PM from the SCRIPTS processor.
*/
hflags0 = INB (HF_PRT);
hflags = hflags0;
if (hflags & (HF_IN_PM0 | HF_IN_PM1 | HF_DP_SAVED)) {
if (hflags & HF_IN_PM0)
nxtdsp = scr_to_cpu(cp->phys.pm0.ret);
else if (hflags & HF_IN_PM1)
nxtdsp = scr_to_cpu(cp->phys.pm1.ret);
if (hflags & HF_DP_SAVED)
hflags ^= HF_ACT_PM;
}
if (!(hflags & HF_ACT_PM)) {
pm = &cp->phys.pm0;
newcmd = NCB_SCRIPT_PHYS(np, pm0_data);
}
else {
pm = &cp->phys.pm1;
newcmd = NCB_SCRIPT_PHYS(np, pm1_data);
}
hflags &= ~(HF_IN_PM0 | HF_IN_PM1 | HF_DP_SAVED);
if (hflags != hflags0)
OUTB (HF_PRT, hflags);
/*
** fillin the phase mismatch context
*/
pm->sg.addr = cpu_to_scr(oadr + olen - rest);
pm->sg.size = cpu_to_scr(rest);
pm->ret = cpu_to_scr(nxtdsp);
/*
** If we have a SWIDE,
** - prepare the address to write the SWIDE from SCRIPTS,
** - compute the SCRIPTS address to restart from,
** - move current data pointer context by one byte.
*/
nxtdsp = NCB_SCRIPT_PHYS (np, dispatch);
if ( ((cmd & 7) == 1 || (cmd & 7) == 5)
&& cp && (cp->phys.select.sel_scntl3 & EWS) &&
(INB (nc_scntl2) & WSR)) {
u32 tmp;
#ifdef SYM_DEBUG_PM_WITH_WSR
PRINT_ADDR(cp);
printk ("MA interrupt with WSR set - "
"pm->sg.addr=%x - pm->sg.size=%dn",
pm->sg.addr, pm->sg.size);
#endif
/*
* Set up the table indirect for the MOVE
* of the residual byte and adjust the data
* pointer context.
*/
tmp = scr_to_cpu(pm->sg.addr);
cp->phys.wresid.addr = cpu_to_scr(tmp);
pm->sg.addr = cpu_to_scr(tmp + 1);
tmp = scr_to_cpu(pm->sg.size);
cp->phys.wresid.size = cpu_to_scr((tmp&0xff000000) | 1);
pm->sg.size = cpu_to_scr(tmp - 1);
/*
* If only the residual byte is to be moved,
* no PM context is needed.
*/
if ((tmp&0xffffff) == 1)
newcmd = pm->ret;
/*
* Prepare the address of SCRIPTS that will
* move the residual byte to memory.
*/
nxtdsp = NCB_SCRIPTH_PHYS (np, wsr_ma_helper);
}
if (DEBUG_FLAGS & DEBUG_PHASE) {
PRINT_ADDR(cp->cmd);
printk ("PM %x %x %x / %x %x %x.n",
hflags0, hflags, newcmd,
(unsigned)scr_to_cpu(pm->sg.addr),
(unsigned)scr_to_cpu(pm->sg.size),
(unsigned)scr_to_cpu(pm->ret));
}
/*
** Restart the SCRIPTS processor.
*/
OUTL (nc_temp, newcmd);
OUTL_DSP (nxtdsp);
return;
/*
** Unexpected phase changes that occurs when the current phase
** is not a DATA IN or DATA OUT phase are due to error conditions.
** Such event may only happen when the SCRIPTS is using a
** multibyte SCSI MOVE.
**
** Phase change Some possible cause
**
** COMMAND --> MSG IN SCSI parity error detected by target.
** COMMAND --> STATUS Bad command or refused by target.
** MSG OUT --> MSG IN Message rejected by target.
** MSG OUT --> COMMAND Bogus target that discards extended
** negotiation messages.
**
** The code below does not care of the new phase and so
** trusts the target. Why to annoy it ?
** If the interrupted phase is COMMAND phase, we restart at
** dispatcher.
** If a target does not get all the messages after selection,
** the code assumes blindly that the target discards extended
** messages and clears the negotiation status.
** If the target does not want all our response to negotiation,
** we force a SIR_NEGO_PROTO interrupt (it is a hack that avoids
** bloat for such a should_not_happen situation).
** In all other situation, we reset the BUS.
** Are these assumptions reasonnable ? (Wait and see ...)
*/
unexpected_phase:
dsp -= 8;
nxtdsp = 0;
switch (cmd & 7) {
case 2: /* COMMAND phase */
nxtdsp = NCB_SCRIPT_PHYS (np, dispatch);
break;
#if 0
case 3: /* STATUS phase */
nxtdsp = NCB_SCRIPT_PHYS (np, dispatch);
break;
#endif
case 6: /* MSG OUT phase */
/*
** If the device may want to use untagged when we want
** tagged, we prepare an IDENTIFY without disc. granted,
** since we will not be able to handle reselect.
** Otherwise, we just don't care.
*/
if (dsp == NCB_SCRIPT_PHYS (np, send_ident)) {
if (cp->tag != NO_TAG && olen - rest <= 3) {
cp->host_status = HS_BUSY;
np->msgout[0] = M_IDENTIFY | cp->lun;
nxtdsp = NCB_SCRIPTH_PHYS (np, ident_break_atn);
}
else
nxtdsp = NCB_SCRIPTH_PHYS (np, ident_break);
}
else if (dsp == NCB_SCRIPTH_PHYS (np, send_wdtr) ||
dsp == NCB_SCRIPTH_PHYS (np, send_sdtr) ||
dsp == NCB_SCRIPTH_PHYS (np, send_ppr)) {
nxtdsp = NCB_SCRIPTH_PHYS (np, nego_bad_phase);
}
break;
#if 0
case 7: /* MSG IN phase */
nxtdsp = NCB_SCRIPT_PHYS (np, clrack);
break;
#endif
}
if (nxtdsp) {
OUTL_DSP (nxtdsp);
return;
}
reset_all:
ncr_start_reset(np);
}
/*==========================================================
**
** ncr chip handler for QUEUE FULL and CHECK CONDITION
**
**==========================================================
**
** On QUEUE FULL status, we set the actual tagged command
** queue depth to the number of disconnected CCBs that is
** hopefully a good value to avoid further QUEUE FULL.
**
** On CHECK CONDITION or COMMAND TERMINATED, we use the
** CCB of the failed command for performing a REQUEST
** SENSE SCSI command.
**
** We do not want to change the order commands will be
** actually queued to the device after we received a
** QUEUE FULL status. We also want to properly deal with
** contingent allegiance condition. For these reasons,
** we remove from the start queue all commands for this
** LUN that haven't been yet queued to the device and
** put them back in the correponding LUN queue, then
** requeue the CCB that failed in front of the LUN queue.
** I just hope this not to be performed too often. :)
**
** If we are using IMMEDIATE ARBITRATION, we clear the
** IARB hint for every commands we encounter in order not
** to be stuck with a won arbitration and no job to queue
** to a device.
**----------------------------------------------------------
*/
static void ncr_sir_to_redo(ncb_p np, int num, ccb_p cp)
{
Scsi_Cmnd *cmd = cp->cmd;
tcb_p tp = &np->target[cp->target];
lcb_p lp = ncr_lp(np, tp, cp->lun);
ccb_p cp2;
int busyccbs = 1;
u_int32 startp;
u_char s_status = INB (SS_PRT);
int msglen;
int i, j;
/*
** If the LCB is not yet available, then only
** 1 IO is accepted, so we should have it.
*/
if (!lp)
goto next;
/*
** Remove all CCBs queued to the chip for that LUN and put
** them back in the LUN CCB wait queue.
*/
busyccbs = lp->queuedccbs;
i = (INL (nc_scratcha) - np->p_squeue) / 4;
j = i;
while (i != np->squeueput) {
cp2 = ncr_ccb_from_dsa(np, scr_to_cpu(np->squeue[i]));
assert(cp2);
#ifdef SCSI_NCR_IARB_SUPPORT
/* IARB hints may not be relevant any more. Forget them. */
cp2->host_flags &= ~HF_HINT_IARB;
#endif
if (cp2 && cp2->target == cp->target && cp2->lun == cp->lun) {
xpt_remque(&cp2->link_ccbq);
xpt_insque_head(&cp2->link_ccbq, &lp->wait_ccbq);
--lp->queuedccbs;
cp2->queued = 0;
}
else {
if (i != j)
np->squeue[j] = np->squeue[i];
if ((j += 2) >= MAX_START*2) j = 0;
}
if ((i += 2) >= MAX_START*2) i = 0;
}
if (i != j) /* Copy back the idle task if needed */
np->squeue[j] = np->squeue[i];
np->squeueput = j; /* Update our current start queue pointer */
/*
** Requeue the interrupted CCB in front of the
** LUN CCB wait queue to preserve ordering.
*/
xpt_remque(&cp->link_ccbq);
xpt_insque_head(&cp->link_ccbq, &lp->wait_ccbq);
--lp->queuedccbs;
cp->queued = 0;
next:
#ifdef SCSI_NCR_IARB_SUPPORT
/* IARB hint may not be relevant any more. Forget it. */
cp->host_flags &= ~HF_HINT_IARB;
if (np->last_cp)
np->last_cp = 0;
#endif
/*
** Now we can restart the SCRIPTS processor safely.
*/
OUTL_DSP (NCB_SCRIPT_PHYS (np, start));
switch(s_status) {
default:
case S_BUSY:
ncr_complete(np, cp);
break;
case S_QUEUE_FULL:
if (!lp || !lp->queuedccbs) {
ncr_complete(np, cp);
break;
}
if (bootverbose >= 1) {
PRINT_ADDR(cmd);
printk ("QUEUE FULL! %d busy, %d disconnected CCBsn",
busyccbs, lp->queuedccbs);
}
/*
** Decrease number of tags to the number of
** disconnected commands.
*/
if (lp->queuedccbs < lp->numtags) {
lp->numtags = lp->queuedccbs;
lp->num_good = 0;
ncr_setup_tags (np, cp->target, cp->lun);
}
/*
** Repair the offending CCB.
*/
cp->phys.header.savep = cp->startp;
cp->phys.header.lastp = cp->lastp0;
cp->host_status = HS_BUSY;
cp->scsi_status = S_ILLEGAL;
cp->xerr_status = 0;
cp->extra_bytes = 0;
cp->host_flags &= (HF_PM_TO_C|HF_DATA_IN);
break;
case S_TERMINATED:
case S_CHECK_COND:
/*
** If we were requesting sense, give up.
*/