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sym53c8xx.c：源码内容

if (cp->host_flags & HF_AUTO_SENSE) {
ncr_complete(np, cp);
break;
}
/*
** Save SCSI status and extended error.
** Compute the data residual now.
*/
cp->sv_scsi_status = cp->scsi_status;
cp->sv_xerr_status = cp->xerr_status;
cp->resid = ncr_compute_residual(np, cp);
/*
** Device returned CHECK CONDITION status.
** Prepare all needed data strutures for getting
** sense data.
*/
/*
** identify message
*/
cp->scsi_smsg2[0] = M_IDENTIFY | cp->lun;
msglen = 1;
/*
** If we are currently using anything different from
** async. 8 bit data transfers with that target,
** start a negotiation, since the device may want
** to report us a UNIT ATTENTION condition due to
** a cause we currently ignore, and we donnot want
** to be stuck with WIDE and/or SYNC data transfer.
**
** cp->nego_status is filled by ncr_prepare_nego().
**
** Do NOT negotiate if performing integrity check
** or if integrity check has completed, all check
** conditions will have been cleared.
*/
#ifdef SCSI_NCR_INTEGRITY_CHECKING
if (DEBUG_FLAGS & DEBUG_IC) {
printk("%s: ncr_sir_to_redo: ic_done %2X, in_progress %2Xn",
ncr_name(np), tp->ic_done, cp->cmd->ic_in_progress);
}
/*
** If parity error during integrity check,
** set the target width to narrow. Otherwise,
** do not negotiate on a request sense.
*/
if ( np->check_integ_par && np->check_integrity
&& cp->cmd->ic_in_progress ) {
cp->nego_status = 0;
msglen +=
ncr_ic_nego (np, cp, cmd ,&cp->scsi_smsg2[msglen]);
}
if (!np->check_integrity ||
(np->check_integrity &&
(!cp->cmd->ic_in_progress && !tp->ic_done)) ) {
ncr_negotiate(np, tp);
cp->nego_status = 0;
{
u_char sync_offset;
if ((np->device_id == PCI_DEVICE_ID_LSI_53C1010) ||
(np->device_id == PCI_DEVICE_ID_LSI_53C1010_66))
sync_offset = tp->sval & 0x3f;
else
sync_offset = tp->sval & 0x1f;
if ((tp->wval & EWS) || sync_offset)
msglen +=
ncr_prepare_nego (np, cp, &cp->scsi_smsg2[msglen]);
}
}
#else
ncr_negotiate(np, tp);
cp->nego_status = 0;
if ((tp->wval & EWS) || (tp->sval & 0x1f))
msglen +=
ncr_prepare_nego (np, cp, &cp->scsi_smsg2[msglen]);
#endif /* SCSI_NCR_INTEGRITY_CHECKING */
/*
** Message table indirect structure.
*/
cp->phys.smsg.addr = cpu_to_scr(CCB_PHYS (cp, scsi_smsg2));
cp->phys.smsg.size = cpu_to_scr(msglen);
/*
** sense command
*/
cp->phys.cmd.addr = cpu_to_scr(CCB_PHYS (cp, sensecmd));
cp->phys.cmd.size = cpu_to_scr(6);
/*
** patch requested size into sense command
*/
cp->sensecmd[0] = 0x03;
cp->sensecmd[1] = cp->lun << 5;
cp->sensecmd[4] = sizeof(cp->sense_buf);
/*
** sense data
*/
bzero(cp->sense_buf, sizeof(cp->sense_buf));
cp->phys.sense.addr = cpu_to_scr(CCB_PHYS(cp,sense_buf[0]));
cp->phys.sense.size = cpu_to_scr(sizeof(cp->sense_buf));
/*
** requeue the command.
*/
startp = NCB_SCRIPTH_PHYS (np, sdata_in);
cp->phys.header.savep = cpu_to_scr(startp);
cp->phys.header.goalp = cpu_to_scr(startp + 16);
cp->phys.header.lastp = cpu_to_scr(startp);
cp->phys.header.wgoalp = cpu_to_scr(startp + 16);
cp->phys.header.wlastp = cpu_to_scr(startp);
cp->host_status = cp->nego_status ? HS_NEGOTIATE : HS_BUSY;
cp->scsi_status = S_ILLEGAL;
cp->host_flags = (HF_AUTO_SENSE|HF_DATA_IN);
cp->phys.header.go.start =
cpu_to_scr(NCB_SCRIPT_PHYS (np, select));
/*
** If lp not yet allocated, requeue the command.
*/
if (!lp)
ncr_put_start_queue(np, cp);
break;
}
/*
** requeue awaiting scsi commands for this lun.
*/
if (lp)
ncr_start_next_ccb(np, lp, 1);
return;
}
/*----------------------------------------------------------
**
** After a device has accepted some management message
** as BUS DEVICE RESET, ABORT TASK, etc ..., or when
** a device signals a UNIT ATTENTION condition, some
** tasks are thrown away by the device. We are required
** to reflect that on our tasks list since the device
** will never complete these tasks.
**
** This function completes all disconnected CCBs for a
** given target that matches the following criteria:
** - lun=-1 means any logical UNIT otherwise a given one.
** - task=-1 means any task, otherwise a given one.
**----------------------------------------------------------
*/
static int ncr_clear_tasks(ncb_p np, u_char hsts,
int target, int lun, int task)
{
int i = 0;
ccb_p cp;
for (cp = np->ccbc; cp; cp = cp->link_ccb) {
if (cp->host_status != HS_DISCONNECT)
continue;
if (cp->target != target)
continue;
if (lun != -1 && cp->lun != lun)
continue;
if (task != -1 && cp->tag != NO_TAG && cp->scsi_smsg[2] != task)
continue;
cp->host_status = hsts;
cp->scsi_status = S_ILLEGAL;
ncr_complete(np, cp);
++i;
}
return i;
}
/*==========================================================
**
** ncr chip handler for TASKS recovery.
**
**==========================================================
**
** We cannot safely abort a command, while the SCRIPTS
** processor is running, since we just would be in race
** with it.
**
** As long as we have tasks to abort, we keep the SEM
** bit set in the ISTAT. When this bit is set, the
** SCRIPTS processor interrupts (SIR_SCRIPT_STOPPED)
** each time it enters the scheduler.
**
** If we have to reset a target, clear tasks of a unit,
** or to perform the abort of a disconnected job, we
** restart the SCRIPTS for selecting the target. Once
** selected, the SCRIPTS interrupts (SIR_TARGET_SELECTED).
** If it loses arbitration, the SCRIPTS will interrupt again
** the next time it will enter its scheduler, and so on ...
**
** On SIR_TARGET_SELECTED, we scan for the more
** appropriate thing to do:
**
** - If nothing, we just sent a M_ABORT message to the
** target to get rid of the useless SCSI bus ownership.
** According to the specs, no tasks shall be affected.
** - If the target is to be reset, we send it a M_RESET
** message.
** - If a logical UNIT is to be cleared , we send the
** IDENTIFY(lun) + M_ABORT.
** - If an untagged task is to be aborted, we send the
** IDENTIFY(lun) + M_ABORT.
** - If a tagged task is to be aborted, we send the
** IDENTIFY(lun) + task attributes + M_ABORT_TAG.
**
** Once our 'kiss of death' :) message has been accepted
** by the target, the SCRIPTS interrupts again
** (SIR_ABORT_SENT). On this interrupt, we complete
** all the CCBs that should have been aborted by the
** target according to our message.
**
**----------------------------------------------------------
*/
static void ncr_sir_task_recovery(ncb_p np, int num)
{
ccb_p cp;
tcb_p tp;
int target=-1, lun=-1, task;
int i, k;
u_char *p;
switch(num) {
/*
** The SCRIPTS processor stopped before starting
** the next command in order to allow us to perform
** some task recovery.
*/
case SIR_SCRIPT_STOPPED:
/*
** Do we have any target to reset or unit to clear ?
*/
for (i = 0 ; i < MAX_TARGET ; i++) {
tp = &np->target[i];
if (tp->to_reset || (tp->l0p && tp->l0p->to_clear)) {
target = i;
break;
}
if (!tp->lmp)
continue;
for (k = 1 ; k < MAX_LUN ; k++) {
if (tp->lmp[k] && tp->lmp[k]->to_clear) {
target = i;
break;
}
}
if (target != -1)
break;
}
/*
** If not, look at the CCB list for any
** disconnected CCB to be aborted.
*/
if (target == -1) {
for (cp = np->ccbc; cp; cp = cp->link_ccb) {
if (cp->host_status != HS_DISCONNECT)
continue;
if (cp->to_abort) {
target = cp->target;
break;
}
}
}
/*
** If some target is to be selected,
** prepare and start the selection.
*/
if (target != -1) {
tp = &np->target[target];
np->abrt_sel.sel_id = target;
np->abrt_sel.sel_scntl3 = tp->wval;
np->abrt_sel.sel_sxfer = tp->sval;
np->abrt_sel.sel_scntl4 = tp->uval;
OUTL(nc_dsa, np->p_ncb);
OUTL_DSP (NCB_SCRIPTH_PHYS (np, sel_for_abort));
return;
}
/*
** Nothing is to be selected, so we donnot need
** to synchronize with the SCRIPTS anymore.
** Remove the SEM flag from the ISTAT.
*/
np->istat_sem = 0;
OUTB (nc_istat, SIGP);
/*
** Now look at CCBs to abort that haven't started yet.
** Remove all those CCBs from the start queue and
** complete them with appropriate status.
** Btw, the SCRIPTS processor is still stopped, so
** we are not in race.
*/
for (cp = np->ccbc; cp; cp = cp->link_ccb) {
if (cp->host_status != HS_BUSY &&
cp->host_status != HS_NEGOTIATE)
continue;
if (!cp->to_abort)
continue;
#ifdef SCSI_NCR_IARB_SUPPORT
/*
** If we are using IMMEDIATE ARBITRATION, we donnot
** want to cancel the last queued CCB, since the
** SCRIPTS may have anticipated the selection.
*/
if (cp == np->last_cp) {
cp->to_abort = 0;
continue;
}
#endif
/*
** Compute index of next position in the start
** queue the SCRIPTS will schedule.
*/
i = (INL (nc_scratcha) - np->p_squeue) / 4;
/*
** Remove the job from the start queue.
*/
k = -1;
while (1) {
if (i == np->squeueput)
break;
if (k == -1) { /* Not found yet */
if (cp == ncr_ccb_from_dsa(np,
scr_to_cpu(np->squeue[i])))
k = i; /* Found */
}
else {
/*
** Once found, we have to move
** back all jobs by 1 position.
*/
np->squeue[k] = np->squeue[i];
k += 2;
if (k >= MAX_START*2)
k = 0;
}
i += 2;
if (i >= MAX_START*2)
i = 0;
}
/*
** If job removed, repair the start queue.
*/
if (k != -1) {
np->squeue[k] = np->squeue[i]; /* Idle task */
np->squeueput = k; /* Start queue pointer */
}
cp->host_status = HS_ABORTED;
cp->scsi_status = S_ILLEGAL;
ncr_complete(np, cp);
}
break;
/*
** The SCRIPTS processor has selected a target
** we may have some manual recovery to perform for.
*/
case SIR_TARGET_SELECTED:
target = (INB (nc_sdid) & 0xf);
tp = &np->target[target];
np->abrt_tbl.addr = cpu_to_scr(vtobus(np->abrt_msg));
/*
** If the target is to be reset, prepare a
** M_RESET message and clear the to_reset flag
** since we donnot expect this operation to fail.
*/
if (tp->to_reset) {
np->abrt_msg[0] = M_RESET;
np->abrt_tbl.size = 1;
tp->to_reset = 0;
break;
}
/*
** Otherwise, look for some logical unit to be cleared.
*/
if (tp->l0p && tp->l0p->to_clear)
lun = 0;
else if (tp->lmp) {
for (k = 1 ; k < MAX_LUN ; k++) {
if (tp->lmp[k] && tp->lmp[k]->to_clear) {
lun = k;
break;
}
}
}
/*
** If a logical unit is to be cleared, prepare
** an IDENTIFY(lun) + ABORT MESSAGE.
*/
if (lun != -1) {
lcb_p lp = ncr_lp(np, tp, lun);
lp->to_clear = 0; /* We donnot expect to fail here */
np->abrt_msg[0] = M_IDENTIFY | lun;
np->abrt_msg[1] = M_ABORT;
np->abrt_tbl.size = 2;
break;
}
/*
** Otherwise, look for some disconnected job to
** abort for this target.
*/
for (cp = np->ccbc; cp; cp = cp->link_ccb) {
if (cp->host_status != HS_DISCONNECT)
continue;
if (cp->target != target)
continue;
if (cp->to_abort)
break;
}
/*
** If we have none, probably since the device has
** completed the command before we won abitration,
** send a M_ABORT message without IDENTIFY.
** According to the specs, the device must just
** disconnect the BUS and not abort any task.
*/
if (!cp) {
np->abrt_msg[0] = M_ABORT;
np->abrt_tbl.size = 1;
break;
}
/*
** We have some task to abort.
** Set the IDENTIFY(lun)
*/
np->abrt_msg[0] = M_IDENTIFY | cp->lun;
/*
** If we want to abort an untagged command, we
** will send a IDENTIFY + M_ABORT.
** Otherwise (tagged command), we will send
** a IDENTITFY + task attributes + ABORT TAG.
*/
if (cp->tag == NO_TAG) {
np->abrt_msg[1] = M_ABORT;
np->abrt_tbl.size = 2;
}
else {
np->abrt_msg[1] = cp->scsi_smsg[1];
np->abrt_msg[2] = cp->scsi_smsg[2];
np->abrt_msg[3] = M_ABORT_TAG;
np->abrt_tbl.size = 4;
}
cp->to_abort = 0; /* We donnot expect to fail here */
break;
/*
** The target has accepted our message and switched
** to BUS FREE phase as we expected.
*/
case SIR_ABORT_SENT:
target = (INB (nc_sdid) & 0xf);
tp = &np->target[target];
/*
** If we didn't abort anything, leave here.
*/
if (np->abrt_msg[0] == M_ABORT)
break;
/*
** If we sent a M_RESET, then a hardware reset has
** been performed by the target.
** - Reset everything to async 8 bit
** - Tell ourself to negotiate next time :-)
** - Prepare to clear all disconnected CCBs for
** this target from our task list (lun=task=-1)
*/
lun = -1;
task = -1;
if (np->abrt_msg[0] == M_RESET) {
tp->sval = 0;
tp->wval = np->rv_scntl3;
tp->uval = np->rv_scntl4;
ncr_set_sync_wide_status(np, target);
ncr_negotiate(np, tp);
}
/*
** Otherwise, check for the LUN and TASK(s)
** concerned by the cancelation.
** If it is not ABORT_TAG then it is CLEAR_QUEUE
** or an ABORT message :-)
*/
else {
lun = np->abrt_msg[0] & 0x3f;
if (np->abrt_msg[1] == M_ABORT_TAG)
task = np->abrt_msg[2];
}
/*
** Complete all the CCBs the device should have
** aborted due to our 'kiss of death' message.
*/
(void) ncr_clear_tasks(np, HS_ABORTED, target, lun, task);
break;
/*
** We have performed a auto-sense that succeeded.
** If the device reports a UNIT ATTENTION condition
** due to a RESET condition, we must complete all
** disconnect CCBs for this unit since the device
** shall have thrown them away.
** Since I haven't time to guess what the specs are
** expecting for other UNIT ATTENTION conditions, I
** decided to only care about RESET conditions. :)
*/
case SIR_AUTO_SENSE_DONE:
cp = ncr_ccb_from_dsa(np, INL (nc_dsa));
if (!cp)
break;
memcpy(cp->cmd->sense_buffer, cp->sense_buf,
sizeof(cp->cmd->sense_buffer));
p = &cp->cmd->sense_buffer[0];
if (p[0] != 0x70 || p[2] != 0x6 || p[12] != 0x29)
break;
#if 0
(void) ncr_clear_tasks(np, HS_RESET, cp->target, cp->lun, -1);
#endif
break;
}
/*
** Print to the log the message we intend to send.
*/
if (num == SIR_TARGET_SELECTED) {
PRINT_TARGET(np, target);
ncr_printl_hex("control msgout:", np->abrt_msg,
np->abrt_tbl.size);
np->abrt_tbl.size = cpu_to_scr(np->abrt_tbl.size);
}
/*
** Let the SCRIPTS processor continue.
*/
OUTONB_STD ();
}
/*==========================================================
**
** G閞ard's alchemy:) that deals with with the data
** pointer for both MDP and the residual calculation.
**
**==========================================================
**
** I didn't want to bloat the code by more than 200
** lignes for the handling of both MDP and the residual.
** This has been achieved by using a data pointer
** representation consisting in an index in the data
** array (dp_sg) and a negative offset (dp_ofs) that
** have the following meaning:
**
** - dp_sg = MAX_SCATTER
** we are at the end of the data script.
** - dp_sg < MAX_SCATTER
** dp_sg points to the next entry of the scatter array
** we want to transfer.
** - dp_ofs < 0
** dp_ofs represents the residual of bytes of the
** previous entry scatter entry we will send first.
** - dp_ofs = 0
** no residual to send first.
**
** The function ncr_evaluate_dp() accepts an arbitray
** offset (basically from the MDP message) and returns
** the corresponding values of dp_sg and dp_ofs.
**
**----------------------------------------------------------
*/
static int ncr_evaluate_dp(ncb_p np, ccb_p cp, u_int32 scr, int *ofs)
{
u_int32 dp_scr;
int dp_ofs, dp_sg, dp_sgmin;
int tmp;
struct pm_ctx *pm;
/*
** Compute the resulted data pointer in term of a script
** address within some DATA script and a signed byte offset.
*/
dp_scr = scr;
dp_ofs = *ofs;
if (dp_scr == NCB_SCRIPT_PHYS (np, pm0_data))
pm = &cp->phys.pm0;
else if (dp_scr == NCB_SCRIPT_PHYS (np, pm1_data))
pm = &cp->phys.pm1;
else
pm = 0;
if (pm) {
dp_scr = scr_to_cpu(pm->ret);
dp_ofs -= scr_to_cpu(pm->sg.size);
}
/*
** Deduce the index of the sg entry.
** Keep track of the index of the first valid entry.
** If result is dp_sg = MAX_SCATTER, then we are at the
** end of the data and vice-versa.
*/
tmp = scr_to_cpu(cp->phys.header.goalp);
dp_sg = MAX_SCATTER;
if (dp_scr != tmp)
dp_sg -= (tmp - 8 - (int)dp_scr) / (SCR_SG_SIZE*4);
dp_sgmin = MAX_SCATTER - cp->segments;
/*
** Move to the sg entry the data pointer belongs to.
**
** If we are inside the data area, we expect result to be:
**
** Either,
** dp_ofs = 0 and dp_sg is the index of the sg entry
** the data pointer belongs to (or the end of the data)
** Or,
** dp_ofs < 0 and dp_sg is the index of the sg entry
** the data pointer belongs to + 1.
*/
if (dp_ofs < 0) {
int n;
while (dp_sg > dp_sgmin) {
--dp_sg;
tmp = scr_to_cpu(cp->phys.data[dp_sg].size);
n = dp_ofs + (tmp & 0xffffff);
if (n > 0) {
++dp_sg;
break;
}
dp_ofs = n;
}
}
else if (dp_ofs > 0) {
while (dp_sg < MAX_SCATTER) {
tmp = scr_to_cpu(cp->phys.data[dp_sg].size);
dp_ofs -= (tmp & 0xffffff);
++dp_sg;
if (dp_ofs <= 0)
break;
}
}
/*
** Make sure the data pointer is inside the data area.
** If not, return some error.
*/
if (dp_sg < dp_sgmin || (dp_sg == dp_sgmin && dp_ofs < 0))
goto out_err;
else if (dp_sg > MAX_SCATTER || (dp_sg == MAX_SCATTER && dp_ofs > 0))
goto out_err;
/*
** Save the extreme pointer if needed.
*/
if (dp_sg > cp->ext_sg ||
(dp_sg == cp->ext_sg && dp_ofs > cp->ext_ofs)) {
cp->ext_sg = dp_sg;
cp->ext_ofs = dp_ofs;
}
/*
** Return data.
*/
*ofs = dp_ofs;
return dp_sg;
out_err:
return -1;
}
/*==========================================================
**
** ncr chip handler for MODIFY DATA POINTER MESSAGE
**
**==========================================================
**
** We also call this function on IGNORE WIDE RESIDUE
** messages that do not match a SWIDE full condition.
** Btw, we assume in that situation that such a message
** is equivalent to a MODIFY DATA POINTER (offset=-1).
**
**----------------------------------------------------------
*/
static void ncr_modify_dp(ncb_p np, tcb_p tp, ccb_p cp, int ofs)
{
int dp_ofs = ofs;
u_int32 dp_scr = INL (nc_temp);
u_int32 dp_ret;
u_int32 tmp;
u_char hflags;
int dp_sg;
struct pm_ctx *pm;
/*
** Not supported for auto_sense;
*/
if (cp->host_flags & HF_AUTO_SENSE)
goto out_reject;
/*
** Apply our alchemy:) (see comments in ncr_evaluate_dp()),
** to the resulted data pointer.
*/
dp_sg = ncr_evaluate_dp(np, cp, dp_scr, &dp_ofs);
if (dp_sg < 0)
goto out_reject;
/*
** And our alchemy:) allows to easily calculate the data
** script address we want to return for the next data phase.
*/
dp_ret = cpu_to_scr(cp->phys.header.goalp);
dp_ret = dp_ret - 8 - (MAX_SCATTER - dp_sg) * (SCR_SG_SIZE*4);
/*
** If offset / scatter entry is zero we donnot need
** a context for the new current data pointer.
*/
if (dp_ofs == 0) {
dp_scr = dp_ret;
goto out_ok;
}
/*
** Get a context for the new current data pointer.
*/
hflags = INB (HF_PRT);
if (hflags & HF_DP_SAVED)
hflags ^= HF_ACT_PM;
if (!(hflags & HF_ACT_PM)) {
pm = &cp->phys.pm0;
dp_scr = NCB_SCRIPT_PHYS (np, pm0_data);
}
else {
pm = &cp->phys.pm1;
dp_scr = NCB_SCRIPT_PHYS (np, pm1_data);
}
hflags &= ~(HF_DP_SAVED);
OUTB (HF_PRT, hflags);
/*
** Set up the new current data pointer.
** ofs < 0 there, and for the next data phase, we
** want to transfer part of the data of the sg entry
** corresponding to index dp_sg-1 prior to returning
** to the main data script.
*/
pm->ret = cpu_to_scr(dp_ret);
tmp = scr_to_cpu(cp->phys.data[dp_sg-1].addr);
tmp += scr_to_cpu(cp->phys.data[dp_sg-1].size) + dp_ofs;
pm->sg.addr = cpu_to_scr(tmp);
pm->sg.size = cpu_to_scr(-dp_ofs);
out_ok:
OUTL (nc_temp, dp_scr);
OUTL_DSP (NCB_SCRIPT_PHYS (np, clrack));
return;
out_reject:
OUTL_DSP (NCB_SCRIPTH_PHYS (np, msg_bad));
}
/*==========================================================
**
** ncr chip calculation of the data residual.
**
**==========================================================
**
** As I used to say, the requirement of data residual
** in SCSI is broken, useless and cannot be achieved
** without huge complexity.
** But most OSes and even the official CAM require it.
** When stupidity happens to be so widely spread inside
** a community, it gets hard to convince.
**
** Anyway, I don't care, since I am not going to use
** any software that considers this data residual as
** a relevant information. :)
**
**----------------------------------------------------------
*/
static int ncr_compute_residual(ncb_p np, ccb_p cp)
{
int dp_sg, dp_sgmin, tmp;
int resid=0;
int dp_ofs = 0;
/*
* Check for some data lost or just thrown away.
* We are not required to be quite accurate in this
* situation. Btw, if we are odd for output and the
* device claims some more data, it may well happen
* than our residual be zero. :-)
*/
if (cp->xerr_status & (XE_EXTRA_DATA|XE_SODL_UNRUN|XE_SWIDE_OVRUN)) {
if (cp->xerr_status & XE_EXTRA_DATA)
resid -= cp->extra_bytes;
if (cp->xerr_status & XE_SODL_UNRUN)
++resid;
if (cp->xerr_status & XE_SWIDE_OVRUN)
--resid;
}
/*
** If SCRIPTS reaches its goal point, then
** there is no additionnal residual.
*/
if (cp->phys.header.lastp == cp->phys.header.goalp)
return resid;
/*
** If the last data pointer is data_io (direction
** unknown), then no data transfer should have
** taken place.
*/
if (cp->phys.header.lastp == NCB_SCRIPTH_PHYS (np, data_io))
return cp->data_len;
/*
** If no data transfer occurs, or if the data
** pointer is weird, return full residual.
*/
if (cp->startp == cp->phys.header.lastp ||
ncr_evaluate_dp(np, cp, scr_to_cpu(cp->phys.header.lastp),
&dp_ofs) < 0) {
return cp->data_len;
}
/*
** We are now full comfortable in the computation
** of the data residual (2's complement).
*/
dp_sgmin = MAX_SCATTER - cp->segments;
resid = -cp->ext_ofs;
for (dp_sg = cp->ext_sg; dp_sg < MAX_SCATTER; ++dp_sg) {
tmp = scr_to_cpu(cp->phys.data[dp_sg].size);
resid += (tmp & 0xffffff);
}
/*
** Hopefully, the result is not too wrong.
*/
return resid;
}
/*==========================================================
**
** Print out the containt of a SCSI message.
**
**==========================================================
*/
static int ncr_show_msg (u_char * msg)
{
u_char i;
printk ("%x",*msg);
if (*msg==M_EXTENDED) {
for (i=1;i<8;i++) {
if (i-1>msg[1]) break;
printk ("-%x",msg[i]);
};
return (i+1);
} else if ((*msg & 0xf0) == 0x20) {
printk ("-%x",msg[1]);
return (2);
};
return (1);
}
static void ncr_print_msg (ccb_p cp, char *label, u_char *msg)
{
if (cp)
PRINT_ADDR(cp->cmd);
if (label)
printk ("%s: ", label);
(void) ncr_show_msg (msg);
printk (".n");
}
/*===================================================================
**
** Negotiation for WIDE and SYNCHRONOUS DATA TRANSFER.
**
**===================================================================
**
** Was Sie schon immer ueber transfermode negotiation wissen wollten ...
**
** We try to negotiate sync and wide transfer only after
** a successful inquire command. We look at byte 7 of the
** inquire data to determine the capabilities of the target.
**
** When we try to negotiate, we append the negotiation message
** to the identify and (maybe) simple tag message.
** The host status field is set to HS_NEGOTIATE to mark this
** situation.
**
** If the target doesn't answer this message immediately
** (as required by the standard), the SIR_NEGO_FAILED interrupt
** will be raised eventually.
** The handler removes the HS_NEGOTIATE status, and sets the
** negotiated value to the default (async / nowide).
**
** If we receive a matching answer immediately, we check it
** for validity, and set the values.
**
** If we receive a Reject message immediately, we assume the
** negotiation has failed, and fall back to standard values.
**
** If we receive a negotiation message while not in HS_NEGOTIATE
** state, it's a target initiated negotiation. We prepare a
** (hopefully) valid answer, set our parameters, and send back
** this answer to the target.
**
** If the target doesn't fetch the answer (no message out phase),
** we assume the negotiation has failed, and fall back to default
** settings (SIR_NEGO_PROTO interrupt).
**
** When we set the values, we adjust them in all ccbs belonging
** to this target, in the controller's register, and in the "phys"
** field of the controller's struct ncb.
**
**---------------------------------------------------------------------
*/
/*==========================================================
**
** ncr chip handler for SYNCHRONOUS DATA TRANSFER
** REQUEST (SDTR) message.
**
**==========================================================
**
** Read comments above.
**
**----------------------------------------------------------
*/
static void ncr_sync_nego(ncb_p np, tcb_p tp, ccb_p cp)
{
u_char scntl3, scntl4;
u_char chg, ofs, per, fak;
/*
** Synchronous request message received.
*/
if (DEBUG_FLAGS & DEBUG_NEGO) {
ncr_print_msg(cp, "sync msg in", np->msgin);
};
/*
** get requested values.
*/
chg = 0;
per = np->msgin[3];
ofs = np->msgin[4];
if (ofs==0) per=255;
/*
** if target sends SDTR message,
** it CAN transfer synch.
*/
if (ofs)
tp->inq_byte7 |= INQ7_SYNC;
/*
** check values against driver limits.
*/
if (per < np->minsync)
{chg = 1; per = np->minsync;}
if (per < tp->minsync)
{chg = 1; per = tp->minsync;}
if (ofs > np->maxoffs_st)
{chg = 1; ofs = np->maxoffs_st;}
if (ofs > tp->maxoffs)
{chg = 1; ofs = tp->maxoffs;}
/*
** Check against controller limits.
*/
fak = 7;
scntl3 = 0;
scntl4 = 0;
if (ofs != 0) {
ncr_getsync(np, per, &fak, &scntl3);
if (fak > 7) {
chg = 1;
ofs = 0;
}
}
if (ofs == 0) {
fak = 7;
per = 0;
scntl3 = 0;
scntl4 = 0;
tp->minsync = 0;
}
if (DEBUG_FLAGS & DEBUG_NEGO) {
PRINT_ADDR(cp->cmd);
printk ("sync: per=%d scntl3=0x%x scntl4=0x%x ofs=%d fak=%d chg=%d.n",
per, scntl3, scntl4, ofs, fak, chg);
}
if (INB (HS_PRT) == HS_NEGOTIATE) {
OUTB (HS_PRT, HS_BUSY);
switch (cp->nego_status) {
case NS_SYNC:
/*
** This was an answer message
*/
if (chg) {
/*
** Answer wasn't acceptable.
*/
ncr_setsync (np, cp, 0, 0xe0, 0);
OUTL_DSP (NCB_SCRIPTH_PHYS (np, msg_bad));
} else {
/*
** Answer is ok.
*/
if ((np->device_id != PCI_DEVICE_ID_LSI_53C1010) &&
(np->device_id != PCI_DEVICE_ID_LSI_53C1010_66))
ncr_setsync (np, cp, scntl3, (fak<<5)|ofs,0);
else
ncr_setsync (np, cp, scntl3, ofs, scntl4);
OUTL_DSP (NCB_SCRIPT_PHYS (np, clrack));
};
return;
case NS_WIDE:
ncr_setwide (np, cp, 0, 0);
break;
};
};
/*
** It was a request. Set value and
** prepare an answer message
*/
if ((np->device_id != PCI_DEVICE_ID_LSI_53C1010) &&
(np->device_id != PCI_DEVICE_ID_LSI_53C1010_66))
ncr_setsync (np, cp, scntl3, (fak<<5)|ofs,0);
else
ncr_setsync (np, cp, scntl3, ofs, scntl4);
np->msgout[0] = M_EXTENDED;
np->msgout[1] = 3;
np->msgout[2] = M_X_SYNC_REQ;
np->msgout[3] = per;
np->msgout[4] = ofs;
cp->nego_status = NS_SYNC;
if (DEBUG_FLAGS & DEBUG_NEGO) {
ncr_print_msg(cp, "sync msgout", np->msgout);
}
np->msgin [0] = M_NOOP;
if (!ofs)
OUTL_DSP (NCB_SCRIPTH_PHYS (np, msg_bad));
else
OUTL_DSP (NCB_SCRIPTH_PHYS (np, sdtr_resp));
}
/*==========================================================
**
** ncr chip handler for WIDE DATA TRANSFER REQUEST
** (WDTR) message.
**
**==========================================================
**
** Read comments above.
**
**----------------------------------------------------------
*/
static void ncr_wide_nego(ncb_p np, tcb_p tp, ccb_p cp)
{
u_char chg, wide;
/*
** Wide request message received.
*/
if (DEBUG_FLAGS & DEBUG_NEGO) {
ncr_print_msg(cp, "wide msgin", np->msgin);
};
/*
** get requested values.
*/
chg = 0;
wide = np->msgin[3];
/*
** if target sends WDTR message,
** it CAN transfer wide.
*/
if (wide)
tp->inq_byte7 |= INQ7_WIDE16;
/*
** check values against driver limits.
*/
if (wide > tp->usrwide)
{chg = 1; wide = tp->usrwide;}
if (DEBUG_FLAGS & DEBUG_NEGO) {
PRINT_ADDR(cp->cmd);
printk ("wide: wide=%d chg=%d.n", wide, chg);
}
if (INB (HS_PRT) == HS_NEGOTIATE) {
OUTB (HS_PRT, HS_BUSY);
switch (cp->nego_status) {
case NS_WIDE:
/*
** This was an answer message
*/
if (chg) {
/*
** Answer wasn't acceptable.
*/
ncr_setwide (np, cp, 0, 1);
OUTL_DSP (NCB_SCRIPTH_PHYS (np, msg_bad));
} else {
/*
** Answer is ok.
*/
ncr_setwide (np, cp, wide, 1);
OUTL_DSP (NCB_SCRIPT_PHYS (np, clrack));
};
return;
case NS_SYNC:
ncr_setsync (np, cp, 0, 0xe0, 0);
break;
};
};
/*
** It was a request, set value and
** prepare an answer message
*/
ncr_setwide (np, cp, wide, 1);
np->msgout[0] = M_EXTENDED;
np->msgout[1] = 2;
np->msgout[2] = M_X_WIDE_REQ;
np->msgout[3] = wide;
np->msgin [0] = M_NOOP;
cp->nego_status = NS_WIDE;
if (DEBUG_FLAGS & DEBUG_NEGO) {
ncr_print_msg(cp, "wide msgout", np->msgout);
}
OUTL_DSP (NCB_SCRIPTH_PHYS (np, wdtr_resp));
}
/*==========================================================
**
** ncr chip handler for PARALLEL PROTOCOL REQUEST
** (PPR) message.
**
**==========================================================
**
** Read comments above.
**
**----------------------------------------------------------
*/
static void ncr_ppr_nego(ncb_p np, tcb_p tp, ccb_p cp)
{
u_char scntl3, scntl4;
u_char chg, ofs, per, fak, wth, dt;
/*
** PPR message received.
*/
if (DEBUG_FLAGS & DEBUG_NEGO) {
ncr_print_msg(cp, "ppr msg in", np->msgin);
};
/*
** get requested values.
*/
chg = 0;
per = np->msgin[3];
ofs = np->msgin[5];
wth = np->msgin[6];
dt = np->msgin[7];
if (ofs==0) per=255;
/*
** if target sends sync (wide),
** it CAN transfer synch (wide).
*/
if (ofs)
tp->inq_byte7 |= INQ7_SYNC;
if (wth)
tp->inq_byte7 |= INQ7_WIDE16;
/*
** check values against driver limits.
*/
if (wth > tp->usrwide)
{chg = 1; wth = tp->usrwide;}
if (per < np->minsync)
{chg = 1; per = np->minsync;}
if (per < tp->minsync)
{chg = 1; per = tp->minsync;}
if (ofs > tp->maxoffs)
{chg = 1; ofs = tp->maxoffs;}
/*
** Check against controller limits.
*/
fak = 7;
scntl3 = 0;
scntl4 = 0;
if (ofs != 0) {
scntl4 = dt ? 0x80 : 0;
ncr_getsync(np, per, &fak, &scntl3);
if (fak > 7) {
chg = 1;
ofs = 0;
}
}
if (ofs == 0) {
fak = 7;
per = 0;
scntl3 = 0;
scntl4 = 0;
tp->minsync = 0;
}
/*
** If target responds with Ultra 3 speed
** but narrow or not DT, reject.
** If target responds with DT request
** but not Ultra3 speeds, reject message,
** reset min sync for target to 0x0A and
** set flags to re-negotiate.
*/
if ((per == 0x09) && ofs && (!wth || !dt))
chg = 1;
else if (( (per > 0x09) && dt) )
chg = 2;
/* Not acceptable since beyond controller limit */
if (!dt && ofs > np->maxoffs_st)
{chg = 2; ofs = np->maxoffs_st;}
if (DEBUG_FLAGS & DEBUG_NEGO) {
PRINT_ADDR(cp->cmd);
printk ("ppr: wth=%d per=%d scntl3=0x%x scntl4=0x%x ofs=%d fak=%d chg=%d.n",
wth, per, scntl3, scntl4, ofs, fak, chg);
}
if (INB (HS_PRT) == HS_NEGOTIATE) {
OUTB (HS_PRT, HS_BUSY);
switch (cp->nego_status) {
case NS_PPR:
/*
** This was an answer message
*/
if (chg) {
/*
** Answer wasn't acceptable.
*/
if (chg == 2) {
/* Send message reject and reset flags for
** host to re-negotiate with min period 0x0A.
*/
tp->minsync = 0x0A;
tp->period = 0;
tp->widedone = 0;
}
ncr_setsyncwide (np, cp, 0, 0xe0, 0, 0);
OUTL_DSP (NCB_SCRIPTH_PHYS (np, msg_bad));
} else {
/*
** Answer is ok.
*/
if ((np->device_id != PCI_DEVICE_ID_LSI_53C1010) &&
(np->device_id != PCI_DEVICE_ID_LSI_53C1010_66))
ncr_setsyncwide (np, cp, scntl3, (fak<<5)|ofs,0, wth);
else
ncr_setsyncwide (np, cp, scntl3, ofs, scntl4, wth);
OUTL_DSP (NCB_SCRIPT_PHYS (np, clrack));
};
return;
case NS_SYNC:
ncr_setsync (np, cp, 0, 0xe0, 0);
break;
case NS_WIDE:
ncr_setwide (np, cp, 0, 0);
break;
};
};
/*
** It was a request. Set value and
** prepare an answer message
**
** If narrow or not DT and requesting Ultra3
** slow the bus down and force ST. If not
** requesting Ultra3, force ST.
** Max offset is 31=0x1f if ST mode.
*/
if ((per == 0x09) && ofs && (!wth || !dt)) {
per = 0x0A;
dt = 0;
}
else if ( (per > 0x09) && dt) {
dt = 0;
}
if (!dt && ofs > np->maxoffs_st)
ofs = np->maxoffs_st;
if ((np->device_id != PCI_DEVICE_ID_LSI_53C1010) &&
(np->device_id != PCI_DEVICE_ID_LSI_53C1010_66))
ncr_setsyncwide (np, cp, scntl3, (fak<<5)|ofs,0, wth);
else
ncr_setsyncwide (np, cp, scntl3, ofs, scntl4, wth);
np->msgout[0] = M_EXTENDED;
np->msgout[1] = 6;
np->msgout[2] = M_X_PPR_REQ;
np->msgout[3] = per;
np->msgout[4] = 0;
np->msgout[5] = ofs;
np->msgout[6] = wth;
np->msgout[7] = dt;
cp->nego_status = NS_PPR;
if (DEBUG_FLAGS & DEBUG_NEGO) {
ncr_print_msg(cp, "ppr msgout", np->msgout);
}
np->msgin [0] = M_NOOP;
if (!ofs)
OUTL_DSP (NCB_SCRIPTH_PHYS (np, msg_bad));
else
OUTL_DSP (NCB_SCRIPTH_PHYS (np, ppr_resp));
}
/*
** Reset SYNC or WIDE to default settings.
** Called when a negotiation does not succeed either
** on rejection or on protocol error.
*/
static void ncr_nego_default(ncb_p np, tcb_p tp, ccb_p cp)
{
/*
** any error in negotiation:
** fall back to default mode.
*/
switch (cp->nego_status) {
case NS_SYNC:
ncr_setsync (np, cp, 0, 0xe0, 0);
break;
case NS_WIDE:
ncr_setwide (np, cp, 0, 0);
break;
case NS_PPR:
/*
* ppr_negotiation is set to 1 on the first ppr nego command.
* If ppr is successful, it is reset to 2.
* If unsuccessful it is reset to 0.
*/
if (DEBUG_FLAGS & DEBUG_NEGO) {
tcb_p tp=&np->target[cp->target];
u_char factor, offset, width;
ncr_get_xfer_info ( np, tp, &factor, &offset, &width);
printk("Current factor %d offset %d width %dn",
factor, offset, width);
}
if (tp->ppr_negotiation == 2)
ncr_setsyncwide (np, cp, 0, 0xe0, 0, 0);
else if (tp->ppr_negotiation == 1) {
/* First ppr command has received a M REJECT.
* Do not change the existing wide/sync parameter
* values (asyn/narrow if this as the first nego;
* may be different if target initiates nego.).
*/
tp->ppr_negotiation = 0;
}
else
{
tp->ppr_negotiation = 0;
ncr_setwide (np, cp, 0, 0);
}
break;
};
np->msgin [0] = M_NOOP;
np->msgout[0] = M_NOOP;
cp->nego_status = 0;
}
/*==========================================================
**
** ncr chip handler for MESSAGE REJECT received for
** a WIDE or SYNCHRONOUS negotiation.
**
** clear the PPR negotiation flag, all future nego.
** will be SDTR and WDTR
**
**==========================================================
**
** Read comments above.
**
**----------------------------------------------------------
*/
static void ncr_nego_rejected(ncb_p np, tcb_p tp, ccb_p cp)
{
ncr_nego_default(np, tp, cp);
OUTB (HS_PRT, HS_BUSY);
}
/*==========================================================
**
**
** ncr chip exception handler for programmed interrupts.
**
**
**==========================================================
*/
void ncr_int_sir (ncb_p np)
{
u_char num = INB (nc_dsps);
u_long dsa = INL (nc_dsa);
ccb_p cp = ncr_ccb_from_dsa(np, dsa);
u_char target = INB (nc_sdid) & 0x0f;
tcb_p tp = &np->target[target];
int tmp;
if (DEBUG_FLAGS & DEBUG_TINY) printk ("I#%d", num);
switch (num) {
/*
** See comments in the SCRIPTS code.
*/
#ifdef SCSI_NCR_PCIQ_SYNC_ON_INTR
case SIR_DUMMY_INTERRUPT:
goto out;
#endif
/*
** The C code is currently trying to recover from something.
** Typically, user want to abort some command.
*/
case SIR_SCRIPT_STOPPED:
case SIR_TARGET_SELECTED:
case SIR_ABORT_SENT:
case SIR_AUTO_SENSE_DONE:
ncr_sir_task_recovery(np, num);
return;
/*
** The device didn't go to MSG OUT phase after having
** been selected with ATN. We donnot want to handle
** that.
*/
case SIR_SEL_ATN_NO_MSG_OUT:
printk ("%s:%d: No MSG OUT phase after selection with ATN.n",
ncr_name (np), target);
goto out_stuck;
/*
** The device didn't switch to MSG IN phase after
** having reseleted the initiator.
*/
case SIR_RESEL_NO_MSG_IN:
/*
** After reselection, the device sent a message that wasn't
** an IDENTIFY.
*/
case SIR_RESEL_NO_IDENTIFY:
/*
** If devices reselecting without sending an IDENTIFY
** message still exist, this should help.
** We just assume lun=0, 1 CCB, no tag.
*/
if (tp->l0p) {
OUTL (nc_dsa, scr_to_cpu(tp->l0p->tasktbl[0]));
OUTL_DSP (NCB_SCRIPT_PHYS (np, resel_go));
return;
}
/*
** The device reselected a LUN we donnot know of.
*/
case SIR_RESEL_BAD_LUN:
np->msgout[0] = M_RESET;
goto out;
/*
** The device reselected for an untagged nexus and we
** haven't any.
*/
case SIR_RESEL_BAD_I_T_L:
np->msgout[0] = M_ABORT;
goto out;
/*
** The device reselected for a tagged nexus that we donnot
** have.
*/
case SIR_RESEL_BAD_I_T_L_Q:
np->msgout[0] = M_ABORT_TAG;
goto out;
/*
** The SCRIPTS let us know that the device has grabbed
** our message and will abort the job.
*/
case SIR_RESEL_ABORTED:
np->lastmsg = np->msgout[0];
np->msgout[0] = M_NOOP;
printk ("%s:%d: message %x sent on bad reselection.n",
ncr_name (np), target, np->lastmsg);
goto out;
/*
** The SCRIPTS let us know that a message has been
** successfully sent to the device.
*/
case SIR_MSG_OUT_DONE:
np->lastmsg = np->msgout[0];
np->msgout[0] = M_NOOP;
/* Should we really care of that */
if (np->lastmsg == M_PARITY || np->lastmsg == M_ID_ERROR) {
if (cp) {
cp->xerr_status &= ~XE_PARITY_ERR;
if (!cp->xerr_status)
OUTOFFB (HF_PRT, HF_EXT_ERR);
}
}
goto out;
/*
** The device didn't send a GOOD SCSI status.
** We may have some work to do prior to allow
** the SCRIPTS processor to continue.
*/
case SIR_BAD_STATUS:
if (!cp)
goto out;
ncr_sir_to_redo(np, num, cp);
return;
/*
** We are asked by the SCRIPTS to prepare a
** REJECT message.
*/
case SIR_REJECT_TO_SEND:
ncr_print_msg(cp, "M_REJECT to send for ", np->msgin);
np->msgout[0] = M_REJECT;
goto out;
/*
** We have been ODD at the end of a DATA IN
** transfer and the device didn't send a
** IGNORE WIDE RESIDUE message.
** It is a data overrun condition.
*/
case SIR_SWIDE_OVERRUN:
if (cp) {
OUTONB (HF_PRT, HF_EXT_ERR);
cp->xerr_status |= XE_SWIDE_OVRUN;
}
goto out;
/*
** We have been ODD at the end of a DATA OUT
** transfer.
** It is a data underrun condition.
*/
case SIR_SODL_UNDERRUN:
if (cp) {
OUTONB (HF_PRT, HF_EXT_ERR);
cp->xerr_status |= XE_SODL_UNRUN;
}
goto out;
/*
** The device wants us to tranfer more data than
** expected or in the wrong direction.
** The number of extra bytes is in scratcha.
** It is a data overrun condition.
*/
case SIR_DATA_OVERRUN:
if (cp) {
OUTONB (HF_PRT, HF_EXT_ERR);
cp->xerr_status |= XE_EXTRA_DATA;
cp->extra_bytes += INL (nc_scratcha);
}
goto out;
/*
** The device switched to an illegal phase (4/5).
*/
case SIR_BAD_PHASE:
if (cp) {
OUTONB (HF_PRT, HF_EXT_ERR);
cp->xerr_status |= XE_BAD_PHASE;
}
goto out;
/*
** We received a message.
*/
case SIR_MSG_RECEIVED:
if (!cp)
goto out_stuck;
switch (np->msgin [0]) {
/*
** We received an extended message.
** We handle MODIFY DATA POINTER, SDTR, WDTR
** and reject all other extended messages.
*/
case M_EXTENDED:
switch (np->msgin [2]) {
case M_X_MODIFY_DP:
if (DEBUG_FLAGS & DEBUG_POINTER)
ncr_print_msg(cp,"modify DP",np->msgin);
tmp = (np->msgin[3]<<24) + (np->msgin[4]<<16) +
(np->msgin[5]<<8) + (np->msgin[6]);
ncr_modify_dp(np, tp, cp, tmp);
return;
case M_X_SYNC_REQ:
ncr_sync_nego(np, tp, cp);
return;
case M_X_WIDE_REQ:
ncr_wide_nego(np, tp, cp);
return;
case M_X_PPR_REQ:
ncr_ppr_nego(np, tp, cp);
return;
default:
goto out_reject;
}
break;
/*
** We received a 1/2 byte message not handled from SCRIPTS.
** We are only expecting MESSAGE REJECT and IGNORE WIDE
** RESIDUE messages that haven't been anticipated by
** SCRIPTS on SWIDE full condition. Unanticipated IGNORE
** WIDE RESIDUE messages are aliased as MODIFY DP (-1).
*/
case M_IGN_RESIDUE:
if (DEBUG_FLAGS & DEBUG_POINTER)
ncr_print_msg(cp,"ign wide residue", np->msgin);
ncr_modify_dp(np, tp, cp, -1);
return;
case M_REJECT:
if (INB (HS_PRT) == HS_NEGOTIATE)
ncr_nego_rejected(np, tp, cp);
else {
PRINT_ADDR(cp->cmd);
printk ("M_REJECT received (%x:%x).n",
scr_to_cpu(np->lastmsg), np->msgout[0]);
}
goto out_clrack;
break;
default:
goto out_reject;
}
break;
/*
** We received an unknown message.
** Ignore all MSG IN phases and reject it.
*/
case SIR_MSG_WEIRD:
ncr_print_msg(cp, "WEIRD message received", np->msgin);
OUTL_DSP (NCB_SCRIPTH_PHYS (np, msg_weird));
return;
/*
** Negotiation failed.
** Target does not send us the reply.
** Remove the HS_NEGOTIATE status.
*/
case SIR_NEGO_FAILED:
OUTB (HS_PRT, HS_BUSY);
/*
** Negotiation failed.
** Target does not want answer message.
*/
case SIR_NEGO_PROTO:
ncr_nego_default(np, tp, cp);
goto out;
};
out:
OUTONB_STD ();
return;
out_reject:
OUTL_DSP (NCB_SCRIPTH_PHYS (np, msg_bad));
return;
out_clrack:
OUTL_DSP (NCB_SCRIPT_PHYS (np, clrack));
return;
out_stuck:
return;
}
/*==========================================================
**
**
** Acquire a control block
**
**
**==========================================================
*/
static ccb_p ncr_get_ccb (ncb_p np, u_char tn, u_char ln)
{
tcb_p tp = &np->target[tn];
lcb_p lp = ncr_lp(np, tp, ln);
u_short tag = NO_TAG;
XPT_QUEHEAD *qp;
ccb_p cp = (ccb_p) 0;
/*
** Allocate a new CCB if needed.
*/
if (xpt_que_empty(&np->free_ccbq))
(void) ncr_alloc_ccb(np);
/*
** Look for a free CCB
*/
qp = xpt_remque_head(&np->free_ccbq);
if (!qp)
goto out;
cp = xpt_que_entry(qp, struct ccb, link_ccbq);
/*
** If the LCB is not yet available and we already
** have queued a CCB for a LUN without LCB,
** give up. Otherwise all is fine. :-)
*/
if (!lp) {
if (xpt_que_empty(&np->b0_ccbq))
xpt_insque_head(&cp->link_ccbq, &np->b0_ccbq);
else
goto out_free;
} else {
/*
** Tune tag mode if asked by user.
*/
if (lp->queuedepth != lp->numtags) {
ncr_setup_tags(np, tn, ln);
}
/*
** Get a tag for this nexus if required.
** Keep from using more tags than we can handle.
*/
if (lp->usetags) {
if (lp->busyccbs < lp->maxnxs) {
tag = lp->cb_tags[lp->ia_tag];
++lp->ia_tag;
if (lp->ia_tag == MAX_TAGS)
lp->ia_tag = 0;
cp->tags_si = lp->tags_si;
++lp->tags_sum[cp->tags_si];
}
else
goto out_free;
}
/*
** Put the CCB in the LUN wait queue and
** count it as busy.
*/
xpt_insque_tail(&cp->link_ccbq, &lp->wait_ccbq);
++lp->busyccbs;
}
/*
** Remember all informations needed to free this CCB.
*/
cp->to_abort = 0;
cp->tag = tag;
cp->target = tn;
cp->lun = ln;
if (DEBUG_FLAGS & DEBUG_TAGS) {
PRINT_LUN(np, tn, ln);
printk ("ccb @%p using tag %d.n", cp, tag);
}
out:
return cp;
out_free:
xpt_insque_head(&cp->link_ccbq, &np->free_ccbq);
return (ccb_p) 0;
}
/*==========================================================
**
**
** Release one control block
**
**
**==========================================================
*/
static void ncr_free_ccb (ncb_p np, ccb_p cp)
{
tcb_p tp = &np->target[cp->target];
lcb_p lp = ncr_lp(np, tp, cp->lun);
if (DEBUG_FLAGS & DEBUG_TAGS) {
PRINT_LUN(np, cp->target, cp->lun);
printk ("ccb @%p freeing tag %d.n", cp, cp->tag);
}
/*
** If lun control block available, make available
** the task slot and the tag if any.
** Decrement counters.
*/
if (lp) {
if (cp->tag != NO_TAG) {
lp->cb_tags[lp->if_tag++] = cp->tag;
if (lp->if_tag == MAX_TAGS)
lp->if_tag = 0;
--lp->tags_sum[cp->tags_si];
lp->tasktbl[cp->tag] = cpu_to_scr(np->p_bad_i_t_l_q);
} else {
lp->tasktbl[0] = cpu_to_scr(np->p_bad_i_t_l);
}
--lp->busyccbs;
if (cp->queued) {
--lp->queuedccbs;
}
}
/*
** Make this CCB available.
*/
xpt_remque(&cp->link_ccbq);
xpt_insque_head(&cp->link_ccbq, &np->free_ccbq);
cp -> host_status = HS_IDLE;
cp -> queued = 0;
}
/*------------------------------------------------------------------------
** Allocate a CCB and initialize its fixed part.
**------------------------------------------------------------------------
**------------------------------------------------------------------------
*/
static ccb_p ncr_alloc_ccb(ncb_p np)
{
ccb_p cp = 0;
int hcode;
/*
** Allocate memory for this CCB.
*/
cp = m_calloc_dma(sizeof(struct ccb), "CCB");
if (!cp)
return 0;
/*
** Count it and initialyze it.
*/
np->actccbs++;
/*
** Remember virtual and bus address of this ccb.
*/
cp->p_ccb = vtobus(cp);
/*
** Insert this ccb into the hashed list.
*/
hcode = CCB_HASH_CODE(cp->p_ccb);
cp->link_ccbh = np->ccbh[hcode];
np->ccbh[hcode] = cp;
/*
** Initialyze the start and restart actions.
*/
cp->phys.header.go.start = cpu_to_scr(NCB_SCRIPT_PHYS (np, idle));
cp->phys.header.go.restart = cpu_to_scr(NCB_SCRIPTH_PHYS(np,bad_i_t_l));
/*
** Initilialyze some other fields.
*/
cp->phys.smsg_ext.addr = cpu_to_scr(NCB_PHYS(np, msgin[2]));
/*
** Chain into wakeup list and free ccb queue.
*/
cp->link_ccb = np->ccbc;
np->ccbc = cp;
xpt_insque_head(&cp->link_ccbq, &np->free_ccbq);
return cp;
}
/*------------------------------------------------------------------------
** Look up a CCB from a DSA value.
**------------------------------------------------------------------------
**------------------------------------------------------------------------
*/
static ccb_p ncr_ccb_from_dsa(ncb_p np, u_long dsa)
{
int hcode;
ccb_p cp;
hcode = CCB_HASH_CODE(dsa);
cp = np->ccbh[hcode];
while (cp) {
if (cp->p_ccb == dsa)
break;
cp = cp->link_ccbh;
}
return cp;
}
/*==========================================================
**
**
** Allocation of resources for Targets/Luns/Tags.
**
**
**==========================================================
*/
/*------------------------------------------------------------------------
** Target control block initialisation.
**------------------------------------------------------------------------
** This data structure is fully initialized after a SCSI command
** has been successfully completed for this target.
**------------------------------------------------------------------------
*/
static void ncr_init_tcb (ncb_p np, u_char tn)
{
/*
** Check some alignments required by the chip.
*/
assert (( (offsetof(struct ncr_reg, nc_sxfer) ^
offsetof(struct tcb , sval )) &3) == 0);
assert (( (offsetof(struct ncr_reg, nc_scntl3) ^
offsetof(struct tcb , wval )) &3) == 0);
if ((np->device_id == PCI_DEVICE_ID_LSI_53C1010) ||
(np->device_id == PCI_DEVICE_ID_LSI_53C1010_66)){
assert (( (offsetof(struct ncr_reg, nc_scntl4) ^
offsetof(struct tcb , uval )) &3) == 0);
}
}
/*------------------------------------------------------------------------
** Lun control block allocation and initialization.
**------------------------------------------------------------------------
** This data structure is allocated and initialized after a SCSI
** command has been successfully completed for this target/lun.
**------------------------------------------------------------------------
*/
static lcb_p ncr_alloc_lcb (ncb_p np, u_char tn, u_char ln)
{
tcb_p tp = &np->target[tn];
lcb_p lp = ncr_lp(np, tp, ln);
/*
** Already done, return.
*/
if (lp)
return lp;
/*
** Initialize the target control block if not yet.
*/
ncr_init_tcb(np, tn);
/*
** Allocate the lcb bus address array.
** Compute the bus address of this table.
*/
if (ln && !tp->luntbl) {
int i;
tp->luntbl = m_calloc_dma(256, "LUNTBL");
if (!tp->luntbl)
goto fail;
for (i = 0 ; i < 64 ; i++)
tp->luntbl[i] = cpu_to_scr(NCB_PHYS(np, resel_badlun));
tp->b_luntbl = cpu_to_scr(vtobus(tp->luntbl));
}
/*
** Allocate the table of pointers for LUN(s) > 0, if needed.
*/
if (ln && !tp->lmp) {
tp->lmp = m_calloc(MAX_LUN * sizeof(lcb_p), "LMP");
if (!tp->lmp)
goto fail;
}
/*
** Allocate the lcb.
** Make it available to the chip.
*/
lp = m_calloc_dma(sizeof(struct lcb), "LCB");
if (!lp)
goto fail;
if (ln) {
tp->lmp[ln] = lp;
tp->luntbl[ln] = cpu_to_scr(vtobus(lp));
}
else {
tp->l0p = lp;
tp->b_lun0 = cpu_to_scr(vtobus(lp));
}
/*
** Initialize the CCB queue headers.
*/
xpt_que_init(&lp->busy_ccbq);
xpt_que_init(&lp->wait_ccbq);
/*
** Set max CCBs to 1 and use the default task array
** by default.
*/
lp->maxnxs = 1;
lp->tasktbl = &lp->tasktbl_0;
lp->b_tasktbl = cpu_to_scr(vtobus(lp->tasktbl));
lp->tasktbl[0] = cpu_to_scr(np->p_notask);
lp->resel_task = cpu_to_scr(NCB_SCRIPT_PHYS(np, resel_notag));
/*
** Initialize command queuing control.
*/
lp->busyccbs = 1;
lp->queuedccbs = 1;
lp->queuedepth = 1;
fail:
return lp;
}
/*------------------------------------------------------------------------
** Lun control block setup on INQUIRY data received.
**------------------------------------------------------------------------
** We only support WIDE, SYNC for targets and CMDQ for logical units.
** This setup is done on each INQUIRY since we are expecting user
** will play with CHANGE DEFINITION commands. :-)
**------------------------------------------------------------------------
*/
static lcb_p ncr_setup_lcb (ncb_p np, u_char tn, u_char ln, u_char *inq_data)
{
tcb_p tp = &np->target[tn];
lcb_p lp = ncr_lp(np, tp, ln);
u_char inq_byte7;
int i;
/*
** If no lcb, try to allocate it.
*/
if (!lp && !(lp = ncr_alloc_lcb(np, tn, ln)))
goto fail;
#if 0 /* No more used. Left here as provision */
/*
** Get device quirks.
*/
tp->quirks = 0;
if (tp->quirks && bootverbose) {
PRINT_LUN(np, tn, ln);
printk ("quirks=%x.n", tp->quirks);
}
#endif
/*
** Evaluate trustable target/unit capabilities.
** We only believe device version >= SCSI-2 that
** use appropriate response data format (2).
** But it seems that some CCS devices also
** support SYNC and I donnot want to frustrate
** anybody. ;-)
*/
inq_byte7 = 0;
if ((inq_data[2] & 0x7) >= 2 && (inq_data[3] & 0xf) == 2)
inq_byte7 = inq_data[7];
else if ((inq_data[2] & 0x7) == 1 && (inq_data[3] & 0xf) == 1)
inq_byte7 = INQ7_SYNC;
/*
** Throw away announced LUN capabilities if we are told
** that there is no real device supported by the logical unit.
*/
if ((inq_data[0] & 0xe0) > 0x20 || (inq_data[0] & 0x1f) == 0x1f)
inq_byte7 &= (INQ7_SYNC | INQ7_WIDE16);
/*
** If user is wanting SYNC, force this feature.
*/
if (driver_setup.force_sync_nego)
inq_byte7 |= INQ7_SYNC;
/*
** Prepare negotiation if SIP capabilities have changed.
*/
tp->inq_done = 1;
if ((inq_byte7 ^ tp->inq_byte7) & (INQ7_SYNC | INQ7_WIDE16)) {
tp->inq_byte7 = inq_byte7;
ncr_negotiate(np, tp);
}
/*
** If unit supports tagged commands, allocate and
** initialyze the task table if not yet.
*/
if ((inq_byte7 & INQ7_QUEUE) && lp->tasktbl == &lp->tasktbl_0) {
lp->tasktbl = m_calloc_dma(MAX_TASKS*4, "TASKTBL");
if (!lp->tasktbl) {
lp->tasktbl = &lp->tasktbl_0;
goto fail;
}
lp->b_tasktbl = cpu_to_scr(vtobus(lp->tasktbl));
for (i = 0 ; i < MAX_TASKS ; i++)
lp->tasktbl[i] = cpu_to_scr(np->p_notask);
lp->cb_tags = m_calloc(MAX_TAGS, "CB_TAGS");
if (!lp->cb_tags)
goto fail;
for (i = 0 ; i < MAX_TAGS ; i++)
lp->cb_tags[i] = i;
lp->maxnxs = MAX_TAGS;
lp->tags_stime = ktime_get(3*HZ);
}
/*
** Adjust tagged queueing status if needed.
*/
if ((inq_byte7 ^ lp->inq_byte7) & INQ7_QUEUE) {
lp->inq_byte7 = inq_byte7;
lp->numtags = lp->maxtags;
ncr_setup_tags (np, tn, ln);
}
fail:
return lp;
}
/*==========================================================
**
**
** Build Scatter Gather Block
**
**
**==========================================================
**
** The transfer area may be scattered among
** several non adjacent physical pages.
**
** We may use MAX_SCATTER blocks.
**
**----------------------------------------------------------
*/
/*
** We try to reduce the number of interrupts caused
** by unexpected phase changes due to disconnects.
** A typical harddisk may disconnect before ANY block.
** If we wanted to avoid unexpected phase changes at all
** we had to use a break point every 512 bytes.
** Of course the number of scatter/gather blocks is
** limited.
** Under Linux, the scatter/gatter blocks are provided by
** the generic driver. We just have to copy addresses and
** sizes to the data segment array.
*/
/*
** For 64 bit systems, we use the 8 upper bits of the size field
** to provide bus address bits 32-39 to the SCRIPTS processor.
** This allows the 895A and 896 to address up to 1 TB of memory.
** For 32 bit chips on 64 bit systems, we must be provided with
** memory addresses that fit into the first 32 bit bus address
** range and so, this does not matter and we expect an error from
** the chip if this ever happen.
**
** We use a separate function for the case Linux does not provide
** a scatter list in order to allow better code optimization
** for the case we have a scatter list (BTW, for now this just wastes
** about 40 bytes of code for x86, but my guess is that the scatter
** code will get more complex later).
*/
#define SCATTER_ONE(data, badd, len)
(data)->addr = cpu_to_scr(badd);
(data)->size = cpu_to_scr((((badd) >> 8) & 0xff000000) + len);
#define CROSS_16MB(p, n) (((((u_long) p) + n - 1) ^ ((u_long) p)) & ~0xffffff)
static int ncr_scatter_no_sglist(ncb_p np, ccb_p cp, Scsi_Cmnd *cmd)
{
struct scr_tblmove *data = &cp->phys.data[MAX_SCATTER-1];
int segment;
cp->data_len = cmd->request_bufflen;
if (cmd->request_bufflen) {
dma_addr_t baddr = map_scsi_single_data(np, cmd);
SCATTER_ONE(data, baddr, cmd->request_bufflen);
if (CROSS_16MB(baddr, cmd->request_bufflen)) {
cp->host_flags |= HF_PM_TO_C;
#ifdef DEBUG_896R1
printk("He! we are crossing a 16 MB boundary (0x%lx, 0x%x)n",
baddr, cmd->request_bufflen);
#endif
}
segment = 1;
}
else
segment = 0;
return segment;
}
/*
** DEL 472 - 53C896 Rev 1 - Part Number 609-0393055 - ITEM 5.
**
** We disable data phase mismatch handling from SCRIPTS for data
** transfers that contains scatter/gather entries that cross
** a 16 MB boundary.
** We use a different scatter function for 896 rev. 1 that needs
** such a work-around. Doing so, we do not affect performance for
** other chips.
** This problem should not be triggered for disk IOs under Linux,
** since such IOs are performed using pages and buffers that are
** nicely power-of-two sized and aligned. But, since this may change
** at any time, a work-around was required.
*/
static int ncr_scatter_896R1(ncb_p np, ccb_p cp, Scsi_Cmnd *cmd)
{
int segn;
int use_sg = (int) cmd->use_sg;
cp->data_len = 0;
if (!use_sg)
segn = ncr_scatter_no_sglist(np, cp, cmd);
else if (use_sg > MAX_SCATTER)
segn = -1;
else {
struct scatterlist *scatter = (struct scatterlist *)cmd->buffer;
struct scr_tblmove *data;
use_sg = map_scsi_sg_data(np, cmd);
data = &cp->phys.data[MAX_SCATTER - use_sg];
for (segn = 0; segn < use_sg; segn++) {
dma_addr_t baddr = scsi_sg_dma_address(&scatter[segn]);
unsigned int len = scsi_sg_dma_len(&scatter[segn]);
SCATTER_ONE(&data[segn],
baddr,
len);
if (CROSS_16MB(baddr, scatter[segn].length)) {
cp->host_flags |= HF_PM_TO_C;
#ifdef DEBUG_896R1
printk("He! we are crossing a 16 MB boundary (0x%lx, 0x%x)n",
baddr, scatter[segn].length);
#endif
}
cp->data_len += len;
}
}
return segn;
}
static int ncr_scatter(ncb_p np, ccb_p cp, Scsi_Cmnd *cmd)
{
int segment;
int use_sg = (int) cmd->use_sg;
cp->data_len = 0;
if (!use_sg)
segment = ncr_scatter_no_sglist(np, cp, cmd);
else if (use_sg > MAX_SCATTER)
segment = -1;
else {
struct scatterlist *scatter = (struct scatterlist *)cmd->buffer;
struct scr_tblmove *data;
use_sg = map_scsi_sg_data(np, cmd);
data = &cp->phys.data[MAX_SCATTER - use_sg];
for (segment = 0; segment < use_sg; segment++) {
dma_addr_t baddr = scsi_sg_dma_address(&scatter[segment]);
unsigned int len = scsi_sg_dma_len(&scatter[segment]);
SCATTER_ONE(&data[segment],
baddr,
len);
cp->data_len += len;
}
}
return segment;
}
/*==========================================================
**
**
** Test the pci bus snoop logic :-(
**
** Has to be called with interrupts disabled.
**
**
**==========================================================
*/
#ifndef SCSI_NCR_IOMAPPED
static int __init ncr_regtest (struct ncb* np)
{
register volatile u_int32 data;
/*
** ncr registers may NOT be cached.
** write 0xffffffff to a read only register area,
** and try to read it back.
*/
data = 0xffffffff;
OUTL_OFF(offsetof(struct ncr_reg, nc_dstat), data);
data = INL_OFF(offsetof(struct ncr_reg, nc_dstat));
#if 1
if (data == 0xffffffff) {
#else
if ((data & 0xe2f0fffd) != 0x02000080) {
#endif
printk ("CACHE TEST FAILED: reg dstat-sstat2 readback %x.n",
(unsigned) data);
return (0x10);
};
return (0);
}
#endif
static int __init ncr_snooptest (struct ncb* np)
{
u_int32 ncr_rd, ncr_wr, ncr_bk, host_rd, host_wr, pc;
u_char dstat;
int i, err=0;
#ifndef SCSI_NCR_IOMAPPED
if (np->reg) {
err |= ncr_regtest (np);
if (err) return (err);
}
#endif
restart_test:
/*
** Enable Master Parity Checking as we intend
** to enable it for normal operations.
*/
OUTB (nc_ctest4, (np->rv_ctest4 & MPEE));
/*
** init
*/
pc = NCB_SCRIPTH0_PHYS (np, snooptest);
host_wr = 1;
ncr_wr = 2;
/*
** Set memory and register.
*/
np->ncr_cache = cpu_to_scr(host_wr);
OUTL (nc_temp, ncr_wr);
/*
** Start script (exchange values)
*/
OUTL (nc_dsa, np->p_ncb);
OUTL_DSP (pc);
/*
** Wait 'til done (with timeout)
*/
for (i=0; i<NCR_SNOOP_TIMEOUT; i++)
if (INB(nc_istat) & (INTF|SIP|DIP))
break;
if (i>=NCR_SNOOP_TIMEOUT) {
printk ("CACHE TEST FAILED: timeout.n");
return (0x20);
};
/*
** Check for fatal DMA errors.
*/
dstat = INB (nc_dstat);
#if 1 /* Band aiding for broken hardwares that fail PCI parity */
if ((dstat & MDPE) && (np->rv_ctest4 & MPEE)) {
printk ("%s: PCI DATA PARITY ERROR DETECTED - "
"DISABLING MASTER DATA PARITY CHECKING.n",
ncr_name(np));
np->rv_ctest4 &= ~MPEE;
goto restart_test;
}
#endif
if (dstat & (MDPE|BF|IID)) {
printk ("CACHE TEST FAILED: DMA error (dstat=0x%02x).", dstat);
return (0x80);
}
/*
** Save termination position.
*/
pc = INL (nc_dsp);
/*
** Read memory and register.
*/
host_rd = scr_to_cpu(np->ncr_cache);
ncr_rd = INL (nc_scratcha);
ncr_bk = INL (nc_temp);
/*
** Check termination position.
*/
if (pc != NCB_SCRIPTH0_PHYS (np, snoopend)+8) {
printk ("CACHE TEST FAILED: script execution failed.n");
printk ("start=%08lx, pc=%08lx, end=%08lxn",
(u_long) NCB_SCRIPTH0_PHYS (np, snooptest), (u_long) pc,
(u_long) NCB_SCRIPTH0_PHYS (np, snoopend) +8);
return (0x40);
};
/*
** Show results.
*/
if (host_wr != ncr_rd) {
printk ("CACHE TEST FAILED: host wrote %d, ncr read %d.n",
(int) host_wr, (int) ncr_rd);
err |= 1;
};
if (host_rd != ncr_wr) {
printk ("CACHE TEST FAILED: ncr wrote %d, host read %d.n",
(int) ncr_wr, (int) host_rd);
err |= 2;
};
if (ncr_bk != ncr_wr) {
printk ("CACHE TEST FAILED: ncr wrote %d, read back %d.n",
(int) ncr_wr, (int) ncr_bk);
err |= 4;
};
return (err);
}
/*==========================================================
**
** Determine the ncr's clock frequency.
** This is essential for the negotiation
** of the synchronous transfer rate.
**
**==========================================================
**
** Note: we have to return the correct value.
** THERE IS NO SAFE DEFAULT VALUE.
**
** Most NCR/SYMBIOS boards are delivered with a 40 Mhz clock.
** 53C860 and 53C875 rev. 1 support fast20 transfers but
** do not have a clock doubler and so are provided with a
** 80 MHz clock. All other fast20 boards incorporate a doubler
** and so should be delivered with a 40 MHz clock.
** The recent fast40 chips (895/896/895A) and the
** fast80 chip (C1010) use a 40 Mhz base clock
** and provide a clock quadrupler (160 Mhz). The code below
** tries to deal as cleverly as possible with all this stuff.
**
**----------------------------------------------------------
*/
/*
* Select NCR SCSI clock frequency
*/
static void ncr_selectclock(ncb_p np, u_char scntl3)
{
if (np->multiplier < 2) {
OUTB(nc_scntl3, scntl3);
return;
}
if (bootverbose >= 2)
printk ("%s: enabling clock multipliern", ncr_name(np));
OUTB(nc_stest1, DBLEN); /* Enable clock multiplier */
if ( (np->device_id != PCI_DEVICE_ID_LSI_53C1010) &&
(np->device_id != PCI_DEVICE_ID_LSI_53C1010_66) &&
(np->multiplier > 2)) {
int i = 20; /* Poll bit 5 of stest4 for quadrupler */
while (!(INB(nc_stest4) & LCKFRQ) && --i > 0)
UDELAY (20);
if (!i)
printk("%s: the chip cannot lock the frequencyn",
ncr_name(np));
} else /* Wait 120 micro-seconds for multiplier*/
UDELAY (120);
OUTB(nc_stest3, HSC); /* Halt the scsi clock */
OUTB(nc_scntl3, scntl3);
OUTB(nc_stest1, (DBLEN|DBLSEL));/* Select clock multiplier */
OUTB(nc_stest3, 0x00); /* Restart scsi clock */
}
/*
* calculate NCR SCSI clock frequency (in KHz)
*/
static unsigned __init ncrgetfreq (ncb_p np, int gen)
{
unsigned int ms = 0;
unsigned int f;
int count;
/*
* Measure GEN timer delay in order
* to calculate SCSI clock frequency
*
* This code will never execute too
* many loop iterations (if DELAY is
* reasonably correct). It could get
* too low a delay (too high a freq.)
* if the CPU is slow executing the
* loop for some reason (an NMI, for
* example). For this reason we will
* if multiple measurements are to be
* performed trust the higher delay
* (lower frequency returned).
*/
OUTW (nc_sien , 0x0);/* mask all scsi interrupts */
/* enable general purpose timer */
(void) INW (nc_sist); /* clear pending scsi interrupt */
OUTB (nc_dien , 0); /* mask all dma interrupts */
(void) INW (nc_sist); /* another one, just to be sure :) */
OUTB (nc_scntl3, 4); /* set pre-scaler to divide by 3 */
OUTB (nc_stime1, 0); /* disable general purpose timer */
OUTB (nc_stime1, gen); /* set to nominal delay of 1<<gen * 125us */
/* Temporary fix for udelay issue with Alpha
platform */
while (!(INW(nc_sist) & GEN) && ms++ < 100000) {
/* count 1ms */
for (count = 0; count < 10; count++)
UDELAY (100);
}
OUTB (nc_stime1, 0); /* disable general purpose timer */
/*
* set prescaler to divide by whatever 0 means
* 0 ought to choose divide by 2, but appears
* to set divide by 3.5 mode in my 53c810 ...
*/
OUTB (nc_scntl3, 0);
/*
* adjust for prescaler, and convert into KHz
* scale values derived empirically.
*/
f = ms ? ((1 << gen) * 4340) / ms : 0;
if (bootverbose >= 2)
printk ("%s: Delay (GEN=%d): %u msec, %u KHzn",
ncr_name(np), gen, ms, f);
return f;
}
static unsigned __init ncr_getfreq (ncb_p np)
{
u_int f1, f2;
int gen = 11;
(void) ncrgetfreq (np, gen); /* throw away first result */
f1 = ncrgetfreq (np, gen);
f2 = ncrgetfreq (np, gen);
if (f1 > f2) f1 = f2; /* trust lower result */
return f1;
}
/*
* Get/probe NCR SCSI clock frequency
*/
static void __init ncr_getclock (ncb_p np, int mult)
{
unsigned char scntl3 = np->sv_scntl3;
unsigned char stest1 = np->sv_stest1;
unsigned f1;
np->multiplier = 1;
f1 = 40000;
/*
** True with 875/895/896/895A with clock multiplier selected
*/
if (mult > 1 && (stest1 & (DBLEN+DBLSEL)) == DBLEN+DBLSEL) {
if (bootverbose >= 2)
printk ("%s: clock multiplier foundn", ncr_name(np));
np->multiplier = mult;
}
/*
** If multiplier not found or scntl3 not 7,5,3,
** reset chip and get frequency from general purpose timer.
** Otherwise trust scntl3 BIOS setting.
*/
if (np->multiplier != mult || (scntl3 & 7) < 3 || !(scntl3 & 1)) {
OUTB (nc_stest1, 0); /* make sure doubler is OFF */
f1 = ncr_getfreq (np);
if (bootverbose)
printk ("%s: NCR clock is %uKHzn", ncr_name(np), f1);
if (f1 < 55000) f1 = 40000;
else f1 = 80000;
/*
** Suggest to also check the PCI clock frequency
** to make sure our frequency calculation algorithm
** is not too biased.
*/
if (np->features & FE_66MHZ) {
np->pciclock_min = (66000*55+80-1)/80;
np->pciclock_max = (66000*55)/40;
}
else {
np->pciclock_min = (33000*55+80-1)/80;
np->pciclock_max = (33000*55)/40;
}
if (f1 == 40000 && mult > 1) {
if (bootverbose >= 2)
printk ("%s: clock multiplier assumedn", ncr_name(np));
np->multiplier = mult;
}
} else {
if ((scntl3 & 7) == 3) f1 = 40000;
else if ((scntl3 & 7) == 5) f1 = 80000;
else f1 = 160000;
f1 /= np->multiplier;
}
/*
** Compute controller synchronous parameters.
*/
f1 *= np->multiplier;
np->clock_khz = f1;
}
/*
* Get/probe PCI clock frequency
*/
static u_int __init ncr_getpciclock (ncb_p np)
{
static u_int f;
OUTB (nc_stest1, SCLK); /* Use the PCI clock as SCSI clock */
f = ncr_getfreq (np);
OUTB (nc_stest1, 0);
return f;
}
/*===================== LINUX ENTRY POINTS SECTION ==========================*/
#ifndef uchar
#define uchar unsigned char
#endif
#ifndef ushort
#define ushort unsigned short
#endif
#ifndef ulong
#define ulong unsigned long
#endif
/* ---------------------------------------------------------------------
**
** Driver setup from the boot command line
**
** ---------------------------------------------------------------------
*/
#ifdef MODULE
#define ARG_SEP ' '
#else
#define ARG_SEP ','
#endif
#define OPT_TAGS 1
#define OPT_MASTER_PARITY 2
#define OPT_SCSI_PARITY 3
#define OPT_DISCONNECTION 4
#define OPT_SPECIAL_FEATURES 5
#define OPT_RESERVED_1 6
#define OPT_FORCE_SYNC_NEGO 7
#define OPT_REVERSE_PROBE 8
#define OPT_DEFAULT_SYNC 9
#define OPT_VERBOSE 10
#define OPT_DEBUG 11
#define OPT_BURST_MAX 12
#define OPT_LED_PIN 13
#define OPT_MAX_WIDE 14
#define OPT_SETTLE_DELAY 15
#define OPT_DIFF_SUPPORT 16
#define OPT_IRQM 17
#define OPT_PCI_FIX_UP 18
#define OPT_BUS_CHECK 19
#define OPT_OPTIMIZE 20
#define OPT_RECOVERY 21
#define OPT_SAFE_SETUP 22
#define OPT_USE_NVRAM 23
#define OPT_EXCLUDE 24
#define OPT_HOST_ID 25
#ifdef SCSI_NCR_IARB_SUPPORT
#define OPT_IARB 26
#endif
static char setup_token[] __initdata =
"tags:" "mpar:"
"spar:" "disc:"
"specf:" "_rsvd1:"
"fsn:" "revprob:"
"sync:" "verb:"
"debug:" "burst:"
"led:" "wide:"
"settle:" "diff:"
"irqm:" "pcifix:"
"buschk:" "optim:"
"recovery:"
"safe:" "nvram:"
"excl:" "hostid:"
#ifdef SCSI_NCR_IARB_SUPPORT
"iarb:"
#endif
; /* DONNOT REMOVE THIS ';' */
#ifdef MODULE
#define ARG_SEP ' '
#else
#define ARG_SEP ','
#endif
static int __init get_setup_token(char *p)
{
char *cur = setup_token;
char *pc;
int i = 0;
while (cur != NULL && (pc = strchr(cur, ':')) != NULL) {
++pc;
++i;
if (!strncmp(p, cur, pc - cur))
return i;
cur = pc;
}
return 0;
}
int __init sym53c8xx_setup(char *str)
{
#ifdef SCSI_NCR_BOOT_COMMAND_LINE_SUPPORT
char *cur = str;
char *pc, *pv;
unsigned long val;
int i, c;
int xi = 0;
while (cur != NULL && (pc = strchr(cur, ':')) != NULL) {
char *pe;
val = 0;
pv = pc;
c = *++pv;
if (c == 'n')
val = 0;
else if (c == 'y')
val = 1;
else
val = (int) simple_strtoul(pv, &pe, 0);
switch (get_setup_token(cur)) {
case OPT_TAGS:
driver_setup.default_tags = val;
if (pe && *pe == '/') {
i = 0;
while (*pe && *pe != ARG_SEP &&
i < sizeof(driver_setup.tag_ctrl)-1) {
driver_setup.tag_ctrl[i++] = *pe++;
}
driver_setup.tag_ctrl[i] = '';
}
break;
case OPT_MASTER_PARITY:
driver_setup.master_parity = val;
break;
case OPT_SCSI_PARITY:
driver_setup.scsi_parity = val;
break;
case OPT_DISCONNECTION:
driver_setup.disconnection = val;
break;
case OPT_SPECIAL_FEATURES:
driver_setup.special_features = val;
break;
case OPT_FORCE_SYNC_NEGO:
driver_setup.force_sync_nego = val;
break;
case OPT_REVERSE_PROBE:
driver_setup.reverse_probe = val;
break;
case OPT_DEFAULT_SYNC:
driver_setup.default_sync = val;
break;
case OPT_VERBOSE:
driver_setup.verbose = val;
break;
case OPT_DEBUG:
driver_setup.debug = val;
break;
case OPT_BURST_MAX:
driver_setup.burst_max = val;
break;
case OPT_LED_PIN:
driver_setup.led_pin = val;
break;
case OPT_MAX_WIDE:
driver_setup.max_wide = val? 1:0;
break;
case OPT_SETTLE_DELAY:
driver_setup.settle_delay = val;
break;
case OPT_DIFF_SUPPORT:
driver_setup.diff_support = val;
break;
case OPT_IRQM:
driver_setup.irqm = val;
break;
case OPT_PCI_FIX_UP:
driver_setup.pci_fix_up = val;
break;
case OPT_BUS_CHECK:
driver_setup.bus_check = val;
break;
case OPT_OPTIMIZE:
driver_setup.optimize = val;
break;
case OPT_RECOVERY:
driver_setup.recovery = val;
break;
case OPT_USE_NVRAM:
driver_setup.use_nvram = val;
break;
case OPT_SAFE_SETUP:
memcpy(&driver_setup, &driver_safe_setup,
sizeof(driver_setup));
break;
case OPT_EXCLUDE:
if (xi < SCSI_NCR_MAX_EXCLUDES)
driver_setup.excludes[xi++] = val;
break;
case OPT_HOST_ID:
driver_setup.host_id = val;
break;
#ifdef SCSI_NCR_IARB_SUPPORT
case OPT_IARB:
driver_setup.iarb = val;
break;
#endif
default:
printk("sym53c8xx_setup: unexpected boot option '%.*s' ignoredn", (int)(pc-cur+1), cur);
break;
}
if ((cur = strchr(cur, ARG_SEP)) != NULL)
++cur;
}
#endif /* SCSI_NCR_BOOT_COMMAND_LINE_SUPPORT */
return 1;
}
#if LINUX_VERSION_CODE >= LinuxVersionCode(2,3,13)
#ifndef MODULE
__setup("sym53c8xx=", sym53c8xx_setup);
#endif
#endif
static int
sym53c8xx_pci_init(Scsi_Host_Template *tpnt, pcidev_t pdev, ncr_device *device);
/*
** Linux entry point for SYM53C8XX devices detection routine.
**
** Called by the middle-level scsi drivers at initialization time,
** or at module installation.
**
** Read the PCI configuration and try to attach each
** detected NCR board.
**
** If NVRAM is present, try to attach boards according to
** the used defined boot order.
**
** Returns the number of boards successfully attached.
*/
static void __init ncr_print_driver_setup(void)
{
#define YesNo(y) y ? 'y' : 'n'
printk (NAME53C8XX ": setup=disc:%c,specf:%d,tags:%d,sync:%d,"
"burst:%d,wide:%c,diff:%d,revprob:%c,buschk:0x%xn",
YesNo(driver_setup.disconnection),
driver_setup.special_features,
driver_setup.default_tags,
driver_setup.default_sync,
driver_setup.burst_max,
YesNo(driver_setup.max_wide),
driver_setup.diff_support,
YesNo(driver_setup.reverse_probe),
driver_setup.bus_check);
printk (NAME53C8XX ": setup=mpar:%c,spar:%c,fsn=%c,verb:%d,debug:0x%x,"
"led:%c,settle:%d,irqm:0x%x,nvram:0x%x,pcifix:0x%xn",
YesNo(driver_setup.master_parity),
YesNo(driver_setup.scsi_parity),
YesNo(driver_setup.force_sync_nego),
driver_setup.verbose,
driver_setup.debug,
YesNo(driver_setup.led_pin),
driver_setup.settle_delay,
driver_setup.irqm,
driver_setup.use_nvram,
driver_setup.pci_fix_up);
#undef YesNo
}
/*===================================================================
** SYM53C8XX devices description table and chip ids list.
**===================================================================
*/
static ncr_chip ncr_chip_table[] __initdata = SCSI_NCR_CHIP_TABLE;
static ushort ncr_chip_ids[] __initdata = SCSI_NCR_CHIP_IDS;
#ifdef SCSI_NCR_PQS_PDS_SUPPORT
/*===================================================================
** Detect all NCR PQS/PDS boards and keep track of their bus nr.
**
** The NCR PQS or PDS card is constructed as a DEC bridge
** behind which sit a proprietary NCR memory controller and
** four or two 53c875s as separate devices. In its usual mode
** of operation, the 875s are slaved to the memory controller
** for all transfers. We can tell if an 875 is part of a
** PQS/PDS or not since if it is, it will be on the same bus
** as the memory controller. To operate with the Linux
** driver, the memory controller is disabled and the 875s
** freed to function independently. The only wrinkle is that
** the preset SCSI ID (which may be zero) must be read in from
** a special configuration space register of the 875
**===================================================================
*/
#define SCSI_NCR_MAX_PQS_BUS 16
static int pqs_bus[SCSI_NCR_MAX_PQS_BUS] __initdata = { 0 };
static void __init ncr_detect_pqs_pds(void)
{
short index;
pcidev_t dev = PCIDEV_NULL;
for(index=0; index < SCSI_NCR_MAX_PQS_BUS; index++) {
u_char tmp;
dev = pci_find_device(0x101a, 0x0009, dev);
if (dev == PCIDEV_NULL) {
pqs_bus[index] = -1;
break;
}
printk(KERN_INFO NAME53C8XX ": NCR PQS/PDS memory controller detected on bus %dn", PciBusNumber(dev));
pci_read_config_byte(dev, 0x44, &tmp);
/* bit 1: allow individual 875 configuration */
tmp |= 0x2;
pci_write_config_byte(dev, 0x44, tmp);
pci_read_config_byte(dev, 0x45, &tmp);
/* bit 2: drive individual 875 interrupts to the bus */
tmp |= 0x4;
pci_write_config_byte(dev, 0x45, tmp);
pqs_bus[index] = PciBusNumber(dev);
}
}
#endif /* SCSI_NCR_PQS_PDS_SUPPORT */
/*===================================================================
** Detect all 53c8xx hosts and then attach them.
**
** If we are using NVRAM, once all hosts are detected, we need to
** check any NVRAM for boot order in case detect and boot order
** differ and attach them using the order in the NVRAM.
**
** If no NVRAM is found or data appears invalid attach boards in
** the the order they are detected.
**===================================================================
*/
int __init sym53c8xx_detect(Scsi_Host_Template *tpnt)
{
pcidev_t pcidev;
int i, j, chips, hosts, count;
int attach_count = 0;
ncr_device *devtbl, *devp;
#ifdef SCSI_NCR_NVRAM_SUPPORT
ncr_nvram nvram0, nvram, *nvp;
#endif
/*
** PCI is required.
*/
if (!pci_present())
return 0;
/*
** Initialize driver general stuff.
*/
#ifdef SCSI_NCR_PROC_INFO_SUPPORT
#if LINUX_VERSION_CODE < LinuxVersionCode(2,3,27)
tpnt->proc_dir = &proc_scsi_sym53c8xx;
#else
tpnt->proc_name = NAME53C8XX;
#endif
tpnt->proc_info = sym53c8xx_proc_info;
#endif
#if defined(SCSI_NCR_BOOT_COMMAND_LINE_SUPPORT) && defined(MODULE)
if (sym53c8xx)
sym53c8xx_setup(sym53c8xx);
#endif
#ifdef SCSI_NCR_DEBUG_INFO_SUPPORT
ncr_debug = driver_setup.debug;
#endif
if (initverbose >= 2)
ncr_print_driver_setup();
/*
** Allocate the device table since we donnot want to
** overflow the kernel stack.
** 1 x 4K PAGE is enough for more than 40 devices for i386.
*/
devtbl = m_calloc(PAGE_SIZE, "devtbl");
if (!devtbl)
return 0;
/*
** Detect all NCR PQS/PDS memory controllers.
*/
#ifdef SCSI_NCR_PQS_PDS_SUPPORT
ncr_detect_pqs_pds();
#endif
/*
** Detect all 53c8xx hosts.
** Save the first Symbios NVRAM content if any
** for the boot order.
*/
chips = sizeof(ncr_chip_ids) / sizeof(ncr_chip_ids[0]);
hosts = PAGE_SIZE / sizeof(*devtbl);
#ifdef SCSI_NCR_NVRAM_SUPPORT
nvp = (driver_setup.use_nvram & 0x1) ? &nvram0 : 0;
#endif
j = 0;
count = 0;
pcidev = PCIDEV_NULL;
while (1) {
char *msg = "";
if (count >= hosts)
break;
if (j >= chips)
break;
i = driver_setup.reverse_probe ? chips - 1 - j : j;
pcidev = pci_find_device(PCI_VENDOR_ID_NCR, ncr_chip_ids[i],
pcidev);
if (pcidev == PCIDEV_NULL) {
++j;
continue;
}
if (pci_enable_device(pcidev)) /* @!*!$&*!%-*#;! */
continue;
/* Some HW as the HP LH4 may report twice PCI devices */
for (i = 0; i < count ; i++) {
if (devtbl[i].slot.bus == PciBusNumber(pcidev) &&
devtbl[i].slot.device_fn == PciDeviceFn(pcidev))
break;
}
if (i != count) /* Ignore this device if we already have it */
continue;
devp = &devtbl[count];
devp->host_id = driver_setup.host_id;
devp->attach_done = 0;
if (sym53c8xx_pci_init(tpnt, pcidev, devp)) {
continue;
}
++count;
#ifdef SCSI_NCR_NVRAM_SUPPORT
if (nvp) {
ncr_get_nvram(devp, nvp);
switch(nvp->type) {
case SCSI_NCR_SYMBIOS_NVRAM:
/*
* Switch to the other nvram buffer, so that
* nvram0 will contain the first Symbios
* format NVRAM content with boot order.
*/
nvp = &nvram;
msg = "with Symbios NVRAM";
break;
case SCSI_NCR_TEKRAM_NVRAM:
msg = "with Tekram NVRAM";
break;
}
}
#endif
#ifdef SCSI_NCR_PQS_PDS_SUPPORT
if (devp->pqs_pds)
msg = "(NCR PQS/PDS)";
#endif
printk(KERN_INFO NAME53C8XX ": 53c%s detected %sn",
devp->chip.name, msg);
}
/*
** If we have found a SYMBIOS NVRAM, use first the NVRAM boot
** sequence as device boot order.
** check devices in the boot record against devices detected.
** attach devices if we find a match. boot table records that
** do not match any detected devices will be ignored.
** devices that do not match any boot table will not be attached
** here but will attempt to be attached during the device table
** rescan.
*/
#ifdef SCSI_NCR_NVRAM_SUPPORT
if (!nvp || nvram0.type != SCSI_NCR_SYMBIOS_NVRAM)
goto next;
for (i = 0; i < 4; i++) {
Symbios_host *h = &nvram0.data.Symbios.host[i];
for (j = 0 ; j < count ; j++) {
devp = &devtbl[j];
if (h->device_fn != devp->slot.device_fn ||
h->bus_nr != devp->slot.bus ||
h->device_id != devp->chip.device_id)
continue;
if (devp->attach_done)
continue;
if (h->flags & SYMBIOS_INIT_SCAN_AT_BOOT) {
ncr_get_nvram(devp, nvp);
if (!ncr_attach (tpnt, attach_count, devp))
attach_count++;
}
else if (!(driver_setup.use_nvram & 0x80))
printk(KERN_INFO NAME53C8XX
": 53c%s state OFF thus not attachedn",
devp->chip.name);
else
continue;
devp->attach_done = 1;
break;
}
}
next:
#endif
/*
** Rescan device list to make sure all boards attached.
** Devices without boot records will not be attached yet
** so try to attach them here.
*/
for (i= 0; i < count; i++) {
devp = &devtbl[i];
if (!devp->attach_done) {
#ifdef SCSI_NCR_NVRAM_SUPPORT
ncr_get_nvram(devp, nvp);
#endif
if (!ncr_attach (tpnt, attach_count, devp))
attach_count++;
}
}
m_free(devtbl, PAGE_SIZE, "devtbl");
return attach_count;
}
/*===================================================================
** Read and check the PCI configuration for any detected NCR
** boards and save data for attaching after all boards have
** been detected.
**===================================================================
*/
static int __init
sym53c8xx_pci_init(Scsi_Host_Template *tpnt, pcidev_t pdev, ncr_device *device)
{
u_short vendor_id, device_id, command, status_reg;
u_char cache_line_size, latency_timer;
u_char suggested_cache_line_size = 0;
u_char pci_fix_up = driver_setup.pci_fix_up;
u_char revision;
u_int irq;
u_long base, base_c, base_2, base_2_c, io_port;
int i;
ncr_chip *chip;
printk(KERN_INFO NAME53C8XX ": at PCI bus %d, device %d, function %dn",
PciBusNumber(pdev),
(int) (PciDeviceFn(pdev) & 0xf8) >> 3,
(int) (PciDeviceFn(pdev) & 7));
/*
** Read info from the PCI config space.
** pci_read_config_xxx() functions are assumed to be used for
** successfully detected PCI devices.
*/
vendor_id = PciVendorId(pdev);
device_id = PciDeviceId(pdev);
irq = PciIrqLine(pdev);
i = pci_get_base_address(pdev, 0, &io_port);
io_port = pci_get_base_cookie(pdev, 0);
base_c = pci_get_base_cookie(pdev, i);
i = pci_get_base_address(pdev, i, &base);
base_2_c = pci_get_base_cookie(pdev, i);
(void) pci_get_base_address(pdev, i, &base_2);
pci_read_config_word(pdev, PCI_COMMAND, &command);
pci_read_config_byte(pdev, PCI_CLASS_REVISION, &revision);
pci_read_config_byte(pdev, PCI_CACHE_LINE_SIZE, &cache_line_size);
pci_read_config_byte(pdev, PCI_LATENCY_TIMER, &latency_timer);
pci_read_config_word(pdev, PCI_STATUS, &status_reg);
#ifdef SCSI_NCR_PQS_PDS_SUPPORT
/*
** Match the BUS number for PQS/PDS devices.
** Read the SCSI ID from a special register mapped
** into the configuration space of the individual
** 875s. This register is set up by the PQS bios
*/
for(i = 0; i < SCSI_NCR_MAX_PQS_BUS && pqs_bus[i] != -1; i++) {
u_char tmp;
if (pqs_bus[i] == PciBusNumber(pdev)) {
pci_read_config_byte(pdev, 0x84, &tmp);
device->pqs_pds = 1;
device->host_id = tmp;
break;
}
}
#endif /* SCSI_NCR_PQS_PDS_SUPPORT */
/*
** If user excludes this chip, donnot initialize it.
*/
for (i = 0 ; i < SCSI_NCR_MAX_EXCLUDES ; i++) {
if (driver_setup.excludes[i] ==
(io_port & PCI_BASE_ADDRESS_IO_MASK))
return -1;
}
/*
** Check if the chip is supported
*/
chip = 0;
for (i = 0; i < sizeof(ncr_chip_table)/sizeof(ncr_chip_table[0]); i++) {
if (device_id != ncr_chip_table[i].device_id)
continue;
if (revision > ncr_chip_table[i].revision_id)
continue;
if (!(ncr_chip_table[i].features & FE_LDSTR))
break;
chip = &device->chip;
memcpy(chip, &ncr_chip_table[i], sizeof(*chip));
chip->revision_id = revision;
break;
}
#ifdef SCSI_NCR_DYNAMIC_DMA_MAPPING
/* Configure DMA attributes. For DAC capable boards, we can encode
** 32+8 bits for SCSI DMA data addresses with the extra bits used
** in the size field. We use normal 32-bit PCI addresses for
** descriptors.
*/
if (chip && (chip->features & FE_DAC)) {
if (pci_set_dma_mask(pdev, (u64) 0xffffffffff))
chip->features &= ~FE_DAC_IN_USE;
else
chip->features |= FE_DAC_IN_USE;
}
if (chip && !(chip->features & FE_DAC_IN_USE)) {
if (pci_set_dma_mask(pdev, (u64) 0xffffffff)) {
printk(KERN_WARNING NAME53C8XX
"32 BIT PCI BUS DMA ADDRESSING NOT SUPPORTEDn");
return -1;
}
}
#endif
/*
** Ignore Symbios chips controlled by SISL RAID controller.
** This controller sets value 0x52414944 at RAM end - 16.
*/
#if defined(__i386__) && !defined(SCSI_NCR_PCI_MEM_NOT_SUPPORTED)
if (chip && (base_2_c & PCI_BASE_ADDRESS_MEM_MASK)) {
unsigned int ram_size, ram_val;
u_long ram_ptr;
if (chip->features & FE_RAM8K)
ram_size = 8192;
else
ram_size = 4096;
ram_ptr = remap_pci_mem(base_2_c & PCI_BASE_ADDRESS_MEM_MASK,
ram_size);
if (ram_ptr) {
ram_val = readl_raw(ram_ptr + ram_size - 16);
unmap_pci_mem(ram_ptr, ram_size);
if (ram_val == 0x52414944) {
printk(NAME53C8XX": not initializing, "
"driven by SISL RAID controller.n");
return -1;
}
}
}
#endif /* i386 and PCI MEMORY accessible */
if (!chip) {
printk(NAME53C8XX ": not initializing, device not supportedn");
return -1;
}
#ifdef __powerpc__
/*
** Fix-up for power/pc.
** Should not be performed by the driver.
*/
if ((command & (PCI_COMMAND_IO | PCI_COMMAND_MEMORY))
!= (PCI_COMMAND_IO | PCI_COMMAND_MEMORY)) {
printk(NAME53C8XX ": setting%s%s...n",
(command & PCI_COMMAND_IO) ? "" : " PCI_COMMAND_IO",
(command & PCI_COMMAND_MEMORY) ? "" : " PCI_COMMAND_MEMORY");
command |= (PCI_COMMAND_IO | PCI_COMMAND_MEMORY);
pci_write_config_word(pdev, PCI_COMMAND, command);
}
#if LINUX_VERSION_CODE < LinuxVersionCode(2,2,0)
if ( is_prep ) {
if (io_port >= 0x10000000) {
printk(NAME53C8XX ": reallocating io_port (Wacky IBM)");
io_port = (io_port & 0x00FFFFFF) | 0x01000000;
pci_write_config_dword(pdev,
PCI_BASE_ADDRESS_0, io_port);
}
if (base >= 0x10000000) {
printk(NAME53C8XX ": reallocating base (Wacky IBM)");
base = (base & 0x00FFFFFF) | 0x01000000;
pci_write_config_dword(pdev,
PCI_BASE_ADDRESS_1, base);
}
if (base_2 >= 0x10000000) {
printk(NAME53C8XX ": reallocating base2 (Wacky IBM)");
base_2 = (base_2 & 0x00FFFFFF) | 0x01000000;
pci_write_config_dword(pdev,
PCI_BASE_ADDRESS_2, base_2);
}
}
#endif
#endif /* __powerpc__ */
#if defined(__i386__) && !defined(MODULE)
if (!cache_line_size) {
#if LINUX_VERSION_CODE < LinuxVersionCode(2,1,75)
extern char x86;
switch(x86) {
#else
switch(boot_cpu_data.x86) {
#endif
case 4: suggested_cache_line_size = 4; break;
case 6:
case 5: suggested_cache_line_size = 8; break;
}
}
#endif /* __i386__ */
/*
** Check availability of IO space, memory space.
** Enable master capability if not yet.
**
** We shouldn't have to care about the IO region when
** we are using MMIO. But calling check_region() from
** both the ncr53c8xx and the sym53c8xx drivers prevents
** from attaching devices from the both drivers.
** If you have a better idea, let me know.
*/
/* #ifdef SCSI_NCR_IOMAPPED */
#if 1
if (!(command & PCI_COMMAND_IO)) {
printk(NAME53C8XX ": I/O base address (0x%lx) disabled.n",
(long) io_port);
io_port = 0;
}
#endif
if (!(command & PCI_COMMAND_MEMORY)) {
printk(NAME53C8XX ": PCI_COMMAND_MEMORY not set.n");
base = 0;
base_2 = 0;
}
io_port &= PCI_BASE_ADDRESS_IO_MASK;
base &= PCI_BASE_ADDRESS_MEM_MASK;
base_2 &= PCI_BASE_ADDRESS_MEM_MASK;
/* #ifdef SCSI_NCR_IOMAPPED */
#if 1
if (io_port && check_region (io_port, 128)) {
printk(NAME53C8XX ": IO region 0x%lx[0..127] is in usen",
(long) io_port);
io_port = 0;
}
if (!io_port)
return -1;
#endif
#ifndef SCSI_NCR_IOMAPPED
if (!base) {
printk(NAME53C8XX ": MMIO base address disabled.n");
return -1;
}
#endif
/*
** Set MASTER capable and PARITY bit, if not yet.
*/
if ((command & (PCI_COMMAND_MASTER | PCI_COMMAND_PARITY))
!= (PCI_COMMAND_MASTER | PCI_COMMAND_PARITY)) {
printk(NAME53C8XX ": setting%s%s...(fix-up)n",
(command & PCI_COMMAND_MASTER) ? "" : " PCI_COMMAND_MASTER",
(command & PCI_COMMAND_PARITY) ? "" : " PCI_COMMAND_PARITY");
command |= (PCI_COMMAND_MASTER | PCI_COMMAND_PARITY);
pci_write_config_word(pdev, PCI_COMMAND, command);
}
/*
** Fix some features according to driver setup.
*/
if (!(driver_setup.special_features & 1))
chip->features &= ~FE_SPECIAL_SET;
else {
if (driver_setup.special_features & 2)
chip->features &= ~FE_WRIE;
if (driver_setup.special_features & 4)
chip->features &= ~FE_NOPM;
}
/*
** Work around for errant bit in 895A. The 66Mhz
** capable bit is set erroneously. Clear this bit.
** (Item 1 DEL 533)
**
** Make sure Config space and Features agree.
**
** Recall: writes are not normal to status register -
** write a 1 to clear and a 0 to leave unchanged.
** Can only reset bits.
*/
if (chip->features & FE_66MHZ) {
if (!(status_reg & PCI_STATUS_66MHZ))
chip->features &= ~FE_66MHZ;
}
else {
if (status_reg & PCI_STATUS_66MHZ) {
status_reg = PCI_STATUS_66MHZ;
pci_write_config_word(pdev, PCI_STATUS, status_reg);
pci_read_config_word(pdev, PCI_STATUS, &status_reg);
}
}
/*
** Some features are required to be enabled in order to
** work around some chip problems. :) ;)
** (ITEM 12 of a DEL about the 896 I haven't yet).
** We must ensure the chip will use WRITE AND INVALIDATE.
** The revision number limit is for now arbitrary.
*/
if (device_id == PCI_DEVICE_ID_NCR_53C896 && revision <= 0x10) {
chip->features |= (FE_WRIE | FE_CLSE);
pci_fix_up |= 3; /* Force appropriate PCI fix-up */
}
#ifdef SCSI_NCR_PCI_FIX_UP_SUPPORT
/*
** Try to fix up PCI config according to wished features.
*/
if ((pci_fix_up & 1) && (chip->features & FE_CLSE) &&
!cache_line_size && suggested_cache_line_size) {
cache_line_size = suggested_cache_line_size;
pci_write_config_byte(pdev,
PCI_CACHE_LINE_SIZE, cache_line_size);
printk(NAME53C8XX ": PCI_CACHE_LINE_SIZE set to %d (fix-up).n",
cache_line_size);
}
if ((pci_fix_up & 2) && cache_line_size &&
(chip->features & FE_WRIE) && !(command & PCI_COMMAND_INVALIDATE)) {
printk(NAME53C8XX": setting PCI_COMMAND_INVALIDATE (fix-up)n");
command |= PCI_COMMAND_INVALIDATE;
pci_write_config_word(pdev, PCI_COMMAND, command);
}
/*
** Tune PCI LATENCY TIMER according to burst max length transfer.
** (latency timer >= burst length + 6, we add 10 to be quite sure)
*/
if (chip->burst_max && (latency_timer == 0 || (pci_fix_up & 4))) {
uchar lt = (1 << chip->burst_max) + 6 + 10;
if (latency_timer < lt) {
printk(NAME53C8XX
": changing PCI_LATENCY_TIMER from %d to %d.n",
(int) latency_timer, (int) lt);
latency_timer = lt;
pci_write_config_byte(pdev,
PCI_LATENCY_TIMER, latency_timer);
}
}
#endif /* SCSI_NCR_PCI_FIX_UP_SUPPORT */
/*
** Initialise ncr_device structure with items required by ncr_attach.
*/
device->pdev = pdev;
device->slot.bus = PciBusNumber(pdev);
device->slot.device_fn = PciDeviceFn(pdev);
device->slot.base = base;
device->slot.base_2 = base_2;
device->slot.base_c = base_c;
device->slot.base_2_c = base_2_c;
device->slot.io_port = io_port;
device->slot.irq = irq;
device->attach_done = 0;
return 0;
}
/*===================================================================
** Detect and try to read SYMBIOS and TEKRAM NVRAM.
**
** Data can be used to order booting of boards.
**
** Data is saved in ncr_device structure if NVRAM found. This
** is then used to find drive boot order for ncr_attach().
**
** NVRAM data is passed to Scsi_Host_Template later during
** ncr_attach() for any device set up.
*===================================================================
*/
#ifdef SCSI_NCR_NVRAM_SUPPORT
static void __init ncr_get_nvram(ncr_device *devp, ncr_nvram *nvp)
{
devp->nvram = nvp;
if (!nvp)
return;
/*
** Get access to chip IO registers
*/
#ifdef SCSI_NCR_IOMAPPED
request_region(devp->slot.io_port, 128, NAME53C8XX);
devp->slot.base_io = devp->slot.io_port;
#else
devp->slot.reg =
(struct ncr_reg *) remap_pci_mem(devp->slot.base_c, 128);
if (!devp->slot.reg)
return;
#endif
/*
** Try to read SYMBIOS nvram.
** Try to read TEKRAM nvram if Symbios nvram not found.
*/
if (!sym_read_Symbios_nvram(&devp->slot, &nvp->data.Symbios))
nvp->type = SCSI_NCR_SYMBIOS_NVRAM;
else if (!sym_read_Tekram_nvram(&devp->slot, devp->chip.device_id,
&nvp->data.Tekram))
nvp->type = SCSI_NCR_TEKRAM_NVRAM;
else {
nvp->type = 0;
devp->nvram = 0;
}
/*
** Release access to chip IO registers
*/
#ifdef SCSI_NCR_IOMAPPED
release_region(devp->slot.base_io, 128);
#else
unmap_pci_mem((u_long) devp->slot.reg, 128ul);
#endif
}
#endif /* SCSI_NCR_NVRAM_SUPPORT */
/*
** Linux select queue depths function
*/
#define DEF_DEPTH (driver_setup.default_tags)
#define ALL_TARGETS -2
#define NO_TARGET -1
#define ALL_LUNS -2
#define NO_LUN -1
static int device_queue_depth(ncb_p np, int target, int lun)
{
int c, h, t, u, v;
char *p = driver_setup.tag_ctrl;
char *ep;
h = -1;
t = NO_TARGET;
u = NO_LUN;
while ((c = *p++) != 0) {
v = simple_strtoul(p, &ep, 0);
switch(c) {
case '/':
++h;
t = ALL_TARGETS;
u = ALL_LUNS;
break;
case 't':
if (t != target)
t = (target == v) ? v : NO_TARGET;
u = ALL_LUNS;
break;
case 'u':
if (u != lun)
u = (lun == v) ? v : NO_LUN;
break;
case 'q':
if (h == np->unit &&
(t == ALL_TARGETS || t == target) &&
(u == ALL_LUNS || u == lun))
return v;
break;
case '-':
t = ALL_TARGETS;
u = ALL_LUNS;
break;
default:
break;
}
p = ep;
}
return DEF_DEPTH;
}
static void sym53c8xx_select_queue_depths(struct Scsi_Host *host, struct scsi_device *devlist)
{
struct scsi_device *device;
for (device = devlist; device; device = device->next) {
ncb_p np;
tcb_p tp;
lcb_p lp;
int numtags;
if (device->host != host)
continue;
np = ((struct host_data *) host->hostdata)->ncb;
tp = &np->target[device->id];
lp = ncr_lp(np, tp, device->lun);
/*
** Select queue depth from driver setup.
** Donnot use more than configured by user.
** Use at least 2.
** Donnot use more than our maximum.
*/
numtags = device_queue_depth(np, device->id, device->lun);
if (numtags > tp->usrtags)
numtags = tp->usrtags;
if (!device->tagged_supported)
numtags = 1;
device->queue_depth = numtags;
if (device->queue_depth < 2)
device->queue_depth = 2;
if (device->queue_depth > MAX_TAGS)
device->queue_depth = MAX_TAGS;
/*
** Since the queue depth is not tunable under Linux,
** we need to know this value in order not to
** announce stupid things to user.
*/
if (lp) {
lp->numtags = lp->maxtags = numtags;
lp->scdev_depth = device->queue_depth;
}
ncr_setup_tags (np, device->id, device->lun);
#ifdef DEBUG_SYM53C8XX
printk("sym53c8xx_select_queue_depth: host=%d, id=%d, lun=%d, depth=%dn",
np->unit, device->id, device->lun, device->queue_depth);
#endif
}
}
/*
** Linux entry point for info() function
*/
const char *sym53c8xx_info (struct Scsi_Host *host)
{
return SCSI_NCR_DRIVER_NAME;
}
/*
** Linux entry point of queuecommand() function
*/
int sym53c8xx_queue_command (Scsi_Cmnd *cmd, void (* done)(Scsi_Cmnd *))
{
ncb_p np = ((struct host_data *) cmd->host->hostdata)->ncb;
unsigned long flags;
int sts;
#ifdef DEBUG_SYM53C8XX
printk("sym53c8xx_queue_commandn");
#endif
cmd->scsi_done = done;
cmd->host_scribble = NULL;
cmd->SCp.ptr = NULL;
cmd->SCp.buffer = NULL;
#ifdef SCSI_NCR_DYNAMIC_DMA_MAPPING
__data_mapped(cmd) = 0;
__data_mapping(cmd) = 0;
#endif
NCR_LOCK_NCB(np, flags);
if ((sts = ncr_queue_command(np, cmd)) != DID_OK) {
SetScsiResult(cmd, sts, 0);
#ifdef DEBUG_SYM53C8XX
printk("sym53c8xx : command not queued - result=%dn", sts);
#endif
}
#ifdef DEBUG_SYM53C8XX
else
printk("sym53c8xx : command successfully queuedn");
#endif
NCR_UNLOCK_NCB(np, flags);
if (sts != DID_OK) {
unmap_scsi_data(np, cmd);
done(cmd);
}
return sts;
}
/*
** Linux entry point of the interrupt handler.
** Since linux versions > 1.3.70, we trust the kernel for
** passing the internal host descriptor as 'dev_id'.
** Otherwise, we scan the host list and call the interrupt
** routine for each host that uses this IRQ.
*/
static void sym53c8xx_intr(int irq, void *dev_id, struct pt_regs * regs)
{
unsigned long flags;
ncb_p np = (ncb_p) dev_id;
Scsi_Cmnd *done_list;
#ifdef DEBUG_SYM53C8XX
printk("sym53c8xx : interrupt receivedn");
#endif
if (DEBUG_FLAGS & DEBUG_TINY) printk ("[");
NCR_LOCK_NCB(np, flags);
ncr_exception(np);
done_list = np->done_list;
np->done_list = 0;
NCR_UNLOCK_NCB(np, flags);
if (DEBUG_FLAGS & DEBUG_TINY) printk ("]n");
if (done_list) {
NCR_LOCK_SCSI_DONE(np, flags);
ncr_flush_done_cmds(done_list);
NCR_UNLOCK_SCSI_DONE(np, flags);
}
}
/*
** Linux entry point of the timer handler
*/
static void sym53c8xx_timeout(unsigned long npref)
{
ncb_p np = (ncb_p) npref;
unsigned long flags;
Scsi_Cmnd *done_list;
NCR_LOCK_NCB(np, flags);
ncr_timeout((ncb_p) np);
done_list = np->done_list;
np->done_list = 0;
NCR_UNLOCK_NCB(np, flags);
if (done_list) {
NCR_LOCK_SCSI_DONE(np, flags);
ncr_flush_done_cmds(done_list);
NCR_UNLOCK_SCSI_DONE(np, flags);
}
}
/*
** Linux entry point of reset() function
*/
#if defined SCSI_RESET_SYNCHRONOUS && defined SCSI_RESET_ASYNCHRONOUS
int sym53c8xx_reset(Scsi_Cmnd *cmd, unsigned int reset_flags)
#else
int sym53c8xx_reset(Scsi_Cmnd *cmd)
#endif
{
ncb_p np = ((struct host_data *) cmd->host->hostdata)->ncb;
int sts;
unsigned long flags;
Scsi_Cmnd *done_list;
#if defined SCSI_RESET_SYNCHRONOUS && defined SCSI_RESET_ASYNCHRONOUS
printk("sym53c8xx_reset: pid=%lu reset_flags=%x serial_number=%ld serial_number_at_timeout=%ldn",
cmd->pid, reset_flags, cmd->serial_number, cmd->serial_number_at_timeout);
#else
printk("sym53c8xx_reset: command pid %lun", cmd->pid);
#endif
NCR_LOCK_NCB(np, flags);
/*
* We have to just ignore reset requests in some situations.
*/
#if defined SCSI_RESET_NOT_RUNNING
if (cmd->serial_number != cmd->serial_number_at_timeout) {
sts = SCSI_RESET_NOT_RUNNING;
goto out;
}
#endif
/*
* If the mid-level driver told us reset is synchronous, it seems
* that we must call the done() callback for the involved command,
* even if this command was not queued to the low-level driver,
* before returning SCSI_RESET_SUCCESS.
*/
#if defined SCSI_RESET_SYNCHRONOUS && defined SCSI_RESET_ASYNCHRONOUS
sts = ncr_reset_bus(np, cmd,
(reset_flags & (SCSI_RESET_SYNCHRONOUS | SCSI_RESET_ASYNCHRONOUS)) == SCSI_RESET_SYNCHRONOUS);
#else
sts = ncr_reset_bus(np, cmd, 0);
#endif
/*
* Since we always reset the controller, when we return success,
* we add this information to the return code.
*/
#if defined SCSI_RESET_HOST_RESET
if (sts == SCSI_RESET_SUCCESS)
sts |= SCSI_RESET_HOST_RESET;
#endif
out:
done_list = np->done_list;
np->done_list = 0;
NCR_UNLOCK_NCB(np, flags);
ncr_flush_done_cmds(done_list);
return sts;
}
/*
** Linux entry point of abort() function
*/
int sym53c8xx_abort(Scsi_Cmnd *cmd)
{
ncb_p np = ((struct host_data *) cmd->host->hostdata)->ncb;
int sts;
unsigned long flags;
Scsi_Cmnd *done_list;
#if defined SCSI_RESET_SYNCHRONOUS && defined SCSI_RESET_ASYNCHRONOUS
printk("sym53c8xx_abort: pid=%lu serial_number=%ld serial_number_at_timeout=%ldn",
cmd->pid, cmd->serial_number, cmd->serial_number_at_timeout);
#else
printk("sym53c8xx_abort: command pid %lun", cmd->pid);
#endif
NCR_LOCK_NCB(np, flags);
#if defined SCSI_RESET_SYNCHRONOUS && defined SCSI_RESET_ASYNCHRONOUS
/*
* We have to just ignore abort requests in some situations.
*/
if (cmd->serial_number != cmd->serial_number_at_timeout) {
sts = SCSI_ABORT_NOT_RUNNING;
goto out;
}
#endif
sts = ncr_abort_command(np, cmd);
out:
done_list = np->done_list;
np->done_list = 0;
NCR_UNLOCK_NCB(np, flags);
ncr_flush_done_cmds(done_list);
return sts;
}
#ifdef MODULE
int sym53c8xx_release(struct Scsi_Host *host)
{
#ifdef DEBUG_SYM53C8XX
printk("sym53c8xx : releasen");
#endif
ncr_detach(((struct host_data *) host->hostdata)->ncb);
return 1;
}
#endif
/*
** Scsi command waiting list management.
**
** It may happen that we cannot insert a scsi command into the start queue,
** in the following circumstances.
** Too few preallocated ccb(s),
** maxtags < cmd_per_lun of the Linux host control block,
** etc...
** Such scsi commands are inserted into a waiting list.
** When a scsi command complete, we try to requeue the commands of the
** waiting list.
*/
#define next_wcmd host_scribble
static void insert_into_waiting_list(ncb_p np, Scsi_Cmnd *cmd)
{
Scsi_Cmnd *wcmd;
#ifdef DEBUG_WAITING_LIST
printk("%s: cmd %lx inserted into waiting listn", ncr_name(np), (u_long) cmd);
#endif
cmd->next_wcmd = 0;
if (!(wcmd = np->waiting_list)) np->waiting_list = cmd;
else {
while ((wcmd->next_wcmd) != 0)
wcmd = (Scsi_Cmnd *) wcmd->next_wcmd;
wcmd->next_wcmd = (char *) cmd;
}
}
static Scsi_Cmnd *retrieve_from_waiting_list(int to_remove, ncb_p np, Scsi_Cmnd *cmd)
{
Scsi_Cmnd **pcmd = &np->waiting_list;
while (*pcmd) {
if (cmd == *pcmd) {
if (to_remove) {
*pcmd = (Scsi_Cmnd *) cmd->next_wcmd;
cmd->next_wcmd = 0;
}
#ifdef DEBUG_WAITING_LIST
printk("%s: cmd %lx retrieved from waiting listn", ncr_name(np), (u_long) cmd);
#endif
return cmd;
}
pcmd = (Scsi_Cmnd **) &(*pcmd)->next_wcmd;
}
return 0;
}
static void process_waiting_list(ncb_p np, int sts)
{
Scsi_Cmnd *waiting_list, *wcmd;
waiting_list = np->waiting_list;
np->waiting_list = 0;
#ifdef DEBUG_WAITING_LIST
if (waiting_list) printk("%s: waiting_list=%lx processing sts=%dn", ncr_name(np), (u_long) waiting_list, sts);
#endif
while ((wcmd = waiting_list) != 0) {
waiting_list = (Scsi_Cmnd *) wcmd->next_wcmd;
wcmd->next_wcmd = 0;
if (sts == DID_OK) {
#ifdef DEBUG_WAITING_LIST
printk("%s: cmd %lx trying to requeuen", ncr_name(np), (u_long) wcmd);
#endif
sts = ncr_queue_command(np, wcmd);
}
if (sts != DID_OK) {
#ifdef DEBUG_WAITING_LIST
printk("%s: cmd %lx done forced sts=%dn", ncr_name(np), (u_long) wcmd, sts);
#endif
SetScsiResult(wcmd, sts, 0);
ncr_queue_done_cmd(np, wcmd);
}
}
}
#undef next_wcmd
#ifdef SCSI_NCR_PROC_INFO_SUPPORT
/*=========================================================================
** Proc file system stuff
**
** A read operation returns adapter information.
** A write operation is a control command.
** The string is parsed in the driver code and the command is passed
** to the ncr_usercmd() function.
**=========================================================================
*/
#ifdef SCSI_NCR_USER_COMMAND_SUPPORT
#define is_digit(c) ((c) >= '0' && (c) <= '9')
#define digit_to_bin(c) ((c) - '0')
#define is_space(c) ((c) == ' ' || (c) == 't')
static int skip_spaces(char *ptr, int len)
{
int cnt, c;
for (cnt = len; cnt > 0 && (c = *ptr++) && is_space(c); cnt--);
return (len - cnt);
}
static int get_int_arg(char *ptr, int len, u_long *pv)
{
int cnt, c;
u_long v;
for (v = 0, cnt = len; cnt > 0 && (c = *ptr++) && is_digit(c); cnt--) {
v = (v * 10) + digit_to_bin(c);
}
if (pv)
*pv = v;
return (len - cnt);
}
static int is_keyword(char *ptr, int len, char *verb)
{
int verb_len = strlen(verb);
if (len >= strlen(verb) && !memcmp(verb, ptr, verb_len))
return verb_len;
else
return 0;
}
#define SKIP_SPACES(min_spaces)
if ((arg_len = skip_spaces(ptr, len)) < (min_spaces))
return -EINVAL;
ptr += arg_len; len -= arg_len;
#define GET_INT_ARG(v)
if (!(arg_len = get_int_arg(ptr, len, &(v))))
return -EINVAL;
ptr += arg_len; len -= arg_len;
/*
** Parse a control command
*/
static int ncr_user_command(ncb_p np, char *buffer, int length)
{
char *ptr = buffer;
int len = length;
struct usrcmd *uc = &np->user;
int arg_len;
u_long target;
bzero(uc, sizeof(*uc));
if (len > 0 && ptr[len-1] == 'n')
--len;
if ((arg_len = is_keyword(ptr, len, "setsync")) != 0)
uc->cmd = UC_SETSYNC;
else if ((arg_len = is_keyword(ptr, len, "settags")) != 0)
uc->cmd = UC_SETTAGS;
else if ((arg_len = is_keyword(ptr, len, "setorder")) != 0)
uc->cmd = UC_SETORDER;
else if ((arg_len = is_keyword(ptr, len, "setverbose")) != 0)
uc->cmd = UC_SETVERBOSE;
else if ((arg_len = is_keyword(ptr, len, "setwide")) != 0)
uc->cmd = UC_SETWIDE;
else if ((arg_len = is_keyword(ptr, len, "setdebug")) != 0)
uc->cmd = UC_SETDEBUG;
else if ((arg_len = is_keyword(ptr, len, "setflag")) != 0)
uc->cmd = UC_SETFLAG;
else if ((arg_len = is_keyword(ptr, len, "resetdev")) != 0)
uc->cmd = UC_RESETDEV;
else if ((arg_len = is_keyword(ptr, len, "cleardev")) != 0)
uc->cmd = UC_CLEARDEV;
else
arg_len = 0;
#ifdef DEBUG_PROC_INFO
printk("ncr_user_command: arg_len=%d, cmd=%ldn", arg_len, uc->cmd);
#endif
if (!arg_len)
return -EINVAL;
ptr += arg_len; len -= arg_len;
switch(uc->cmd) {
case UC_SETSYNC:
case UC_SETTAGS:
case UC_SETWIDE:
case UC_SETFLAG:
case UC_RESETDEV:
case UC_CLEARDEV:
SKIP_SPACES(1);
if ((arg_len = is_keyword(ptr, len, "all")) != 0) {
ptr += arg_len; len -= arg_len;
uc->target = ~0;
} else {
GET_INT_ARG(target);
uc->target = (1<<target);
#ifdef DEBUG_PROC_INFO
printk("ncr_user_command: target=%ldn", target);
#endif
}
break;
}
switch(uc->cmd) {
case UC_SETVERBOSE:
case UC_SETSYNC:
case UC_SETTAGS:
case UC_SETWIDE:
SKIP_SPACES(1);
GET_INT_ARG(uc->data);
#ifdef DEBUG_PROC_INFO
printk("ncr_user_command: data=%ldn", uc->data);
#endif
break;
case UC_SETORDER:
SKIP_SPACES(1);
if ((arg_len = is_keyword(ptr, len, "simple")))
uc->data = M_SIMPLE_TAG;
else if ((arg_len = is_keyword(ptr, len, "ordered")))
uc->data = M_ORDERED_TAG;
else if ((arg_len = is_keyword(ptr, len, "default")))
uc->data = 0;
else
return -EINVAL;
break;
case UC_SETDEBUG:
while (len > 0) {
SKIP_SPACES(1);
if ((arg_len = is_keyword(ptr, len, "alloc")))
uc->data |= DEBUG_ALLOC;
else if ((arg_len = is_keyword(ptr, len, "phase")))
uc->data |= DEBUG_PHASE;
else if ((arg_len = is_keyword(ptr, len, "queue")))
uc->data |= DEBUG_QUEUE;
else if ((arg_len = is_keyword(ptr, len, "result")))
uc->data |= DEBUG_RESULT;
else if ((arg_len = is_keyword(ptr, len, "pointer")))
uc->data |= DEBUG_POINTER;
else if ((arg_len = is_keyword(ptr, len, "script")))
uc->data |= DEBUG_SCRIPT;
else if ((arg_len = is_keyword(ptr, len, "tiny")))
uc->data |= DEBUG_TINY;
else if ((arg_len = is_keyword(ptr, len, "timing")))
uc->data |= DEBUG_TIMING;
else if ((arg_len = is_keyword(ptr, len, "nego")))
uc->data |= DEBUG_NEGO;
else if ((arg_len = is_keyword(ptr, len, "tags")))
uc->data |= DEBUG_TAGS;
else
return -EINVAL;
ptr += arg_len; len -= arg_len;
}
#ifdef DEBUG_PROC_INFO
printk("ncr_user_command: data=%ldn", uc->data);
#endif
break;
case UC_SETFLAG:
while (len > 0) {
SKIP_SPACES(1);
if ((arg_len = is_keyword(ptr, len, "trace")))
uc->data |= UF_TRACE;
else if ((arg_len = is_keyword(ptr, len, "no_disc")))
uc->data |= UF_NODISC;
else
return -EINVAL;
ptr += arg_len; len -= arg_len;
}
break;
default:
break;
}
if (len)
return -EINVAL;
else {
long flags;
NCR_LOCK_NCB(np, flags);
ncr_usercmd (np);
NCR_UNLOCK_NCB(np, flags);
}
return length;
}
#endif /* SCSI_NCR_USER_COMMAND_SUPPORT */
#ifdef SCSI_NCR_USER_INFO_SUPPORT
struct info_str
{
char *buffer;
int length;
int offset;
int pos;
};
static void copy_mem_info(struct info_str *info, char *data, int len)
{
if (info->pos + len > info->length)
len = info->length - info->pos;
if (info->pos + len < info->offset) {
info->pos += len;
return;
}
if (info->pos < info->offset) {
data += (info->offset - info->pos);
len -= (info->offset - info->pos);
}
if (len > 0) {
memcpy(info->buffer + info->pos, data, len);
info->pos += len;
}
}
static int copy_info(struct info_str *info, char *fmt, ...)
{
va_list args;
char buf[81];
int len;
va_start(args, fmt);
len = vsprintf(buf, fmt, args);
va_end(args);
copy_mem_info(info, buf, len);
return len;
}
/*
** Copy formatted information into the input buffer.
*/
static int ncr_host_info(ncb_p np, char *ptr, off_t offset, int len)
{
struct info_str info;
info.buffer = ptr;
info.length = len;
info.offset = offset;
info.pos = 0;
copy_info(&info, "General information:n");
copy_info(&info, " Chip " NAME53C "%s, device id 0x%x, "
"revision id 0x%xn",
np->chip_name, np->device_id, np->revision_id);
copy_info(&info, " On PCI bus %d, device %d, function %d, "
#ifdef __sparc__
"IRQ %sn",
#else
"IRQ %dn",
#endif
np->bus, (np->device_fn & 0xf8) >> 3, np->device_fn & 7,
#ifdef __sparc__
__irq_itoa(np->irq));
#else
(int) np->irq);
#endif
copy_info(&info, " Synchronous period factor %d, "
"max commands per lun %dn",
(int) np->minsync, MAX_TAGS);
if (driver_setup.debug || driver_setup.verbose > 1) {
copy_info(&info, " Debug flags 0x%x, verbosity level %dn",
driver_setup.debug, driver_setup.verbose);
}
return info.pos > info.offset? info.pos - info.offset : 0;
}
#endif /* SCSI_NCR_USER_INFO_SUPPORT */
/*
** Entry point of the scsi proc fs of the driver.
** - func = 0 means read (returns adapter infos)
** - func = 1 means write (parse user control command)
*/
static int sym53c8xx_proc_info(char *buffer, char **start, off_t offset,
int length, int hostno, int func)
{
struct Scsi_Host *host;
struct host_data *host_data;
ncb_p ncb = 0;
int retv;
#ifdef DEBUG_PROC_INFO
printk("sym53c8xx_proc_info: hostno=%d, func=%dn", hostno, func);
#endif
for (host = first_host; host; host = host->next) {
if (host->hostt != first_host->hostt)
continue;
if (host->host_no == hostno) {
host_data = (struct host_data *) host->hostdata;
ncb = host_data->ncb;
break;
}
}
if (!ncb)
return -EINVAL;
if (func) {
#ifdef SCSI_NCR_USER_COMMAND_SUPPORT
retv = ncr_user_command(ncb, buffer, length);
#else
retv = -EINVAL;
#endif
}
else {
if (start)
*start = buffer;
#ifdef SCSI_NCR_USER_INFO_SUPPORT
retv = ncr_host_info(ncb, buffer, offset, length);
#else
retv = -EINVAL;
#endif
}
return retv;
}
/*=========================================================================
** End of proc file system stuff
**=========================================================================
*/
#endif
#ifdef SCSI_NCR_NVRAM_SUPPORT
/*
* 24C16 EEPROM reading.
*
* GPOI0 - data in/data out
* GPIO1 - clock
* Symbios NVRAM wiring now also used by Tekram.
*/
#define SET_BIT 0
#define CLR_BIT 1
#define SET_CLK 2
#define CLR_CLK 3
/*
* Set/clear data/clock bit in GPIO0
*/
static void __init
S24C16_set_bit(ncr_slot *np, u_char write_bit, u_char *gpreg, int bit_mode)
{
UDELAY (5);
switch (bit_mode){
case SET_BIT:
*gpreg |= write_bit;
break;
case CLR_BIT:
*gpreg &= 0xfe;
break;
case SET_CLK:
*gpreg |= 0x02;
break;
case CLR_CLK:
*gpreg &= 0xfd;
break;
}
OUTB (nc_gpreg, *gpreg);
UDELAY (5);
}
/*
* Send START condition to NVRAM to wake it up.
*/
static void __init S24C16_start(ncr_slot *np, u_char *gpreg)
{
S24C16_set_bit(np, 1, gpreg, SET_BIT);
S24C16_set_bit(np, 0, gpreg, SET_CLK);
S24C16_set_bit(np, 0, gpreg, CLR_BIT);
S24C16_set_bit(np, 0, gpreg, CLR_CLK);
}
/*
* Send STOP condition to NVRAM - puts NVRAM to sleep... ZZzzzz!!
*/
static void __init S24C16_stop(ncr_slot *np, u_char *gpreg)
{
S24C16_set_bit(np, 0, gpreg, SET_CLK);
S24C16_set_bit(np, 1, gpreg, SET_BIT);
}
/*
* Read or write a bit to the NVRAM,
* read if GPIO0 input else write if GPIO0 output
*/
static void __init
S24C16_do_bit(ncr_slot *np, u_char *read_bit, u_char write_bit, u_char *gpreg)
{
S24C16_set_bit(np, write_bit, gpreg, SET_BIT);
S24C16_set_bit(np, 0, gpreg, SET_CLK);
if (read_bit)
*read_bit = INB (nc_gpreg);
S24C16_set_bit(np, 0, gpreg, CLR_CLK);
S24C16_set_bit(np, 0, gpreg, CLR_BIT);
}
/*
* Output an ACK to the NVRAM after reading,
* change GPIO0 to output and when done back to an input
*/
static void __init
S24C16_write_ack(ncr_slot *np, u_char write_bit, u_char *gpreg, u_char *gpcntl)
{
OUTB (nc_gpcntl, *gpcntl & 0xfe);
S24C16_do_bit(np, 0, write_bit, gpreg);
OUTB (nc_gpcntl, *gpcntl);
}
/*
* Input an ACK from NVRAM after writing,
* change GPIO0 to input and when done back to an output
*/
static void __init
S24C16_read_ack(ncr_slot *np, u_char *read_bit, u_char *gpreg, u_char *gpcntl)
{
OUTB (nc_gpcntl, *gpcntl | 0x01);
S24C16_do_bit(np, read_bit, 1, gpreg);
OUTB (nc_gpcntl, *gpcntl);
}
/*
* WRITE a byte to the NVRAM and then get an ACK to see it was accepted OK,
* GPIO0 must already be set as an output
*/
static void __init
S24C16_write_byte(ncr_slot *np, u_char *ack_data, u_char write_data,
u_char *gpreg, u_char *gpcntl)
{
int x;
for (x = 0; x < 8; x++)
S24C16_do_bit(np, 0, (write_data >> (7 - x)) & 0x01, gpreg);
S24C16_read_ack(np, ack_data, gpreg, gpcntl);
}
/*
* READ a byte from the NVRAM and then send an ACK to say we have got it,
* GPIO0 must already be set as an input
*/
static void __init
S24C16_read_byte(ncr_slot *np, u_char *read_data, u_char ack_data,
u_char *gpreg, u_char *gpcntl)
{
int x;
u_char read_bit;
*read_data = 0;
for (x = 0; x < 8; x++) {
S24C16_do_bit(np, &read_bit, 1, gpreg);
*read_data |= ((read_bit & 0x01) << (7 - x));
}
S24C16_write_ack(np, ack_data, gpreg, gpcntl);
}
/*
* Read 'len' bytes starting at 'offset'.
*/
static int __init
sym_read_S24C16_nvram (ncr_slot *np, int offset, u_char *data, int len)
{
u_char gpcntl, gpreg;
u_char old_gpcntl, old_gpreg;
u_char ack_data;
int retv = 1;
int x;
/* save current state of GPCNTL and GPREG */
old_gpreg = INB (nc_gpreg);
old_gpcntl = INB (nc_gpcntl);
gpcntl = old_gpcntl & 0x1c;
/* set up GPREG & GPCNTL to set GPIO0 and GPIO1 in to known state */
OUTB (nc_gpreg, old_gpreg);
OUTB (nc_gpcntl, gpcntl);
/* this is to set NVRAM into a known state with GPIO0/1 both low */
gpreg = old_gpreg;
S24C16_set_bit(np, 0, &gpreg, CLR_CLK);
S24C16_set_bit(np, 0, &gpreg, CLR_BIT);
/* now set NVRAM inactive with GPIO0/1 both high */
S24C16_stop(np, &gpreg);
/* activate NVRAM */
S24C16_start(np, &gpreg);
/* write device code and random address MSB */
S24C16_write_byte(np, &ack_data,
0xa0 | ((offset >> 7) & 0x0e), &gpreg, &gpcntl);
if (ack_data & 0x01)
goto out;
/* write random address LSB */
S24C16_write_byte(np, &ack_data,
offset & 0xff, &gpreg, &gpcntl);
if (ack_data & 0x01)
goto out;
/* regenerate START state to set up for reading */
S24C16_start(np, &gpreg);
/* rewrite device code and address MSB with read bit set (lsb = 0x01) */
S24C16_write_byte(np, &ack_data,
0xa1 | ((offset >> 7) & 0x0e), &gpreg, &gpcntl);
if (ack_data & 0x01)
goto out;
/* now set up GPIO0 for inputting data */
gpcntl |= 0x01;
OUTB (nc_gpcntl, gpcntl);
/* input all requested data - only part of total NVRAM */
for (x = 0; x < len; x++)
S24C16_read_byte(np, &data[x], (x == (len-1)), &gpreg, &gpcntl);
/* finally put NVRAM back in inactive mode */
gpcntl &= 0xfe;
OUTB (nc_gpcntl, gpcntl);
S24C16_stop(np, &gpreg);
retv = 0;
out:
/* return GPIO0/1 to original states after having accessed NVRAM */
OUTB (nc_gpcntl, old_gpcntl);
OUTB (nc_gpreg, old_gpreg);
return retv;
}
#undef SET_BIT
#undef CLR_BIT
#undef SET_CLK
#undef CLR_CLK
/*
* Try reading Symbios NVRAM.
* Return 0 if OK.
*/
static int __init sym_read_Symbios_nvram (ncr_slot *np, Symbios_nvram *nvram)
{
static u_char Symbios_trailer[6] = {0xfe, 0xfe, 0, 0, 0, 0};
u_char *data = (u_char *) nvram;
int len = sizeof(*nvram);
u_short csum;
int x;
/* probe the 24c16 and read the SYMBIOS 24c16 area */
if (sym_read_S24C16_nvram (np, SYMBIOS_NVRAM_ADDRESS, data, len))
return 1;
/* check valid NVRAM signature, verify byte count and checksum */
if (nvram->type != 0 ||
memcmp(nvram->trailer, Symbios_trailer, 6) ||
nvram->byte_count != len - 12)
return 1;
/* verify checksum */
for (x = 6, csum = 0; x < len - 6; x++)
csum += data[x];
if (csum != nvram->checksum)
return 1;
return 0;
}
/*
* 93C46 EEPROM reading.
*
* GPOI0 - data in
* GPIO1 - data out
* GPIO2 - clock
* GPIO4 - chip select
*
* Used by Tekram.
*/
/*
* Pulse clock bit in GPIO0
*/
static void __init T93C46_Clk(ncr_slot *np, u_char *gpreg)
{
OUTB (nc_gpreg, *gpreg | 0x04);
UDELAY (2);
OUTB (nc_gpreg, *gpreg);
}
/*
* Read bit from NVRAM
*/
static void __init T93C46_Read_Bit(ncr_slot *np, u_char *read_bit, u_char *gpreg)
{
UDELAY (2);
T93C46_Clk(np, gpreg);
*read_bit = INB (nc_gpreg);
}
/*
* Write bit to GPIO0
*/
static void __init T93C46_Write_Bit(ncr_slot *np, u_char write_bit, u_char *gpreg)
{
if (write_bit & 0x01)
*gpreg |= 0x02;
else
*gpreg &= 0xfd;
*gpreg |= 0x10;
OUTB (nc_gpreg, *gpreg);
UDELAY (2);
T93C46_Clk(np, gpreg);
}
/*
* Send STOP condition to NVRAM - puts NVRAM to sleep... ZZZzzz!!
*/
static void __init T93C46_Stop(ncr_slot *np, u_char *gpreg)
{
*gpreg &= 0xef;
OUTB (nc_gpreg, *gpreg);
UDELAY (2);
T93C46_Clk(np, gpreg);
}
/*
* Send read command and address to NVRAM
*/
static void __init
T93C46_Send_Command(ncr_slot *np, u_short write_data,
u_char *read_bit, u_char *gpreg)
{
int x;
/* send 9 bits, start bit (1), command (2), address (6) */
for (x = 0; x < 9; x++)
T93C46_Write_Bit(np, (u_char) (write_data >> (8 - x)), gpreg);
*read_bit = INB (nc_gpreg);
}
/*
* READ 2 bytes from the NVRAM
*/
static void __init
T93C46_Read_Word(ncr_slot *np, u_short *nvram_data, u_char *gpreg)
{
int x;
u_char read_bit;
*nvram_data = 0;
for (x = 0; x < 16; x++) {
T93C46_Read_Bit(np, &read_bit, gpreg);
if (read_bit & 0x01)
*nvram_data |= (0x01 << (15 - x));
else
*nvram_data &= ~(0x01 << (15 - x));
}
}
/*
* Read Tekram NvRAM data.
*/
static int __init
T93C46_Read_Data(ncr_slot *np, u_short *data,int len,u_char *gpreg)
{
u_char read_bit;
int x;
for (x = 0; x < len; x++) {
/* output read command and address */
T93C46_Send_Command(np, 0x180 | x, &read_bit, gpreg);
if (read_bit & 0x01)
return 1; /* Bad */
T93C46_Read_Word(np, &data[x], gpreg);
T93C46_Stop(np, gpreg);
}
return 0;
}
/*
* Try reading 93C46 Tekram NVRAM.
*/
static int __init
sym_read_T93C46_nvram (ncr_slot *np, Tekram_nvram *nvram)
{
u_char gpcntl, gpreg;
u_char old_gpcntl, old_gpreg;
int retv = 1;
/* save current state of GPCNTL and GPREG */
old_gpreg = INB (nc_gpreg);
old_gpcntl = INB (nc_gpcntl);
/* set up GPREG & GPCNTL to set GPIO0/1/2/4 in to known state, 0 in,
1/2/4 out */
gpreg = old_gpreg & 0xe9;
OUTB (nc_gpreg, gpreg);
gpcntl = (old_gpcntl & 0xe9) | 0x09;
OUTB (nc_gpcntl, gpcntl);
/* input all of NVRAM, 64 words */
retv = T93C46_Read_Data(np, (u_short *) nvram,
sizeof(*nvram) / sizeof(short), &gpreg);
/* return GPIO0/1/2/4 to original states after having accessed NVRAM */
OUTB (nc_gpcntl, old_gpcntl);
OUTB (nc_gpreg, old_gpreg);
return retv;
}
/*
* Try reading Tekram NVRAM.
* Return 0 if OK.
*/
static int __init
sym_read_Tekram_nvram (ncr_slot *np, u_short device_id, Tekram_nvram *nvram)
{
u_char *data = (u_char *) nvram;
int len = sizeof(*nvram);
u_short csum;
int x;
switch (device_id) {
case PCI_DEVICE_ID_NCR_53C885:
case PCI_DEVICE_ID_NCR_53C895:
case PCI_DEVICE_ID_NCR_53C896:
x = sym_read_S24C16_nvram(np, TEKRAM_24C16_NVRAM_ADDRESS,
data, len);
break;
case PCI_DEVICE_ID_NCR_53C875:
x = sym_read_S24C16_nvram(np, TEKRAM_24C16_NVRAM_ADDRESS,
data, len);
if (!x)
break;
default:
x = sym_read_T93C46_nvram(np, nvram);
break;
}
if (x)
return 1;
/* verify checksum */
for (x = 0, csum = 0; x < len - 1; x += 2)
csum += data[x] + (data[x+1] << 8);
if (csum != 0x1234)
return 1;
return 0;
}
#endif /* SCSI_NCR_NVRAM_SUPPORT */
/*
** Module stuff
*/
MODULE_LICENSE("GPL");
#if LINUX_VERSION_CODE >= LinuxVersionCode(2,4,0)
static
#endif
#if LINUX_VERSION_CODE >= LinuxVersionCode(2,4,0) || defined(MODULE)
Scsi_Host_Template driver_template = SYM53C8XX;
#include "scsi_module.c"
#endif