嵌入式Linux

开发平台：

Unix_Linux

advansys.c：源码内容

ASC_TENTHS(s->sg_xfer, 2));
ASC_PRT_NEXT();
/* Scatter gather transfer statistics */
len = asc_prt_line(cp, leftlen, " avg_num_elem %lu.%01lu, ",
s->sg_elem/s->sg_cnt,
ASC_TENTHS(s->sg_elem, s->sg_cnt));
ASC_PRT_NEXT();
len = asc_prt_line(cp, leftlen, "avg_elem_size %lu.%01lu kb, ",
(s->sg_xfer/2)/s->sg_elem,
ASC_TENTHS((s->sg_xfer/2), s->sg_elem));
ASC_PRT_NEXT();
len = asc_prt_line(cp, leftlen, "avg_xfer_size %lu.%01lu kbn",
(s->sg_xfer/2)/s->sg_cnt,
ASC_TENTHS((s->sg_xfer/2), s->sg_cnt));
ASC_PRT_NEXT();
}
/*
* Display request queuing statistics.
*/
len = asc_prt_line(cp, leftlen,
" Active and Waiting Request Queues (Time Unit: %d HZ):n", HZ);
ASC_PRT_NEXT();
return totlen;
}
/*
* asc_prt_target_stats()
*
* Note: no single line should be greater than ASC_PRTLINE_SIZE,
* cf. asc_prt_line().
*
* This is separated from asc_prt_board_stats because a full set
* of targets will overflow ASC_PRTBUF_SIZE.
*
* Return the number of characters copied into 'cp'. No more than
* 'cplen' characters will be copied to 'cp'.
*/
STATIC int
asc_prt_target_stats(struct Scsi_Host *shp, int tgt_id, char *cp, int cplen)
{
int leftlen;
int totlen;
int len;
struct asc_stats *s;
ushort chip_scsi_id;
asc_board_t *boardp;
asc_queue_t *active;
asc_queue_t *waiting;
leftlen = cplen;
totlen = len = 0;
boardp = ASC_BOARDP(shp);
s = &boardp->asc_stats;
active = &ASC_BOARDP(shp)->active;
waiting = &ASC_BOARDP(shp)->waiting;
if (ASC_NARROW_BOARD(boardp)) {
chip_scsi_id = boardp->dvc_cfg.asc_dvc_cfg.chip_scsi_id;
} else {
chip_scsi_id = boardp->dvc_var.adv_dvc_var.chip_scsi_id;
}
if ((chip_scsi_id == tgt_id) ||
((boardp->init_tidmask & ADV_TID_TO_TIDMASK(tgt_id)) == 0)) {
return 0;
}
do {
if (active->q_tot_cnt[tgt_id] > 0 || waiting->q_tot_cnt[tgt_id] > 0) {
len = asc_prt_line(cp, leftlen, " target %dn", tgt_id);
ASC_PRT_NEXT();
len = asc_prt_line(cp, leftlen,
" active: cnt [cur %d, max %d, tot %u], time [min %d, max %d, avg %lu.%01lu]n",
active->q_cur_cnt[tgt_id], active->q_max_cnt[tgt_id],
active->q_tot_cnt[tgt_id],
active->q_min_tim[tgt_id], active->q_max_tim[tgt_id],
(active->q_tot_cnt[tgt_id] == 0) ? 0 :
(active->q_tot_tim[tgt_id]/active->q_tot_cnt[tgt_id]),
(active->q_tot_cnt[tgt_id] == 0) ? 0 :
ASC_TENTHS(active->q_tot_tim[tgt_id],
active->q_tot_cnt[tgt_id]));
ASC_PRT_NEXT();
len = asc_prt_line(cp, leftlen,
" waiting: cnt [cur %d, max %d, tot %u], time [min %u, max %u, avg %lu.%01lu]n",
waiting->q_cur_cnt[tgt_id], waiting->q_max_cnt[tgt_id],
waiting->q_tot_cnt[tgt_id],
waiting->q_min_tim[tgt_id], waiting->q_max_tim[tgt_id],
(waiting->q_tot_cnt[tgt_id] == 0) ? 0 :
(waiting->q_tot_tim[tgt_id]/waiting->q_tot_cnt[tgt_id]),
(waiting->q_tot_cnt[tgt_id] == 0) ? 0 :
ASC_TENTHS(waiting->q_tot_tim[tgt_id],
waiting->q_tot_cnt[tgt_id]));
ASC_PRT_NEXT();
}
} while (0);
return totlen;
}
#endif /* CONFIG_PROC_FS */
#endif /* ADVANSYS_STATS */
#ifdef ADVANSYS_DEBUG
/*
* asc_prt_scsi_host()
*/
STATIC void
asc_prt_scsi_host(struct Scsi_Host *s)
{
asc_board_t *boardp;
boardp = ASC_BOARDP(s);
printk("Scsi_Host at addr 0x%lxn", (ulong) s);
printk(
" next 0x%lx, extra_bytes %u, host_busy %u, host_no %d, last_reset %d,n",
(ulong) s->next, s->extra_bytes, s->host_busy, s->host_no,
(unsigned) s->last_reset);
#if ASC_LINUX_KERNEL24
printk(
" host_queue 0x%lx, hostt 0x%lxn",
(ulong) s->host_queue, (ulong) s->hostt);
#elif ASC_LINUX_KERNEL22
printk(
" host_queue 0x%lx, hostt 0x%lx, block 0x%lx,n",
(ulong) s->host_queue, (ulong) s->hostt, (ulong) s->block);
#endif
printk(
" base 0x%lx, io_port 0x%lx, n_io_port %u, irq 0x%x,n",
(ulong) s->base, (ulong) s->io_port, s->n_io_port, s->irq);
printk(
" dma_channel %d, this_id %d, can_queue %d,n",
s->dma_channel, s->this_id, s->can_queue);
printk(
" cmd_per_lun %d, sg_tablesize %d, unchecked_isa_dma %d, loaded_as_module %dn",
s->cmd_per_lun, s->sg_tablesize, s->unchecked_isa_dma,
s->loaded_as_module);
if (ASC_NARROW_BOARD(boardp)) {
asc_prt_asc_dvc_var(&ASC_BOARDP(s)->dvc_var.asc_dvc_var);
asc_prt_asc_dvc_cfg(&ASC_BOARDP(s)->dvc_cfg.asc_dvc_cfg);
} else {
asc_prt_adv_dvc_var(&ASC_BOARDP(s)->dvc_var.adv_dvc_var);
asc_prt_adv_dvc_cfg(&ASC_BOARDP(s)->dvc_cfg.adv_dvc_cfg);
}
}
/*
* asc_prt_scsi_cmnd()
*/
STATIC void
asc_prt_scsi_cmnd(Scsi_Cmnd *s)
{
printk("Scsi_Cmnd at addr 0x%lxn", (ulong) s);
printk(
" host 0x%lx, device 0x%lx, target %u, lun %u, channel %u,n",
(ulong) s->host, (ulong) s->device, s->target, s->lun,
s->channel);
asc_prt_hex(" CDB", s->cmnd, s->cmd_len);
#if ASC_LINUX_KERNEL24
printk (
"sc_data_direction %u, resid %dn",
s->sc_data_direction, s->resid);
#endif
printk(
" use_sg %u, sglist_len %u, abort_reason 0x%xn",
s->use_sg, s->sglist_len, s->abort_reason);
printk(
" serial_number 0x%x, serial_number_at_timeout 0x%x, retries %d, allowed %dn",
(unsigned) s->serial_number, (unsigned) s->serial_number_at_timeout,
s->retries, s->allowed);
printk(
" timeout_per_command %d, timeout_total %d, timeout %dn",
s->timeout_per_command, s->timeout_total, s->timeout);
#if ASC_LINUX_KERNEL24
printk(
" internal_timeout %u, flags %un",
s->internal_timeout, s->flags);
#elif ASC_LINUX_KERNEL22
printk(
" internal_timeout %u, flags %u, this_count %dn",
s->internal_timeout, s->flags,s->this_count);
#endif
printk(
" scsi_done 0x%lx, done 0x%lx, host_scribble 0x%lx, result 0x%xn",
(ulong) s->scsi_done, (ulong) s->done,
(ulong) s->host_scribble, s->result);
printk(
" tag %u, pid %un",
(unsigned) s->tag, (unsigned) s->pid);
}
/*
* asc_prt_asc_dvc_var()
*/
STATIC void
asc_prt_asc_dvc_var(ASC_DVC_VAR *h)
{
printk("ASC_DVC_VAR at addr 0x%lxn", (ulong) h);
printk(
" iop_base 0x%x, err_code 0x%x, dvc_cntl 0x%x, bug_fix_cntl %d,n",
h->iop_base, h->err_code, h->dvc_cntl, h->bug_fix_cntl);
printk(
" bus_type %d, isr_callback 0x%lx, exe_callback 0x%lx, init_sdtr 0x%x,n",
h->bus_type, (ulong) h->isr_callback, (ulong) h->exe_callback,
(unsigned) h->init_sdtr);
printk(
" sdtr_done 0x%x, use_tagged_qng 0x%x, unit_not_ready 0x%x, chip_no 0x%x,n",
(unsigned) h->sdtr_done, (unsigned) h->use_tagged_qng,
(unsigned) h->unit_not_ready, (unsigned) h->chip_no);
printk(
" queue_full_or_busy 0x%x, start_motor 0x%x, scsi_reset_wait %u,n",
(unsigned) h->queue_full_or_busy, (unsigned) h->start_motor,
(unsigned) h->scsi_reset_wait);
printk(
" is_in_int %u, max_total_qng %u, cur_total_qng %u, in_critical_cnt %u,n",
(unsigned) h->is_in_int, (unsigned) h->max_total_qng,
(unsigned) h->cur_total_qng, (unsigned) h->in_critical_cnt);
printk(
" last_q_shortage %u, init_state 0x%x, no_scam 0x%x, pci_fix_asyn_xfer 0x%x,n",
(unsigned) h->last_q_shortage, (unsigned) h->init_state,
(unsigned) h->no_scam, (unsigned) h->pci_fix_asyn_xfer);
printk(
" cfg 0x%lx, irq_no 0x%xn",
(ulong) h->cfg, (unsigned) h->irq_no);
}
/*
* asc_prt_asc_dvc_cfg()
*/
STATIC void
asc_prt_asc_dvc_cfg(ASC_DVC_CFG *h)
{
printk("ASC_DVC_CFG at addr 0x%lxn", (ulong) h);
printk(
" can_tagged_qng 0x%x, cmd_qng_enabled 0x%x,n",
h->can_tagged_qng, h->cmd_qng_enabled);
printk(
" disc_enable 0x%x, sdtr_enable 0x%x,n",
h->disc_enable, h->sdtr_enable);
printk(
" chip_scsi_id %d, isa_dma_speed %d, isa_dma_channel %d, chip_version %d,n",
h->chip_scsi_id, h->isa_dma_speed, h->isa_dma_channel,
h->chip_version);
printk(
" pci_device_id %d, lib_serial_no %u, lib_version %u, mcode_date 0x%x,n",
h->pci_device_id, h->lib_serial_no, h->lib_version, h->mcode_date);
printk(
" mcode_version %d, overrun_buf 0x%lxn",
h->mcode_version, (ulong) h->overrun_buf);
}
/*
* asc_prt_asc_scsi_q()
*/
STATIC void
asc_prt_asc_scsi_q(ASC_SCSI_Q *q)
{
ASC_SG_HEAD *sgp;
int i;
printk("ASC_SCSI_Q at addr 0x%lxn", (ulong) q);
printk(
" target_ix 0x%x, target_lun %u, srb_ptr 0x%lx, tag_code 0x%x,n",
q->q2.target_ix, q->q1.target_lun,
(ulong) q->q2.srb_ptr, q->q2.tag_code);
printk(
" data_addr 0x%lx, data_cnt %lu, sense_addr 0x%lx, sense_len %u,n",
(ulong) le32_to_cpu(q->q1.data_addr),
(ulong) le32_to_cpu(q->q1.data_cnt),
(ulong) le32_to_cpu(q->q1.sense_addr), q->q1.sense_len);
printk(
" cdbptr 0x%lx, cdb_len %u, sg_head 0x%lx, sg_queue_cnt %un",
(ulong) q->cdbptr, q->q2.cdb_len,
(ulong) q->sg_head, q->q1.sg_queue_cnt);
if (q->sg_head) {
sgp = q->sg_head;
printk("ASC_SG_HEAD at addr 0x%lxn", (ulong) sgp);
printk(" entry_cnt %u, queue_cnt %un", sgp->entry_cnt, sgp->queue_cnt);
for (i = 0; i < sgp->entry_cnt; i++) {
printk(" [%u]: addr 0x%lx, bytes %lun",
i, (ulong) le32_to_cpu(sgp->sg_list[i].addr),
(ulong) le32_to_cpu(sgp->sg_list[i].bytes));
}
}
}
/*
* asc_prt_asc_qdone_info()
*/
STATIC void
asc_prt_asc_qdone_info(ASC_QDONE_INFO *q)
{
printk("ASC_QDONE_INFO at addr 0x%lxn", (ulong) q);
printk(
" srb_ptr 0x%lx, target_ix %u, cdb_len %u, tag_code %u,n",
(ulong) q->d2.srb_ptr, q->d2.target_ix, q->d2.cdb_len,
q->d2.tag_code);
printk(
" done_stat 0x%x, host_stat 0x%x, scsi_stat 0x%x, scsi_msg 0x%xn",
q->d3.done_stat, q->d3.host_stat, q->d3.scsi_stat, q->d3.scsi_msg);
}
/*
* asc_prt_adv_dvc_var()
*
* Display an ADV_DVC_VAR structure.
*/
STATIC void
asc_prt_adv_dvc_var(ADV_DVC_VAR *h)
{
printk(" ADV_DVC_VAR at addr 0x%lxn", (ulong) h);
printk(
" iop_base 0x%lx, err_code 0x%x, ultra_able 0x%xn",
(ulong) h->iop_base, h->err_code, (unsigned) h->ultra_able);
printk(
" isr_callback 0x%lx, sdtr_able 0x%x, wdtr_able 0x%xn",
(ulong) h->isr_callback, (unsigned) h->sdtr_able,
(unsigned) h->wdtr_able);
printk(
" start_motor 0x%x, scsi_reset_wait 0x%x, irq_no 0x%x,n",
(unsigned) h->start_motor,
(unsigned) h->scsi_reset_wait, (unsigned) h->irq_no);
printk(
" max_host_qng %u, max_dvc_qng %u, carr_freelist 0x%lxnn",
(unsigned) h->max_host_qng, (unsigned) h->max_dvc_qng,
(ulong) h->carr_freelist);
printk(
" icq_sp 0x%lx, irq_sp 0x%lxn",
(ulong) h->icq_sp, (ulong) h->irq_sp);
printk(
" no_scam 0x%x, tagqng_able 0x%xn",
(unsigned) h->no_scam, (unsigned) h->tagqng_able);
printk(
" chip_scsi_id 0x%x, cfg 0x%lxn",
(unsigned) h->chip_scsi_id, (ulong) h->cfg);
}
/*
* asc_prt_adv_dvc_cfg()
*
* Display an ADV_DVC_CFG structure.
*/
STATIC void
asc_prt_adv_dvc_cfg(ADV_DVC_CFG *h)
{
printk(" ADV_DVC_CFG at addr 0x%lxn", (ulong) h);
printk(
" disc_enable 0x%x, termination 0x%xn",
h->disc_enable, h->termination);
printk(
" chip_version 0x%x, mcode_date 0x%xn",
h->chip_version, h->mcode_date);
printk(
" mcode_version 0x%x, pci_device_id 0x%x, lib_version %un",
h->mcode_version, h->pci_device_id, h->lib_version);
printk(
" control_flag 0x%x, pci_slot_info 0x%xn",
h->control_flag, h->pci_slot_info);
}
/*
* asc_prt_adv_scsi_req_q()
*
* Display an ADV_SCSI_REQ_Q structure.
*/
STATIC void
asc_prt_adv_scsi_req_q(ADV_SCSI_REQ_Q *q)
{
int sg_blk_cnt;
struct asc_sg_block *sg_ptr;
printk("ADV_SCSI_REQ_Q at addr 0x%lxn", (ulong) q);
printk(
" target_id %u, target_lun %u, srb_ptr 0x%lx, a_flag 0x%xn",
q->target_id, q->target_lun, (ulong) q->srb_ptr, q->a_flag);
printk(" cntl 0x%x, data_addr 0x%lx, vdata_addr 0x%lxn",
q->cntl, (ulong) le32_to_cpu(q->data_addr), (ulong) q->vdata_addr);
printk(
" data_cnt %lu, sense_addr 0x%lx, sense_len %u,n",
(ulong) le32_to_cpu(q->data_cnt),
(ulong) le32_to_cpu(q->sense_addr), q->sense_len);
printk(
" cdb_len %u, done_status 0x%x, host_status 0x%x, scsi_status 0x%xn",
q->cdb_len, q->done_status, q->host_status, q->scsi_status);
printk(
" sg_working_ix 0x%x, target_cmd %un",
q->sg_working_ix, q->target_cmd);
printk(
" scsiq_rptr 0x%lx, sg_real_addr 0x%lx, sg_list_ptr 0x%lxn",
(ulong) le32_to_cpu(q->scsiq_rptr),
(ulong) le32_to_cpu(q->sg_real_addr), (ulong) q->sg_list_ptr);
/* Display the request's ADV_SG_BLOCK structures. */
if (q->sg_list_ptr != NULL)
{
sg_blk_cnt = 0;
while (1) {
/*
* 'sg_ptr' is a physical address. Convert it to a virtual
* address by indexing 'sg_blk_cnt' into the virtual address
* array 'sg_list_ptr'.
*
* XXX - Assumes all SG physical blocks are virtually contiguous.
*/
sg_ptr = &(((ADV_SG_BLOCK *) (q->sg_list_ptr))[sg_blk_cnt]);
asc_prt_adv_sgblock(sg_blk_cnt, sg_ptr);
if (sg_ptr->sg_ptr == 0)
{
break;
}
sg_blk_cnt++;
}
}
}
/*
* asc_prt_adv_sgblock()
*
* Display an ADV_SG_BLOCK structure.
*/
STATIC void
asc_prt_adv_sgblock(int sgblockno, ADV_SG_BLOCK *b)
{
int i;
printk(" ASC_SG_BLOCK at addr 0x%lx (sgblockno %d)n",
(ulong) b, sgblockno);
printk(" sg_cnt %u, sg_ptr 0x%lxn",
b->sg_cnt, (ulong) le32_to_cpu(b->sg_ptr));
ASC_ASSERT(b->sg_cnt <= NO_OF_SG_PER_BLOCK);
if (b->sg_ptr != 0)
{
ASC_ASSERT(b->sg_cnt == NO_OF_SG_PER_BLOCK);
}
for (i = 0; i < b->sg_cnt; i++) {
printk(" [%u]: sg_addr 0x%lx, sg_count 0x%lxn",
i, (ulong) b->sg_list[i].sg_addr, (ulong) b->sg_list[i].sg_count);
}
}
/*
* asc_prt_hex()
*
* Print hexadecimal output in 4 byte groupings 32 bytes
* or 8 double-words per line.
*/
STATIC void
asc_prt_hex(char *f, uchar *s, int l)
{
int i;
int j;
int k;
int m;
printk("%s: (%d bytes)n", f, l);
for (i = 0; i < l; i += 32) {
/* Display a maximum of 8 double-words per line. */
if ((k = (l - i) / 4) >= 8) {
k = 8;
m = 0;
} else {
m = (l - i) % 4;
}
for (j = 0; j < k; j++) {
printk(" %2.2X%2.2X%2.2X%2.2X",
(unsigned) s[i+(j*4)], (unsigned) s[i+(j*4)+1],
(unsigned) s[i+(j*4)+2], (unsigned) s[i+(j*4)+3]);
}
switch (m) {
case 0:
default:
break;
case 1:
printk(" %2.2X",
(unsigned) s[i+(j*4)]);
break;
case 2:
printk(" %2.2X%2.2X",
(unsigned) s[i+(j*4)],
(unsigned) s[i+(j*4)+1]);
break;
case 3:
printk(" %2.2X%2.2X%2.2X",
(unsigned) s[i+(j*4)+1],
(unsigned) s[i+(j*4)+2],
(unsigned) s[i+(j*4)+3]);
break;
}
printk("n");
}
}
#endif /* ADVANSYS_DEBUG */
/*
* --- Asc Library Functions
*/
ASC_INITFUNC(
STATIC ushort,
AscGetEisaChipCfg(
PortAddr iop_base
)
)
{
PortAddr eisa_cfg_iop;
eisa_cfg_iop = (PortAddr) ASC_GET_EISA_SLOT(iop_base) |
(PortAddr) (ASC_EISA_CFG_IOP_MASK);
return (inpw(eisa_cfg_iop));
}
ASC_INITFUNC(
STATIC uchar,
AscSetChipScsiID(
PortAddr iop_base,
uchar new_host_id
)
)
{
ushort cfg_lsw;
if (AscGetChipScsiID(iop_base) == new_host_id) {
return (new_host_id);
}
cfg_lsw = AscGetChipCfgLsw(iop_base);
cfg_lsw &= 0xF8FF;
cfg_lsw |= (ushort) ((new_host_id & ASC_MAX_TID) << 8);
AscSetChipCfgLsw(iop_base, cfg_lsw);
return (AscGetChipScsiID(iop_base));
}
ASC_INITFUNC(
STATIC uchar,
AscGetChipScsiCtrl(
PortAddr iop_base
)
)
{
uchar sc;
AscSetBank(iop_base, 1);
sc = inp(iop_base + IOP_REG_SC);
AscSetBank(iop_base, 0);
return (sc);
}
ASC_INITFUNC(
STATIC uchar,
AscGetChipVersion(
PortAddr iop_base,
ushort bus_type
)
)
{
if ((bus_type & ASC_IS_EISA) != 0) {
PortAddr eisa_iop;
uchar revision;
eisa_iop = (PortAddr) ASC_GET_EISA_SLOT(iop_base) |
(PortAddr) ASC_EISA_REV_IOP_MASK;
revision = inp(eisa_iop);
return ((uchar) ((ASC_CHIP_MIN_VER_EISA - 1) + revision));
}
return (AscGetChipVerNo(iop_base));
}
ASC_INITFUNC(
STATIC ushort,
AscGetChipBusType(
PortAddr iop_base
)
)
{
ushort chip_ver;
chip_ver = AscGetChipVerNo(iop_base);
if (
(chip_ver >= ASC_CHIP_MIN_VER_VL)
&& (chip_ver <= ASC_CHIP_MAX_VER_VL)
) {
if (
((iop_base & 0x0C30) == 0x0C30)
|| ((iop_base & 0x0C50) == 0x0C50)
) {
return (ASC_IS_EISA);
}
return (ASC_IS_VL);
}
if ((chip_ver >= ASC_CHIP_MIN_VER_ISA) &&
(chip_ver <= ASC_CHIP_MAX_VER_ISA)) {
if (chip_ver >= ASC_CHIP_MIN_VER_ISA_PNP) {
return (ASC_IS_ISAPNP);
}
return (ASC_IS_ISA);
} else if ((chip_ver >= ASC_CHIP_MIN_VER_PCI) &&
(chip_ver <= ASC_CHIP_MAX_VER_PCI)) {
return (ASC_IS_PCI);
}
return (0);
}
STATIC ASC_DCNT
AscLoadMicroCode(
PortAddr iop_base,
ushort s_addr,
uchar *mcode_buf,
ushort mcode_size
)
{
ASC_DCNT chksum;
ushort mcode_word_size;
ushort mcode_chksum;
/* Write the microcode buffer starting at LRAM address 0. */
mcode_word_size = (ushort) (mcode_size >> 1);
AscMemWordSetLram(iop_base, s_addr, 0, mcode_word_size);
AscMemWordCopyPtrToLram(iop_base, s_addr, mcode_buf, mcode_word_size);
chksum = AscMemSumLramWord(iop_base, s_addr, mcode_word_size);
ASC_DBG1(1, "AscLoadMicroCode: chksum 0x%lxn", (ulong) chksum);
mcode_chksum = (ushort) AscMemSumLramWord(iop_base,
(ushort) ASC_CODE_SEC_BEG,
(ushort) ((mcode_size - s_addr - (ushort) ASC_CODE_SEC_BEG) / 2));
ASC_DBG1(1, "AscLoadMicroCode: mcode_chksum 0x%lxn",
(ulong) mcode_chksum);
AscWriteLramWord(iop_base, ASCV_MCODE_CHKSUM_W, mcode_chksum);
AscWriteLramWord(iop_base, ASCV_MCODE_SIZE_W, mcode_size);
return (chksum);
}
STATIC int
AscFindSignature(
PortAddr iop_base
)
{
ushort sig_word;
ASC_DBG2(1, "AscFindSignature: AscGetChipSignatureByte(0x%x) 0x%xn",
iop_base, AscGetChipSignatureByte(iop_base));
if (AscGetChipSignatureByte(iop_base) == (uchar) ASC_1000_ID1B) {
ASC_DBG2(1, "AscFindSignature: AscGetChipSignatureWord(0x%x) 0x%xn",
iop_base, AscGetChipSignatureWord(iop_base));
sig_word = AscGetChipSignatureWord(iop_base);
if ((sig_word == (ushort) ASC_1000_ID0W) ||
(sig_word == (ushort) ASC_1000_ID0W_FIX)) {
return (1);
}
}
return (0);
}
STATIC PortAddr _asc_def_iop_base[ASC_IOADR_TABLE_MAX_IX] ASC_INITDATA =
{
0x100, ASC_IOADR_1, 0x120, ASC_IOADR_2, 0x140, ASC_IOADR_3, ASC_IOADR_4,
ASC_IOADR_5, ASC_IOADR_6, ASC_IOADR_7, ASC_IOADR_8
};
#ifdef CONFIG_ISA
STATIC uchar _isa_pnp_inited ASC_INITDATA = 0;
ASC_INITFUNC(
STATIC PortAddr,
AscSearchIOPortAddr(
PortAddr iop_beg,
ushort bus_type
)
)
{
if (bus_type & ASC_IS_VL) {
while ((iop_beg = AscSearchIOPortAddr11(iop_beg)) != 0) {
if (AscGetChipVersion(iop_beg, bus_type) <= ASC_CHIP_MAX_VER_VL) {
return (iop_beg);
}
}
return (0);
}
if (bus_type & ASC_IS_ISA) {
if (_isa_pnp_inited == 0) {
AscSetISAPNPWaitForKey();
_isa_pnp_inited++;
}
while ((iop_beg = AscSearchIOPortAddr11(iop_beg)) != 0) {
if ((AscGetChipVersion(iop_beg, bus_type) & ASC_CHIP_VER_ISA_BIT) != 0) {
return (iop_beg);
}
}
return (0);
}
if (bus_type & ASC_IS_EISA) {
if ((iop_beg = AscSearchIOPortAddrEISA(iop_beg)) != 0) {
return (iop_beg);
}
return (0);
}
return (0);
}
ASC_INITFUNC(
STATIC PortAddr,
AscSearchIOPortAddr11(
PortAddr s_addr
)
)
{
int i;
PortAddr iop_base;
for (i = 0; i < ASC_IOADR_TABLE_MAX_IX; i++) {
if (_asc_def_iop_base[i] > s_addr) {
break;
}
}
for (; i < ASC_IOADR_TABLE_MAX_IX; i++) {
iop_base = _asc_def_iop_base[i];
if (check_region(iop_base, ASC_IOADR_GAP) != 0) {
ASC_DBG1(1,
"AscSearchIOPortAddr11: check_region() failed I/O port 0x%xn",
iop_base);
continue;
}
ASC_DBG1(1, "AscSearchIOPortAddr11: probing I/O port 0x%xn", iop_base);
if (AscFindSignature(iop_base)) {
return (iop_base);
}
}
return (0);
}
ASC_INITFUNC(
STATIC void,
AscSetISAPNPWaitForKey(
void)
)
{
outp(ASC_ISA_PNP_PORT_ADDR, 0x02);
outp(ASC_ISA_PNP_PORT_WRITE, 0x02);
return;
}
#endif /* CONFIG_ISA */
ASC_INITFUNC(
STATIC void,
AscToggleIRQAct(
PortAddr iop_base
)
)
{
AscSetChipStatus(iop_base, CIW_IRQ_ACT);
AscSetChipStatus(iop_base, 0);
return;
}
ASC_INITFUNC(
STATIC uchar,
AscGetChipIRQ(
PortAddr iop_base,
ushort bus_type
)
)
{
ushort cfg_lsw;
uchar chip_irq;
if ((bus_type & ASC_IS_EISA) != 0) {
cfg_lsw = AscGetEisaChipCfg(iop_base);
chip_irq = (uchar) (((cfg_lsw >> 8) & 0x07) + 10);
if ((chip_irq == 13) || (chip_irq > 15)) {
return (0);
}
return (chip_irq);
}
if ((bus_type & ASC_IS_VL) != 0) {
cfg_lsw = AscGetChipCfgLsw(iop_base);
chip_irq = (uchar) (((cfg_lsw >> 2) & 0x07));
if ((chip_irq == 0) ||
(chip_irq == 4) ||
(chip_irq == 7)) {
return (0);
}
return ((uchar) (chip_irq + (ASC_MIN_IRQ_NO - 1)));
}
cfg_lsw = AscGetChipCfgLsw(iop_base);
chip_irq = (uchar) (((cfg_lsw >> 2) & 0x03));
if (chip_irq == 3)
chip_irq += (uchar) 2;
return ((uchar) (chip_irq + ASC_MIN_IRQ_NO));
}
ASC_INITFUNC(
STATIC uchar,
AscSetChipIRQ(
PortAddr iop_base,
uchar irq_no,
ushort bus_type
)
)
{
ushort cfg_lsw;
if ((bus_type & ASC_IS_VL) != 0) {
if (irq_no != 0) {
if ((irq_no < ASC_MIN_IRQ_NO) || (irq_no > ASC_MAX_IRQ_NO)) {
irq_no = 0;
} else {
irq_no -= (uchar) ((ASC_MIN_IRQ_NO - 1));
}
}
cfg_lsw = (ushort) (AscGetChipCfgLsw(iop_base) & 0xFFE3);
cfg_lsw |= (ushort) 0x0010;
AscSetChipCfgLsw(iop_base, cfg_lsw);
AscToggleIRQAct(iop_base);
cfg_lsw = (ushort) (AscGetChipCfgLsw(iop_base) & 0xFFE0);
cfg_lsw |= (ushort) ((irq_no & 0x07) << 2);
AscSetChipCfgLsw(iop_base, cfg_lsw);
AscToggleIRQAct(iop_base);
return (AscGetChipIRQ(iop_base, bus_type));
}
if ((bus_type & (ASC_IS_ISA)) != 0) {
if (irq_no == 15)
irq_no -= (uchar) 2;
irq_no -= (uchar) ASC_MIN_IRQ_NO;
cfg_lsw = (ushort) (AscGetChipCfgLsw(iop_base) & 0xFFF3);
cfg_lsw |= (ushort) ((irq_no & 0x03) << 2);
AscSetChipCfgLsw(iop_base, cfg_lsw);
return (AscGetChipIRQ(iop_base, bus_type));
}
return (0);
}
#ifdef CONFIG_ISA
ASC_INITFUNC(
STATIC void,
AscEnableIsaDma(
uchar dma_channel
)
)
{
if (dma_channel < 4) {
outp(0x000B, (ushort) (0xC0 | dma_channel));
outp(0x000A, dma_channel);
} else if (dma_channel < 8) {
outp(0x00D6, (ushort) (0xC0 | (dma_channel - 4)));
outp(0x00D4, (ushort) (dma_channel - 4));
}
return;
}
#endif /* CONFIG_ISA */
STATIC int
AscIsrChipHalted(
ASC_DVC_VAR *asc_dvc
)
{
EXT_MSG ext_msg;
EXT_MSG out_msg;
ushort halt_q_addr;
int sdtr_accept;
ushort int_halt_code;
ASC_SCSI_BIT_ID_TYPE scsi_busy;
ASC_SCSI_BIT_ID_TYPE target_id;
PortAddr iop_base;
uchar tag_code;
uchar q_status;
uchar halt_qp;
uchar sdtr_data;
uchar target_ix;
uchar q_cntl, tid_no;
uchar cur_dvc_qng;
uchar asyn_sdtr;
uchar scsi_status;
asc_board_t *boardp;
ASC_ASSERT(asc_dvc->drv_ptr != NULL);
boardp = asc_dvc->drv_ptr;
iop_base = asc_dvc->iop_base;
int_halt_code = AscReadLramWord(iop_base, ASCV_HALTCODE_W);
halt_qp = AscReadLramByte(iop_base, ASCV_CURCDB_B);
halt_q_addr = ASC_QNO_TO_QADDR(halt_qp);
target_ix = AscReadLramByte(iop_base,
(ushort) (halt_q_addr + (ushort) ASC_SCSIQ_B_TARGET_IX));
q_cntl = AscReadLramByte(iop_base,
(ushort) (halt_q_addr + (ushort) ASC_SCSIQ_B_CNTL));
tid_no = ASC_TIX_TO_TID(target_ix);
target_id = (uchar) ASC_TID_TO_TARGET_ID(tid_no);
if (asc_dvc->pci_fix_asyn_xfer & target_id) {
asyn_sdtr = ASYN_SDTR_DATA_FIX_PCI_REV_AB;
} else {
asyn_sdtr = 0;
}
if (int_halt_code == ASC_HALT_DISABLE_ASYN_USE_SYN_FIX) {
if (asc_dvc->pci_fix_asyn_xfer & target_id) {
AscSetChipSDTR(iop_base, 0, tid_no);
boardp->sdtr_data[tid_no] = 0;
}
AscWriteLramWord(iop_base, ASCV_HALTCODE_W, 0);
return (0);
} else if (int_halt_code == ASC_HALT_ENABLE_ASYN_USE_SYN_FIX) {
if (asc_dvc->pci_fix_asyn_xfer & target_id) {
AscSetChipSDTR(iop_base, asyn_sdtr, tid_no);
boardp->sdtr_data[tid_no] = asyn_sdtr;
}
AscWriteLramWord(iop_base, ASCV_HALTCODE_W, 0);
return (0);
} else if (int_halt_code == ASC_HALT_EXTMSG_IN) {
AscMemWordCopyPtrFromLram(iop_base,
ASCV_MSGIN_BEG,
(uchar *) &ext_msg,
sizeof(EXT_MSG) >> 1);
if (ext_msg.msg_type == MS_EXTEND &&
ext_msg.msg_req == MS_SDTR_CODE &&
ext_msg.msg_len == MS_SDTR_LEN) {
sdtr_accept = TRUE;
if ((ext_msg.req_ack_offset > ASC_SYN_MAX_OFFSET)) {
sdtr_accept = FALSE;
ext_msg.req_ack_offset = ASC_SYN_MAX_OFFSET;
}
if ((ext_msg.xfer_period <
asc_dvc->sdtr_period_tbl[asc_dvc->host_init_sdtr_index]) ||
(ext_msg.xfer_period >
asc_dvc->sdtr_period_tbl[asc_dvc->max_sdtr_index])) {
sdtr_accept = FALSE;
ext_msg.xfer_period =
asc_dvc->sdtr_period_tbl[asc_dvc->host_init_sdtr_index];
}
if (sdtr_accept) {
sdtr_data = AscCalSDTRData(asc_dvc, ext_msg.xfer_period,
ext_msg.req_ack_offset);
if ((sdtr_data == 0xFF)) {
q_cntl |= QC_MSG_OUT;
asc_dvc->init_sdtr &= ~target_id;
asc_dvc->sdtr_done &= ~target_id;
AscSetChipSDTR(iop_base, asyn_sdtr, tid_no);
boardp->sdtr_data[tid_no] = asyn_sdtr;
}
}
if (ext_msg.req_ack_offset == 0) {
q_cntl &= ~QC_MSG_OUT;
asc_dvc->init_sdtr &= ~target_id;
asc_dvc->sdtr_done &= ~target_id;
AscSetChipSDTR(iop_base, asyn_sdtr, tid_no);
} else {
if (sdtr_accept && (q_cntl & QC_MSG_OUT)) {
q_cntl &= ~QC_MSG_OUT;
asc_dvc->sdtr_done |= target_id;
asc_dvc->init_sdtr |= target_id;
asc_dvc->pci_fix_asyn_xfer &= ~target_id;
sdtr_data = AscCalSDTRData(asc_dvc, ext_msg.xfer_period,
ext_msg.req_ack_offset);
AscSetChipSDTR(iop_base, sdtr_data, tid_no);
boardp->sdtr_data[tid_no] = sdtr_data;
} else {
q_cntl |= QC_MSG_OUT;
AscMsgOutSDTR(asc_dvc,
ext_msg.xfer_period,
ext_msg.req_ack_offset);
asc_dvc->pci_fix_asyn_xfer &= ~target_id;
sdtr_data = AscCalSDTRData(asc_dvc, ext_msg.xfer_period,
ext_msg.req_ack_offset);
AscSetChipSDTR(iop_base, sdtr_data, tid_no);
boardp->sdtr_data[tid_no] = sdtr_data;
asc_dvc->sdtr_done |= target_id;
asc_dvc->init_sdtr |= target_id;
}
}
AscWriteLramByte(iop_base,
(ushort) (halt_q_addr + (ushort) ASC_SCSIQ_B_CNTL),
q_cntl);
AscWriteLramWord(iop_base, ASCV_HALTCODE_W, 0);
return (0);
} else if (ext_msg.msg_type == MS_EXTEND &&
ext_msg.msg_req == MS_WDTR_CODE &&
ext_msg.msg_len == MS_WDTR_LEN) {
ext_msg.wdtr_width = 0;
AscMemWordCopyPtrToLram(iop_base,
ASCV_MSGOUT_BEG,
(uchar *) &ext_msg,
sizeof(EXT_MSG) >> 1);
q_cntl |= QC_MSG_OUT;
AscWriteLramByte(iop_base,
(ushort) (halt_q_addr + (ushort) ASC_SCSIQ_B_CNTL),
q_cntl);
AscWriteLramWord(iop_base, ASCV_HALTCODE_W, 0);
return (0);
} else {
ext_msg.msg_type = M1_MSG_REJECT;
AscMemWordCopyPtrToLram(iop_base,
ASCV_MSGOUT_BEG,
(uchar *) &ext_msg,
sizeof(EXT_MSG) >> 1);
q_cntl |= QC_MSG_OUT;
AscWriteLramByte(iop_base,
(ushort) (halt_q_addr + (ushort) ASC_SCSIQ_B_CNTL),
q_cntl);
AscWriteLramWord(iop_base, ASCV_HALTCODE_W, 0);
return (0);
}
} else if (int_halt_code == ASC_HALT_CHK_CONDITION) {
q_cntl |= QC_REQ_SENSE;
if ((asc_dvc->init_sdtr & target_id) != 0) {
asc_dvc->sdtr_done &= ~target_id;
sdtr_data = AscGetMCodeInitSDTRAtID(iop_base, tid_no);
q_cntl |= QC_MSG_OUT;
AscMsgOutSDTR(asc_dvc,
asc_dvc->sdtr_period_tbl[(sdtr_data >> 4) &
(uchar) (asc_dvc->max_sdtr_index - 1)],
(uchar) (sdtr_data & (uchar) ASC_SYN_MAX_OFFSET));
}
AscWriteLramByte(iop_base,
(ushort) (halt_q_addr + (ushort) ASC_SCSIQ_B_CNTL),
q_cntl);
tag_code = AscReadLramByte(iop_base,
(ushort) (halt_q_addr + (ushort) ASC_SCSIQ_B_TAG_CODE));
tag_code &= 0xDC;
if (
(asc_dvc->pci_fix_asyn_xfer & target_id)
&& !(asc_dvc->pci_fix_asyn_xfer_always & target_id)
) {
tag_code |= (ASC_TAG_FLAG_DISABLE_DISCONNECT
| ASC_TAG_FLAG_DISABLE_ASYN_USE_SYN_FIX);
}
AscWriteLramByte(iop_base,
(ushort) (halt_q_addr + (ushort) ASC_SCSIQ_B_TAG_CODE),
tag_code);
q_status = AscReadLramByte(iop_base,
(ushort) (halt_q_addr + (ushort) ASC_SCSIQ_B_STATUS));
q_status |= (QS_READY | QS_BUSY);
AscWriteLramByte(iop_base,
(ushort) (halt_q_addr + (ushort) ASC_SCSIQ_B_STATUS),
q_status);
scsi_busy = AscReadLramByte(iop_base,
(ushort) ASCV_SCSIBUSY_B);
scsi_busy &= ~target_id;
AscWriteLramByte(iop_base, (ushort) ASCV_SCSIBUSY_B, scsi_busy);
AscWriteLramWord(iop_base, ASCV_HALTCODE_W, 0);
return (0);
} else if (int_halt_code == ASC_HALT_SDTR_REJECTED) {
AscMemWordCopyPtrFromLram(iop_base,
ASCV_MSGOUT_BEG,
(uchar *) &out_msg,
sizeof(EXT_MSG) >> 1);
if ((out_msg.msg_type == MS_EXTEND) &&
(out_msg.msg_len == MS_SDTR_LEN) &&
(out_msg.msg_req == MS_SDTR_CODE)) {
asc_dvc->init_sdtr &= ~target_id;
asc_dvc->sdtr_done &= ~target_id;
AscSetChipSDTR(iop_base, asyn_sdtr, tid_no);
boardp->sdtr_data[tid_no] = asyn_sdtr;
}
q_cntl &= ~QC_MSG_OUT;
AscWriteLramByte(iop_base,
(ushort) (halt_q_addr + (ushort) ASC_SCSIQ_B_CNTL),
q_cntl);
AscWriteLramWord(iop_base, ASCV_HALTCODE_W, 0);
return (0);
} else if (int_halt_code == ASC_HALT_SS_QUEUE_FULL) {
scsi_status = AscReadLramByte(iop_base,
(ushort) ((ushort) halt_q_addr + (ushort) ASC_SCSIQ_SCSI_STATUS));
cur_dvc_qng = AscReadLramByte(iop_base,
(ushort) ((ushort) ASC_QADR_BEG + (ushort) target_ix));
if ((cur_dvc_qng > 0) &&
(asc_dvc->cur_dvc_qng[tid_no] > 0)) {
scsi_busy = AscReadLramByte(iop_base,
(ushort) ASCV_SCSIBUSY_B);
scsi_busy |= target_id;
AscWriteLramByte(iop_base,
(ushort) ASCV_SCSIBUSY_B, scsi_busy);
asc_dvc->queue_full_or_busy |= target_id;
if (scsi_status == SS_QUEUE_FULL) {
if (cur_dvc_qng > ASC_MIN_TAGGED_CMD) {
cur_dvc_qng -= 1;
asc_dvc->max_dvc_qng[tid_no] = cur_dvc_qng;
AscWriteLramByte(iop_base,
(ushort) ((ushort) ASCV_MAX_DVC_QNG_BEG +
(ushort) tid_no),
cur_dvc_qng);
/*
* Set the device queue depth to the number of
* active requests when the QUEUE FULL condition
* was encountered.
*/
boardp->queue_full |= target_id;
boardp->queue_full_cnt[tid_no] = cur_dvc_qng;
}
}
}
AscWriteLramWord(iop_base, ASCV_HALTCODE_W, 0);
return (0);
}
#if CC_VERY_LONG_SG_LIST
else if (int_halt_code == ASC_HALT_HOST_COPY_SG_LIST_TO_RISC)
{
uchar q_no;
ushort q_addr;
uchar sg_wk_q_no;
uchar first_sg_wk_q_no;
ASC_SCSI_Q *scsiq; /* Ptr to driver request. */
ASC_SG_HEAD *sg_head; /* Ptr to driver SG request. */
ASC_SG_LIST_Q scsi_sg_q; /* Structure written to queue. */
ushort sg_list_dwords;
ushort sg_entry_cnt;
uchar next_qp;
int i;
q_no = AscReadLramByte(iop_base, (ushort) ASCV_REQ_SG_LIST_QP);
if (q_no == ASC_QLINK_END)
{
return(0);
}
q_addr = ASC_QNO_TO_QADDR(q_no);
/*
* Convert the request's SRB pointer to a host ASC_SCSI_REQ
* structure pointer using a macro provided by the driver.
* The ASC_SCSI_REQ pointer provides a pointer to the
* host ASC_SG_HEAD structure.
*/
/* Read request's SRB pointer. */
scsiq = (ASC_SCSI_Q *)
ASC_SRB2SCSIQ(
ASC_U32_TO_VADDR(AscReadLramDWord(iop_base,
(ushort) (q_addr + ASC_SCSIQ_D_SRBPTR))));
/*
* Get request's first and working SG queue.
*/
sg_wk_q_no = AscReadLramByte(iop_base,
(ushort) (q_addr + ASC_SCSIQ_B_SG_WK_QP));
first_sg_wk_q_no = AscReadLramByte(iop_base,
(ushort) (q_addr + ASC_SCSIQ_B_FIRST_SG_WK_QP));
/*
* Reset request's working SG queue back to the
* first SG queue.
*/
AscWriteLramByte(iop_base,
(ushort) (q_addr + (ushort) ASC_SCSIQ_B_SG_WK_QP),
first_sg_wk_q_no);
sg_head = scsiq->sg_head;
/*
* Set sg_entry_cnt to the number of SG elements
* that will be completed on this interrupt.
*
* Note: The allocated SG queues contain ASC_MAX_SG_LIST - 1
* SG elements. The data_cnt and data_addr fields which
* add 1 to the SG element capacity are not used when
* restarting SG handling after a halt.
*/
if (scsiq->remain_sg_entry_cnt > (ASC_MAX_SG_LIST - 1))
{
sg_entry_cnt = ASC_MAX_SG_LIST - 1;
/*
* Keep track of remaining number of SG elements that will
* need to be handled on the next interrupt.
*/
scsiq->remain_sg_entry_cnt -= (ASC_MAX_SG_LIST - 1);
} else
{
sg_entry_cnt = scsiq->remain_sg_entry_cnt;
scsiq->remain_sg_entry_cnt = 0;
}
/*
* Copy SG elements into the list of allocated SG queues.
*
* Last index completed is saved in scsiq->next_sg_index.
*/
next_qp = first_sg_wk_q_no;
q_addr = ASC_QNO_TO_QADDR(next_qp);
scsi_sg_q.sg_head_qp = q_no;
scsi_sg_q.cntl = QCSG_SG_XFER_LIST;
for( i = 0; i < sg_head->queue_cnt; i++)
{
scsi_sg_q.seq_no = i + 1;
if (sg_entry_cnt > ASC_SG_LIST_PER_Q)
{
sg_list_dwords = (uchar) (ASC_SG_LIST_PER_Q * 2);
sg_entry_cnt -= ASC_SG_LIST_PER_Q;
/*
* After very first SG queue RISC FW uses next
* SG queue first element then checks sg_list_cnt
* against zero and then decrements, so set
* sg_list_cnt 1 less than number of SG elements
* in each SG queue.
*/
scsi_sg_q.sg_list_cnt = ASC_SG_LIST_PER_Q - 1;
scsi_sg_q.sg_cur_list_cnt = ASC_SG_LIST_PER_Q - 1;
} else {
/*
* This is the last SG queue in the list of
* allocated SG queues. If there are more
* SG elements than will fit in the allocated
* queues, then set the QCSG_SG_XFER_MORE flag.
*/
if (scsiq->remain_sg_entry_cnt != 0)
{
scsi_sg_q.cntl |= QCSG_SG_XFER_MORE;
} else
{
scsi_sg_q.cntl |= QCSG_SG_XFER_END;
}
/* equals sg_entry_cnt * 2 */
sg_list_dwords = sg_entry_cnt << 1;
scsi_sg_q.sg_list_cnt = sg_entry_cnt - 1;
scsi_sg_q.sg_cur_list_cnt = sg_entry_cnt - 1;
sg_entry_cnt = 0;
}
scsi_sg_q.q_no = next_qp;
AscMemWordCopyPtrToLram(iop_base,
q_addr + ASC_SCSIQ_SGHD_CPY_BEG,
(uchar *) &scsi_sg_q,
sizeof(ASC_SG_LIST_Q) >> 1);
AscMemDWordCopyPtrToLram(iop_base,
q_addr + ASC_SGQ_LIST_BEG,
(uchar *) &sg_head->sg_list[scsiq->next_sg_index],
sg_list_dwords);
scsiq->next_sg_index += ASC_SG_LIST_PER_Q;
/*
* If the just completed SG queue contained the
* last SG element, then no more SG queues need
* to be written.
*/
if (scsi_sg_q.cntl & QCSG_SG_XFER_END)
{
break;
}
next_qp = AscReadLramByte( iop_base,
( ushort )( q_addr+ASC_SCSIQ_B_FWD ) );
q_addr = ASC_QNO_TO_QADDR( next_qp );
}
/*
* Clear the halt condition so the RISC will be restarted
* after the return.
*/
AscWriteLramWord(iop_base, ASCV_HALTCODE_W, 0);
return(0);
}
#endif /* CC_VERY_LONG_SG_LIST */
return (0);
}
STATIC uchar
_AscCopyLramScsiDoneQ(
PortAddr iop_base,
ushort q_addr,
ASC_QDONE_INFO * scsiq,
ASC_DCNT max_dma_count
)
{
ushort _val;
uchar sg_queue_cnt;
DvcGetQinfo(iop_base,
q_addr + ASC_SCSIQ_DONE_INFO_BEG,
(uchar *) scsiq,
(sizeof (ASC_SCSIQ_2) + sizeof (ASC_SCSIQ_3)) / 2);
_val = AscReadLramWord(iop_base,
(ushort) (q_addr + (ushort) ASC_SCSIQ_B_STATUS));
scsiq->q_status = (uchar) _val;
scsiq->q_no = (uchar) (_val >> 8);
_val = AscReadLramWord(iop_base,
(ushort) (q_addr + (ushort) ASC_SCSIQ_B_CNTL));
scsiq->cntl = (uchar) _val;
sg_queue_cnt = (uchar) (_val >> 8);
_val = AscReadLramWord(iop_base,
(ushort) (q_addr + (ushort) ASC_SCSIQ_B_SENSE_LEN));
scsiq->sense_len = (uchar) _val;
scsiq->extra_bytes = (uchar) (_val >> 8);
/*
* Read high word of remain bytes from alternate location.
*/
scsiq->remain_bytes = (((ADV_DCNT) AscReadLramWord( iop_base,
(ushort) (q_addr+ (ushort) ASC_SCSIQ_W_ALT_DC1))) << 16);
/*
* Read low word of remain bytes from original location.
*/
scsiq->remain_bytes += AscReadLramWord(iop_base,
(ushort) (q_addr+ (ushort) ASC_SCSIQ_DW_REMAIN_XFER_CNT));
scsiq->remain_bytes &= max_dma_count;
return (sg_queue_cnt);
}
STATIC int
AscIsrQDone(
ASC_DVC_VAR *asc_dvc
)
{
uchar next_qp;
uchar n_q_used;
uchar sg_list_qp;
uchar sg_queue_cnt;
uchar q_cnt;
uchar done_q_tail;
uchar tid_no;
ASC_SCSI_BIT_ID_TYPE scsi_busy;
ASC_SCSI_BIT_ID_TYPE target_id;
PortAddr iop_base;
ushort q_addr;
ushort sg_q_addr;
uchar cur_target_qng;
ASC_QDONE_INFO scsiq_buf;
ASC_QDONE_INFO *scsiq;
int false_overrun;
ASC_ISR_CALLBACK asc_isr_callback;
iop_base = asc_dvc->iop_base;
asc_isr_callback = asc_dvc->isr_callback;
n_q_used = 1;
scsiq = (ASC_QDONE_INFO *) & scsiq_buf;
done_q_tail = (uchar) AscGetVarDoneQTail(iop_base);
q_addr = ASC_QNO_TO_QADDR(done_q_tail);
next_qp = AscReadLramByte(iop_base,
(ushort) (q_addr + (ushort) ASC_SCSIQ_B_FWD));
if (next_qp != ASC_QLINK_END) {
AscPutVarDoneQTail(iop_base, next_qp);
q_addr = ASC_QNO_TO_QADDR(next_qp);
sg_queue_cnt = _AscCopyLramScsiDoneQ(iop_base, q_addr, scsiq,
asc_dvc->max_dma_count);
AscWriteLramByte(iop_base,
(ushort) (q_addr + (ushort) ASC_SCSIQ_B_STATUS),
(uchar) (scsiq->q_status & (uchar) ~ (QS_READY | QS_ABORTED)));
tid_no = ASC_TIX_TO_TID(scsiq->d2.target_ix);
target_id = ASC_TIX_TO_TARGET_ID(scsiq->d2.target_ix);
if ((scsiq->cntl & QC_SG_HEAD) != 0) {
sg_q_addr = q_addr;
sg_list_qp = next_qp;
for (q_cnt = 0; q_cnt < sg_queue_cnt; q_cnt++) {
sg_list_qp = AscReadLramByte(iop_base,
(ushort) (sg_q_addr + (ushort) ASC_SCSIQ_B_FWD));
sg_q_addr = ASC_QNO_TO_QADDR(sg_list_qp);
if (sg_list_qp == ASC_QLINK_END) {
AscSetLibErrorCode(asc_dvc, ASCQ_ERR_SG_Q_LINKS);
scsiq->d3.done_stat = QD_WITH_ERROR;
scsiq->d3.host_stat = QHSTA_D_QDONE_SG_LIST_CORRUPTED;
goto FATAL_ERR_QDONE;
}
AscWriteLramByte(iop_base,
(ushort) (sg_q_addr + (ushort) ASC_SCSIQ_B_STATUS),
QS_FREE);
}
n_q_used = sg_queue_cnt + 1;
AscPutVarDoneQTail(iop_base, sg_list_qp);
}
if (asc_dvc->queue_full_or_busy & target_id) {
cur_target_qng = AscReadLramByte(iop_base,
(ushort) ((ushort) ASC_QADR_BEG + (ushort) scsiq->d2.target_ix));
if (cur_target_qng < asc_dvc->max_dvc_qng[tid_no]) {
scsi_busy = AscReadLramByte(iop_base,
(ushort) ASCV_SCSIBUSY_B);
scsi_busy &= ~target_id;
AscWriteLramByte(iop_base,
(ushort) ASCV_SCSIBUSY_B, scsi_busy);
asc_dvc->queue_full_or_busy &= ~target_id;
}
}
if (asc_dvc->cur_total_qng >= n_q_used) {
asc_dvc->cur_total_qng -= n_q_used;
if (asc_dvc->cur_dvc_qng[tid_no] != 0) {
asc_dvc->cur_dvc_qng[tid_no]--;
}
} else {
AscSetLibErrorCode(asc_dvc, ASCQ_ERR_CUR_QNG);
scsiq->d3.done_stat = QD_WITH_ERROR;
goto FATAL_ERR_QDONE;
}
if ((scsiq->d2.srb_ptr == 0UL) ||
((scsiq->q_status & QS_ABORTED) != 0)) {
return (0x11);
} else if (scsiq->q_status == QS_DONE) {
false_overrun = FALSE;
if (scsiq->extra_bytes != 0) {
scsiq->remain_bytes += (ADV_DCNT) scsiq->extra_bytes;
}
if (scsiq->d3.done_stat == QD_WITH_ERROR) {
if (scsiq->d3.host_stat == QHSTA_M_DATA_OVER_RUN) {
if ((scsiq->cntl & (QC_DATA_IN | QC_DATA_OUT)) == 0) {
scsiq->d3.done_stat = QD_NO_ERROR;
scsiq->d3.host_stat = QHSTA_NO_ERROR;
} else if (false_overrun) {
scsiq->d3.done_stat = QD_NO_ERROR;
scsiq->d3.host_stat = QHSTA_NO_ERROR;
}
} else if (scsiq->d3.host_stat ==
QHSTA_M_HUNG_REQ_SCSI_BUS_RESET) {
AscStopChip(iop_base);
AscSetChipControl(iop_base,
(uchar) (CC_SCSI_RESET | CC_HALT));
DvcDelayNanoSecond(asc_dvc, 60000);
AscSetChipControl(iop_base, CC_HALT);
AscSetChipStatus(iop_base, CIW_CLR_SCSI_RESET_INT);
AscSetChipStatus(iop_base, 0);
AscSetChipControl(iop_base, 0);
}
}
if ((scsiq->cntl & QC_NO_CALLBACK) == 0) {
(*asc_isr_callback) (asc_dvc, scsiq);
} else {
if ((AscReadLramByte(iop_base,
(ushort) (q_addr + (ushort) ASC_SCSIQ_CDB_BEG)) ==
SCSICMD_StartStopUnit)) {
asc_dvc->unit_not_ready &= ~target_id;
if (scsiq->d3.done_stat != QD_NO_ERROR) {
asc_dvc->start_motor &= ~target_id;
}
}
}
return (1);
} else {
AscSetLibErrorCode(asc_dvc, ASCQ_ERR_Q_STATUS);
FATAL_ERR_QDONE:
if ((scsiq->cntl & QC_NO_CALLBACK) == 0) {
(*asc_isr_callback) (asc_dvc, scsiq);
}
return (0x80);
}
}
return (0);
}
STATIC int
AscISR(
ASC_DVC_VAR *asc_dvc
)
{
ASC_CS_TYPE chipstat;
PortAddr iop_base;
ushort saved_ram_addr;
uchar ctrl_reg;
uchar saved_ctrl_reg;
int int_pending;
int status;
uchar host_flag;
iop_base = asc_dvc->iop_base;
int_pending = FALSE;
if (AscIsIntPending(iop_base) == 0)
{
return int_pending;
}
if (((asc_dvc->init_state & ASC_INIT_STATE_END_LOAD_MC) == 0)
|| (asc_dvc->isr_callback == 0)
) {
return (ERR);
}
if (asc_dvc->in_critical_cnt != 0) {
AscSetLibErrorCode(asc_dvc, ASCQ_ERR_ISR_ON_CRITICAL);
return (ERR);
}
if (asc_dvc->is_in_int) {
AscSetLibErrorCode(asc_dvc, ASCQ_ERR_ISR_RE_ENTRY);
return (ERR);
}
asc_dvc->is_in_int = TRUE;
ctrl_reg = AscGetChipControl(iop_base);
saved_ctrl_reg = ctrl_reg & (~(CC_SCSI_RESET | CC_CHIP_RESET |
CC_SINGLE_STEP | CC_DIAG | CC_TEST));
chipstat = AscGetChipStatus(iop_base);
if (chipstat & CSW_SCSI_RESET_LATCH) {
if (!(asc_dvc->bus_type & (ASC_IS_VL | ASC_IS_EISA))) {
int i = 10;
int_pending = TRUE;
asc_dvc->sdtr_done = 0;
saved_ctrl_reg &= (uchar) (~CC_HALT);
while ((AscGetChipStatus(iop_base) & CSW_SCSI_RESET_ACTIVE) &&
(i-- > 0))
{
DvcSleepMilliSecond(100);
}
AscSetChipControl(iop_base, (CC_CHIP_RESET | CC_HALT));
AscSetChipControl(iop_base, CC_HALT);
AscSetChipStatus(iop_base, CIW_CLR_SCSI_RESET_INT);
AscSetChipStatus(iop_base, 0);
chipstat = AscGetChipStatus(iop_base);
}
}
saved_ram_addr = AscGetChipLramAddr(iop_base);
host_flag = AscReadLramByte(iop_base,
ASCV_HOST_FLAG_B) & (uchar) (~ASC_HOST_FLAG_IN_ISR);
AscWriteLramByte(iop_base, ASCV_HOST_FLAG_B,
(uchar) (host_flag | (uchar) ASC_HOST_FLAG_IN_ISR));
if ((chipstat & CSW_INT_PENDING)
|| (int_pending)
) {
AscAckInterrupt(iop_base);
int_pending = TRUE;
if ((chipstat & CSW_HALTED) &&
(ctrl_reg & CC_SINGLE_STEP)) {
if (AscIsrChipHalted(asc_dvc) == ERR) {
goto ISR_REPORT_QDONE_FATAL_ERROR;
} else {
saved_ctrl_reg &= (uchar) (~CC_HALT);
}
} else {
ISR_REPORT_QDONE_FATAL_ERROR:
if ((asc_dvc->dvc_cntl & ASC_CNTL_INT_MULTI_Q) != 0) {
while (((status = AscIsrQDone(asc_dvc)) & 0x01) != 0) {
}
} else {
do {
if ((status = AscIsrQDone(asc_dvc)) == 1) {
break;
}
} while (status == 0x11);
}
if ((status & 0x80) != 0)
int_pending = ERR;
}
}
AscWriteLramByte(iop_base, ASCV_HOST_FLAG_B, host_flag);
AscSetChipLramAddr(iop_base, saved_ram_addr);
AscSetChipControl(iop_base, saved_ctrl_reg);
asc_dvc->is_in_int = FALSE;
return (int_pending);
}
/* Microcode buffer is kept after initialization for error recovery. */
STATIC uchar _asc_mcode_buf[] =
{
0x01, 0x03, 0x01, 0x19, 0x0F, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x0F, 0x0F, 0x0F, 0x0F, 0x0F, 0x0F, 0x0F, 0x0F, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0xC3, 0x12, 0x0D, 0x05, 0x01, 0x00, 0x00, 0x00, 0x00, 0xFF, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0xFF, 0x80, 0xFF, 0xFF, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x23, 0x00, 0x00, 0x00, 0x00, 0x00, 0x07, 0x00, 0xFF, 0x00, 0x00, 0x00, 0x00,
0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xE4, 0x88, 0x00, 0x00, 0x00, 0x00,
0x80, 0x73, 0x48, 0x04, 0x36, 0x00, 0x00, 0xA2, 0xC2, 0x00, 0x80, 0x73, 0x03, 0x23, 0x36, 0x40,
0xB6, 0x00, 0x36, 0x00, 0x05, 0xD6, 0x0C, 0xD2, 0x12, 0xDA, 0x00, 0xA2, 0xC2, 0x00, 0x92, 0x80,
0x1E, 0x98, 0x50, 0x00, 0xF5, 0x00, 0x48, 0x98, 0xDF, 0x23, 0x36, 0x60, 0xB6, 0x00, 0x92, 0x80,
0x4F, 0x00, 0xF5, 0x00, 0x48, 0x98, 0xEF, 0x23, 0x36, 0x60, 0xB6, 0x00, 0x92, 0x80, 0x80, 0x62,
0x92, 0x80, 0x00, 0x46, 0x15, 0xEE, 0x13, 0xEA, 0x02, 0x01, 0x09, 0xD8, 0xCD, 0x04, 0x4D, 0x00,
0x00, 0xA3, 0xD6, 0x00, 0xA6, 0x97, 0x7F, 0x23, 0x04, 0x61, 0x84, 0x01, 0xE6, 0x84, 0xD2, 0xC1,
0x80, 0x73, 0xCD, 0x04, 0x4D, 0x00, 0x00, 0xA3, 0xDA, 0x01, 0xA6, 0x97, 0xC6, 0x81, 0xC2, 0x88,
0x80, 0x73, 0x80, 0x77, 0x00, 0x01, 0x01, 0xA1, 0xFE, 0x00, 0x4F, 0x00, 0x84, 0x97, 0x07, 0xA6,
0x08, 0x01, 0x00, 0x33, 0x03, 0x00, 0xC2, 0x88, 0x03, 0x03, 0x01, 0xDE, 0xC2, 0x88, 0xCE, 0x00,
0x69, 0x60, 0xCE, 0x00, 0x02, 0x03, 0x4A, 0x60, 0x00, 0xA2, 0x78, 0x01, 0x80, 0x63, 0x07, 0xA6,
0x24, 0x01, 0x78, 0x81, 0x03, 0x03, 0x80, 0x63, 0xE2, 0x00, 0x07, 0xA6, 0x34, 0x01, 0x00, 0x33,
0x04, 0x00, 0xC2, 0x88, 0x03, 0x07, 0x02, 0x01, 0x04, 0xCA, 0x0D, 0x23, 0x68, 0x98, 0x4D, 0x04,
0x04, 0x85, 0x05, 0xD8, 0x0D, 0x23, 0x68, 0x98, 0xCD, 0x04, 0x15, 0x23, 0xF8, 0x88, 0xFB, 0x23,
0x02, 0x61, 0x82, 0x01, 0x80, 0x63, 0x02, 0x03, 0x06, 0xA3, 0x62, 0x01, 0x00, 0x33, 0x0A, 0x00,
0xC2, 0x88, 0x4E, 0x00, 0x07, 0xA3, 0x6E, 0x01, 0x00, 0x33, 0x0B, 0x00, 0xC2, 0x88, 0xCD, 0x04,
0x36, 0x2D, 0x00, 0x33, 0x1A, 0x00, 0xC2, 0x88, 0x50, 0x04, 0x88, 0x81, 0x06, 0xAB, 0x82, 0x01,
0x88, 0x81, 0x4E, 0x00, 0x07, 0xA3, 0x92, 0x01, 0x50, 0x00, 0x00, 0xA3, 0x3C, 0x01, 0x00, 0x05,
0x7C, 0x81, 0x46, 0x97, 0x02, 0x01, 0x05, 0xC6, 0x04, 0x23, 0xA0, 0x01, 0x15, 0x23, 0xA1, 0x01,
0xBE, 0x81, 0xFD, 0x23, 0x02, 0x61, 0x82, 0x01, 0x0A, 0xDA, 0x4A, 0x00, 0x06, 0x61, 0x00, 0xA0,
0xB4, 0x01, 0x80, 0x63, 0xCD, 0x04, 0x36, 0x2D, 0x00, 0x33, 0x1B, 0x00, 0xC2, 0x88, 0x06, 0x23,
0x68, 0x98, 0xCD, 0x04, 0xE6, 0x84, 0x06, 0x01, 0x00, 0xA2, 0xD4, 0x01, 0x57, 0x60, 0x00, 0xA0,
0xDA, 0x01, 0xE6, 0x84, 0x80, 0x23, 0xA0, 0x01, 0xE6, 0x84, 0x80, 0x73, 0x4B, 0x00, 0x06, 0x61,
0x00, 0xA2, 0x00, 0x02, 0x04, 0x01, 0x0C, 0xDE, 0x02, 0x01, 0x03, 0xCC, 0x4F, 0x00, 0x84, 0x97,
0xFC, 0x81, 0x08, 0x23, 0x02, 0x41, 0x82, 0x01, 0x4F, 0x00, 0x62, 0x97, 0x48, 0x04, 0x84, 0x80,
0xF0, 0x97, 0x00, 0x46, 0x56, 0x00, 0x03, 0xC0, 0x01, 0x23, 0xE8, 0x00, 0x81, 0x73, 0x06, 0x29,
0x03, 0x42, 0x06, 0xE2, 0x03, 0xEE, 0x6B, 0xEB, 0x11, 0x23, 0xF8, 0x88, 0x04, 0x98, 0xF0, 0x80,
0x80, 0x73, 0x80, 0x77, 0x07, 0xA4, 0x2A, 0x02, 0x7C, 0x95, 0x06, 0xA6, 0x34, 0x02, 0x03, 0xA6,
0x4C, 0x04, 0x46, 0x82, 0x04, 0x01, 0x03, 0xD8, 0xB4, 0x98, 0x6A, 0x96, 0x46, 0x82, 0xFE, 0x95,
0x80, 0x67, 0x83, 0x03, 0x80, 0x63, 0xB6, 0x2D, 0x02, 0xA6, 0x6C, 0x02, 0x07, 0xA6, 0x5A, 0x02,
0x06, 0xA6, 0x5E, 0x02, 0x03, 0xA6, 0x62, 0x02, 0xC2, 0x88, 0x7C, 0x95, 0x48, 0x82, 0x60, 0x96,
0x48, 0x82, 0x04, 0x23, 0xA0, 0x01, 0x14, 0x23, 0xA1, 0x01, 0x3C, 0x84, 0x04, 0x01, 0x0C, 0xDC,
0xE0, 0x23, 0x25, 0x61, 0xEF, 0x00, 0x14, 0x01, 0x4F, 0x04, 0xA8, 0x01, 0x6F, 0x00, 0xA5, 0x01,
0x03, 0x23, 0xA4, 0x01, 0x06, 0x23, 0x9C, 0x01, 0x24, 0x2B, 0x1C, 0x01, 0x02, 0xA6, 0xAA, 0x02,
0x07, 0xA6, 0x5A, 0x02, 0x06, 0xA6, 0x5E, 0x02, 0x03, 0xA6, 0x20, 0x04, 0x01, 0xA6, 0xB4, 0x02,
0x00, 0xA6, 0xB4, 0x02, 0x00, 0x33, 0x12, 0x00, 0xC2, 0x88, 0x00, 0x0E, 0x80, 0x63, 0x00, 0x43,
0x00, 0xA0, 0x8C, 0x02, 0x4D, 0x04, 0x04, 0x01, 0x0B, 0xDC, 0xE7, 0x23, 0x04, 0x61, 0x84, 0x01,
0x10, 0x31, 0x12, 0x35, 0x14, 0x01, 0xEC, 0x00, 0x6C, 0x38, 0x00, 0x3F, 0x00, 0x00, 0xEA, 0x82,
0x18, 0x23, 0x04, 0x61, 0x18, 0xA0, 0xE2, 0x02, 0x04, 0x01, 0xA2, 0xC8, 0x00, 0x33, 0x1F, 0x00,
0xC2, 0x88, 0x08, 0x31, 0x0A, 0x35, 0x0C, 0x39, 0x0E, 0x3D, 0x7E, 0x98, 0xB6, 0x2D, 0x01, 0xA6,
0x14, 0x03, 0x00, 0xA6, 0x14, 0x03, 0x07, 0xA6, 0x0C, 0x03, 0x06, 0xA6, 0x10, 0x03, 0x03, 0xA6,
0x20, 0x04, 0x02, 0xA6, 0x6C, 0x02, 0x00, 0x33, 0x33, 0x00, 0xC2, 0x88, 0x7C, 0x95, 0xEE, 0x82,
0x60, 0x96, 0xEE, 0x82, 0x82, 0x98, 0x80, 0x42, 0x7E, 0x98, 0x64, 0xE4, 0x04, 0x01, 0x2D, 0xC8,
0x31, 0x05, 0x07, 0x01, 0x00, 0xA2, 0x54, 0x03, 0x00, 0x43, 0x87, 0x01, 0x05, 0x05, 0x86, 0x98,
0x7E, 0x98, 0x00, 0xA6, 0x16, 0x03, 0x07, 0xA6, 0x4C, 0x03, 0x03, 0xA6, 0x3C, 0x04, 0x06, 0xA6,
0x50, 0x03, 0x01, 0xA6, 0x16, 0x03, 0x00, 0x33, 0x25, 0x00, 0xC2, 0x88, 0x7C, 0x95, 0x32, 0x83,
0x60, 0x96, 0x32, 0x83, 0x04, 0x01, 0x10, 0xCE, 0x07, 0xC8, 0x05, 0x05, 0xEB, 0x04, 0x00, 0x33,
0x00, 0x20, 0xC0, 0x20, 0x81, 0x62, 0x72, 0x83, 0x00, 0x01, 0x05, 0x05, 0xFF, 0xA2, 0x7A, 0x03,
0xB1, 0x01, 0x08, 0x23, 0xB2, 0x01, 0x2E, 0x83, 0x05, 0x05, 0x15, 0x01, 0x00, 0xA2, 0x9A, 0x03,
0xEC, 0x00, 0x6E, 0x00, 0x95, 0x01, 0x6C, 0x38, 0x00, 0x3F, 0x00, 0x00, 0x01, 0xA6, 0x96, 0x03,
0x00, 0xA6, 0x96, 0x03, 0x10, 0x84, 0x80, 0x42, 0x7E, 0x98, 0x01, 0xA6, 0xA4, 0x03, 0x00, 0xA6,
0xBC, 0x03, 0x10, 0x84, 0xA8, 0x98, 0x80, 0x42, 0x01, 0xA6, 0xA4, 0x03, 0x07, 0xA6, 0xB2, 0x03,
0xD4, 0x83, 0x7C, 0x95, 0xA8, 0x83, 0x00, 0x33, 0x2F, 0x00, 0xC2, 0x88, 0xA8, 0x98, 0x80, 0x42,
0x00, 0xA6, 0xBC, 0x03, 0x07, 0xA6, 0xCA, 0x03, 0xD4, 0x83, 0x7C, 0x95, 0xC0, 0x83, 0x00, 0x33,
0x26, 0x00, 0xC2, 0x88, 0x38, 0x2B, 0x80, 0x32, 0x80, 0x36, 0x04, 0x23, 0xA0, 0x01, 0x12, 0x23,
0xA1, 0x01, 0x10, 0x84, 0x07, 0xF0, 0x06, 0xA4, 0xF4, 0x03, 0x80, 0x6B, 0x80, 0x67, 0x05, 0x23,
0x83, 0x03, 0x80, 0x63, 0x03, 0xA6, 0x0E, 0x04, 0x07, 0xA6, 0x06, 0x04, 0x06, 0xA6, 0x0A, 0x04,
0x00, 0x33, 0x17, 0x00, 0xC2, 0x88, 0x7C, 0x95, 0xF4, 0x83, 0x60, 0x96, 0xF4, 0x83, 0x20, 0x84,
0x07, 0xF0, 0x06, 0xA4, 0x20, 0x04, 0x80, 0x6B, 0x80, 0x67, 0x05, 0x23, 0x83, 0x03, 0x80, 0x63,
0xB6, 0x2D, 0x03, 0xA6, 0x3C, 0x04, 0x07, 0xA6, 0x34, 0x04, 0x06, 0xA6, 0x38, 0x04, 0x00, 0x33,
0x30, 0x00, 0xC2, 0x88, 0x7C, 0x95, 0x20, 0x84, 0x60, 0x96, 0x20, 0x84, 0x1D, 0x01, 0x06, 0xCC,
0x00, 0x33, 0x00, 0x84, 0xC0, 0x20, 0x00, 0x23, 0xEA, 0x00, 0x81, 0x62, 0xA2, 0x0D, 0x80, 0x63,
0x07, 0xA6, 0x5A, 0x04, 0x00, 0x33, 0x18, 0x00, 0xC2, 0x88, 0x03, 0x03, 0x80, 0x63, 0xA3, 0x01,
0x07, 0xA4, 0x64, 0x04, 0x23, 0x01, 0x00, 0xA2, 0x86, 0x04, 0x0A, 0xA0, 0x76, 0x04, 0xE0, 0x00,
0x00, 0x33, 0x1D, 0x00, 0xC2, 0x88, 0x0B, 0xA0, 0x82, 0x04, 0xE0, 0x00, 0x00, 0x33, 0x1E, 0x00,
0xC2, 0x88, 0x42, 0x23, 0xF8, 0x88, 0x00, 0x23, 0x22, 0xA3, 0xE6, 0x04, 0x08, 0x23, 0x22, 0xA3,
0xA2, 0x04, 0x28, 0x23, 0x22, 0xA3, 0xAE, 0x04, 0x02, 0x23, 0x22, 0xA3, 0xC4, 0x04, 0x42, 0x23,
0xF8, 0x88, 0x4A, 0x00, 0x06, 0x61, 0x00, 0xA0, 0xAE, 0x04, 0x45, 0x23, 0xF8, 0x88, 0x04, 0x98,
0x00, 0xA2, 0xC0, 0x04, 0xB4, 0x98, 0x00, 0x33, 0x00, 0x82, 0xC0, 0x20, 0x81, 0x62, 0xE8, 0x81,
0x47, 0x23, 0xF8, 0x88, 0x04, 0x01, 0x0B, 0xDE, 0x04, 0x98, 0xB4, 0x98, 0x00, 0x33, 0x00, 0x81,
0xC0, 0x20, 0x81, 0x62, 0x14, 0x01, 0x00, 0xA0, 0x00, 0x02, 0x43, 0x23, 0xF8, 0x88, 0x04, 0x23,
0xA0, 0x01, 0x44, 0x23, 0xA1, 0x01, 0x80, 0x73, 0x4D, 0x00, 0x03, 0xA3, 0xF4, 0x04, 0x00, 0x33,
0x27, 0x00, 0xC2, 0x88, 0x04, 0x01, 0x04, 0xDC, 0x02, 0x23, 0xA2, 0x01, 0x04, 0x23, 0xA0, 0x01,
0x04, 0x98, 0x26, 0x95, 0x4B, 0x00, 0xF6, 0x00, 0x4F, 0x04, 0x4F, 0x00, 0x00, 0xA3, 0x22, 0x05,
0x00, 0x05, 0x76, 0x00, 0x06, 0x61, 0x00, 0xA2, 0x1C, 0x05, 0x0A, 0x85, 0x46, 0x97, 0xCD, 0x04,
0x24, 0x85, 0x48, 0x04, 0x84, 0x80, 0x02, 0x01, 0x03, 0xDA, 0x80, 0x23, 0x82, 0x01, 0x34, 0x85,
0x02, 0x23, 0xA0, 0x01, 0x4A, 0x00, 0x06, 0x61, 0x00, 0xA2, 0x40, 0x05, 0x1D, 0x01, 0x04, 0xD6,
0xFF, 0x23, 0x86, 0x41, 0x4B, 0x60, 0xCB, 0x00, 0xFF, 0x23, 0x80, 0x01, 0x49, 0x00, 0x81, 0x01,
0x04, 0x01, 0x02, 0xC8, 0x30, 0x01, 0x80, 0x01, 0xF7, 0x04, 0x03, 0x01, 0x49, 0x04, 0x80, 0x01,
0xC9, 0x00, 0x00, 0x05, 0x00, 0x01, 0xFF, 0xA0, 0x60, 0x05, 0x77, 0x04, 0x01, 0x23, 0xEA, 0x00,
0x5D, 0x00, 0xFE, 0xC7, 0x00, 0x62, 0x00, 0x23, 0xEA, 0x00, 0x00, 0x63, 0x07, 0xA4, 0xF8, 0x05,
0x03, 0x03, 0x02, 0xA0, 0x8E, 0x05, 0xF4, 0x85, 0x00, 0x33, 0x2D, 0x00, 0xC2, 0x88, 0x04, 0xA0,
0xB8, 0x05, 0x80, 0x63, 0x00, 0x23, 0xDF, 0x00, 0x4A, 0x00, 0x06, 0x61, 0x00, 0xA2, 0xA4, 0x05,
0x1D, 0x01, 0x06, 0xD6, 0x02, 0x23, 0x02, 0x41, 0x82, 0x01, 0x50, 0x00, 0x62, 0x97, 0x04, 0x85,
0x04, 0x23, 0x02, 0x41, 0x82, 0x01, 0x04, 0x85, 0x08, 0xA0, 0xBE, 0x05, 0xF4, 0x85, 0x03, 0xA0,
0xC4, 0x05, 0xF4, 0x85, 0x01, 0xA0, 0xCE, 0x05, 0x88, 0x00, 0x80, 0x63, 0xCC, 0x86, 0x07, 0xA0,
0xEE, 0x05, 0x5F, 0x00, 0x00, 0x2B, 0xDF, 0x08, 0x00, 0xA2, 0xE6, 0x05, 0x80, 0x67, 0x80, 0x63,
0x01, 0xA2, 0x7A, 0x06, 0x7C, 0x85, 0x06, 0x23, 0x68, 0x98, 0x48, 0x23, 0xF8, 0x88, 0x07, 0x23,
0x80, 0x00, 0x06, 0x87, 0x80, 0x63, 0x7C, 0x85, 0x00, 0x23, 0xDF, 0x00, 0x00, 0x63, 0x4A, 0x00,
0x06, 0x61, 0x00, 0xA2, 0x36, 0x06, 0x1D, 0x01, 0x16, 0xD4, 0xC0, 0x23, 0x07, 0x41, 0x83, 0x03,
0x80, 0x63, 0x06, 0xA6, 0x1C, 0x06, 0x00, 0x33, 0x37, 0x00, 0xC2, 0x88, 0x1D, 0x01, 0x01, 0xD6,
0x20, 0x23, 0x63, 0x60, 0x83, 0x03, 0x80, 0x63, 0x02, 0x23, 0xDF, 0x00, 0x07, 0xA6, 0x7C, 0x05,
0xEF, 0x04, 0x6F, 0x00, 0x00, 0x63, 0x4B, 0x00, 0x06, 0x41, 0xCB, 0x00, 0x52, 0x00, 0x06, 0x61,
0x00, 0xA2, 0x4E, 0x06, 0x1D, 0x01, 0x03, 0xCA, 0xC0, 0x23, 0x07, 0x41, 0x00, 0x63, 0x1D, 0x01,
0x04, 0xCC, 0x00, 0x33, 0x00, 0x83, 0xC0, 0x20, 0x81, 0x62, 0x80, 0x23, 0x07, 0x41, 0x00, 0x63,
0x80, 0x67, 0x08, 0x23, 0x83, 0x03, 0x80, 0x63, 0x00, 0x63, 0x01, 0x23, 0xDF, 0x00, 0x06, 0xA6,
0x84, 0x06, 0x07, 0xA6, 0x7C, 0x05, 0x80, 0x67, 0x80, 0x63, 0x00, 0x33, 0x00, 0x40, 0xC0, 0x20,
0x81, 0x62, 0x00, 0x63, 0x00, 0x00, 0xFE, 0x95, 0x83, 0x03, 0x80, 0x63, 0x06, 0xA6, 0x94, 0x06,
0x07, 0xA6, 0x7C, 0x05, 0x00, 0x00, 0x01, 0xA0, 0x14, 0x07, 0x00, 0x2B, 0x40, 0x0E, 0x80, 0x63,
0x01, 0x00, 0x06, 0xA6, 0xAA, 0x06, 0x07, 0xA6, 0x7C, 0x05, 0x40, 0x0E, 0x80, 0x63, 0x00, 0x43,
0x00, 0xA0, 0xA2, 0x06, 0x06, 0xA6, 0xBC, 0x06, 0x07, 0xA6, 0x7C, 0x05, 0x80, 0x67, 0x40, 0x0E,
0x80, 0x63, 0x07, 0xA6, 0x7C, 0x05, 0x00, 0x23, 0xDF, 0x00, 0x00, 0x63, 0x07, 0xA6, 0xD6, 0x06,
0x00, 0x33, 0x2A, 0x00, 0xC2, 0x88, 0x03, 0x03, 0x80, 0x63, 0x89, 0x00, 0x0A, 0x2B, 0x07, 0xA6,
0xE8, 0x06, 0x00, 0x33, 0x29, 0x00, 0xC2, 0x88, 0x00, 0x43, 0x00, 0xA2, 0xF4, 0x06, 0xC0, 0x0E,
0x80, 0x63, 0xDE, 0x86, 0xC0, 0x0E, 0x00, 0x33, 0x00, 0x80, 0xC0, 0x20, 0x81, 0x62, 0x04, 0x01,
0x02, 0xDA, 0x80, 0x63, 0x7C, 0x85, 0x80, 0x7B, 0x80, 0x63, 0x06, 0xA6, 0x8C, 0x06, 0x00, 0x33,
0x2C, 0x00, 0xC2, 0x88, 0x0C, 0xA2, 0x2E, 0x07, 0xFE, 0x95, 0x83, 0x03, 0x80, 0x63, 0x06, 0xA6,
0x2C, 0x07, 0x07, 0xA6, 0x7C, 0x05, 0x00, 0x33, 0x3D, 0x00, 0xC2, 0x88, 0x00, 0x00, 0x80, 0x67,
0x83, 0x03, 0x80, 0x63, 0x0C, 0xA0, 0x44, 0x07, 0x07, 0xA6, 0x7C, 0x05, 0xBF, 0x23, 0x04, 0x61,
0x84, 0x01, 0xE6, 0x84, 0x00, 0x63, 0xF0, 0x04, 0x01, 0x01, 0xF1, 0x00, 0x00, 0x01, 0xF2, 0x00,
0x01, 0x05, 0x80, 0x01, 0x72, 0x04, 0x71, 0x00, 0x81, 0x01, 0x70, 0x04, 0x80, 0x05, 0x81, 0x05,
0x00, 0x63, 0xF0, 0x04, 0xF2, 0x00, 0x72, 0x04, 0x01, 0x01, 0xF1, 0x00, 0x70, 0x00, 0x81, 0x01,
0x70, 0x04, 0x71, 0x00, 0x81, 0x01, 0x72, 0x00, 0x80, 0x01, 0x71, 0x04, 0x70, 0x00, 0x80, 0x01,
0x70, 0x04, 0x00, 0x63, 0xF0, 0x04, 0xF2, 0x00, 0x72, 0x04, 0x00, 0x01, 0xF1, 0x00, 0x70, 0x00,
0x80, 0x01, 0x70, 0x04, 0x71, 0x00, 0x80, 0x01, 0x72, 0x00, 0x81, 0x01, 0x71, 0x04, 0x70, 0x00,
0x81, 0x01, 0x70, 0x04, 0x00, 0x63, 0x00, 0x23, 0xB3, 0x01, 0x83, 0x05, 0xA3, 0x01, 0xA2, 0x01,
0xA1, 0x01, 0x01, 0x23, 0xA0, 0x01, 0x00, 0x01, 0xC8, 0x00, 0x03, 0xA1, 0xC4, 0x07, 0x00, 0x33,
0x07, 0x00, 0xC2, 0x88, 0x80, 0x05, 0x81, 0x05, 0x04, 0x01, 0x11, 0xC8, 0x48, 0x00, 0xB0, 0x01,
0xB1, 0x01, 0x08, 0x23, 0xB2, 0x01, 0x05, 0x01, 0x48, 0x04, 0x00, 0x43, 0x00, 0xA2, 0xE4, 0x07,
0x00, 0x05, 0xDA, 0x87, 0x00, 0x01, 0xC8, 0x00, 0xFF, 0x23, 0x80, 0x01, 0x05, 0x05, 0x00, 0x63,
0xF7, 0x04, 0x1A, 0x09, 0xF6, 0x08, 0x6E, 0x04, 0x00, 0x02, 0x80, 0x43, 0x76, 0x08, 0x80, 0x02,
0x77, 0x04, 0x00, 0x63, 0xF7, 0x04, 0x1A, 0x09, 0xF6, 0x08, 0x6E, 0x04, 0x00, 0x02, 0x00, 0xA0,
0x14, 0x08, 0x16, 0x88, 0x00, 0x43, 0x76, 0x08, 0x80, 0x02, 0x77, 0x04, 0x00, 0x63, 0xF3, 0x04,
0x00, 0x23, 0xF4, 0x00, 0x74, 0x00, 0x80, 0x43, 0xF4, 0x00, 0xCF, 0x40, 0x00, 0xA2, 0x44, 0x08,
0x74, 0x04, 0x02, 0x01, 0xF7, 0xC9, 0xF6, 0xD9, 0x00, 0x01, 0x01, 0xA1, 0x24, 0x08, 0x04, 0x98,
0x26, 0x95, 0x24, 0x88, 0x73, 0x04, 0x00, 0x63, 0xF3, 0x04, 0x75, 0x04, 0x5A, 0x88, 0x02, 0x01,
0x04, 0xD8, 0x46, 0x97, 0x04, 0x98, 0x26, 0x95, 0x4A, 0x88, 0x75, 0x00, 0x00, 0xA3, 0x64, 0x08,
0x00, 0x05, 0x4E, 0x88, 0x73, 0x04, 0x00, 0x63, 0x80, 0x7B, 0x80, 0x63, 0x06, 0xA6, 0x76, 0x08,
0x00, 0x33, 0x3E, 0x00, 0xC2, 0x88, 0x80, 0x67, 0x83, 0x03, 0x80, 0x63, 0x00, 0x63, 0x38, 0x2B,
0x9C, 0x88, 0x38, 0x2B, 0x92, 0x88, 0x32, 0x09, 0x31, 0x05, 0x92, 0x98, 0x05, 0x05, 0xB2, 0x09,
0x00, 0x63, 0x00, 0x32, 0x00, 0x36, 0x00, 0x3A, 0x00, 0x3E, 0x00, 0x63, 0x80, 0x32, 0x80, 0x36,
0x80, 0x3A, 0x80, 0x3E, 0xB4, 0x3D, 0x00, 0x63, 0x38, 0x2B, 0x40, 0x32, 0x40, 0x36, 0x40, 0x3A,
0x40, 0x3E, 0x00, 0x63, 0x5A, 0x20, 0xC9, 0x40, 0x00, 0xA0, 0xB4, 0x08, 0x5D, 0x00, 0xFE, 0xC3,
0x00, 0x63, 0x80, 0x73, 0xE6, 0x20, 0x02, 0x23, 0xE8, 0x00, 0x82, 0x73, 0xFF, 0xFD, 0x80, 0x73,
0x13, 0x23, 0xF8, 0x88, 0x66, 0x20, 0xC0, 0x20, 0x04, 0x23, 0xA0, 0x01, 0xA1, 0x23, 0xA1, 0x01,
0x81, 0x62, 0xE2, 0x88, 0x80, 0x73, 0x80, 0x77, 0x68, 0x00, 0x00, 0xA2, 0x80, 0x00, 0x03, 0xC2,
0xF1, 0xC7, 0x41, 0x23, 0xF8, 0x88, 0x11, 0x23, 0xA1, 0x01, 0x04, 0x23, 0xA0, 0x01, 0xE6, 0x84,
};
STATIC ushort _asc_mcode_size = sizeof(_asc_mcode_buf);
STATIC ADV_DCNT _asc_mcode_chksum = 0x012C453FUL;
#define ASC_SYN_OFFSET_ONE_DISABLE_LIST 16
STATIC uchar _syn_offset_one_disable_cmd[ASC_SYN_OFFSET_ONE_DISABLE_LIST] =
{
SCSICMD_Inquiry,
SCSICMD_RequestSense,
SCSICMD_ReadCapacity,
SCSICMD_ReadTOC,
SCSICMD_ModeSelect6,
SCSICMD_ModeSense6,
SCSICMD_ModeSelect10,
SCSICMD_ModeSense10,
0xFF,
0xFF,
0xFF,
0xFF,
0xFF,
0xFF,
0xFF,
0xFF
};
STATIC int
AscExeScsiQueue(
ASC_DVC_VAR *asc_dvc,
ASC_SCSI_Q *scsiq
)
{
PortAddr iop_base;
ulong last_int_level;
int sta;
int n_q_required;
int disable_syn_offset_one_fix;
int i;
ASC_PADDR addr;
ASC_EXE_CALLBACK asc_exe_callback;
ushort sg_entry_cnt = 0;
ushort sg_entry_cnt_minus_one = 0;
uchar target_ix;
uchar tid_no;
uchar sdtr_data;
uchar extra_bytes;
uchar scsi_cmd;
uchar disable_cmd;
ASC_SG_HEAD *sg_head;
ASC_DCNT data_cnt;
iop_base = asc_dvc->iop_base;
sg_head = scsiq->sg_head;
asc_exe_callback = asc_dvc->exe_callback;
if (asc_dvc->err_code != 0)
return (ERR);
if (scsiq == (ASC_SCSI_Q *) 0L) {
AscSetLibErrorCode(asc_dvc, ASCQ_ERR_SCSIQ_NULL_PTR);
return (ERR);
}
scsiq->q1.q_no = 0;
if ((scsiq->q2.tag_code & ASC_TAG_FLAG_EXTRA_BYTES) == 0) {
scsiq->q1.extra_bytes = 0;
}
sta = 0;
target_ix = scsiq->q2.target_ix;
tid_no = ASC_TIX_TO_TID(target_ix);
n_q_required = 1;
if (scsiq->cdbptr[0] == SCSICMD_RequestSense) {
if ((asc_dvc->init_sdtr & scsiq->q1.target_id) != 0) {
asc_dvc->sdtr_done &= ~scsiq->q1.target_id;
sdtr_data = AscGetMCodeInitSDTRAtID(iop_base, tid_no);
AscMsgOutSDTR(asc_dvc,
asc_dvc->sdtr_period_tbl[(sdtr_data >> 4) &
(uchar) (asc_dvc->max_sdtr_index - 1)],
(uchar) (sdtr_data & (uchar) ASC_SYN_MAX_OFFSET));
scsiq->q1.cntl |= (QC_MSG_OUT | QC_URGENT);
}
}
last_int_level = DvcEnterCritical();
if (asc_dvc->in_critical_cnt != 0) {
DvcLeaveCritical(last_int_level);
AscSetLibErrorCode(asc_dvc, ASCQ_ERR_CRITICAL_RE_ENTRY);
return (ERR);
}
asc_dvc->in_critical_cnt++;
if ((scsiq->q1.cntl & QC_SG_HEAD) != 0) {
if ((sg_entry_cnt = sg_head->entry_cnt) == 0) {
asc_dvc->in_critical_cnt--;
DvcLeaveCritical(last_int_level);
return (ERR);
}
#if !CC_VERY_LONG_SG_LIST
if (sg_entry_cnt > ASC_MAX_SG_LIST)
{
asc_dvc->in_critical_cnt--;
DvcLeaveCritical(last_int_level);
return(ERR);
}
#endif /* !CC_VERY_LONG_SG_LIST */
if (sg_entry_cnt == 1) {
scsiq->q1.data_addr = (ADV_PADDR) sg_head->sg_list[0].addr;
scsiq->q1.data_cnt = (ADV_DCNT) sg_head->sg_list[0].bytes;
scsiq->q1.cntl &= ~(QC_SG_HEAD | QC_SG_SWAP_QUEUE);
}
sg_entry_cnt_minus_one = sg_entry_cnt - 1;
}
scsi_cmd = scsiq->cdbptr[0];
disable_syn_offset_one_fix = FALSE;
if ((asc_dvc->pci_fix_asyn_xfer & scsiq->q1.target_id) &&
!(asc_dvc->pci_fix_asyn_xfer_always & scsiq->q1.target_id)) {
if (scsiq->q1.cntl & QC_SG_HEAD) {
data_cnt = 0;
for (i = 0; i < sg_entry_cnt; i++) {
data_cnt += (ADV_DCNT) le32_to_cpu(sg_head->sg_list[i].bytes);
}
} else {
data_cnt = le32_to_cpu(scsiq->q1.data_cnt);
}
if (data_cnt != 0UL) {
if (data_cnt < 512UL) {
disable_syn_offset_one_fix = TRUE;
} else {
for (i = 0; i < ASC_SYN_OFFSET_ONE_DISABLE_LIST; i++) {
disable_cmd = _syn_offset_one_disable_cmd[i];
if (disable_cmd == 0xFF) {
break;
}
if (scsi_cmd == disable_cmd) {
disable_syn_offset_one_fix = TRUE;
break;
}
}
}
}
}
if (disable_syn_offset_one_fix) {
scsiq->q2.tag_code &= ~M2_QTAG_MSG_SIMPLE;
scsiq->q2.tag_code |= (ASC_TAG_FLAG_DISABLE_ASYN_USE_SYN_FIX |
ASC_TAG_FLAG_DISABLE_DISCONNECT);
} else {
scsiq->q2.tag_code &= 0x27;
}
if ((scsiq->q1.cntl & QC_SG_HEAD) != 0) {
if (asc_dvc->bug_fix_cntl) {
if (asc_dvc->bug_fix_cntl & ASC_BUG_FIX_IF_NOT_DWB) {
if ((scsi_cmd == SCSICMD_Read6) ||
(scsi_cmd == SCSICMD_Read10)) {
addr =
(ADV_PADDR) le32_to_cpu(
sg_head->sg_list[sg_entry_cnt_minus_one].addr) +
(ADV_DCNT) le32_to_cpu(
sg_head->sg_list[sg_entry_cnt_minus_one].bytes);
extra_bytes = (uchar) ((ushort) addr & 0x0003);
if ((extra_bytes != 0) &&
((scsiq->q2.tag_code & ASC_TAG_FLAG_EXTRA_BYTES)
== 0)) {
scsiq->q2.tag_code |= ASC_TAG_FLAG_EXTRA_BYTES;
scsiq->q1.extra_bytes = extra_bytes;
data_cnt = le32_to_cpu(
sg_head->sg_list[sg_entry_cnt_minus_one].bytes);
data_cnt -= (ASC_DCNT) extra_bytes;
sg_head->sg_list[sg_entry_cnt_minus_one].bytes =
cpu_to_le32(data_cnt);
}
}
}
}
sg_head->entry_to_copy = sg_head->entry_cnt;
#if CC_VERY_LONG_SG_LIST
/*
* Set the sg_entry_cnt to the maximum possible. The rest of
* the SG elements will be copied when the RISC completes the
* SG elements that fit and halts.
*/
if (sg_entry_cnt > ASC_MAX_SG_LIST)
{
sg_entry_cnt = ASC_MAX_SG_LIST;
}
#endif /* CC_VERY_LONG_SG_LIST */
n_q_required = AscSgListToQueue(sg_entry_cnt);
if ((AscGetNumOfFreeQueue(asc_dvc, target_ix, n_q_required) >=
(uint) n_q_required) || ((scsiq->q1.cntl & QC_URGENT) != 0)) {
if ((sta = AscSendScsiQueue(asc_dvc, scsiq,
n_q_required)) == 1) {
asc_dvc->in_critical_cnt--;
if (asc_exe_callback != 0) {
(*asc_exe_callback) (asc_dvc, scsiq);
}
DvcLeaveCritical(last_int_level);
return (sta);
}
}
} else {
if (asc_dvc->bug_fix_cntl) {
if (asc_dvc->bug_fix_cntl & ASC_BUG_FIX_IF_NOT_DWB) {
if ((scsi_cmd == SCSICMD_Read6) ||
(scsi_cmd == SCSICMD_Read10)) {
addr = le32_to_cpu(scsiq->q1.data_addr) +
le32_to_cpu(scsiq->q1.data_cnt);
extra_bytes = (uchar) ((ushort) addr & 0x0003);
if ((extra_bytes != 0) &&
((scsiq->q2.tag_code & ASC_TAG_FLAG_EXTRA_BYTES)
== 0)) {
data_cnt = le32_to_cpu(scsiq->q1.data_cnt);
if (((ushort) data_cnt & 0x01FF) == 0) {
scsiq->q2.tag_code |= ASC_TAG_FLAG_EXTRA_BYTES;
data_cnt -= (ASC_DCNT) extra_bytes;
scsiq->q1.data_cnt = cpu_to_le32(data_cnt);
scsiq->q1.extra_bytes = extra_bytes;
}
}
}
}
}
n_q_required = 1;
if ((AscGetNumOfFreeQueue(asc_dvc, target_ix, 1) >= 1) ||
((scsiq->q1.cntl & QC_URGENT) != 0)) {
if ((sta = AscSendScsiQueue(asc_dvc, scsiq,
n_q_required)) == 1) {
asc_dvc->in_critical_cnt--;
if (asc_exe_callback != 0) {
(*asc_exe_callback) (asc_dvc, scsiq);
}
DvcLeaveCritical(last_int_level);
return (sta);
}
}
}
asc_dvc->in_critical_cnt--;
DvcLeaveCritical(last_int_level);
return (sta);
}
STATIC int
AscSendScsiQueue(
ASC_DVC_VAR *asc_dvc,
ASC_SCSI_Q *scsiq,
uchar n_q_required
)
{
PortAddr iop_base;
uchar free_q_head;
uchar next_qp;
uchar tid_no;
uchar target_ix;
int sta;
iop_base = asc_dvc->iop_base;
target_ix = scsiq->q2.target_ix;
tid_no = ASC_TIX_TO_TID(target_ix);
sta = 0;
free_q_head = (uchar) AscGetVarFreeQHead(iop_base);
if (n_q_required > 1) {
if ((next_qp = AscAllocMultipleFreeQueue(iop_base,
free_q_head, (uchar) (n_q_required)))
!= (uchar) ASC_QLINK_END) {
asc_dvc->last_q_shortage = 0;
scsiq->sg_head->queue_cnt = n_q_required - 1;
scsiq->q1.q_no = free_q_head;
if ((sta = AscPutReadySgListQueue(asc_dvc, scsiq,
free_q_head)) == 1) {
AscPutVarFreeQHead(iop_base, next_qp);
asc_dvc->cur_total_qng += (uchar) (n_q_required);
asc_dvc->cur_dvc_qng[tid_no]++;
}
return (sta);
}
} else if (n_q_required == 1) {
if ((next_qp = AscAllocFreeQueue(iop_base,
free_q_head)) != ASC_QLINK_END) {
scsiq->q1.q_no = free_q_head;
if ((sta = AscPutReadyQueue(asc_dvc, scsiq,
free_q_head)) == 1) {
AscPutVarFreeQHead(iop_base, next_qp);
asc_dvc->cur_total_qng++;
asc_dvc->cur_dvc_qng[tid_no]++;
}
return (sta);
}
}
return (sta);
}
STATIC int
AscSgListToQueue(
int sg_list
)
{
int n_sg_list_qs;
n_sg_list_qs = ((sg_list - 1) / ASC_SG_LIST_PER_Q);
if (((sg_list - 1) % ASC_SG_LIST_PER_Q) != 0)
n_sg_list_qs++;
return (n_sg_list_qs + 1);
}
STATIC uint
AscGetNumOfFreeQueue(
ASC_DVC_VAR *asc_dvc,
uchar target_ix,
uchar n_qs
)
{
uint cur_used_qs;
uint cur_free_qs;
ASC_SCSI_BIT_ID_TYPE target_id;
uchar tid_no;
target_id = ASC_TIX_TO_TARGET_ID(target_ix);
tid_no = ASC_TIX_TO_TID(target_ix);
if ((asc_dvc->unit_not_ready & target_id) ||
(asc_dvc->queue_full_or_busy & target_id)) {
return (0);
}
if (n_qs == 1) {
cur_used_qs = (uint) asc_dvc->cur_total_qng +
(uint) asc_dvc->last_q_shortage +
(uint) ASC_MIN_FREE_Q;
} else {
cur_used_qs = (uint) asc_dvc->cur_total_qng +
(uint) ASC_MIN_FREE_Q;
}
if ((uint) (cur_used_qs + n_qs) <= (uint) asc_dvc->max_total_qng) {
cur_free_qs = (uint) asc_dvc->max_total_qng - cur_used_qs;
if (asc_dvc->cur_dvc_qng[tid_no] >=
asc_dvc->max_dvc_qng[tid_no]) {
return (0);
}
return (cur_free_qs);
}
if (n_qs > 1) {
if ((n_qs > asc_dvc->last_q_shortage) && (n_qs <= (asc_dvc->max_total_qng - ASC_MIN_FREE_Q))) {
asc_dvc->last_q_shortage = n_qs;
}
}
return (0);
}
STATIC int
AscPutReadyQueue(
ASC_DVC_VAR *asc_dvc,
ASC_SCSI_Q *scsiq,
uchar q_no
)
{
ushort q_addr;
uchar tid_no;
uchar sdtr_data;
uchar syn_period_ix;
uchar syn_offset;
PortAddr iop_base;
iop_base = asc_dvc->iop_base;
if (((asc_dvc->init_sdtr & scsiq->q1.target_id) != 0) &&
((asc_dvc->sdtr_done & scsiq->q1.target_id) == 0)) {
tid_no = ASC_TIX_TO_TID(scsiq->q2.target_ix);
sdtr_data = AscGetMCodeInitSDTRAtID(iop_base, tid_no);
syn_period_ix = (sdtr_data >> 4) & (asc_dvc->max_sdtr_index - 1);
syn_offset = sdtr_data & ASC_SYN_MAX_OFFSET;
AscMsgOutSDTR(asc_dvc,
asc_dvc->sdtr_period_tbl[syn_period_ix],
syn_offset);
scsiq->q1.cntl |= QC_MSG_OUT;
}
q_addr = ASC_QNO_TO_QADDR(q_no);
if ((scsiq->q1.target_id & asc_dvc->use_tagged_qng) == 0) {
scsiq->q2.tag_code &= ~M2_QTAG_MSG_SIMPLE;
}
scsiq->q1.status = QS_FREE;
AscMemWordCopyPtrToLram(iop_base,
q_addr + ASC_SCSIQ_CDB_BEG,
(uchar *) scsiq->cdbptr,
scsiq->q2.cdb_len >> 1);
DvcPutScsiQ(iop_base,
q_addr + ASC_SCSIQ_CPY_BEG,
(uchar *) &scsiq->q1.cntl,
((sizeof(ASC_SCSIQ_1) + sizeof(ASC_SCSIQ_2)) / 2) - 1);
AscWriteLramWord(iop_base,
(ushort) (q_addr + (ushort) ASC_SCSIQ_B_STATUS),
(ushort) (((ushort) scsiq->q1.q_no << 8) | (ushort) QS_READY));
return (1);
}
STATIC int
AscPutReadySgListQueue(
ASC_DVC_VAR *asc_dvc,
ASC_SCSI_Q *scsiq,
uchar q_no
)
{
int sta;
int i;
ASC_SG_HEAD *sg_head;
ASC_SG_LIST_Q scsi_sg_q;
ASC_DCNT saved_data_addr;
ASC_DCNT saved_data_cnt;
PortAddr iop_base;
ushort sg_list_dwords;
ushort sg_index;
ushort sg_entry_cnt;
ushort q_addr;
uchar next_qp;
iop_base = asc_dvc->iop_base;
sg_head = scsiq->sg_head;
saved_data_addr = scsiq->q1.data_addr;
saved_data_cnt = scsiq->q1.data_cnt;
scsiq->q1.data_addr = (ASC_PADDR) sg_head->sg_list[0].addr;
scsiq->q1.data_cnt = (ASC_DCNT) sg_head->sg_list[0].bytes;
#if CC_VERY_LONG_SG_LIST
/*
* If sg_head->entry_cnt is greater than ASC_MAX_SG_LIST
* then not all SG elements will fit in the allocated queues.
* The rest of the SG elements will be copied when the RISC
* completes the SG elements that fit and halts.
*/
if (sg_head->entry_cnt > ASC_MAX_SG_LIST)
{
/*
* Set sg_entry_cnt to be the number of SG elements that
* will fit in the allocated SG queues. It is minus 1, because
* the first SG element is handled above. ASC_MAX_SG_LIST is
* already inflated by 1 to account for this. For example it
* may be 50 which is 1 + 7 queues * 7 SG elements.
*/
sg_entry_cnt = ASC_MAX_SG_LIST - 1;
/*
* Keep track of remaining number of SG elements that will
* need to be handled from a_isr.c.
*/
scsiq->remain_sg_entry_cnt = sg_head->entry_cnt - ASC_MAX_SG_LIST;
} else
{
#endif /* CC_VERY_LONG_SG_LIST */
/*
* Set sg_entry_cnt to be the number of SG elements that
* will fit in the allocated SG queues. It is minus 1, because
* the first SG element is handled above.
*/
sg_entry_cnt = sg_head->entry_cnt - 1;
#if CC_VERY_LONG_SG_LIST
}
#endif /* CC_VERY_LONG_SG_LIST */
if (sg_entry_cnt != 0) {
scsiq->q1.cntl |= QC_SG_HEAD;
q_addr = ASC_QNO_TO_QADDR(q_no);
sg_index = 1;
scsiq->q1.sg_queue_cnt = sg_head->queue_cnt;
scsi_sg_q.sg_head_qp = q_no;
scsi_sg_q.cntl = QCSG_SG_XFER_LIST;
for (i = 0; i < sg_head->queue_cnt; i++) {
scsi_sg_q.seq_no = i + 1;
if (sg_entry_cnt > ASC_SG_LIST_PER_Q) {
sg_list_dwords = (uchar) (ASC_SG_LIST_PER_Q * 2);
sg_entry_cnt -= ASC_SG_LIST_PER_Q;
if (i == 0) {
scsi_sg_q.sg_list_cnt = ASC_SG_LIST_PER_Q;
scsi_sg_q.sg_cur_list_cnt = ASC_SG_LIST_PER_Q;
} else {
scsi_sg_q.sg_list_cnt = ASC_SG_LIST_PER_Q - 1;
scsi_sg_q.sg_cur_list_cnt = ASC_SG_LIST_PER_Q - 1;
}
} else {
#if CC_VERY_LONG_SG_LIST
/*
* This is the last SG queue in the list of
* allocated SG queues. If there are more
* SG elements than will fit in the allocated
* queues, then set the QCSG_SG_XFER_MORE flag.
*/
if (sg_head->entry_cnt > ASC_MAX_SG_LIST)
{
scsi_sg_q.cntl |= QCSG_SG_XFER_MORE;
} else
{
#endif /* CC_VERY_LONG_SG_LIST */
scsi_sg_q.cntl |= QCSG_SG_XFER_END;
#if CC_VERY_LONG_SG_LIST
}
#endif /* CC_VERY_LONG_SG_LIST */
sg_list_dwords = sg_entry_cnt << 1;
if (i == 0) {
scsi_sg_q.sg_list_cnt = sg_entry_cnt;
scsi_sg_q.sg_cur_list_cnt = sg_entry_cnt;
} else {
scsi_sg_q.sg_list_cnt = sg_entry_cnt - 1;
scsi_sg_q.sg_cur_list_cnt = sg_entry_cnt - 1;
}
sg_entry_cnt = 0;
}
next_qp = AscReadLramByte(iop_base,
(ushort) (q_addr + ASC_SCSIQ_B_FWD));
scsi_sg_q.q_no = next_qp;
q_addr = ASC_QNO_TO_QADDR(next_qp);
AscMemWordCopyPtrToLram(iop_base,
q_addr + ASC_SCSIQ_SGHD_CPY_BEG,
(uchar *) &scsi_sg_q,
sizeof(ASC_SG_LIST_Q) >> 1);
AscMemDWordCopyPtrToLram(iop_base,
q_addr + ASC_SGQ_LIST_BEG,
(uchar *) &sg_head->sg_list[sg_index],
sg_list_dwords);
sg_index += ASC_SG_LIST_PER_Q;
scsiq->next_sg_index = sg_index;
}
} else {
scsiq->q1.cntl &= ~QC_SG_HEAD;
}
sta = AscPutReadyQueue(asc_dvc, scsiq, q_no);
scsiq->q1.data_addr = saved_data_addr;
scsiq->q1.data_cnt = saved_data_cnt;
return (sta);
}
STATIC int
AscSetRunChipSynRegAtID(
PortAddr iop_base,
uchar tid_no,
uchar sdtr_data
)
{
int sta = FALSE;
if (AscHostReqRiscHalt(iop_base)) {
sta = AscSetChipSynRegAtID(iop_base, tid_no, sdtr_data);
AscStartChip(iop_base);
return (sta);
}
return (sta);
}
STATIC int
AscSetChipSynRegAtID(
PortAddr iop_base,
uchar id,
uchar sdtr_data
)
{
ASC_SCSI_BIT_ID_TYPE org_id;
int i;
int sta = TRUE;
AscSetBank(iop_base, 1);
org_id = AscReadChipDvcID(iop_base);
for (i = 0; i <= ASC_MAX_TID; i++) {
if (org_id == (0x01 << i))
break;
}
org_id = (ASC_SCSI_BIT_ID_TYPE) i;
AscWriteChipDvcID(iop_base, id);
if (AscReadChipDvcID(iop_base) == (0x01 << id)) {
AscSetBank(iop_base, 0);
AscSetChipSyn(iop_base, sdtr_data);
if (AscGetChipSyn(iop_base) != sdtr_data) {
sta = FALSE;
}
} else {
sta = FALSE;
}
AscSetBank(iop_base, 1);
AscWriteChipDvcID(iop_base, org_id);
AscSetBank(iop_base, 0);
return (sta);
}
STATIC ushort
AscInitLram(
ASC_DVC_VAR *asc_dvc
)
{
uchar i;
ushort s_addr;
PortAddr iop_base;
ushort warn_code;
iop_base = asc_dvc->iop_base;
warn_code = 0;
AscMemWordSetLram(iop_base, ASC_QADR_BEG, 0,
(ushort) (((int) (asc_dvc->max_total_qng + 2 + 1) * 64) >> 1)
);
i = ASC_MIN_ACTIVE_QNO;
s_addr = ASC_QADR_BEG + ASC_QBLK_SIZE;
AscWriteLramByte(iop_base, (ushort) (s_addr + ASC_SCSIQ_B_FWD),
(uchar) (i + 1));
AscWriteLramByte(iop_base, (ushort) (s_addr + ASC_SCSIQ_B_BWD),
(uchar) (asc_dvc->max_total_qng));
AscWriteLramByte(iop_base, (ushort) (s_addr + ASC_SCSIQ_B_QNO),
(uchar) i);
i++;
s_addr += ASC_QBLK_SIZE;
for (; i < asc_dvc->max_total_qng; i++, s_addr += ASC_QBLK_SIZE) {
AscWriteLramByte(iop_base, (ushort) (s_addr + ASC_SCSIQ_B_FWD),
(uchar) (i + 1));
AscWriteLramByte(iop_base, (ushort) (s_addr + ASC_SCSIQ_B_BWD),
(uchar) (i - 1));
AscWriteLramByte(iop_base, (ushort) (s_addr + ASC_SCSIQ_B_QNO),
(uchar) i);
}
AscWriteLramByte(iop_base, (ushort) (s_addr + ASC_SCSIQ_B_FWD),
(uchar) ASC_QLINK_END);
AscWriteLramByte(iop_base, (ushort) (s_addr + ASC_SCSIQ_B_BWD),
(uchar) (asc_dvc->max_total_qng - 1));
AscWriteLramByte(iop_base, (ushort) (s_addr + ASC_SCSIQ_B_QNO),
(uchar) asc_dvc->max_total_qng);
i++;
s_addr += ASC_QBLK_SIZE;
for (; i <= (uchar) (asc_dvc->max_total_qng + 3);
i++, s_addr += ASC_QBLK_SIZE) {
AscWriteLramByte(iop_base,
(ushort) (s_addr + (ushort) ASC_SCSIQ_B_FWD), i);
AscWriteLramByte(iop_base,
(ushort) (s_addr + (ushort) ASC_SCSIQ_B_BWD), i);
AscWriteLramByte(iop_base,
(ushort) (s_addr + (ushort) ASC_SCSIQ_B_QNO), i);
}
return (warn_code);
}
STATIC ushort
AscInitQLinkVar(
ASC_DVC_VAR *asc_dvc
)
{
PortAddr iop_base;
int i;
ushort lram_addr;
iop_base = asc_dvc->iop_base;
AscPutRiscVarFreeQHead(iop_base, 1);
AscPutRiscVarDoneQTail(iop_base, asc_dvc->max_total_qng);
AscPutVarFreeQHead(iop_base, 1);
AscPutVarDoneQTail(iop_base, asc_dvc->max_total_qng);
AscWriteLramByte(iop_base, ASCV_BUSY_QHEAD_B,
(uchar) ((int) asc_dvc->max_total_qng + 1));
AscWriteLramByte(iop_base, ASCV_DISC1_QHEAD_B,
(uchar) ((int) asc_dvc->max_total_qng + 2));
AscWriteLramByte(iop_base, (ushort) ASCV_TOTAL_READY_Q_B,
asc_dvc->max_total_qng);
AscWriteLramWord(iop_base, ASCV_ASCDVC_ERR_CODE_W, 0);
AscWriteLramWord(iop_base, ASCV_HALTCODE_W, 0);
AscWriteLramByte(iop_base, ASCV_STOP_CODE_B, 0);
AscWriteLramByte(iop_base, ASCV_SCSIBUSY_B, 0);
AscWriteLramByte(iop_base, ASCV_WTM_FLAG_B, 0);
AscPutQDoneInProgress(iop_base, 0);
lram_addr = ASC_QADR_BEG;
for (i = 0; i < 32; i++, lram_addr += 2) {
AscWriteLramWord(iop_base, lram_addr, 0);
}
return (0);
}
STATIC int
AscSetLibErrorCode(
ASC_DVC_VAR *asc_dvc,
ushort err_code
)
{
if (asc_dvc->err_code == 0) {
asc_dvc->err_code = err_code;
AscWriteLramWord(asc_dvc->iop_base, ASCV_ASCDVC_ERR_CODE_W,
err_code);
}
return (err_code);
}
STATIC uchar
AscMsgOutSDTR(
ASC_DVC_VAR *asc_dvc,
uchar sdtr_period,
uchar sdtr_offset
)
{
EXT_MSG sdtr_buf;
uchar sdtr_period_index;
PortAddr iop_base;
iop_base = asc_dvc->iop_base;
sdtr_buf.msg_type = MS_EXTEND;
sdtr_buf.msg_len = MS_SDTR_LEN;
sdtr_buf.msg_req = MS_SDTR_CODE;
sdtr_buf.xfer_period = sdtr_period;
sdtr_offset &= ASC_SYN_MAX_OFFSET;
sdtr_buf.req_ack_offset = sdtr_offset;
if ((sdtr_period_index =
AscGetSynPeriodIndex(asc_dvc, sdtr_period)) <=
asc_dvc->max_sdtr_index) {
AscMemWordCopyPtrToLram(iop_base,
ASCV_MSGOUT_BEG,
(uchar *) &sdtr_buf,
sizeof (EXT_MSG) >> 1);
return ((sdtr_period_index << 4) | sdtr_offset);
} else {
sdtr_buf.req_ack_offset = 0;
AscMemWordCopyPtrToLram(iop_base,
ASCV_MSGOUT_BEG,
(uchar *) &sdtr_buf,
sizeof (EXT_MSG) >> 1);
return (0);
}
}
STATIC uchar
AscCalSDTRData(
ASC_DVC_VAR *asc_dvc,
uchar sdtr_period,
uchar syn_offset
)
{
uchar byte;
uchar sdtr_period_ix;
sdtr_period_ix = AscGetSynPeriodIndex(asc_dvc, sdtr_period);
if (
(sdtr_period_ix > asc_dvc->max_sdtr_index)
) {
return (0xFF);
}
byte = (sdtr_period_ix << 4) | (syn_offset & ASC_SYN_MAX_OFFSET);
return (byte);
}
STATIC void
AscSetChipSDTR(
PortAddr iop_base,
uchar sdtr_data,
uchar tid_no
)
{
AscSetChipSynRegAtID(iop_base, tid_no, sdtr_data);
AscPutMCodeSDTRDoneAtID(iop_base, tid_no, sdtr_data);
return;
}
STATIC uchar
AscGetSynPeriodIndex(
ASC_DVC_VAR *asc_dvc,
uchar syn_time
)
{
uchar *period_table;
int max_index;
int min_index;
int i;
period_table = asc_dvc->sdtr_period_tbl;
max_index = (int) asc_dvc->max_sdtr_index;
min_index = (int)asc_dvc->host_init_sdtr_index;
if ((syn_time <= period_table[max_index])) {
for (i = min_index; i < (max_index - 1); i++) {
if (syn_time <= period_table[i]) {
return ((uchar) i);
}
}
return ((uchar) max_index);
} else {
return ((uchar) (max_index + 1));
}
}
STATIC uchar
AscAllocFreeQueue(
PortAddr iop_base,
uchar free_q_head
)
{
ushort q_addr;
uchar next_qp;
uchar q_status;
q_addr = ASC_QNO_TO_QADDR(free_q_head);
q_status = (uchar) AscReadLramByte(iop_base,
(ushort) (q_addr + ASC_SCSIQ_B_STATUS));
next_qp = AscReadLramByte(iop_base,
(ushort) (q_addr + ASC_SCSIQ_B_FWD));
if (((q_status & QS_READY) == 0) && (next_qp != ASC_QLINK_END)) {
return (next_qp);
}
return (ASC_QLINK_END);
}
STATIC uchar
AscAllocMultipleFreeQueue(
PortAddr iop_base,
uchar free_q_head,
uchar n_free_q
)
{
uchar i;
for (i = 0; i < n_free_q; i++) {
if ((free_q_head = AscAllocFreeQueue(iop_base, free_q_head))
== ASC_QLINK_END) {
return (ASC_QLINK_END);
}
}
return (free_q_head);
}
STATIC int
AscHostReqRiscHalt(
PortAddr iop_base
)
{
int count = 0;
int sta = 0;
uchar saved_stop_code;
if (AscIsChipHalted(iop_base))
return (1);
saved_stop_code = AscReadLramByte(iop_base, ASCV_STOP_CODE_B);
AscWriteLramByte(iop_base, ASCV_STOP_CODE_B,
ASC_STOP_HOST_REQ_RISC_HALT | ASC_STOP_REQ_RISC_STOP
);
do {
if (AscIsChipHalted(iop_base)) {
sta = 1;
break;
}
DvcSleepMilliSecond(100);
} while (count++ < 20);
AscWriteLramByte(iop_base, ASCV_STOP_CODE_B, saved_stop_code);
return (sta);
}
STATIC int
AscStopQueueExe(
PortAddr iop_base
)
{
int count = 0;
if (AscReadLramByte(iop_base, ASCV_STOP_CODE_B) == 0) {
AscWriteLramByte(iop_base, ASCV_STOP_CODE_B,
ASC_STOP_REQ_RISC_STOP);
do {
if (
AscReadLramByte(iop_base, ASCV_STOP_CODE_B) &
ASC_STOP_ACK_RISC_STOP) {
return (1);
}
DvcSleepMilliSecond(100);
} while (count++ < 20);
}
return (0);
}
STATIC void
DvcDelayMicroSecond(ADV_DVC_VAR *asc_dvc, ushort micro_sec)
{
udelay(micro_sec);
}
STATIC void
DvcDelayNanoSecond(ASC_DVC_VAR *asc_dvc, ASC_DCNT nano_sec)
{
udelay((nano_sec + 999)/1000);
}
#ifdef CONFIG_ISA
ASC_INITFUNC(
STATIC ASC_DCNT,
AscGetEisaProductID(
PortAddr iop_base
)
)
{
PortAddr eisa_iop;
ushort product_id_high, product_id_low;
ASC_DCNT product_id;
eisa_iop = ASC_GET_EISA_SLOT(iop_base) | ASC_EISA_PID_IOP_MASK;
product_id_low = inpw(eisa_iop);
product_id_high = inpw(eisa_iop + 2);
product_id = ((ASC_DCNT) product_id_high << 16) |
(ASC_DCNT) product_id_low;
return (product_id);
}
ASC_INITFUNC(
STATIC PortAddr,
AscSearchIOPortAddrEISA(
PortAddr iop_base
)
)
{
ASC_DCNT eisa_product_id;
if (iop_base == 0) {
iop_base = ASC_EISA_MIN_IOP_ADDR;
} else {
if (iop_base == ASC_EISA_MAX_IOP_ADDR)
return (0);
if ((iop_base & 0x0050) == 0x0050) {
iop_base += ASC_EISA_BIG_IOP_GAP;
} else {
iop_base += ASC_EISA_SMALL_IOP_GAP;
}
}
while (iop_base <= ASC_EISA_MAX_IOP_ADDR) {
eisa_product_id = AscGetEisaProductID(iop_base);
if ((eisa_product_id == ASC_EISA_ID_740) ||
(eisa_product_id == ASC_EISA_ID_750)) {
if (AscFindSignature(iop_base)) {
inpw(iop_base + 4);
return (iop_base);
}
}
if (iop_base == ASC_EISA_MAX_IOP_ADDR)
return (0);
if ((iop_base & 0x0050) == 0x0050) {
iop_base += ASC_EISA_BIG_IOP_GAP;
} else {
iop_base += ASC_EISA_SMALL_IOP_GAP;
}
}
return (0);
}
#endif /* CONFIG_ISA */
STATIC int
AscStartChip(
PortAddr iop_base
)
{
AscSetChipControl(iop_base, 0);
if ((AscGetChipStatus(iop_base) & CSW_HALTED) != 0) {
return (0);
}
return (1);
}
STATIC int
AscStopChip(
PortAddr iop_base
)
{
uchar cc_val;
cc_val = AscGetChipControl(iop_base) & (~(CC_SINGLE_STEP | CC_TEST | CC_DIAG));
AscSetChipControl(iop_base, (uchar) (cc_val | CC_HALT));
AscSetChipIH(iop_base, INS_HALT);
AscSetChipIH(iop_base, INS_RFLAG_WTM);
if ((AscGetChipStatus(iop_base) & CSW_HALTED) == 0) {
return (0);
}
return (1);
}
STATIC int
AscIsChipHalted(
PortAddr iop_base
)
{
if ((AscGetChipStatus(iop_base) & CSW_HALTED) != 0) {
if ((AscGetChipControl(iop_base) & CC_HALT) != 0) {
return (1);
}
}
return (0);
}
STATIC void
AscSetChipIH(
PortAddr iop_base,
ushort ins_code
)
{
AscSetBank(iop_base, 1);
AscWriteChipIH(iop_base, ins_code);
AscSetBank(iop_base, 0);
return;
}
STATIC void
AscAckInterrupt(
PortAddr iop_base
)
{
uchar host_flag;
uchar risc_flag;
ushort loop;
loop = 0;
do {
risc_flag = AscReadLramByte(iop_base, ASCV_RISC_FLAG_B);
if (loop++ > 0x7FFF) {
break;
}
} while ((risc_flag & ASC_RISC_FLAG_GEN_INT) != 0);
host_flag = AscReadLramByte(iop_base, ASCV_HOST_FLAG_B) & (~ASC_HOST_FLAG_ACK_INT);
AscWriteLramByte(iop_base, ASCV_HOST_FLAG_B,
(uchar) (host_flag | ASC_HOST_FLAG_ACK_INT));
AscSetChipStatus(iop_base, CIW_INT_ACK);
loop = 0;
while (AscGetChipStatus(iop_base) & CSW_INT_PENDING) {
AscSetChipStatus(iop_base, CIW_INT_ACK);
if (loop++ > 3) {
break;
}
}
AscWriteLramByte(iop_base, ASCV_HOST_FLAG_B, host_flag);
return;
}
STATIC void
AscDisableInterrupt(
PortAddr iop_base
)
{
ushort cfg;
cfg = AscGetChipCfgLsw(iop_base);
AscSetChipCfgLsw(iop_base, cfg & (~ASC_CFG0_HOST_INT_ON));
return;
}
STATIC void
AscEnableInterrupt(
PortAddr iop_base
)
{
ushort cfg;
cfg = AscGetChipCfgLsw(iop_base);
AscSetChipCfgLsw(iop_base, cfg | ASC_CFG0_HOST_INT_ON);
return;
}
STATIC void
AscSetBank(
PortAddr iop_base,
uchar bank
)
{
uchar val;
val = AscGetChipControl(iop_base) &
(~(CC_SINGLE_STEP | CC_TEST | CC_DIAG | CC_SCSI_RESET | CC_CHIP_RESET));
if (bank == 1) {
val |= CC_BANK_ONE;
} else if (bank == 2) {
val |= CC_DIAG | CC_BANK_ONE;
} else {
val &= ~CC_BANK_ONE;
}
AscSetChipControl(iop_base, val);
return;
}
STATIC int
AscResetChipAndScsiBus(
ASC_DVC_VAR *asc_dvc
)
{
PortAddr iop_base;
int i = 10;
iop_base = asc_dvc->iop_base;
while ((AscGetChipStatus(iop_base) & CSW_SCSI_RESET_ACTIVE) && (i-- > 0))
{
DvcSleepMilliSecond(100);
}
AscStopChip(iop_base);
AscSetChipControl(iop_base, CC_CHIP_RESET | CC_SCSI_RESET | CC_HALT);
DvcDelayNanoSecond(asc_dvc, 60000);
AscSetChipIH(iop_base, INS_RFLAG_WTM);
AscSetChipIH(iop_base, INS_HALT);
AscSetChipControl(iop_base, CC_CHIP_RESET | CC_HALT);
AscSetChipControl(iop_base, CC_HALT);
DvcSleepMilliSecond(200);
AscSetChipStatus(iop_base, CIW_CLR_SCSI_RESET_INT);
AscSetChipStatus(iop_base, 0);
return (AscIsChipHalted(iop_base));
}
ASC_INITFUNC(
STATIC ASC_DCNT,
AscGetMaxDmaCount(
ushort bus_type
)
)
{
if (bus_type & ASC_IS_ISA)
return (ASC_MAX_ISA_DMA_COUNT);
else if (bus_type & (ASC_IS_EISA | ASC_IS_VL))
return (ASC_MAX_VL_DMA_COUNT);
return (ASC_MAX_PCI_DMA_COUNT);
}
#ifdef CONFIG_ISA
ASC_INITFUNC(
STATIC ushort,
AscGetIsaDmaChannel(
PortAddr iop_base
)
)
{
ushort channel;
channel = AscGetChipCfgLsw(iop_base) & 0x0003;
if (channel == 0x03)
return (0);
else if (channel == 0x00)
return (7);
return (channel + 4);
}
ASC_INITFUNC(
STATIC ushort,
AscSetIsaDmaChannel(
PortAddr iop_base,
ushort dma_channel
)
)
{
ushort cfg_lsw;
uchar value;
if ((dma_channel >= 5) && (dma_channel <= 7)) {
if (dma_channel == 7)
value = 0x00;
else
value = dma_channel - 4;
cfg_lsw = AscGetChipCfgLsw(iop_base) & 0xFFFC;
cfg_lsw |= value;
AscSetChipCfgLsw(iop_base, cfg_lsw);
return (AscGetIsaDmaChannel(iop_base));
}
return (0);
}
ASC_INITFUNC(
STATIC uchar,
AscSetIsaDmaSpeed(
PortAddr iop_base,
uchar speed_value
)
)
{
speed_value &= 0x07;
AscSetBank(iop_base, 1);
AscWriteChipDmaSpeed(iop_base, speed_value);
AscSetBank(iop_base, 0);
return (AscGetIsaDmaSpeed(iop_base));
}
ASC_INITFUNC(
STATIC uchar,
AscGetIsaDmaSpeed(
PortAddr iop_base
)
)
{
uchar speed_value;
AscSetBank(iop_base, 1);
speed_value = AscReadChipDmaSpeed(iop_base);
speed_value &= 0x07;
AscSetBank(iop_base, 0);
return (speed_value);
}
#endif /* CONFIG_ISA */
ASC_INITFUNC(
STATIC ushort,
AscReadPCIConfigWord(
ASC_DVC_VAR *asc_dvc,
ushort pci_config_offset)
)
{
uchar lsb, msb;
lsb = DvcReadPCIConfigByte(asc_dvc, pci_config_offset);
msb = DvcReadPCIConfigByte(asc_dvc, pci_config_offset + 1);
return ((ushort) ((msb << 8) | lsb));
}
ASC_INITFUNC(
STATIC ushort,
AscInitGetConfig(
ASC_DVC_VAR *asc_dvc
)
)
{
ushort warn_code;
PortAddr iop_base;
ushort PCIDeviceID;
ushort PCIVendorID;
uchar PCIRevisionID;
uchar prevCmdRegBits;
warn_code = 0;
iop_base = asc_dvc->iop_base;
asc_dvc->init_state = ASC_INIT_STATE_BEG_GET_CFG;
if (asc_dvc->err_code != 0) {
return (UW_ERR);
}
if (asc_dvc->bus_type == ASC_IS_PCI) {
PCIVendorID = AscReadPCIConfigWord(asc_dvc,
AscPCIConfigVendorIDRegister);
PCIDeviceID = AscReadPCIConfigWord(asc_dvc,
AscPCIConfigDeviceIDRegister);
PCIRevisionID = DvcReadPCIConfigByte(asc_dvc,
AscPCIConfigRevisionIDRegister);
if (PCIVendorID != ASC_PCI_VENDORID) {
warn_code |= ASC_WARN_SET_PCI_CONFIG_SPACE;
}
prevCmdRegBits = DvcReadPCIConfigByte(asc_dvc,
AscPCIConfigCommandRegister);
if ((prevCmdRegBits & AscPCICmdRegBits_IOMemBusMaster) !=
AscPCICmdRegBits_IOMemBusMaster) {
DvcWritePCIConfigByte(asc_dvc,
AscPCIConfigCommandRegister,
(prevCmdRegBits |
AscPCICmdRegBits_IOMemBusMaster));
if ((DvcReadPCIConfigByte(asc_dvc,
AscPCIConfigCommandRegister)
& AscPCICmdRegBits_IOMemBusMaster)
!= AscPCICmdRegBits_IOMemBusMaster) {
warn_code |= ASC_WARN_SET_PCI_CONFIG_SPACE;
}
}
if ((PCIDeviceID == ASC_PCI_DEVICEID_1200A) ||
(PCIDeviceID == ASC_PCI_DEVICEID_1200B)) {
DvcWritePCIConfigByte(asc_dvc,
AscPCIConfigLatencyTimer, 0x00);
if (DvcReadPCIConfigByte(asc_dvc, AscPCIConfigLatencyTimer)
!= 0x00) {
warn_code |= ASC_WARN_SET_PCI_CONFIG_SPACE;
}
} else if (PCIDeviceID == ASC_PCI_DEVICEID_ULTRA) {
if (DvcReadPCIConfigByte(asc_dvc,
AscPCIConfigLatencyTimer) < 0x20) {
DvcWritePCIConfigByte(asc_dvc,
AscPCIConfigLatencyTimer, 0x20);
if (DvcReadPCIConfigByte(asc_dvc,
AscPCIConfigLatencyTimer) < 0x20) {
warn_code |= ASC_WARN_SET_PCI_CONFIG_SPACE;
}
}
}
}
if (AscFindSignature(iop_base)) {
warn_code |= AscInitAscDvcVar(asc_dvc);
warn_code |= AscInitFromEEP(asc_dvc);
asc_dvc->init_state |= ASC_INIT_STATE_END_GET_CFG;
if (asc_dvc->scsi_reset_wait > ASC_MAX_SCSI_RESET_WAIT) {
asc_dvc->scsi_reset_wait = ASC_MAX_SCSI_RESET_WAIT;
}
} else {
asc_dvc->err_code = ASC_IERR_BAD_SIGNATURE;
}
return(warn_code);
}
ASC_INITFUNC(
STATIC ushort,
AscInitSetConfig(
ASC_DVC_VAR *asc_dvc
)
)
{
ushort warn_code = 0;
asc_dvc->init_state |= ASC_INIT_STATE_BEG_SET_CFG;
if (asc_dvc->err_code != 0)
return (UW_ERR);
if (AscFindSignature(asc_dvc->iop_base)) {
warn_code |= AscInitFromAscDvcVar(asc_dvc);
asc_dvc->init_state |= ASC_INIT_STATE_END_SET_CFG;
} else {
asc_dvc->err_code = ASC_IERR_BAD_SIGNATURE;
}
return (warn_code);
}
ASC_INITFUNC(
STATIC ushort,
AscInitFromAscDvcVar(
ASC_DVC_VAR *asc_dvc
)
)
{
PortAddr iop_base;
ushort cfg_msw;
ushort warn_code;
ushort pci_device_id;
iop_base = asc_dvc->iop_base;
pci_device_id = asc_dvc->cfg->pci_device_id;
warn_code = 0;
cfg_msw = AscGetChipCfgMsw(iop_base);
if ((cfg_msw & ASC_CFG_MSW_CLR_MASK) != 0) {
cfg_msw &= (~(ASC_CFG_MSW_CLR_MASK));
warn_code |= ASC_WARN_CFG_MSW_RECOVER;
AscSetChipCfgMsw(iop_base, cfg_msw);
}
if ((asc_dvc->cfg->cmd_qng_enabled & asc_dvc->cfg->disc_enable) !=
asc_dvc->cfg->cmd_qng_enabled) {
asc_dvc->cfg->disc_enable = asc_dvc->cfg->cmd_qng_enabled;
warn_code |= ASC_WARN_CMD_QNG_CONFLICT;
}
if (AscGetChipStatus(iop_base) & CSW_AUTO_CONFIG) {
warn_code |= ASC_WARN_AUTO_CONFIG;
}
if ((asc_dvc->bus_type & (ASC_IS_ISA | ASC_IS_VL)) != 0) {
if (AscSetChipIRQ(iop_base, asc_dvc->irq_no, asc_dvc->bus_type)
!= asc_dvc->irq_no) {
asc_dvc->err_code |= ASC_IERR_SET_IRQ_NO;
}
}
if (asc_dvc->bus_type & ASC_IS_PCI) {
cfg_msw &= 0xFFC0;
AscSetChipCfgMsw(iop_base, cfg_msw);
if ((asc_dvc->bus_type & ASC_IS_PCI_ULTRA) == ASC_IS_PCI_ULTRA) {
} else {
if ((pci_device_id == ASC_PCI_DEVICE_ID_REV_A) ||
(pci_device_id == ASC_PCI_DEVICE_ID_REV_B)) {
asc_dvc->bug_fix_cntl |= ASC_BUG_FIX_IF_NOT_DWB;
asc_dvc->bug_fix_cntl |= ASC_BUG_FIX_ASYN_USE_SYN;
}
}
} else if (asc_dvc->bus_type == ASC_IS_ISAPNP) {
if (AscGetChipVersion(iop_base, asc_dvc->bus_type)
== ASC_CHIP_VER_ASYN_BUG) {
asc_dvc->bug_fix_cntl |= ASC_BUG_FIX_ASYN_USE_SYN;
}
}
if (AscSetChipScsiID(iop_base, asc_dvc->cfg->chip_scsi_id) !=
asc_dvc->cfg->chip_scsi_id) {
asc_dvc->err_code |= ASC_IERR_SET_SCSI_ID;