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advansys.c：源码内容

}
#ifdef CONFIG_ISA
if (asc_dvc->bus_type & ASC_IS_ISA) {
AscSetIsaDmaChannel(iop_base, asc_dvc->cfg->isa_dma_channel);
AscSetIsaDmaSpeed(iop_base, asc_dvc->cfg->isa_dma_speed);
}
#endif /* CONFIG_ISA */
return (warn_code);
}
STATIC ushort
AscInitAsc1000Driver(
ASC_DVC_VAR *asc_dvc
)
{
ushort warn_code;
PortAddr iop_base;
iop_base = asc_dvc->iop_base;
warn_code = 0;
if ((asc_dvc->dvc_cntl & ASC_CNTL_RESET_SCSI) &&
!(asc_dvc->init_state & ASC_INIT_RESET_SCSI_DONE)) {
AscResetChipAndScsiBus(asc_dvc);
DvcSleepMilliSecond((ASC_DCNT)
((ushort) asc_dvc->scsi_reset_wait * 1000));
}
asc_dvc->init_state |= ASC_INIT_STATE_BEG_LOAD_MC;
if (asc_dvc->err_code != 0)
return (UW_ERR);
if (!AscFindSignature(asc_dvc->iop_base)) {
asc_dvc->err_code = ASC_IERR_BAD_SIGNATURE;
return (warn_code);
}
AscDisableInterrupt(iop_base);
warn_code |= AscInitLram(asc_dvc);
if (asc_dvc->err_code != 0)
return (UW_ERR);
ASC_DBG1(1, "AscInitAsc1000Driver: _asc_mcode_chksum 0x%lxn",
(ulong) _asc_mcode_chksum);
if (AscLoadMicroCode(iop_base, 0, _asc_mcode_buf,
_asc_mcode_size) != _asc_mcode_chksum) {
asc_dvc->err_code |= ASC_IERR_MCODE_CHKSUM;
return (warn_code);
}
warn_code |= AscInitMicroCodeVar(asc_dvc);
asc_dvc->init_state |= ASC_INIT_STATE_END_LOAD_MC;
AscEnableInterrupt(iop_base);
return (warn_code);
}
ASC_INITFUNC(
STATIC ushort,
AscInitAscDvcVar(
ASC_DVC_VAR *asc_dvc
)
)
{
int i;
PortAddr iop_base;
ushort warn_code;
uchar chip_version;
iop_base = asc_dvc->iop_base;
warn_code = 0;
asc_dvc->err_code = 0;
if ((asc_dvc->bus_type &
(ASC_IS_ISA | ASC_IS_PCI | ASC_IS_EISA | ASC_IS_VL)) == 0) {
asc_dvc->err_code |= ASC_IERR_NO_BUS_TYPE;
}
AscSetChipControl(iop_base, CC_HALT);
AscSetChipStatus(iop_base, 0);
asc_dvc->bug_fix_cntl = 0;
asc_dvc->pci_fix_asyn_xfer = 0;
asc_dvc->pci_fix_asyn_xfer_always = 0;
/* asc_dvc->init_state initalized in AscInitGetConfig(). */
asc_dvc->sdtr_done = 0;
asc_dvc->cur_total_qng = 0;
asc_dvc->is_in_int = 0;
asc_dvc->in_critical_cnt = 0;
asc_dvc->last_q_shortage = 0;
asc_dvc->use_tagged_qng = 0;
asc_dvc->no_scam = 0;
asc_dvc->unit_not_ready = 0;
asc_dvc->queue_full_or_busy = 0;
asc_dvc->redo_scam = 0;
asc_dvc->res2 = 0;
asc_dvc->host_init_sdtr_index = 0;
asc_dvc->cfg->can_tagged_qng = 0;
asc_dvc->cfg->cmd_qng_enabled = 0;
asc_dvc->dvc_cntl = ASC_DEF_DVC_CNTL;
asc_dvc->init_sdtr = 0;
asc_dvc->max_total_qng = ASC_DEF_MAX_TOTAL_QNG;
asc_dvc->scsi_reset_wait = 3;
asc_dvc->start_motor = ASC_SCSI_WIDTH_BIT_SET;
asc_dvc->max_dma_count = AscGetMaxDmaCount(asc_dvc->bus_type);
asc_dvc->cfg->sdtr_enable = ASC_SCSI_WIDTH_BIT_SET;
asc_dvc->cfg->disc_enable = ASC_SCSI_WIDTH_BIT_SET;
asc_dvc->cfg->chip_scsi_id = ASC_DEF_CHIP_SCSI_ID;
asc_dvc->cfg->lib_serial_no = ASC_LIB_SERIAL_NUMBER;
asc_dvc->cfg->lib_version = (ASC_LIB_VERSION_MAJOR << 8) |
ASC_LIB_VERSION_MINOR;
chip_version = AscGetChipVersion(iop_base, asc_dvc->bus_type);
asc_dvc->cfg->chip_version = chip_version;
asc_dvc->sdtr_period_tbl[0] = SYN_XFER_NS_0;
asc_dvc->sdtr_period_tbl[1] = SYN_XFER_NS_1;
asc_dvc->sdtr_period_tbl[2] = SYN_XFER_NS_2;
asc_dvc->sdtr_period_tbl[3] = SYN_XFER_NS_3;
asc_dvc->sdtr_period_tbl[4] = SYN_XFER_NS_4;
asc_dvc->sdtr_period_tbl[5] = SYN_XFER_NS_5;
asc_dvc->sdtr_period_tbl[6] = SYN_XFER_NS_6;
asc_dvc->sdtr_period_tbl[7] = SYN_XFER_NS_7;
asc_dvc->max_sdtr_index = 7;
if ((asc_dvc->bus_type & ASC_IS_PCI) &&
(chip_version >= ASC_CHIP_VER_PCI_ULTRA_3150)) {
asc_dvc->bus_type = ASC_IS_PCI_ULTRA;
asc_dvc->sdtr_period_tbl[0] = SYN_ULTRA_XFER_NS_0;
asc_dvc->sdtr_period_tbl[1] = SYN_ULTRA_XFER_NS_1;
asc_dvc->sdtr_period_tbl[2] = SYN_ULTRA_XFER_NS_2;
asc_dvc->sdtr_period_tbl[3] = SYN_ULTRA_XFER_NS_3;
asc_dvc->sdtr_period_tbl[4] = SYN_ULTRA_XFER_NS_4;
asc_dvc->sdtr_period_tbl[5] = SYN_ULTRA_XFER_NS_5;
asc_dvc->sdtr_period_tbl[6] = SYN_ULTRA_XFER_NS_6;
asc_dvc->sdtr_period_tbl[7] = SYN_ULTRA_XFER_NS_7;
asc_dvc->sdtr_period_tbl[8] = SYN_ULTRA_XFER_NS_8;
asc_dvc->sdtr_period_tbl[9] = SYN_ULTRA_XFER_NS_9;
asc_dvc->sdtr_period_tbl[10] = SYN_ULTRA_XFER_NS_10;
asc_dvc->sdtr_period_tbl[11] = SYN_ULTRA_XFER_NS_11;
asc_dvc->sdtr_period_tbl[12] = SYN_ULTRA_XFER_NS_12;
asc_dvc->sdtr_period_tbl[13] = SYN_ULTRA_XFER_NS_13;
asc_dvc->sdtr_period_tbl[14] = SYN_ULTRA_XFER_NS_14;
asc_dvc->sdtr_period_tbl[15] = SYN_ULTRA_XFER_NS_15;
asc_dvc->max_sdtr_index = 15;
if (chip_version == ASC_CHIP_VER_PCI_ULTRA_3150)
{
AscSetExtraControl(iop_base,
(SEC_ACTIVE_NEGATE | SEC_SLEW_RATE));
} else if (chip_version >= ASC_CHIP_VER_PCI_ULTRA_3050) {
AscSetExtraControl(iop_base,
(SEC_ACTIVE_NEGATE | SEC_ENABLE_FILTER));
}
}
if (asc_dvc->bus_type == ASC_IS_PCI) {
AscSetExtraControl(iop_base, (SEC_ACTIVE_NEGATE | SEC_SLEW_RATE));
}
asc_dvc->cfg->isa_dma_speed = ASC_DEF_ISA_DMA_SPEED;
if (AscGetChipBusType(iop_base) == ASC_IS_ISAPNP) {
AscSetChipIFC(iop_base, IFC_INIT_DEFAULT);
asc_dvc->bus_type = ASC_IS_ISAPNP;
}
#ifdef CONFIG_ISA
if ((asc_dvc->bus_type & ASC_IS_ISA) != 0) {
asc_dvc->cfg->isa_dma_channel = (uchar) AscGetIsaDmaChannel(iop_base);
}
#endif /* CONFIG_ISA */
for (i = 0; i <= ASC_MAX_TID; i++) {
asc_dvc->cur_dvc_qng[i] = 0;
asc_dvc->max_dvc_qng[i] = ASC_MAX_SCSI1_QNG;
asc_dvc->scsiq_busy_head[i] = (ASC_SCSI_Q *) 0L;
asc_dvc->scsiq_busy_tail[i] = (ASC_SCSI_Q *) 0L;
asc_dvc->cfg->max_tag_qng[i] = ASC_MAX_INRAM_TAG_QNG;
}
return (warn_code);
}
ASC_INITFUNC(
STATIC ushort,
AscInitFromEEP(
ASC_DVC_VAR *asc_dvc
)
)
{
ASCEEP_CONFIG eep_config_buf;
ASCEEP_CONFIG *eep_config;
PortAddr iop_base;
ushort chksum;
ushort warn_code;
ushort cfg_msw, cfg_lsw;
int i;
int write_eep = 0;
iop_base = asc_dvc->iop_base;
warn_code = 0;
AscWriteLramWord(iop_base, ASCV_HALTCODE_W, 0x00FE);
AscStopQueueExe(iop_base);
if ((AscStopChip(iop_base) == FALSE) ||
(AscGetChipScsiCtrl(iop_base) != 0)) {
asc_dvc->init_state |= ASC_INIT_RESET_SCSI_DONE;
AscResetChipAndScsiBus(asc_dvc);
DvcSleepMilliSecond((ASC_DCNT)
((ushort) asc_dvc->scsi_reset_wait * 1000));
}
if (AscIsChipHalted(iop_base) == FALSE) {
asc_dvc->err_code |= ASC_IERR_START_STOP_CHIP;
return (warn_code);
}
AscSetPCAddr(iop_base, ASC_MCODE_START_ADDR);
if (AscGetPCAddr(iop_base) != ASC_MCODE_START_ADDR) {
asc_dvc->err_code |= ASC_IERR_SET_PC_ADDR;
return (warn_code);
}
eep_config = (ASCEEP_CONFIG *) &eep_config_buf;
cfg_msw = AscGetChipCfgMsw(iop_base);
cfg_lsw = AscGetChipCfgLsw(iop_base);
if ((cfg_msw & ASC_CFG_MSW_CLR_MASK) != 0) {
cfg_msw &= (~(ASC_CFG_MSW_CLR_MASK));
warn_code |= ASC_WARN_CFG_MSW_RECOVER;
AscSetChipCfgMsw(iop_base, cfg_msw);
}
chksum = AscGetEEPConfig(iop_base, eep_config, asc_dvc->bus_type);
ASC_DBG1(1, "AscInitFromEEP: chksum 0x%xn", chksum);
if (chksum == 0) {
chksum = 0xaa55;
}
if (AscGetChipStatus(iop_base) & CSW_AUTO_CONFIG) {
warn_code |= ASC_WARN_AUTO_CONFIG;
if (asc_dvc->cfg->chip_version == 3) {
if (eep_config->cfg_lsw != cfg_lsw) {
warn_code |= ASC_WARN_EEPROM_RECOVER;
eep_config->cfg_lsw = AscGetChipCfgLsw(iop_base);
}
if (eep_config->cfg_msw != cfg_msw) {
warn_code |= ASC_WARN_EEPROM_RECOVER;
eep_config->cfg_msw = AscGetChipCfgMsw(iop_base);
}
}
}
eep_config->cfg_msw &= ~ASC_CFG_MSW_CLR_MASK;
eep_config->cfg_lsw |= ASC_CFG0_HOST_INT_ON;
ASC_DBG1(1, "AscInitFromEEP: eep_config->chksum 0x%xn",
eep_config->chksum);
if (chksum != eep_config->chksum) {
if (AscGetChipVersion(iop_base, asc_dvc->bus_type) ==
ASC_CHIP_VER_PCI_ULTRA_3050 )
{
ASC_DBG(1,
"AscInitFromEEP: chksum error ignored; EEPROM-less boardn");
eep_config->init_sdtr = 0xFF;
eep_config->disc_enable = 0xFF;
eep_config->start_motor = 0xFF;
eep_config->use_cmd_qng = 0;
eep_config->max_total_qng = 0xF0;
eep_config->max_tag_qng = 0x20;
eep_config->cntl = 0xBFFF;
ASC_EEP_SET_CHIP_ID(eep_config, 7);
eep_config->no_scam = 0;
eep_config->adapter_info[0] = 0;
eep_config->adapter_info[1] = 0;
eep_config->adapter_info[2] = 0;
eep_config->adapter_info[3] = 0;
eep_config->adapter_info[4] = 0;
/* Indicate EEPROM-less board. */
eep_config->adapter_info[5] = 0xBB;
} else {
ASC_PRINT(
"AscInitFromEEP: EEPROM checksum error; Will try to re-write EEPROM.n");
write_eep = 1;
warn_code |= ASC_WARN_EEPROM_CHKSUM;
}
}
asc_dvc->cfg->sdtr_enable = eep_config->init_sdtr;
asc_dvc->cfg->disc_enable = eep_config->disc_enable;
asc_dvc->cfg->cmd_qng_enabled = eep_config->use_cmd_qng;
asc_dvc->cfg->isa_dma_speed = ASC_EEP_GET_DMA_SPD(eep_config);
asc_dvc->start_motor = eep_config->start_motor;
asc_dvc->dvc_cntl = eep_config->cntl;
asc_dvc->no_scam = eep_config->no_scam;
asc_dvc->cfg->adapter_info[0] = eep_config->adapter_info[0];
asc_dvc->cfg->adapter_info[1] = eep_config->adapter_info[1];
asc_dvc->cfg->adapter_info[2] = eep_config->adapter_info[2];
asc_dvc->cfg->adapter_info[3] = eep_config->adapter_info[3];
asc_dvc->cfg->adapter_info[4] = eep_config->adapter_info[4];
asc_dvc->cfg->adapter_info[5] = eep_config->adapter_info[5];
if (!AscTestExternalLram(asc_dvc)) {
if (((asc_dvc->bus_type & ASC_IS_PCI_ULTRA) == ASC_IS_PCI_ULTRA)) {
eep_config->max_total_qng = ASC_MAX_PCI_ULTRA_INRAM_TOTAL_QNG;
eep_config->max_tag_qng = ASC_MAX_PCI_ULTRA_INRAM_TAG_QNG;
} else {
eep_config->cfg_msw |= 0x0800;
cfg_msw |= 0x0800;
AscSetChipCfgMsw(iop_base, cfg_msw);
eep_config->max_total_qng = ASC_MAX_PCI_INRAM_TOTAL_QNG;
eep_config->max_tag_qng = ASC_MAX_INRAM_TAG_QNG;
}
} else {
}
if (eep_config->max_total_qng < ASC_MIN_TOTAL_QNG) {
eep_config->max_total_qng = ASC_MIN_TOTAL_QNG;
}
if (eep_config->max_total_qng > ASC_MAX_TOTAL_QNG) {
eep_config->max_total_qng = ASC_MAX_TOTAL_QNG;
}
if (eep_config->max_tag_qng > eep_config->max_total_qng) {
eep_config->max_tag_qng = eep_config->max_total_qng;
}
if (eep_config->max_tag_qng < ASC_MIN_TAG_Q_PER_DVC) {
eep_config->max_tag_qng = ASC_MIN_TAG_Q_PER_DVC;
}
asc_dvc->max_total_qng = eep_config->max_total_qng;
if ((eep_config->use_cmd_qng & eep_config->disc_enable) !=
eep_config->use_cmd_qng) {
eep_config->disc_enable = eep_config->use_cmd_qng;
warn_code |= ASC_WARN_CMD_QNG_CONFLICT;
}
if (asc_dvc->bus_type & (ASC_IS_ISA | ASC_IS_VL | ASC_IS_EISA)) {
asc_dvc->irq_no = AscGetChipIRQ(iop_base, asc_dvc->bus_type);
}
ASC_EEP_SET_CHIP_ID(eep_config, ASC_EEP_GET_CHIP_ID(eep_config) & ASC_MAX_TID);
asc_dvc->cfg->chip_scsi_id = ASC_EEP_GET_CHIP_ID(eep_config);
if (((asc_dvc->bus_type & ASC_IS_PCI_ULTRA) == ASC_IS_PCI_ULTRA) &&
!(asc_dvc->dvc_cntl & ASC_CNTL_SDTR_ENABLE_ULTRA)) {
asc_dvc->host_init_sdtr_index = ASC_SDTR_ULTRA_PCI_10MB_INDEX;
}
for (i = 0; i <= ASC_MAX_TID; i++) {
asc_dvc->dos_int13_table[i] = eep_config->dos_int13_table[i];
asc_dvc->cfg->max_tag_qng[i] = eep_config->max_tag_qng;
asc_dvc->cfg->sdtr_period_offset[i] =
(uchar) (ASC_DEF_SDTR_OFFSET |
(asc_dvc->host_init_sdtr_index << 4));
}
eep_config->cfg_msw = AscGetChipCfgMsw(iop_base);
if (write_eep) {
if ((i = AscSetEEPConfig(iop_base, eep_config, asc_dvc->bus_type)) !=
0) {
ASC_PRINT1(
"AscInitFromEEP: Failed to re-write EEPROM with %d errors.n", i);
} else {
ASC_PRINT("AscInitFromEEP: Succesfully re-wrote EEPROM.");
}
}
return (warn_code);
}
STATIC ushort
AscInitMicroCodeVar(
ASC_DVC_VAR *asc_dvc
)
{
int i;
ushort warn_code;
PortAddr iop_base;
ASC_PADDR phy_addr;
ASC_DCNT phy_size;
iop_base = asc_dvc->iop_base;
warn_code = 0;
for (i = 0; i <= ASC_MAX_TID; i++) {
AscPutMCodeInitSDTRAtID(iop_base, i,
asc_dvc->cfg->sdtr_period_offset[i]
);
}
AscInitQLinkVar(asc_dvc);
AscWriteLramByte(iop_base, ASCV_DISC_ENABLE_B,
asc_dvc->cfg->disc_enable);
AscWriteLramByte(iop_base, ASCV_HOSTSCSI_ID_B,
ASC_TID_TO_TARGET_ID(asc_dvc->cfg->chip_scsi_id));
/* Align overrun buffer on an 8 byte boundary. */
phy_addr = virt_to_bus(asc_dvc->cfg->overrun_buf);
phy_addr = cpu_to_le32((phy_addr + 7) & ~0x7);
AscMemDWordCopyPtrToLram(iop_base, ASCV_OVERRUN_PADDR_D,
(uchar *) &phy_addr, 1);
phy_size = cpu_to_le32(ASC_OVERRUN_BSIZE - 8);
AscMemDWordCopyPtrToLram(iop_base, ASCV_OVERRUN_BSIZE_D,
(uchar *) &phy_size, 1);
asc_dvc->cfg->mcode_date =
AscReadLramWord(iop_base, (ushort) ASCV_MC_DATE_W);
asc_dvc->cfg->mcode_version =
AscReadLramWord(iop_base, (ushort) ASCV_MC_VER_W);
AscSetPCAddr(iop_base, ASC_MCODE_START_ADDR);
if (AscGetPCAddr(iop_base) != ASC_MCODE_START_ADDR) {
asc_dvc->err_code |= ASC_IERR_SET_PC_ADDR;
return (warn_code);
}
if (AscStartChip(iop_base) != 1) {
asc_dvc->err_code |= ASC_IERR_START_STOP_CHIP;
return (warn_code);
}
return (warn_code);
}
ASC_INITFUNC(
STATIC int,
AscTestExternalLram(
ASC_DVC_VAR *asc_dvc
)
)
{
PortAddr iop_base;
ushort q_addr;
ushort saved_word;
int sta;
iop_base = asc_dvc->iop_base;
sta = 0;
q_addr = ASC_QNO_TO_QADDR(241);
saved_word = AscReadLramWord(iop_base, q_addr);
AscSetChipLramAddr(iop_base, q_addr);
AscSetChipLramData(iop_base, 0x55AA);
DvcSleepMilliSecond(10);
AscSetChipLramAddr(iop_base, q_addr);
if (AscGetChipLramData(iop_base) == 0x55AA) {
sta = 1;
AscWriteLramWord(iop_base, q_addr, saved_word);
}
return (sta);
}
ASC_INITFUNC(
STATIC int,
AscWriteEEPCmdReg(
PortAddr iop_base,
uchar cmd_reg
)
)
{
uchar read_back;
int retry;
retry = 0;
while (TRUE) {
AscSetChipEEPCmd(iop_base, cmd_reg);
DvcSleepMilliSecond(1);
read_back = AscGetChipEEPCmd(iop_base);
if (read_back == cmd_reg) {
return (1);
}
if (retry++ > ASC_EEP_MAX_RETRY) {
return (0);
}
}
}
ASC_INITFUNC(
STATIC int,
AscWriteEEPDataReg(
PortAddr iop_base,
ushort data_reg
)
)
{
ushort read_back;
int retry;
retry = 0;
while (TRUE) {
AscSetChipEEPData(iop_base, data_reg);
DvcSleepMilliSecond(1);
read_back = AscGetChipEEPData(iop_base);
if (read_back == data_reg) {
return (1);
}
if (retry++ > ASC_EEP_MAX_RETRY) {
return (0);
}
}
}
ASC_INITFUNC(
STATIC void,
AscWaitEEPRead(
void
)
)
{
DvcSleepMilliSecond(1);
return;
}
ASC_INITFUNC(
STATIC void,
AscWaitEEPWrite(
void
)
)
{
DvcSleepMilliSecond(20);
return;
}
ASC_INITFUNC(
STATIC ushort,
AscReadEEPWord(
PortAddr iop_base,
uchar addr
)
)
{
ushort read_wval;
uchar cmd_reg;
AscWriteEEPCmdReg(iop_base, ASC_EEP_CMD_WRITE_DISABLE);
AscWaitEEPRead();
cmd_reg = addr | ASC_EEP_CMD_READ;
AscWriteEEPCmdReg(iop_base, cmd_reg);
AscWaitEEPRead();
read_wval = AscGetChipEEPData(iop_base);
AscWaitEEPRead();
return (read_wval);
}
ASC_INITFUNC(
STATIC ushort,
AscWriteEEPWord(
PortAddr iop_base,
uchar addr,
ushort word_val
)
)
{
ushort read_wval;
read_wval = AscReadEEPWord(iop_base, addr);
if (read_wval != word_val) {
AscWriteEEPCmdReg(iop_base, ASC_EEP_CMD_WRITE_ABLE);
AscWaitEEPRead();
AscWriteEEPDataReg(iop_base, word_val);
AscWaitEEPRead();
AscWriteEEPCmdReg(iop_base,
(uchar) ((uchar) ASC_EEP_CMD_WRITE | addr));
AscWaitEEPWrite();
AscWriteEEPCmdReg(iop_base, ASC_EEP_CMD_WRITE_DISABLE);
AscWaitEEPRead();
return (AscReadEEPWord(iop_base, addr));
}
return (read_wval);
}
ASC_INITFUNC(
STATIC ushort,
AscGetEEPConfig(
PortAddr iop_base,
ASCEEP_CONFIG * cfg_buf, ushort bus_type
)
)
{
ushort wval;
ushort sum;
ushort *wbuf;
int cfg_beg;
int cfg_end;
int uchar_end_in_config = ASC_EEP_MAX_DVC_ADDR - 2;
int s_addr;
wbuf = (ushort *) cfg_buf;
sum = 0;
/* Read two config words; Byte-swapping done by AscReadEEPWord(). */
for (s_addr = 0; s_addr < 2; s_addr++, wbuf++) {
*wbuf = AscReadEEPWord(iop_base, (uchar) s_addr);
sum += *wbuf;
}
if (bus_type & ASC_IS_VL) {
cfg_beg = ASC_EEP_DVC_CFG_BEG_VL;
cfg_end = ASC_EEP_MAX_DVC_ADDR_VL;
} else {
cfg_beg = ASC_EEP_DVC_CFG_BEG;
cfg_end = ASC_EEP_MAX_DVC_ADDR;
}
for (s_addr = cfg_beg; s_addr <= (cfg_end - 1); s_addr++, wbuf++) {
wval = AscReadEEPWord( iop_base, ( uchar )s_addr ) ;
if (s_addr <= uchar_end_in_config) {
/*
* Swap all char fields - must unswap bytes already swapped
* by AscReadEEPWord().
*/
*wbuf = le16_to_cpu(wval);
} else {
/* Don't swap word field at the end - cntl field. */
*wbuf = wval;
}
sum += wval; /* Checksum treats all EEPROM data as words. */
}
/*
* Read the checksum word which will be compared against 'sum'
* by the caller. Word field already swapped.
*/
*wbuf = AscReadEEPWord(iop_base, (uchar) s_addr);
return (sum);
}
ASC_INITFUNC(
STATIC int,
AscSetEEPConfigOnce(
PortAddr iop_base,
ASCEEP_CONFIG * cfg_buf, ushort bus_type
)
)
{
int n_error;
ushort *wbuf;
ushort word;
ushort sum;
int s_addr;
int cfg_beg;
int cfg_end;
int uchar_end_in_config = ASC_EEP_MAX_DVC_ADDR - 2;
wbuf = (ushort *) cfg_buf;
n_error = 0;
sum = 0;
/* Write two config words; AscWriteEEPWord() will swap bytes. */
for (s_addr = 0; s_addr < 2; s_addr++, wbuf++) {
sum += *wbuf;
if (*wbuf != AscWriteEEPWord(iop_base, (uchar) s_addr, *wbuf)) {
n_error++;
}
}
if (bus_type & ASC_IS_VL) {
cfg_beg = ASC_EEP_DVC_CFG_BEG_VL;
cfg_end = ASC_EEP_MAX_DVC_ADDR_VL;
} else {
cfg_beg = ASC_EEP_DVC_CFG_BEG;
cfg_end = ASC_EEP_MAX_DVC_ADDR;
}
for (s_addr = cfg_beg; s_addr <= (cfg_end - 1); s_addr++, wbuf++) {
if (s_addr <= uchar_end_in_config) {
/*
* This is a char field. Swap char fields before they are
* swapped again by AscWriteEEPWord().
*/
word = cpu_to_le16(*wbuf);
if (word != AscWriteEEPWord( iop_base, (uchar) s_addr, word)) {
n_error++;
}
} else {
/* Don't swap word field at the end - cntl field. */
if (*wbuf != AscWriteEEPWord(iop_base, (uchar) s_addr, *wbuf)) {
n_error++;
}
}
sum += *wbuf; /* Checksum calculated from word values. */
}
/* Write checksum word. It will be swapped by AscWriteEEPWord(). */
*wbuf = sum;
if (sum != AscWriteEEPWord(iop_base, (uchar) s_addr, sum)) {
n_error++;
}
/* Read EEPROM back again. */
wbuf = (ushort *) cfg_buf;
/*
* Read two config words; Byte-swapping done by AscReadEEPWord().
*/
for (s_addr = 0; s_addr < 2; s_addr++, wbuf++) {
if (*wbuf != AscReadEEPWord(iop_base, (uchar) s_addr)) {
n_error++;
}
}
if (bus_type & ASC_IS_VL) {
cfg_beg = ASC_EEP_DVC_CFG_BEG_VL;
cfg_end = ASC_EEP_MAX_DVC_ADDR_VL;
} else {
cfg_beg = ASC_EEP_DVC_CFG_BEG;
cfg_end = ASC_EEP_MAX_DVC_ADDR;
}
for (s_addr = cfg_beg; s_addr <= (cfg_end - 1); s_addr++, wbuf++) {
if (s_addr <= uchar_end_in_config) {
/*
* Swap all char fields. Must unswap bytes already swapped
* by AscReadEEPWord().
*/
word = le16_to_cpu(AscReadEEPWord(iop_base, (uchar) s_addr));
} else {
/* Don't swap word field at the end - cntl field. */
word = AscReadEEPWord(iop_base, (uchar) s_addr);
}
if (*wbuf != word) {
n_error++;
}
}
/* Read checksum; Byte swapping not needed. */
if (AscReadEEPWord(iop_base, (uchar) s_addr) != sum) {
n_error++;
}
return (n_error);
}
ASC_INITFUNC(
STATIC int,
AscSetEEPConfig(
PortAddr iop_base,
ASCEEP_CONFIG * cfg_buf, ushort bus_type
)
)
{
int retry;
int n_error;
retry = 0;
while (TRUE) {
if ((n_error = AscSetEEPConfigOnce(iop_base, cfg_buf,
bus_type)) == 0) {
break;
}
if (++retry > ASC_EEP_MAX_RETRY) {
break;
}
}
return (n_error);
}
STATIC void
AscAsyncFix(
ASC_DVC_VAR *asc_dvc,
uchar tid_no,
ASC_SCSI_INQUIRY *inq)
{
uchar dvc_type;
ASC_SCSI_BIT_ID_TYPE tid_bits;
dvc_type = ASC_INQ_DVC_TYPE(inq);
tid_bits = ASC_TIX_TO_TARGET_ID(tid_no);
if (asc_dvc->bug_fix_cntl & ASC_BUG_FIX_ASYN_USE_SYN)
{
if (!(asc_dvc->init_sdtr & tid_bits))
{
if ((dvc_type == SCSI_TYPE_CDROM) &&
(AscCompareString((uchar *) inq->vendor_id,
(uchar *) "HP ", 3) == 0))
{
asc_dvc->pci_fix_asyn_xfer_always |= tid_bits;
}
asc_dvc->pci_fix_asyn_xfer |= tid_bits;
if ((dvc_type == SCSI_TYPE_PROC) ||
(dvc_type == SCSI_TYPE_SCANNER) ||
(dvc_type == SCSI_TYPE_CDROM) ||
(dvc_type == SCSI_TYPE_SASD))
{
asc_dvc->pci_fix_asyn_xfer &= ~tid_bits;
}
if (asc_dvc->pci_fix_asyn_xfer & tid_bits)
{
AscSetRunChipSynRegAtID(asc_dvc->iop_base, tid_no,
ASYN_SDTR_DATA_FIX_PCI_REV_AB);
}
}
}
return;
}
STATIC int
AscTagQueuingSafe(ASC_SCSI_INQUIRY *inq)
{
if ((inq->add_len >= 32) &&
(AscCompareString((uchar *) inq->vendor_id,
(uchar *) "QUANTUM XP34301", 15) == 0) &&
(AscCompareString((uchar *) inq->product_rev_level,
(uchar *) "1071", 4) == 0))
{
return 0;
}
return 1;
}
STATIC void
AscInquiryHandling(ASC_DVC_VAR *asc_dvc,
uchar tid_no, ASC_SCSI_INQUIRY *inq)
{
ASC_SCSI_BIT_ID_TYPE tid_bit = ASC_TIX_TO_TARGET_ID(tid_no);
ASC_SCSI_BIT_ID_TYPE orig_init_sdtr, orig_use_tagged_qng;
orig_init_sdtr = asc_dvc->init_sdtr;
orig_use_tagged_qng = asc_dvc->use_tagged_qng;
asc_dvc->init_sdtr &= ~tid_bit;
asc_dvc->cfg->can_tagged_qng &= ~tid_bit;
asc_dvc->use_tagged_qng &= ~tid_bit;
if (ASC_INQ_RESPONSE_FMT(inq) >= 2 || ASC_INQ_ANSI_VER(inq) >= 2) {
if ((asc_dvc->cfg->sdtr_enable & tid_bit) && ASC_INQ_SYNC(inq)) {
asc_dvc->init_sdtr |= tid_bit;
}
if ((asc_dvc->cfg->cmd_qng_enabled & tid_bit) &&
ASC_INQ_CMD_QUEUE(inq)) {
if (AscTagQueuingSafe(inq)) {
asc_dvc->use_tagged_qng |= tid_bit;
asc_dvc->cfg->can_tagged_qng |= tid_bit;
}
}
}
if (orig_use_tagged_qng != asc_dvc->use_tagged_qng) {
AscWriteLramByte(asc_dvc->iop_base, ASCV_DISC_ENABLE_B,
asc_dvc->cfg->disc_enable);
AscWriteLramByte(asc_dvc->iop_base, ASCV_USE_TAGGED_QNG_B,
asc_dvc->use_tagged_qng);
AscWriteLramByte(asc_dvc->iop_base, ASCV_CAN_TAGGED_QNG_B,
asc_dvc->cfg->can_tagged_qng);
asc_dvc->max_dvc_qng[tid_no] =
asc_dvc->cfg->max_tag_qng[tid_no];
AscWriteLramByte(asc_dvc->iop_base,
(ushort) (ASCV_MAX_DVC_QNG_BEG + tid_no),
asc_dvc->max_dvc_qng[tid_no]);
}
if (orig_init_sdtr != asc_dvc->init_sdtr) {
AscAsyncFix(asc_dvc, tid_no, inq);
}
return;
}
STATIC int
AscCompareString(
uchar *str1,
uchar *str2,
int len
)
{
int i;
int diff;
for (i = 0; i < len; i++) {
diff = (int) (str1[i] - str2[i]);
if (diff != 0)
return (diff);
}
return (0);
}
STATIC uchar
AscReadLramByte(
PortAddr iop_base,
ushort addr
)
{
uchar byte_data;
ushort word_data;
if (isodd_word(addr)) {
AscSetChipLramAddr(iop_base, addr - 1);
word_data = AscGetChipLramData(iop_base);
byte_data = (uchar) ((word_data >> 8) & 0xFF);
} else {
AscSetChipLramAddr(iop_base, addr);
word_data = AscGetChipLramData(iop_base);
byte_data = (uchar) (word_data & 0xFF);
}
return (byte_data);
}
STATIC ushort
AscReadLramWord(
PortAddr iop_base,
ushort addr
)
{
ushort word_data;
AscSetChipLramAddr(iop_base, addr);
word_data = AscGetChipLramData(iop_base);
return (word_data);
}
#if CC_VERY_LONG_SG_LIST
STATIC ASC_DCNT
AscReadLramDWord(
PortAddr iop_base,
ushort addr
)
{
ushort val_low, val_high;
ASC_DCNT dword_data;
AscSetChipLramAddr(iop_base, addr);
val_low = AscGetChipLramData(iop_base);
val_high = AscGetChipLramData(iop_base);
dword_data = ((ASC_DCNT) val_high << 16) | (ASC_DCNT) val_low;
return (dword_data);
}
#endif /* CC_VERY_LONG_SG_LIST */
STATIC void
AscWriteLramWord(
PortAddr iop_base,
ushort addr,
ushort word_val
)
{
AscSetChipLramAddr(iop_base, addr);
AscSetChipLramData(iop_base, word_val);
return;
}
STATIC void
AscWriteLramByte(
PortAddr iop_base,
ushort addr,
uchar byte_val
)
{
ushort word_data;
if (isodd_word(addr)) {
addr--;
word_data = AscReadLramWord(iop_base, addr);
word_data &= 0x00FF;
word_data |= (((ushort) byte_val << 8) & 0xFF00);
} else {
word_data = AscReadLramWord(iop_base, addr);
word_data &= 0xFF00;
word_data |= ((ushort) byte_val & 0x00FF);
}
AscWriteLramWord(iop_base, addr, word_data);
return;
}
/*
* Copy 2 bytes to LRAM.
*
* The source data is assumed to be in little-endian order in memory
* and is maintained in little-endian order when written to LRAM.
*/
STATIC void
AscMemWordCopyPtrToLram(
PortAddr iop_base,
ushort s_addr,
uchar *s_buffer,
int words
)
{
int i;
AscSetChipLramAddr(iop_base, s_addr);
for (i = 0; i < 2 * words; i += 2) {
/*
* On a little-endian system the second argument below
* produces a little-endian ushort which is written to
* LRAM in little-endian order. On a big-endian system
* the second argument produces a big-endian ushort which
* is "transparently" byte-swapped by outpw() and written
* in little-endian order to LRAM.
*/
outpw(iop_base + IOP_RAM_DATA,
((ushort) s_buffer[i + 1] << 8) | s_buffer[i]);
}
return;
}
/*
* Copy 4 bytes to LRAM.
*
* The source data is assumed to be in little-endian order in memory
* and is maintained in little-endian order when writen to LRAM.
*/
STATIC void
AscMemDWordCopyPtrToLram(
PortAddr iop_base,
ushort s_addr,
uchar *s_buffer,
int dwords
)
{
int i;
AscSetChipLramAddr(iop_base, s_addr);
for (i = 0; i < 4 * dwords; i += 4) {
outpw(iop_base + IOP_RAM_DATA,
((ushort) s_buffer[i + 1] << 8) | s_buffer[i]); /* LSW */
outpw(iop_base + IOP_RAM_DATA,
((ushort) s_buffer[i + 3] << 8) | s_buffer[i + 2]); /* MSW */
}
return;
}
/*
* Copy 2 bytes from LRAM.
*
* The source data is assumed to be in little-endian order in LRAM
* and is maintained in little-endian order when written to memory.
*/
STATIC void
AscMemWordCopyPtrFromLram(
PortAddr iop_base,
ushort s_addr,
uchar *d_buffer,
int words
)
{
int i;
ushort word;
AscSetChipLramAddr(iop_base, s_addr);
for (i = 0; i < 2 * words; i += 2) {
word = inpw(iop_base + IOP_RAM_DATA);
d_buffer[i] = word & 0xff;
d_buffer[i + 1] = (word >> 8) & 0xff;
}
return;
}
STATIC ASC_DCNT
AscMemSumLramWord(
PortAddr iop_base,
ushort s_addr,
int words
)
{
ASC_DCNT sum;
int i;
sum = 0L;
for (i = 0; i < words; i++, s_addr += 2) {
sum += AscReadLramWord(iop_base, s_addr);
}
return (sum);
}
STATIC void
AscMemWordSetLram(
PortAddr iop_base,
ushort s_addr,
ushort set_wval,
int words
)
{
int i;
AscSetChipLramAddr(iop_base, s_addr);
for (i = 0; i < words; i++) {
AscSetChipLramData(iop_base, set_wval);
}
return;
}
/*
* --- Adv Library Functions
*/
/* a_mcode.h */
/* Microcode buffer is kept after initialization for error recovery. */
STATIC unsigned char _adv_asc3550_buf[] = {
0x00, 0x00, 0x00, 0xf2, 0x00, 0xf0, 0x00, 0x16, 0x18, 0xe4, 0x00, 0xfc, 0x01, 0x00, 0x48, 0xe4,
0xbe, 0x18, 0x18, 0x80, 0x03, 0xf6, 0x02, 0x00, 0x00, 0xfa, 0xff, 0xff, 0x28, 0x0e, 0x9e, 0xe7,
0xff, 0x00, 0x82, 0xe7, 0x00, 0xea, 0x00, 0xf6, 0x01, 0xe6, 0x09, 0xe7, 0x55, 0xf0, 0x01, 0xf6,
0x01, 0xfa, 0x08, 0x00, 0x03, 0x00, 0x04, 0x00, 0x18, 0xf4, 0x10, 0x00, 0x00, 0xec, 0x85, 0xf0,
0xbc, 0x00, 0xd5, 0xf0, 0x8e, 0x0c, 0x38, 0x54, 0x00, 0xe6, 0x1e, 0xf0, 0x86, 0xf0, 0xb4, 0x00,
0x98, 0x57, 0xd0, 0x01, 0x0c, 0x1c, 0x3e, 0x1c, 0x0c, 0x00, 0xbb, 0x00, 0xaa, 0x18, 0x02, 0x80,
0x32, 0xf0, 0x01, 0xfc, 0x88, 0x0c, 0xc6, 0x12, 0x02, 0x13, 0x18, 0x40, 0x00, 0x57, 0x01, 0xea,
0x3c, 0x00, 0x6c, 0x01, 0x6e, 0x01, 0x04, 0x12, 0x3e, 0x57, 0x00, 0x80, 0x03, 0xe6, 0xb6, 0x00,
0xc0, 0x00, 0x01, 0x01, 0x3e, 0x01, 0xda, 0x0f, 0x22, 0x10, 0x08, 0x12, 0x02, 0x4a, 0xb9, 0x54,
0x03, 0x58, 0x1b, 0x80, 0x30, 0xe4, 0x4b, 0xe4, 0x20, 0x00, 0x32, 0x00, 0x3e, 0x00, 0x80, 0x00,
0x24, 0x01, 0x3c, 0x01, 0x68, 0x01, 0x6a, 0x01, 0x70, 0x01, 0x72, 0x01, 0x74, 0x01, 0x76, 0x01,
0x78, 0x01, 0x62, 0x0a, 0x92, 0x0c, 0x2c, 0x10, 0x2e, 0x10, 0x06, 0x13, 0x4c, 0x1c, 0xbb, 0x55,
0x3c, 0x56, 0x04, 0x80, 0x4a, 0xe4, 0x02, 0xee, 0x5b, 0xf0, 0xb1, 0xf0, 0x03, 0xf7, 0x06, 0xf7,
0x03, 0xfc, 0x0f, 0x00, 0x40, 0x00, 0xbe, 0x00, 0x00, 0x01, 0xb0, 0x08, 0x30, 0x13, 0x64, 0x15,
0x32, 0x1c, 0x38, 0x1c, 0x4e, 0x1c, 0x10, 0x44, 0x02, 0x48, 0x00, 0x4c, 0x04, 0xea, 0x5d, 0xf0,
0x04, 0xf6, 0x02, 0xfc, 0x05, 0x00, 0x34, 0x00, 0x36, 0x00, 0x98, 0x00, 0xcc, 0x00, 0x20, 0x01,
0x4e, 0x01, 0x4e, 0x0b, 0x1e, 0x0e, 0x0c, 0x10, 0x0a, 0x12, 0x04, 0x13, 0x40, 0x13, 0x30, 0x1c,
0x00, 0x4e, 0xbd, 0x56, 0x06, 0x83, 0x00, 0xdc, 0x05, 0xf0, 0x09, 0xf0, 0x59, 0xf0, 0xa7, 0xf0,
0xb8, 0xf0, 0x0e, 0xf7, 0x06, 0x00, 0x19, 0x00, 0x33, 0x00, 0x9b, 0x00, 0xa4, 0x00, 0xb5, 0x00,
0xba, 0x00, 0xd0, 0x00, 0xe1, 0x00, 0xe7, 0x00, 0xde, 0x03, 0x56, 0x0a, 0x14, 0x0e, 0x02, 0x10,
0x04, 0x10, 0x0a, 0x10, 0x36, 0x10, 0x0a, 0x13, 0x12, 0x13, 0x52, 0x13, 0x10, 0x15, 0x14, 0x15,
0xac, 0x16, 0x20, 0x1c, 0x34, 0x1c, 0x36, 0x1c, 0x08, 0x44, 0x38, 0x44, 0x91, 0x44, 0x0a, 0x45,
0x48, 0x46, 0x01, 0x48, 0x68, 0x54, 0x83, 0x55, 0xb0, 0x57, 0x01, 0x58, 0x83, 0x59, 0x05, 0xe6,
0x0b, 0xf0, 0x0c, 0xf0, 0x5c, 0xf0, 0x4b, 0xf4, 0x04, 0xf8, 0x05, 0xf8, 0x02, 0xfa, 0x03, 0xfa,
0x04, 0xfc, 0x05, 0xfc, 0x07, 0x00, 0x0a, 0x00, 0x0d, 0x00, 0x1c, 0x00, 0x9e, 0x00, 0xa8, 0x00,
0xaa, 0x00, 0xb9, 0x00, 0xe0, 0x00, 0x22, 0x01, 0x26, 0x01, 0x79, 0x01, 0x7a, 0x01, 0xc0, 0x01,
0xc2, 0x01, 0x7c, 0x02, 0x5a, 0x03, 0xea, 0x04, 0xe8, 0x07, 0x68, 0x08, 0x69, 0x08, 0xba, 0x08,
0xe9, 0x09, 0x06, 0x0b, 0x3a, 0x0e, 0x00, 0x10, 0x1a, 0x10, 0xed, 0x10, 0xf1, 0x10, 0x06, 0x12,
0x0c, 0x13, 0x16, 0x13, 0x1e, 0x13, 0x82, 0x13, 0x42, 0x14, 0xd6, 0x14, 0x8a, 0x15, 0xc6, 0x17,
0xd2, 0x17, 0x6b, 0x18, 0x12, 0x1c, 0x46, 0x1c, 0x9c, 0x32, 0x00, 0x40, 0x0e, 0x47, 0x48, 0x47,
0x41, 0x48, 0x89, 0x48, 0x80, 0x4c, 0x00, 0x54, 0x44, 0x55, 0xe5, 0x55, 0x14, 0x56, 0x77, 0x57,
0xbf, 0x57, 0x40, 0x5c, 0x06, 0x80, 0x08, 0x90, 0x03, 0xa1, 0xfe, 0x9c, 0xf0, 0x29, 0x02, 0xfe,
0xb8, 0x0c, 0xff, 0x10, 0x00, 0x00, 0xd0, 0xfe, 0xcc, 0x18, 0x00, 0xcf, 0xfe, 0x80, 0x01, 0xff,
0x03, 0x00, 0x00, 0xfe, 0x93, 0x15, 0xfe, 0x0f, 0x05, 0xff, 0x38, 0x00, 0x00, 0xfe, 0x57, 0x24,
0x00, 0xfe, 0x48, 0x00, 0x4f, 0xff, 0x04, 0x00, 0x00, 0x10, 0xff, 0x09, 0x00, 0x00, 0xff, 0x08,
0x01, 0x01, 0xff, 0x08, 0xff, 0xff, 0xff, 0x27, 0x00, 0x00, 0xff, 0x10, 0xff, 0xff, 0xff, 0x0f,
0x00, 0x00, 0xfe, 0x78, 0x56, 0xfe, 0x34, 0x12, 0xff, 0x21, 0x00, 0x00, 0xfe, 0x04, 0xf7, 0xcf,
0x2a, 0x67, 0x0b, 0x01, 0xfe, 0xce, 0x0e, 0xfe, 0x04, 0xf7, 0xcf, 0x67, 0x0b, 0x3c, 0x2a, 0xfe,
0x3d, 0xf0, 0xfe, 0x02, 0x02, 0xfe, 0x20, 0xf0, 0x9c, 0xfe, 0x91, 0xf0, 0xfe, 0xf0, 0x01, 0xfe,
0x90, 0xf0, 0xfe, 0xf0, 0x01, 0xfe, 0x8f, 0xf0, 0x9c, 0x05, 0x51, 0x3b, 0x02, 0xfe, 0xd4, 0x0c,
0x01, 0xfe, 0x44, 0x0d, 0xfe, 0xdd, 0x12, 0xfe, 0xfc, 0x10, 0xfe, 0x28, 0x1c, 0x05, 0xfe, 0xa6,
0x00, 0xfe, 0xd3, 0x12, 0x47, 0x18, 0xfe, 0xa6, 0x00, 0xb5, 0xfe, 0x48, 0xf0, 0xfe, 0x86, 0x02,
0xfe, 0x49, 0xf0, 0xfe, 0xa0, 0x02, 0xfe, 0x4a, 0xf0, 0xfe, 0xbe, 0x02, 0xfe, 0x46, 0xf0, 0xfe,
0x50, 0x02, 0xfe, 0x47, 0xf0, 0xfe, 0x56, 0x02, 0xfe, 0x43, 0xf0, 0xfe, 0x44, 0x02, 0xfe, 0x44,
0xf0, 0xfe, 0x48, 0x02, 0xfe, 0x45, 0xf0, 0xfe, 0x4c, 0x02, 0x17, 0x0b, 0xa0, 0x17, 0x06, 0x18,
0x96, 0x02, 0x29, 0xfe, 0x00, 0x1c, 0xde, 0xfe, 0x02, 0x1c, 0xdd, 0xfe, 0x1e, 0x1c, 0xfe, 0xe9,
0x10, 0x01, 0xfe, 0x20, 0x17, 0xfe, 0xe7, 0x10, 0xfe, 0x06, 0xfc, 0xc7, 0x0a, 0x6b, 0x01, 0x9e,
0x02, 0x29, 0x14, 0x4d, 0x37, 0x97, 0x01, 0xfe, 0x64, 0x0f, 0x0a, 0x6b, 0x01, 0x82, 0xfe, 0xbd,
0x10, 0x0a, 0x6b, 0x01, 0x82, 0xfe, 0xad, 0x10, 0xfe, 0x16, 0x1c, 0xfe, 0x58, 0x1c, 0x17, 0x06,
0x18, 0x96, 0x2a, 0x25, 0x29, 0xfe, 0x3d, 0xf0, 0xfe, 0x02, 0x02, 0x21, 0xfe, 0x94, 0x02, 0xfe,
0x5a, 0x1c, 0xea, 0xfe, 0x14, 0x1c, 0x14, 0xfe, 0x30, 0x00, 0x37, 0x97, 0x01, 0xfe, 0x54, 0x0f,
0x17, 0x06, 0x18, 0x96, 0x02, 0xd0, 0x1e, 0x20, 0x07, 0x10, 0x34, 0xfe, 0x69, 0x10, 0x17, 0x06,
0x18, 0x96, 0xfe, 0x04, 0xec, 0x20, 0x46, 0x3d, 0x12, 0x20, 0xfe, 0x05, 0xf6, 0xc7, 0x01, 0xfe,
0x52, 0x16, 0x09, 0x4a, 0x4c, 0x35, 0x11, 0x2d, 0x3c, 0x8a, 0x01, 0xe6, 0x02, 0x29, 0x0a, 0x40,
0x01, 0x0e, 0x07, 0x00, 0x5d, 0x01, 0x6f, 0xfe, 0x18, 0x10, 0xfe, 0x41, 0x58, 0x0a, 0x99, 0x01,
0x0e, 0xfe, 0xc8, 0x54, 0x64, 0xfe, 0x0c, 0x03, 0x01, 0xe6, 0x02, 0x29, 0x2a, 0x46, 0xfe, 0x02,
0xe8, 0x27, 0xf8, 0xfe, 0x9e, 0x43, 0xf7, 0xfe, 0x27, 0xf0, 0xfe, 0xdc, 0x01, 0xfe, 0x07, 0x4b,
0xfe, 0x20, 0xf0, 0x9c, 0xfe, 0x40, 0x1c, 0x25, 0xd2, 0xfe, 0x26, 0xf0, 0xfe, 0x56, 0x03, 0xfe,
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0x13, 0x0d, 0x03, 0x71, 0x05, 0xcb, 0x1c, 0x06, 0xfe, 0xef, 0x12, 0xfe, 0xe1, 0x10, 0x78, 0x2c,
0x46, 0x2f, 0x07, 0x2d, 0xfe, 0x3c, 0x13, 0xfe, 0x82, 0x14, 0xfe, 0x42, 0x13, 0x3c, 0x8a, 0x0a,
0x42, 0x01, 0x0e, 0xb0, 0xfe, 0x3e, 0x12, 0xf0, 0xfe, 0x45, 0x48, 0x01, 0xe3, 0xfe, 0x00, 0xcc,
0xb0, 0xfe, 0xf3, 0x13, 0x3d, 0x75, 0x07, 0x10, 0xa3, 0x0a, 0x80, 0x01, 0x0e, 0xf2, 0x01, 0x6f,
0xfe, 0x16, 0x10, 0x07, 0x7e, 0x85, 0xfe, 0x40, 0x14, 0xfe, 0x24, 0x12, 0xf6, 0xfe, 0xd6, 0xf0,
0xfe, 0x24, 0x17, 0x17, 0x0b, 0x03, 0xfe, 0x9c, 0xe7, 0x0b, 0x0f, 0xfe, 0x15, 0x00, 0x59, 0x76,
0x27, 0x01, 0xda, 0x17, 0x06, 0x03, 0x3c, 0x8a, 0x09, 0x4a, 0x1d, 0x35, 0x11, 0x2d, 0x01, 0x6f,
0x17, 0x06, 0x03, 0xfe, 0x38, 0x90, 0xfe, 0xba, 0x90, 0x79, 0xc7, 0x68, 0xc8, 0xfe, 0x48, 0x55,
0x34, 0xfe, 0xc9, 0x55, 0x03, 0x1e, 0x98, 0x73, 0x12, 0x98, 0x03, 0x0a, 0x99, 0x01, 0x0e, 0xf0,
0x0a, 0x40, 0x01, 0x0e, 0xfe, 0x49, 0x44, 0x16, 0xfe, 0xf0, 0x17, 0x73, 0x75, 0x03, 0x0a, 0x42,
0x01, 0x0e, 0x07, 0x10, 0x45, 0x0a, 0x51, 0x01, 0x9e, 0x0a, 0x40, 0x01, 0x0e, 0x73, 0x75, 0x03,
0xfe, 0x4e, 0xe4, 0x1a, 0x64, 0xfe, 0x24, 0x18, 0x05, 0xfe, 0x90, 0x00, 0xfe, 0x3a, 0x45, 0x5b,
0xfe, 0x4e, 0xe4, 0xc2, 0x64, 0xfe, 0x36, 0x18, 0x05, 0xfe, 0x92, 0x00, 0xfe, 0x02, 0xe6, 0x1b,
0xdc, 0xfe, 0x4e, 0xe4, 0xfe, 0x0b, 0x00, 0x64, 0xfe, 0x48, 0x18, 0x05, 0xfe, 0x94, 0x00, 0xfe,
0x02, 0xe6, 0x19, 0xfe, 0x08, 0x10, 0x05, 0xfe, 0x96, 0x00, 0xfe, 0x02, 0xe6, 0x2c, 0xfe, 0x4e,
0x45, 0xfe, 0x0c, 0x12, 0xaf, 0xff, 0x04, 0x68, 0x54, 0xde, 0x1c, 0x69, 0x03, 0x07, 0x7a, 0xfe,
0x5a, 0xf0, 0xfe, 0x74, 0x18, 0x24, 0xfe, 0x09, 0x00, 0xfe, 0x34, 0x10, 0x07, 0x1b, 0xfe, 0x5a,
0xf0, 0xfe, 0x82, 0x18, 0x24, 0xc3, 0xfe, 0x26, 0x10, 0x07, 0x1a, 0x5d, 0x24, 0x2c, 0xdc, 0x07,
0x0b, 0x5d, 0x24, 0x93, 0xfe, 0x0e, 0x10, 0x07, 0x06, 0x5d, 0x24, 0x4d, 0x9f, 0xad, 0x03, 0x14,
0xfe, 0x09, 0x00, 0x01, 0x33, 0xfe, 0x04, 0xfe, 0x7d, 0x05, 0x7f, 0xf9, 0x03, 0x25, 0xfe, 0xca,
0x18, 0xfe, 0x14, 0xf0, 0x08, 0x65, 0xfe, 0xc6, 0x18, 0x03, 0xff, 0x1a, 0x00, 0x00,
};
STATIC unsigned short _adv_asc3550_size =
sizeof(_adv_asc3550_buf); /* 0x13AD */
STATIC ADV_DCNT _adv_asc3550_chksum =
0x04D52DDDUL; /* Expanded little-endian checksum. */
/* Microcode buffer is kept after initialization for error recovery. */
STATIC unsigned char _adv_asc38C0800_buf[] = {
0x00, 0x00, 0x00, 0xf2, 0x00, 0xf0, 0x00, 0xfc, 0x00, 0x16, 0x18, 0xe4, 0x01, 0x00, 0x48, 0xe4,
0x18, 0x80, 0x03, 0xf6, 0x02, 0x00, 0xce, 0x19, 0x00, 0xfa, 0xff, 0xff, 0x1c, 0x0f, 0x00, 0xf6,
0x9e, 0xe7, 0xff, 0x00, 0x82, 0xe7, 0x00, 0xea, 0x01, 0xfa, 0x01, 0xe6, 0x09, 0xe7, 0x55, 0xf0,
0x01, 0xf6, 0x03, 0x00, 0x04, 0x00, 0x10, 0x00, 0x1e, 0xf0, 0x85, 0xf0, 0x18, 0xf4, 0x08, 0x00,
0xbc, 0x00, 0x38, 0x54, 0x00, 0xec, 0xd5, 0xf0, 0x82, 0x0d, 0x00, 0xe6, 0x86, 0xf0, 0xb1, 0xf0,
0x98, 0x57, 0x01, 0xfc, 0xb4, 0x00, 0xd4, 0x01, 0x0c, 0x1c, 0x3e, 0x1c, 0x3c, 0x00, 0xbb, 0x00,
0x00, 0x10, 0xba, 0x19, 0x02, 0x80, 0x32, 0xf0, 0x7c, 0x0d, 0x02, 0x13, 0xba, 0x13, 0x18, 0x40,
0x00, 0x57, 0x01, 0xea, 0x02, 0xfc, 0x03, 0xfc, 0x3e, 0x00, 0x6c, 0x01, 0x6e, 0x01, 0x74, 0x01,
0x76, 0x01, 0xb9, 0x54, 0x3e, 0x57, 0x00, 0x80, 0x03, 0xe6, 0xb6, 0x00, 0xc0, 0x00, 0x01, 0x01,
0x3e, 0x01, 0x7a, 0x01, 0xca, 0x08, 0xce, 0x10, 0x16, 0x11, 0x04, 0x12, 0x08, 0x12, 0x02, 0x4a,
0xbb, 0x55, 0x3c, 0x56, 0x03, 0x58, 0x1b, 0x80, 0x30, 0xe4, 0x4b, 0xe4, 0x5d, 0xf0, 0x02, 0xfa,
0x20, 0x00, 0x32, 0x00, 0x40, 0x00, 0x80, 0x00, 0x24, 0x01, 0x3c, 0x01, 0x68, 0x01, 0x6a, 0x01,
0x70, 0x01, 0x72, 0x01, 0x78, 0x01, 0x7c, 0x01, 0x62, 0x0a, 0x86, 0x0d, 0x06, 0x13, 0x4c, 0x1c,
0x04, 0x80, 0x4a, 0xe4, 0x02, 0xee, 0x5b, 0xf0, 0x03, 0xf7, 0x0c, 0x00, 0x0f, 0x00, 0x47, 0x00,
0xbe, 0x00, 0x00, 0x01, 0x20, 0x11, 0x5c, 0x16, 0x32, 0x1c, 0x38, 0x1c, 0x4e, 0x1c, 0x10, 0x44,
0x00, 0x4c, 0x04, 0xea, 0x5c, 0xf0, 0xa7, 0xf0, 0x04, 0xf6, 0x03, 0xfa, 0x05, 0x00, 0x34, 0x00,
0x36, 0x00, 0x98, 0x00, 0xcc, 0x00, 0x20, 0x01, 0x4e, 0x01, 0x4a, 0x0b, 0x42, 0x0c, 0x12, 0x0f,
0x0c, 0x10, 0x22, 0x11, 0x0a, 0x12, 0x04, 0x13, 0x30, 0x1c, 0x02, 0x48, 0x00, 0x4e, 0x42, 0x54,
0x44, 0x55, 0xbd, 0x56, 0x06, 0x83, 0x00, 0xdc, 0x05, 0xf0, 0x09, 0xf0, 0x59, 0xf0, 0xb8, 0xf0,
0x4b, 0xf4, 0x06, 0xf7, 0x0e, 0xf7, 0x04, 0xfc, 0x05, 0xfc, 0x06, 0x00, 0x19, 0x00, 0x33, 0x00,
0x9b, 0x00, 0xa4, 0x00, 0xb5, 0x00, 0xba, 0x00, 0xd0, 0x00, 0xe1, 0x00, 0xe7, 0x00, 0xe2, 0x03,
0x08, 0x0f, 0x02, 0x10, 0x04, 0x10, 0x0a, 0x10, 0x0a, 0x13, 0x0c, 0x13, 0x12, 0x13, 0x24, 0x14,
0x34, 0x14, 0x04, 0x16, 0x08, 0x16, 0xa4, 0x17, 0x20, 0x1c, 0x34, 0x1c, 0x36, 0x1c, 0x08, 0x44,
0x38, 0x44, 0x91, 0x44, 0x0a, 0x45, 0x48, 0x46, 0x01, 0x48, 0x68, 0x54, 0x3a, 0x55, 0x83, 0x55,
0xe5, 0x55, 0xb0, 0x57, 0x01, 0x58, 0x83, 0x59, 0x05, 0xe6, 0x0b, 0xf0, 0x0c, 0xf0, 0x04, 0xf8,
0x05, 0xf8, 0x07, 0x00, 0x0a, 0x00, 0x1c, 0x00, 0x1e, 0x00, 0x9e, 0x00, 0xa8, 0x00, 0xaa, 0x00,
0xb9, 0x00, 0xe0, 0x00, 0x22, 0x01, 0x26, 0x01, 0x79, 0x01, 0x7e, 0x01, 0xc4, 0x01, 0xc6, 0x01,
0x80, 0x02, 0x5e, 0x03, 0xee, 0x04, 0x9a, 0x06, 0xf8, 0x07, 0x62, 0x08, 0x68, 0x08, 0x69, 0x08,
0xd6, 0x08, 0xe9, 0x09, 0xfa, 0x0b, 0x2e, 0x0f, 0x12, 0x10, 0x1a, 0x10, 0xed, 0x10, 0xf1, 0x10,
0x2a, 0x11, 0x06, 0x12, 0x0c, 0x12, 0x3e, 0x12, 0x10, 0x13, 0x16, 0x13, 0x1e, 0x13, 0x46, 0x14,
0x76, 0x14, 0x82, 0x14, 0x36, 0x15, 0xca, 0x15, 0x6b, 0x18, 0xbe, 0x18, 0xca, 0x18, 0xe6, 0x19,
0x12, 0x1c, 0x46, 0x1c, 0x9c, 0x32, 0x00, 0x40, 0x0e, 0x47, 0xfe, 0x9c, 0xf0, 0x2b, 0x02, 0xfe,
0xac, 0x0d, 0xff, 0x10, 0x00, 0x00, 0xd7, 0xfe, 0xe8, 0x19, 0x00, 0xd6, 0xfe, 0x84, 0x01, 0xff,
0x03, 0x00, 0x00, 0xfe, 0x93, 0x15, 0xfe, 0x0f, 0x05, 0xff, 0x38, 0x00, 0x00, 0xfe, 0x57, 0x24,
0x00, 0xfe, 0x4c, 0x00, 0x5b, 0xff, 0x04, 0x00, 0x00, 0x11, 0xff, 0x09, 0x00, 0x00, 0xff, 0x08,
0x01, 0x01, 0xff, 0x08, 0xff, 0xff, 0xff, 0x27, 0x00, 0x00, 0xff, 0x10, 0xff, 0xff, 0xff, 0x11,
0x00, 0x00, 0xfe, 0x78, 0x56, 0xfe, 0x34, 0x12, 0xff, 0x21, 0x00, 0x00, 0xfe, 0x04, 0xf7, 0xd6,
0x2c, 0x99, 0x0a, 0x01, 0xfe, 0xc2, 0x0f, 0xfe, 0x04, 0xf7, 0xd6, 0x99, 0x0a, 0x42, 0x2c, 0xfe,
0x3d, 0xf0, 0xfe, 0x06, 0x02, 0xfe, 0x20, 0xf0, 0xa7, 0xfe, 0x91, 0xf0, 0xfe, 0xf4, 0x01, 0xfe,
0x90, 0xf0, 0xfe, 0xf4, 0x01, 0xfe, 0x8f, 0xf0, 0xa7, 0x03, 0x5d, 0x4d, 0x02, 0xfe, 0xc8, 0x0d,
0x01, 0xfe, 0x38, 0x0e, 0xfe, 0xdd, 0x12, 0xfe, 0xfc, 0x10, 0xfe, 0x28, 0x1c, 0x03, 0xfe, 0xa6,
0x00, 0xfe, 0xd3, 0x12, 0x41, 0x14, 0xfe, 0xa6, 0x00, 0xc2, 0xfe, 0x48, 0xf0, 0xfe, 0x8a, 0x02,
0xfe, 0x49, 0xf0, 0xfe, 0xa4, 0x02, 0xfe, 0x4a, 0xf0, 0xfe, 0xc2, 0x02, 0xfe, 0x46, 0xf0, 0xfe,
0x54, 0x02, 0xfe, 0x47, 0xf0, 0xfe, 0x5a, 0x02, 0xfe, 0x43, 0xf0, 0xfe, 0x48, 0x02, 0xfe, 0x44,
0xf0, 0xfe, 0x4c, 0x02, 0xfe, 0x45, 0xf0, 0xfe, 0x50, 0x02, 0x18, 0x0a, 0xaa, 0x18, 0x06, 0x14,
0xa1, 0x02, 0x2b, 0xfe, 0x00, 0x1c, 0xe7, 0xfe, 0x02, 0x1c, 0xe6, 0xfe, 0x1e, 0x1c, 0xfe, 0xe9,
0x10, 0x01, 0xfe, 0x18, 0x18, 0xfe, 0xe7, 0x10, 0xfe, 0x06, 0xfc, 0xce, 0x09, 0x70, 0x01, 0xa8,
0x02, 0x2b, 0x15, 0x59, 0x39, 0xa2, 0x01, 0xfe, 0x58, 0x10, 0x09, 0x70, 0x01, 0x87, 0xfe, 0xbd,
0x10, 0x09, 0x70, 0x01, 0x87, 0xfe, 0xad, 0x10, 0xfe, 0x16, 0x1c, 0xfe, 0x58, 0x1c, 0x18, 0x06,
0x14, 0xa1, 0x2c, 0x1c, 0x2b, 0xfe, 0x3d, 0xf0, 0xfe, 0x06, 0x02, 0x23, 0xfe, 0x98, 0x02, 0xfe,
0x5a, 0x1c, 0xf8, 0xfe, 0x14, 0x1c, 0x15, 0xfe, 0x30, 0x00, 0x39, 0xa2, 0x01, 0xfe, 0x48, 0x10,
0x18, 0x06, 0x14, 0xa1, 0x02, 0xd7, 0x22, 0x20, 0x07, 0x11, 0x35, 0xfe, 0x69, 0x10, 0x18, 0x06,
0x14, 0xa1, 0xfe, 0x04, 0xec, 0x20, 0x4f, 0x43, 0x13, 0x20, 0xfe, 0x05, 0xf6, 0xce, 0x01, 0xfe,
0x4a, 0x17, 0x08, 0x54, 0x58, 0x37, 0x12, 0x2f, 0x42, 0x92, 0x01, 0xfe, 0x82, 0x16, 0x02, 0x2b,
0x09, 0x46, 0x01, 0x0e, 0x07, 0x00, 0x66, 0x01, 0x73, 0xfe, 0x18, 0x10, 0xfe, 0x41, 0x58, 0x09,
0xa4, 0x01, 0x0e, 0xfe, 0xc8, 0x54, 0x6b, 0xfe, 0x10, 0x03, 0x01, 0xfe, 0x82, 0x16, 0x02, 0x2b,
0x2c, 0x4f, 0xfe, 0x02, 0xe8, 0x2a, 0xfe, 0xbf, 0x57, 0xfe, 0x9e, 0x43, 0xfe, 0x77, 0x57, 0xfe,
0x27, 0xf0, 0xfe, 0xe0, 0x01, 0xfe, 0x07, 0x4b, 0xfe, 0x20, 0xf0, 0xa7, 0xfe, 0x40, 0x1c, 0x1c,
0xd9, 0xfe, 0x26, 0xf0, 0xfe, 0x5a, 0x03, 0xfe, 0xa0, 0xf0, 0xfe, 0x48, 0x03, 0xfe, 0x11, 0xf0,
0xa7, 0xfe, 0xef, 0x10, 0xfe, 0x9f, 0xf0, 0xfe, 0x68, 0x03, 0xf9, 0x10, 0xfe, 0x11, 0x00, 0x02,
0x65, 0x2c, 0xfe, 0x48, 0x1c, 0xf9, 0x08, 0x05, 0x1b, 0xfe, 0x18, 0x13, 0x21, 0x22, 0xa3, 0xb7,
0x13, 0xa3, 0x09, 0x46, 0x01, 0x0e, 0xb7, 0x78, 0x01, 0xfe, 0xb4, 0x16, 0x12, 0xd1, 0x1c, 0xd9,
0xfe, 0x01, 0xf0, 0xd9, 0xfe, 0x82, 0xf0, 0xfe, 0x96, 0x03, 0xfa, 0x12, 0xfe, 0xe4, 0x00, 0x27,
0xfe, 0xa8, 0x03, 0x1c, 0x34, 0x1d, 0xfe, 0xb8, 0x03, 0x01, 0x4b, 0xfe, 0x06, 0xf0, 0xfe, 0xc8,
0x03, 0x95, 0x86, 0xfe, 0x0a, 0xf0, 0xfe, 0x8a, 0x06, 0x02, 0x24, 0x03, 0x70, 0x28, 0x17, 0xfe,
0xfa, 0x04, 0x15, 0x6d, 0x01, 0x36, 0x7b, 0xfe, 0x6a, 0x02, 0x02, 0xd8, 0xf9, 0x2c, 0x99, 0x19,
0xfe, 0x67, 0x1b, 0xfe, 0xbf, 0x57, 0xfe, 0x77, 0x57, 0xfe, 0x48, 0x1c, 0x74, 0x01, 0xaf, 0x8c,
0x09, 0x46, 0x01, 0x0e, 0x07, 0x00, 0x17, 0xda, 0x09, 0xd1, 0x01, 0x0e, 0x8d, 0x51, 0x64, 0x79,
0x2a, 0x03, 0x70, 0x28, 0xfe, 0x10, 0x12, 0x15, 0x6d, 0x01, 0x36, 0x7b, 0xfe, 0x6a, 0x02, 0x02,
0xd8, 0xc7, 0x81, 0xc8, 0x83, 0x1c, 0x24, 0x27, 0xfe, 0x40, 0x04, 0x1d, 0xfe, 0x3c, 0x04, 0x3b,
0xfe, 0xa0, 0x00, 0xfe, 0x9b, 0x57, 0xfe, 0x4e, 0x12, 0x2d, 0xff, 0x02, 0x00, 0x10, 0x01, 0x0b,
0x1d, 0xfe, 0xe4, 0x04, 0x2d, 0x01, 0x0b, 0x1d, 0x24, 0x33, 0x31, 0xde, 0xfe, 0x4c, 0x44, 0xfe,
0x4c, 0x12, 0x51, 0xfe, 0x44, 0x48, 0x0f, 0x6f, 0xfe, 0x4c, 0x54, 0x6b, 0xda, 0x4f, 0x79, 0x2a,
0xfe, 0x06, 0x80, 0xfe, 0x48, 0x47, 0xfe, 0x62, 0x13, 0x08, 0x05, 0x1b, 0xfe, 0x2a, 0x13, 0x32,
0x07, 0x82, 0xfe, 0x52, 0x13, 0xfe, 0x20, 0x10, 0x0f, 0x6f, 0xfe, 0x4c, 0x54, 0x6b, 0xda, 0xfe,
0x06, 0x80, 0xfe, 0x48, 0x47, 0xfe, 0x40, 0x13, 0x08, 0x05, 0x1b, 0xfe, 0x08, 0x13, 0x32, 0x07,
0x82, 0xfe, 0x30, 0x13, 0x08, 0x05, 0x1b, 0xfe, 0x1c, 0x12, 0x15, 0x9d, 0x08, 0x05, 0x06, 0x4d,
0x15, 0xfe, 0x0d, 0x00, 0x01, 0x36, 0x7b, 0xfe, 0x64, 0x0d, 0x02, 0x24, 0x2d, 0x12, 0xfe, 0xe6,
0x00, 0xfe, 0x1c, 0x90, 0xfe, 0x40, 0x5c, 0x04, 0x15, 0x9d, 0x01, 0x36, 0x02, 0x2b, 0xfe, 0x42,
0x5b, 0x99, 0x19, 0xfe, 0x46, 0x59, 0xfe, 0xbf, 0x57, 0xfe, 0x77, 0x57, 0xfe, 0x87, 0x80, 0xfe,
0x31, 0xe4, 0x5b, 0x08, 0x05, 0x0a, 0xfe, 0x84, 0x13, 0xfe, 0x20, 0x80, 0x07, 0x19, 0xfe, 0x7c,
0x12, 0x53, 0x05, 0x06, 0xfe, 0x6c, 0x13, 0x03, 0xfe, 0xa2, 0x00, 0x28, 0x17, 0xfe, 0x90, 0x05,
0xfe, 0x31, 0xe4, 0x5a, 0x53, 0x05, 0x0a, 0xfe, 0x56, 0x13, 0x03, 0xfe, 0xa0, 0x00, 0x28, 0xfe,
0x4e, 0x12, 0x67, 0xff, 0x02, 0x00, 0x10, 0x27, 0xfe, 0x48, 0x05, 0x1c, 0x34, 0xfe, 0x89, 0x48,
0xff, 0x02, 0x00, 0x10, 0x27, 0xfe, 0x56, 0x05, 0x26, 0xfe, 0xa8, 0x05, 0x12, 0xfe, 0xe3, 0x00,
0x21, 0x53, 0xfe, 0x4a, 0xf0, 0xfe, 0x76, 0x05, 0xfe, 0x49, 0xf0, 0xfe, 0x70, 0x05, 0x88, 0x25,
0xfe, 0x21, 0x00, 0xab, 0x25, 0xfe, 0x22, 0x00, 0xaa, 0x25, 0x58, 0xfe, 0x09, 0x48, 0xff, 0x02,
0x00, 0x10, 0x27, 0xfe, 0x86, 0x05, 0x26, 0xfe, 0xa8, 0x05, 0xfe, 0xe2, 0x08, 0x53, 0x05, 0xcb,
0x4d, 0x01, 0xb0, 0x25, 0x06, 0x13, 0xd3, 0x39, 0xfe, 0x27, 0x01, 0x08, 0x05, 0x1b, 0xfe, 0x22,
0x12, 0x41, 0x01, 0xb2, 0x15, 0x9d, 0x08, 0x05, 0x06, 0x4d, 0x15, 0xfe, 0x0d, 0x00, 0x01, 0x36,
0x7b, 0xfe, 0x64, 0x0d, 0x02, 0x24, 0x03, 0xfe, 0x9c, 0x00, 0x28, 0xeb, 0x03, 0x5c, 0x28, 0xfe,
0x36, 0x13, 0x41, 0x01, 0xb2, 0x26, 0xfe, 0x18, 0x06, 0x09, 0x06, 0x53, 0x05, 0x1f, 0xfe, 0x02,
0x12, 0x50, 0x01, 0xfe, 0x9e, 0x15, 0x1d, 0xfe, 0x0e, 0x06, 0x12, 0xa5, 0x01, 0x4b, 0x12, 0xfe,
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0x04, 0xea, 0xfe, 0x48, 0xf4, 0x19, 0x7a, 0xfe, 0x74, 0x19, 0x0f, 0x19, 0x04, 0x07, 0x7e, 0xfe,
0x5a, 0xf0, 0xfe, 0x84, 0x19, 0x25, 0xfe, 0x09, 0x00, 0xfe, 0x34, 0x10, 0x07, 0x1a, 0xfe, 0x5a,
0xf0, 0xfe, 0x92, 0x19, 0x25, 0xca, 0xfe, 0x26, 0x10, 0x07, 0x19, 0x66, 0x25, 0x6d, 0xe5, 0x07,
0x0a, 0x66, 0x25, 0x9e, 0xfe, 0x0e, 0x10, 0x07, 0x06, 0x66, 0x25, 0x59, 0xa9, 0xb8, 0x04, 0x15,
0xfe, 0x09, 0x00, 0x01, 0x36, 0xfe, 0x04, 0xfe, 0x81, 0x03, 0x83, 0xfe, 0x40, 0x5c, 0x04, 0x1c,
0xf7, 0xfe, 0x14, 0xf0, 0x0b, 0x27, 0xfe, 0xd6, 0x19, 0x1c, 0xf7, 0x7b, 0xf7, 0xfe, 0x82, 0xf0,
0xfe, 0xda, 0x19, 0x04, 0xff, 0xcc, 0x00, 0x00,
};
STATIC unsigned short _adv_asc38C0800_size =
sizeof(_adv_asc38C0800_buf); /* 0x14E1 */
STATIC ADV_DCNT _adv_asc38C0800_chksum =
0x050D3FD8UL; /* Expanded little-endian checksum. */
/* Microcode buffer is kept after initialization for error recovery. */
STATIC unsigned char _adv_asc38C1600_buf[] = {
0x00, 0x00, 0x00, 0xf2, 0x00, 0x16, 0x00, 0xfc, 0x00, 0x10, 0x00, 0xf0, 0x18, 0xe4, 0x01, 0x00,
0x04, 0x1e, 0x48, 0xe4, 0x03, 0xf6, 0xf7, 0x13, 0x2e, 0x1e, 0x02, 0x00, 0x07, 0x17, 0xc0, 0x5f,
0x00, 0xfa, 0xff, 0xff, 0x04, 0x00, 0x00, 0xf6, 0x09, 0xe7, 0x82, 0xe7, 0x85, 0xf0, 0x86, 0xf0,
0x4e, 0x10, 0x9e, 0xe7, 0xff, 0x00, 0x55, 0xf0, 0x01, 0xf6, 0x03, 0x00, 0x98, 0x57, 0x01, 0xe6,
0x00, 0xea, 0x00, 0xec, 0x01, 0xfa, 0x18, 0xf4, 0x08, 0x00, 0xf0, 0x1d, 0x38, 0x54, 0x32, 0xf0,
0x10, 0x00, 0xc2, 0x0e, 0x1e, 0xf0, 0xd5, 0xf0, 0xbc, 0x00, 0x4b, 0xe4, 0x00, 0xe6, 0xb1, 0xf0,
0xb4, 0x00, 0x02, 0x13, 0x3e, 0x1c, 0xc8, 0x47, 0x3e, 0x00, 0xd8, 0x01, 0x06, 0x13, 0x0c, 0x1c,
0x5e, 0x1e, 0x00, 0x57, 0xc8, 0x57, 0x01, 0xfc, 0xbc, 0x0e, 0xa2, 0x12, 0xb9, 0x54, 0x00, 0x80,
0x62, 0x0a, 0x5a, 0x12, 0xc8, 0x15, 0x3e, 0x1e, 0x18, 0x40, 0xbd, 0x56, 0x03, 0xe6, 0x01, 0xea,
0x5c, 0xf0, 0x0f, 0x00, 0x20, 0x00, 0x6c, 0x01, 0x6e, 0x01, 0x04, 0x12, 0x04, 0x13, 0xbb, 0x55,
0x3c, 0x56, 0x3e, 0x57, 0x03, 0x58, 0x4a, 0xe4, 0x40, 0x00, 0xb6, 0x00, 0xbb, 0x00, 0xc0, 0x00,
0x00, 0x01, 0x01, 0x01, 0x3e, 0x01, 0x58, 0x0a, 0x44, 0x10, 0x0a, 0x12, 0x4c, 0x1c, 0x4e, 0x1c,
0x02, 0x4a, 0x30, 0xe4, 0x05, 0xe6, 0x0c, 0x00, 0x3c, 0x00, 0x80, 0x00, 0x24, 0x01, 0x3c, 0x01,
0x68, 0x01, 0x6a, 0x01, 0x70, 0x01, 0x72, 0x01, 0x74, 0x01, 0x76, 0x01, 0x78, 0x01, 0x7c, 0x01,
0xc6, 0x0e, 0x0c, 0x10, 0xac, 0x12, 0xae, 0x12, 0x16, 0x1a, 0x32, 0x1c, 0x6e, 0x1e, 0x02, 0x48,
0x3a, 0x55, 0xc9, 0x57, 0x02, 0xee, 0x5b, 0xf0, 0x03, 0xf7, 0x06, 0xf7, 0x03, 0xfc, 0x06, 0x00,
0x1e, 0x00, 0xbe, 0x00, 0xe1, 0x00, 0x0c, 0x12, 0x18, 0x1a, 0x70, 0x1a, 0x30, 0x1c, 0x38, 0x1c,
0x10, 0x44, 0x00, 0x4c, 0xb0, 0x57, 0x40, 0x5c, 0x4d, 0xe4, 0x04, 0xea, 0x5d, 0xf0, 0xa7, 0xf0,
0x04, 0xf6, 0x02, 0xfc, 0x05, 0x00, 0x09, 0x00, 0x19, 0x00, 0x32, 0x00, 0x33, 0x00, 0x34, 0x00,
0x36, 0x00, 0x98, 0x00, 0x9e, 0x00, 0xcc, 0x00, 0x20, 0x01, 0x4e, 0x01, 0x79, 0x01, 0x3c, 0x09,
0x68, 0x0d, 0x02, 0x10, 0x04, 0x10, 0x3a, 0x10, 0x08, 0x12, 0x0a, 0x13, 0x40, 0x16, 0x50, 0x16,
0x00, 0x17, 0x4a, 0x19, 0x00, 0x4e, 0x00, 0x54, 0x01, 0x58, 0x00, 0xdc, 0x05, 0xf0, 0x09, 0xf0,
0x59, 0xf0, 0xb8, 0xf0, 0x48, 0xf4, 0x0e, 0xf7, 0x0a, 0x00, 0x9b, 0x00, 0x9c, 0x00, 0xa4, 0x00,
0xb5, 0x00, 0xba, 0x00, 0xd0, 0x00, 0xe7, 0x00, 0xf0, 0x03, 0x69, 0x08, 0xe9, 0x09, 0x5c, 0x0c,
0xb6, 0x12, 0xbc, 0x19, 0xd8, 0x1b, 0x20, 0x1c, 0x34, 0x1c, 0x36, 0x1c, 0x42, 0x1d, 0x08, 0x44,
0x38, 0x44, 0x91, 0x44, 0x0a, 0x45, 0x48, 0x46, 0x89, 0x48, 0x68, 0x54, 0x83, 0x55, 0x83, 0x59,
0x31, 0xe4, 0x02, 0xe6, 0x07, 0xf0, 0x08, 0xf0, 0x0b, 0xf0, 0x0c, 0xf0, 0x4b, 0xf4, 0x04, 0xf8,
0x05, 0xf8, 0x02, 0xfa, 0x03, 0xfa, 0x04, 0xfc, 0x05, 0xfc, 0x07, 0x00, 0xa8, 0x00, 0xaa, 0x00,
0xb9, 0x00, 0xe0, 0x00, 0xe5, 0x00, 0x22, 0x01, 0x26, 0x01, 0x60, 0x01, 0x7a, 0x01, 0x82, 0x01,
0xc8, 0x01, 0xca, 0x01, 0x86, 0x02, 0x6a, 0x03, 0x18, 0x05, 0xb2, 0x07, 0x68, 0x08, 0x10, 0x0d,
0x06, 0x10, 0x0a, 0x10, 0x0e, 0x10, 0x12, 0x10, 0x60, 0x10, 0xed, 0x10, 0xf3, 0x10, 0x06, 0x12,
0x10, 0x12, 0x1e, 0x12, 0x0c, 0x13, 0x0e, 0x13, 0x10, 0x13, 0xfe, 0x9c, 0xf0, 0x35, 0x05, 0xfe,
0xec, 0x0e, 0xff, 0x10, 0x00, 0x00, 0xe9, 0xfe, 0x34, 0x1f, 0x00, 0xe8, 0xfe, 0x88, 0x01, 0xff,
0x03, 0x00, 0x00, 0xfe, 0x93, 0x15, 0xfe, 0x0f, 0x05, 0xff, 0x38, 0x00, 0x00, 0xfe, 0x57, 0x24,
0x00, 0xfe, 0x4c, 0x00, 0x65, 0xff, 0x04, 0x00, 0x00, 0x1a, 0xff, 0x09, 0x00, 0x00, 0xff, 0x08,
0x01, 0x01, 0xff, 0x08, 0xff, 0xff, 0xff, 0x27, 0x00, 0x00, 0xff, 0x10, 0xff, 0xff, 0xff, 0x13,
0x00, 0x00, 0xfe, 0x78, 0x56, 0xfe, 0x34, 0x12, 0xff, 0x21, 0x00, 0x00, 0xfe, 0x04, 0xf7, 0xe8,
0x37, 0x7d, 0x0d, 0x01, 0xfe, 0x4a, 0x11, 0xfe, 0x04, 0xf7, 0xe8, 0x7d, 0x0d, 0x51, 0x37, 0xfe,
0x3d, 0xf0, 0xfe, 0x0c, 0x02, 0xfe, 0x20, 0xf0, 0xbc, 0xfe, 0x91, 0xf0, 0xfe, 0xf8, 0x01, 0xfe,
0x90, 0xf0, 0xfe, 0xf8, 0x01, 0xfe, 0x8f, 0xf0, 0xbc, 0x03, 0x67, 0x4d, 0x05, 0xfe, 0x08, 0x0f,
0x01, 0xfe, 0x78, 0x0f, 0xfe, 0xdd, 0x12, 0x05, 0xfe, 0x0e, 0x03, 0xfe, 0x28, 0x1c, 0x03, 0xfe,
0xa6, 0x00, 0xfe, 0xd1, 0x12, 0x3e, 0x22, 0xfe, 0xa6, 0x00, 0xac, 0xfe, 0x48, 0xf0, 0xfe, 0x90,
0x02, 0xfe, 0x49, 0xf0, 0xfe, 0xaa, 0x02, 0xfe, 0x4a, 0xf0, 0xfe, 0xc8, 0x02, 0xfe, 0x46, 0xf0,
0xfe, 0x5a, 0x02, 0xfe, 0x47, 0xf0, 0xfe, 0x60, 0x02, 0xfe, 0x43, 0xf0, 0xfe, 0x4e, 0x02, 0xfe,
0x44, 0xf0, 0xfe, 0x52, 0x02, 0xfe, 0x45, 0xf0, 0xfe, 0x56, 0x02, 0x1c, 0x0d, 0xa2, 0x1c, 0x07,
0x22, 0xb7, 0x05, 0x35, 0xfe, 0x00, 0x1c, 0xfe, 0xf1, 0x10, 0xfe, 0x02, 0x1c, 0xf5, 0xfe, 0x1e,
0x1c, 0xfe, 0xe9, 0x10, 0x01, 0x5f, 0xfe, 0xe7, 0x10, 0xfe, 0x06, 0xfc, 0xde, 0x0a, 0x81, 0x01,
0xa3, 0x05, 0x35, 0x1f, 0x95, 0x47, 0xb8, 0x01, 0xfe, 0xe4, 0x11, 0x0a, 0x81, 0x01, 0x5c, 0xfe,
0xbd, 0x10, 0x0a, 0x81, 0x01, 0x5c, 0xfe, 0xad, 0x10, 0xfe, 0x16, 0x1c, 0xfe, 0x58, 0x1c, 0x1c,
0x07, 0x22, 0xb7, 0x37, 0x2a, 0x35, 0xfe, 0x3d, 0xf0, 0xfe, 0x0c, 0x02, 0x2b, 0xfe, 0x9e, 0x02,
0xfe, 0x5a, 0x1c, 0xfe, 0x12, 0x1c, 0xfe, 0x14, 0x1c, 0x1f, 0xfe, 0x30, 0x00, 0x47, 0xb8, 0x01,
0xfe, 0xd4, 0x11, 0x1c, 0x07, 0x22, 0xb7, 0x05, 0xe9, 0x21, 0x2c, 0x09, 0x1a, 0x31, 0xfe, 0x69,
0x10, 0x1c, 0x07, 0x22, 0xb7, 0xfe, 0x04, 0xec, 0x2c, 0x60, 0x01, 0xfe, 0x1e, 0x1e, 0x20, 0x2c,
0xfe, 0x05, 0xf6, 0xde, 0x01, 0xfe, 0x62, 0x1b, 0x01, 0x0c, 0x61, 0x4a, 0x44, 0x15, 0x56, 0x51,
0x01, 0xfe, 0x9e, 0x1e, 0x01, 0xfe, 0x96, 0x1a, 0x05, 0x35, 0x0a, 0x57, 0x01, 0x18, 0x09, 0x00,
0x36, 0x01, 0x85, 0xfe, 0x18, 0x10, 0xfe, 0x41, 0x58, 0x0a, 0xba, 0x01, 0x18, 0xfe, 0xc8, 0x54,
0x7b, 0xfe, 0x1c, 0x03, 0x01, 0xfe, 0x96, 0x1a, 0x05, 0x35, 0x37, 0x60, 0xfe, 0x02, 0xe8, 0x30,
0xfe, 0xbf, 0x57, 0xfe, 0x9e, 0x43, 0xfe, 0x77, 0x57, 0xfe, 0x27, 0xf0, 0xfe, 0xe4, 0x01, 0xfe,
0x07, 0x4b, 0xfe, 0x20, 0xf0, 0xbc, 0xfe, 0x40, 0x1c, 0x2a, 0xeb, 0xfe, 0x26, 0xf0, 0xfe, 0x66,
0x03, 0xfe, 0xa0, 0xf0, 0xfe, 0x54, 0x03, 0xfe, 0x11, 0xf0, 0xbc, 0xfe, 0xef, 0x10, 0xfe, 0x9f,
0xf0, 0xfe, 0x74, 0x03, 0xfe, 0x46, 0x1c, 0x19, 0xfe, 0x11, 0x00, 0x05, 0x70, 0x37, 0xfe, 0x48,
0x1c, 0xfe, 0x46, 0x1c, 0x01, 0x0c, 0x06, 0x28, 0xfe, 0x18, 0x13, 0x26, 0x21, 0xb9, 0xc7, 0x20,
0xb9, 0x0a, 0x57, 0x01, 0x18, 0xc7, 0x89, 0x01, 0xfe, 0xc8, 0x1a, 0x15, 0xe1, 0x2a, 0xeb, 0xfe,
0x01, 0xf0, 0xeb, 0xfe, 0x82, 0xf0, 0xfe, 0xa4, 0x03, 0xfe, 0x9c, 0x32, 0x15, 0xfe, 0xe4, 0x00,
0x2f, 0xfe, 0xb6, 0x03, 0x2a, 0x3c, 0x16, 0xfe, 0xc6, 0x03, 0x01, 0x41, 0xfe, 0x06, 0xf0, 0xfe,
0xd6, 0x03, 0xaf, 0xa0, 0xfe, 0x0a, 0xf0, 0xfe, 0xa2, 0x07, 0x05, 0x29, 0x03, 0x81, 0x1e, 0x1b,
0xfe, 0x24, 0x05, 0x1f, 0x63, 0x01, 0x42, 0x8f, 0xfe, 0x70, 0x02, 0x05, 0xea, 0xfe, 0x46, 0x1c,
0x37, 0x7d, 0x1d, 0xfe, 0x67, 0x1b, 0xfe, 0xbf, 0x57, 0xfe, 0x77, 0x57, 0xfe, 0x48, 0x1c, 0x75,
0x01, 0xa6, 0x86, 0x0a, 0x57, 0x01, 0x18, 0x09, 0x00, 0x1b, 0xec, 0x0a, 0xe1, 0x01, 0x18, 0x77,
0x50, 0x40, 0x8d, 0x30, 0x03, 0x81, 0x1e, 0xf8, 0x1f, 0x63, 0x01, 0x42, 0x8f, 0xfe, 0x70, 0x02,
0x05, 0xea, 0xd7, 0x99, 0xd8, 0x9c, 0x2a, 0x29, 0x2f, 0xfe, 0x4e, 0x04, 0x16, 0xfe, 0x4a, 0x04,
0x7e, 0xfe, 0xa0, 0x00, 0xfe, 0x9b, 0x57, 0xfe, 0x54, 0x12, 0x32, 0xff, 0x02, 0x00, 0x10, 0x01,
0x08, 0x16, 0xfe, 0x02, 0x05, 0x32, 0x01, 0x08, 0x16, 0x29, 0x27, 0x25, 0xee, 0xfe, 0x4c, 0x44,
0xfe, 0x58, 0x12, 0x50, 0xfe, 0x44, 0x48, 0x13, 0x34, 0xfe, 0x4c, 0x54, 0x7b, 0xec, 0x60, 0x8d,
0x30, 0x01, 0xfe, 0x4e, 0x1e, 0xfe, 0x48, 0x47, 0xfe, 0x7c, 0x13, 0x01, 0x0c, 0x06, 0x28, 0xfe,
0x32, 0x13, 0x01, 0x43, 0x09, 0x9b, 0xfe, 0x68, 0x13, 0xfe, 0x26, 0x10, 0x13, 0x34, 0xfe, 0x4c,
0x54, 0x7b, 0xec, 0x01, 0xfe, 0x4e, 0x1e, 0xfe, 0x48, 0x47, 0xfe, 0x54, 0x13, 0x01, 0x0c, 0x06,
0x28, 0xa5, 0x01, 0x43, 0x09, 0x9b, 0xfe, 0x40, 0x13, 0x01, 0x0c, 0x06, 0x28, 0xf9, 0x1f, 0x7f,
0x01, 0x0c, 0x06, 0x07, 0x4d, 0x1f, 0xfe, 0x0d, 0x00, 0x01, 0x42, 0x8f, 0xfe, 0xa4, 0x0e, 0x05,
0x29, 0x32, 0x15, 0xfe, 0xe6, 0x00, 0x0f, 0xfe, 0x1c, 0x90, 0x04, 0xfe, 0x9c, 0x93, 0x3a, 0x0b,
0x0e, 0x8b, 0x02, 0x1f, 0x7f, 0x01, 0x42, 0x05, 0x35, 0xfe, 0x42, 0x5b, 0x7d, 0x1d, 0xfe, 0x46,
0x59, 0xfe, 0xbf, 0x57, 0xfe, 0x77, 0x57, 0x0f, 0xfe, 0x87, 0x80, 0x04, 0xfe, 0x87, 0x83, 0xfe,
0xc9, 0x47, 0x0b, 0x0e, 0xd0, 0x65, 0x01, 0x0c, 0x06, 0x0d, 0xfe, 0x98, 0x13, 0x0f, 0xfe, 0x20,
0x80, 0x04, 0xfe, 0xa0, 0x83, 0x33, 0x0b, 0x0e, 0x09, 0x1d, 0xfe, 0x84, 0x12, 0x01, 0x38, 0x06,
0x07, 0xfe, 0x70, 0x13, 0x03, 0xfe, 0xa2, 0x00, 0x1e, 0x1b, 0xfe, 0xda, 0x05, 0xd0, 0x54, 0x01,
0x38, 0x06, 0x0d, 0xfe, 0x58, 0x13, 0x03, 0xfe, 0xa0, 0x00, 0x1e, 0xfe, 0x50, 0x12, 0x5e, 0xff,
0x02, 0x00, 0x10, 0x2f, 0xfe, 0x90, 0x05, 0x2a, 0x3c, 0xcc, 0xff, 0x02, 0x00, 0x10, 0x2f, 0xfe,
0x9e, 0x05, 0x17, 0xfe, 0xf4, 0x05, 0x15, 0xfe, 0xe3, 0x00, 0x26, 0x01, 0x38, 0xfe, 0x4a, 0xf0,
0xfe, 0xc0, 0x05, 0xfe, 0x49, 0xf0, 0xfe, 0xba, 0x05, 0x71, 0x2e, 0xfe, 0x21, 0x00, 0xf1, 0x2e,
0xfe, 0x22, 0x00, 0xa2, 0x2e, 0x4a, 0xfe, 0x09, 0x48, 0xff, 0x02, 0x00, 0x10, 0x2f, 0xfe, 0xd0,
0x05, 0x17, 0xfe, 0xf4, 0x05, 0xfe, 0xe2, 0x08, 0x01, 0x38, 0x06, 0xfe, 0x1c, 0x00, 0x4d, 0x01,
0xa7, 0x2e, 0x07, 0x20, 0xe4, 0x47, 0xfe, 0x27, 0x01, 0x01, 0x0c, 0x06, 0x28, 0xfe, 0x24, 0x12,
0x3e, 0x01, 0x84, 0x1f, 0x7f, 0x01, 0x0c, 0x06, 0x07, 0x4d, 0x1f, 0xfe, 0x0d, 0x00, 0x01, 0x42,
0x8f, 0xfe, 0xa4, 0x0e, 0x05, 0x29, 0x03, 0xe6, 0x1e, 0xfe, 0xca, 0x13, 0x03, 0xb6, 0x1e, 0xfe,
0x40, 0x12, 0x03, 0x66, 0x1e, 0xfe, 0x38, 0x13, 0x3e, 0x01, 0x84, 0x17, 0xfe, 0x72, 0x06, 0x0a,
0x07, 0x01, 0x38, 0x06, 0x24, 0xfe, 0x02, 0x12, 0x4f, 0x01, 0xfe, 0x56, 0x19, 0x16, 0xfe, 0x68,
0x06, 0x15, 0x82, 0x01, 0x41, 0x15, 0xe2, 0x03, 0x66, 0x8a, 0x10, 0x66, 0x03, 0x9a, 0x1e, 0xfe,
0x70, 0x12, 0x03, 0x55, 0x1e, 0xfe, 0x68, 0x13, 0x01, 0xc6, 0x09, 0x12, 0x48, 0xfe, 0x92, 0x06,
0x2e, 0x12, 0x01, 0xfe, 0xac, 0x1d, 0xfe, 0x43, 0x48, 0x62, 0x80, 0x13, 0x58, 0xff, 0x02, 0x00,
0x57, 0x52, 0xad, 0x23, 0x3f, 0x4e, 0x62, 0x49, 0x3e, 0x01, 0x84, 0x17, 0xfe, 0xea, 0x06, 0x01,
0x38, 0x06, 0x12, 0xf7, 0x45, 0x0a, 0x95, 0x01, 0xfe, 0x84, 0x19, 0x16, 0xfe, 0xe0, 0x06, 0x15,
0x82, 0x01, 0x41, 0x15, 0xe2, 0x03, 0x55, 0x8a, 0x10, 0x55, 0x1c, 0x07, 0x01, 0x84, 0xfe, 0xae,
0x10, 0x03, 0x6f, 0x1e, 0xfe, 0x9e, 0x13, 0x3e, 0x01, 0x84, 0x03, 0x9a, 0x1e, 0xfe, 0x1a, 0x12,
0x01, 0x38, 0x06, 0x12, 0xfc, 0x01, 0xc6, 0x01, 0xfe, 0xac, 0x1d, 0xfe, 0x43, 0x48, 0x62, 0x80,
0xf0, 0x45, 0x0a, 0x95, 0x03, 0xb6, 0x1e, 0xf8, 0x01, 0x38, 0x06, 0x24, 0x36, 0xfe, 0x02, 0xf6,
0x07, 0x71, 0x78, 0x8c, 0x00, 0x4d, 0x62, 0x49, 0x3e, 0x2d, 0x93, 0x4e, 0xd0, 0x0d, 0x17, 0xfe,
0x9a, 0x07, 0x01, 0xfe, 0xc0, 0x19, 0x16, 0xfe, 0x90, 0x07, 0x26, 0x20, 0x9e, 0x15, 0x82, 0x01,
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0x24, 0x1c, 0xfe, 0x1d, 0xf7, 0x28, 0xb1, 0xfe, 0x04, 0x1b, 0x01, 0xfe, 0x2a, 0x1c, 0xfa, 0xb3,
0x28, 0x7c, 0xfe, 0x2c, 0x01, 0xfe, 0x2f, 0x19, 0x02, 0xc9, 0x2b, 0xfe, 0xf4, 0x1a, 0xfe, 0xfa,
0x10, 0x1c, 0x1a, 0x87, 0x03, 0xfe, 0x64, 0x01, 0xfe, 0x00, 0xf4, 0x24, 0xfe, 0x18, 0x58, 0x03,
0xfe, 0x66, 0x01, 0xfe, 0x19, 0x58, 0xb3, 0x24, 0x01, 0xfe, 0x0e, 0x1f, 0xfe, 0x30, 0xf4, 0x07,
0xfe, 0x3c, 0x50, 0x7c, 0xfe, 0x38, 0x00, 0xfe, 0x0f, 0x79, 0xfe, 0x1c, 0xf7, 0x24, 0xb1, 0xfe,
0x50, 0x1b, 0xfe, 0xd4, 0x14, 0x31, 0x02, 0xc9, 0x2b, 0xfe, 0x26, 0x1b, 0xfe, 0xba, 0x10, 0x1c,
0x1a, 0x87, 0xfe, 0x83, 0x5a, 0xfe, 0x18, 0xdf, 0xfe, 0x19, 0xde, 0xfe, 0x1d, 0xf7, 0x54, 0xb1,
0xfe, 0x72, 0x1b, 0xfe, 0xb2, 0x14, 0xfc, 0xb3, 0x54, 0x7c, 0x12, 0xfe, 0xaf, 0x19, 0xfe, 0x98,
0xe7, 0x00, 0x02, 0xc9, 0x2b, 0xfe, 0x66, 0x1b, 0xfe, 0x8a, 0x10, 0x1c, 0x1a, 0x87, 0x8b, 0x0f,
0xfe, 0x30, 0x90, 0x04, 0xfe, 0xb0, 0x93, 0x3a, 0x0b, 0xfe, 0x18, 0x58, 0xfe, 0x32, 0x90, 0x04,
0xfe, 0xb2, 0x93, 0x3a, 0x0b, 0xfe, 0x19, 0x58, 0x0e, 0xa8, 0xb3, 0x4a, 0x7c, 0x12, 0xfe, 0x0f,
0x79, 0xfe, 0x1c, 0xf7, 0x4a, 0xb1, 0xfe, 0xc6, 0x1b, 0xfe, 0x5e, 0x14, 0x31, 0x02, 0xc9, 0x2b,
0xfe, 0x96, 0x1b, 0x5c, 0xfe, 0x02, 0xf6, 0x1a, 0x87, 0xfe, 0x18, 0xfe, 0x6a, 0xfe, 0x19, 0xfe,
0x6b, 0x01, 0xfe, 0x1e, 0x1f, 0xfe, 0x1d, 0xf7, 0x65, 0xb1, 0xfe, 0xee, 0x1b, 0xfe, 0x36, 0x14,
0xfe, 0x1c, 0x13, 0xb3, 0x65, 0x3e, 0xfe, 0x83, 0x58, 0xfe, 0xaf, 0x19, 0xfe, 0x80, 0xe7, 0x1a,
0xfe, 0x81, 0xe7, 0x1a, 0x15, 0xfe, 0xdd, 0x00, 0x7a, 0x30, 0x02, 0x7a, 0x30, 0xfe, 0x12, 0x45,
0x2b, 0xfe, 0xdc, 0x1b, 0x1f, 0x07, 0x47, 0xb5, 0xc3, 0x05, 0x35, 0xfe, 0x39, 0xf0, 0x75, 0x26,
0x02, 0xfe, 0x7e, 0x18, 0x23, 0x1d, 0x36, 0x13, 0x11, 0x02, 0x87, 0x03, 0xe3, 0x23, 0x07, 0xfe,
0xef, 0x12, 0xfe, 0xe1, 0x10, 0x90, 0x34, 0x60, 0xfe, 0x02, 0x80, 0x09, 0x56, 0xfe, 0x3c, 0x13,
0xfe, 0x82, 0x14, 0xfe, 0x42, 0x13, 0x51, 0xfe, 0x06, 0x83, 0x0a, 0x5a, 0x01, 0x18, 0xcb, 0xfe,
0x3e, 0x12, 0xfe, 0x41, 0x48, 0xfe, 0x45, 0x48, 0x01, 0xfe, 0xb2, 0x16, 0xfe, 0x00, 0xcc, 0xcb,
0xfe, 0xf3, 0x13, 0x3f, 0x89, 0x09, 0x1a, 0xa5, 0x0a, 0x9d, 0x01, 0x18, 0xfe, 0x80, 0x4c, 0x01,
0x85, 0xfe, 0x16, 0x10, 0x09, 0x9b, 0x4e, 0xfe, 0x40, 0x14, 0xfe, 0x24, 0x12, 0xfe, 0x14, 0x56,
0xfe, 0xd6, 0xf0, 0xfe, 0x52, 0x1c, 0x1c, 0x0d, 0x02, 0xfe, 0x9c, 0xe7, 0x0d, 0x19, 0xfe, 0x15,
0x00, 0x40, 0x8d, 0x30, 0x01, 0xf4, 0x1c, 0x07, 0x02, 0x51, 0xfe, 0x06, 0x83, 0xfe, 0x18, 0x80,
0x61, 0x28, 0x44, 0x15, 0x56, 0x01, 0x85, 0x1c, 0x07, 0x02, 0xfe, 0x38, 0x90, 0xfe, 0xba, 0x90,
0x91, 0xde, 0x7e, 0xdf, 0xfe, 0x48, 0x55, 0x31, 0xfe, 0xc9, 0x55, 0x02, 0x21, 0xb9, 0x88, 0x20,
0xb9, 0x02, 0x0a, 0xba, 0x01, 0x18, 0xfe, 0x41, 0x48, 0x0a, 0x57, 0x01, 0x18, 0xfe, 0x49, 0x44,
0x1b, 0xfe, 0x1e, 0x1d, 0x88, 0x89, 0x02, 0x0a, 0x5a, 0x01, 0x18, 0x09, 0x1a, 0xa4, 0x0a, 0x67,
0x01, 0xa3, 0x0a, 0x57, 0x01, 0x18, 0x88, 0x89, 0x02, 0xfe, 0x4e, 0xe4, 0x1d, 0x7b, 0xfe, 0x52,
0x1d, 0x03, 0xfe, 0x90, 0x00, 0xfe, 0x3a, 0x45, 0xfe, 0x2c, 0x10, 0xfe, 0x4e, 0xe4, 0xdd, 0x7b,
0xfe, 0x64, 0x1d, 0x03, 0xfe, 0x92, 0x00, 0xd1, 0x12, 0xfe, 0x1a, 0x10, 0xfe, 0x4e, 0xe4, 0xfe,
0x0b, 0x00, 0x7b, 0xfe, 0x76, 0x1d, 0x03, 0xfe, 0x94, 0x00, 0xd1, 0x24, 0xfe, 0x08, 0x10, 0x03,
0xfe, 0x96, 0x00, 0xd1, 0x63, 0xfe, 0x4e, 0x45, 0x83, 0xca, 0xff, 0x04, 0x68, 0x54, 0xfe, 0xf1,
0x10, 0x23, 0x49, 0xfe, 0x08, 0x1c, 0xfe, 0x67, 0x19, 0xfe, 0x0a, 0x1c, 0xfe, 0x1a, 0xf4, 0xfe,
0x00, 0x04, 0x83, 0xb2, 0x1d, 0x48, 0xfe, 0xaa, 0x1d, 0x13, 0x1d, 0x02, 0x09, 0x92, 0xfe, 0x5a,
0xf0, 0xfe, 0xba, 0x1d, 0x2e, 0x93, 0xfe, 0x34, 0x10, 0x09, 0x12, 0xfe, 0x5a, 0xf0, 0xfe, 0xc8,
0x1d, 0x2e, 0xb4, 0xfe, 0x26, 0x10, 0x09, 0x1d, 0x36, 0x2e, 0x63, 0xfe, 0x1a, 0x10, 0x09, 0x0d,
0x36, 0x2e, 0x94, 0xf2, 0x09, 0x07, 0x36, 0x2e, 0x95, 0xa1, 0xc8, 0x02, 0x1f, 0x93, 0x01, 0x42,
0xfe, 0x04, 0xfe, 0x99, 0x03, 0x9c, 0x8b, 0x02, 0x2a, 0xfe, 0x1c, 0x1e, 0xfe, 0x14, 0xf0, 0x08,
0x2f, 0xfe, 0x0c, 0x1e, 0x2a, 0xfe, 0x1c, 0x1e, 0x8f, 0xfe, 0x1c, 0x1e, 0xfe, 0x82, 0xf0, 0xfe,
0x10, 0x1e, 0x02, 0x0f, 0x3f, 0x04, 0xfe, 0x80, 0x83, 0x33, 0x0b, 0x0e, 0x02, 0x0f, 0xfe, 0x18,
0x80, 0x04, 0xfe, 0x98, 0x83, 0x33, 0x0b, 0x0e, 0x02, 0x0f, 0xfe, 0x02, 0x80, 0x04, 0xfe, 0x82,
0x83, 0x33, 0x0b, 0x0e, 0x02, 0x0f, 0xfe, 0x06, 0x80, 0x04, 0xfe, 0x86, 0x83, 0x33, 0x0b, 0x0e,
0x02, 0x0f, 0xfe, 0x1b, 0x80, 0x04, 0xfe, 0x9b, 0x83, 0x33, 0x0b, 0x0e, 0x02, 0x0f, 0xfe, 0x04,
0x80, 0x04, 0xfe, 0x84, 0x83, 0x33, 0x0b, 0x0e, 0x02, 0x0f, 0xfe, 0x80, 0x80, 0x04, 0xfe, 0x80,
0x83, 0xfe, 0xc9, 0x47, 0x0b, 0x0e, 0x02, 0x0f, 0xfe, 0x19, 0x81, 0x04, 0xfe, 0x99, 0x83, 0xfe,
0xca, 0x47, 0x0b, 0x0e, 0x02, 0x0f, 0xfe, 0x06, 0x83, 0x04, 0xfe, 0x86, 0x83, 0xfe, 0xce, 0x47,
0x0b, 0x0e, 0x02, 0x0f, 0xfe, 0x2c, 0x90, 0x04, 0xfe, 0xac, 0x93, 0x3a, 0x0b, 0x0e, 0x02, 0x0f,
0xfe, 0xae, 0x90, 0x04, 0xfe, 0xae, 0x93, 0x79, 0x0b, 0x0e, 0x02, 0x0f, 0xfe, 0x08, 0x90, 0x04,
0xfe, 0x88, 0x93, 0x3a, 0x0b, 0x0e, 0x02, 0x0f, 0xfe, 0x8a, 0x90, 0x04, 0xfe, 0x8a, 0x93, 0x79,
0x0b, 0x0e, 0x02, 0x0f, 0xfe, 0x0c, 0x90, 0x04, 0xfe, 0x8c, 0x93, 0x3a, 0x0b, 0x0e, 0x02, 0x0f,
0xfe, 0x8e, 0x90, 0x04, 0xfe, 0x8e, 0x93, 0x79, 0x0b, 0x0e, 0x02, 0x0f, 0xfe, 0x3c, 0x90, 0x04,
0xfe, 0xbc, 0x93, 0x3a, 0x0b, 0x0e, 0x02, 0x8b, 0x0f, 0xfe, 0x03, 0x80, 0x04, 0xfe, 0x83, 0x83,
0x33, 0x0b, 0x77, 0x0e, 0xa8, 0x02, 0xff, 0x66, 0x00, 0x00,
};
STATIC unsigned short _adv_asc38C1600_size =
sizeof(_adv_asc38C1600_buf); /* 0x1673 */
STATIC ADV_DCNT _adv_asc38C1600_chksum =
0x0604EF77UL; /* Expanded little-endian checksum. */
/* a_init.c */
/*
* EEPROM Configuration.
*
* All drivers should use this structure to set the default EEPROM
* configuration. The BIOS now uses this structure when it is built.
* Additional structure information can be found in a_condor.h where
* the structure is defined.
*
* The *_Field_IsChar structs are needed to correct for endianness.
* These values are read from the board 16 bits at a time directly
* into the structs. Because some fields are char, the values will be
* in the wrong order. The *_Field_IsChar tells when to flip the
* bytes. Data read and written to PCI memory is automatically swapped
* on big-endian platforms so char fields read as words are actually being
* unswapped on big-endian platforms.
*/
STATIC ADVEEP_3550_CONFIG
Default_3550_EEPROM_Config ASC_INITDATA = {
ADV_EEPROM_BIOS_ENABLE, /* cfg_lsw */
0x0000, /* cfg_msw */
0xFFFF, /* disc_enable */
0xFFFF, /* wdtr_able */
0xFFFF, /* sdtr_able */
0xFFFF, /* start_motor */
0xFFFF, /* tagqng_able */
0xFFFF, /* bios_scan */
0, /* scam_tolerant */
7, /* adapter_scsi_id */
0, /* bios_boot_delay */
3, /* scsi_reset_delay */
0, /* bios_id_lun */
0, /* termination */
0, /* reserved1 */
0xFFE7, /* bios_ctrl */
0xFFFF, /* ultra_able */
0, /* reserved2 */
ASC_DEF_MAX_HOST_QNG, /* max_host_qng */
ASC_DEF_MAX_DVC_QNG, /* max_dvc_qng */
0, /* dvc_cntl */
0, /* bug_fix */
0, /* serial_number_word1 */
0, /* serial_number_word2 */
0, /* serial_number_word3 */
0, /* check_sum */
{ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0 }, /* oem_name[16] */
0, /* dvc_err_code */
0, /* adv_err_code */
0, /* adv_err_addr */
0, /* saved_dvc_err_code */
0, /* saved_adv_err_code */
0, /* saved_adv_err_addr */
0 /* num_of_err */
};
STATIC ADVEEP_3550_CONFIG
ADVEEP_3550_Config_Field_IsChar ASC_INITDATA = {
0, /* cfg_lsw */
0, /* cfg_msw */
0, /* -disc_enable */
0, /* wdtr_able */
0, /* sdtr_able */
0, /* start_motor */
0, /* tagqng_able */
0, /* bios_scan */
0, /* scam_tolerant */
1, /* adapter_scsi_id */
1, /* bios_boot_delay */
1, /* scsi_reset_delay */
1, /* bios_id_lun */
1, /* termination */
1, /* reserved1 */
0, /* bios_ctrl */
0, /* ultra_able */
0, /* reserved2 */
1, /* max_host_qng */
1, /* max_dvc_qng */
0, /* dvc_cntl */
0, /* bug_fix */
0, /* serial_number_word1 */
0, /* serial_number_word2 */
0, /* serial_number_word3 */
0, /* check_sum */
{ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1 }, /* oem_name[16] */
0, /* dvc_err_code */
0, /* adv_err_code */
0, /* adv_err_addr */
0, /* saved_dvc_err_code */
0, /* saved_adv_err_code */
0, /* saved_adv_err_addr */
0 /* num_of_err */
};
STATIC ADVEEP_38C0800_CONFIG
Default_38C0800_EEPROM_Config ASC_INITDATA = {
ADV_EEPROM_BIOS_ENABLE, /* 00 cfg_lsw */
0x0000, /* 01 cfg_msw */
0xFFFF, /* 02 disc_enable */
0xFFFF, /* 03 wdtr_able */
0x4444, /* 04 sdtr_speed1 */
0xFFFF, /* 05 start_motor */
0xFFFF, /* 06 tagqng_able */
0xFFFF, /* 07 bios_scan */
0, /* 08 scam_tolerant */
7, /* 09 adapter_scsi_id */
0, /* bios_boot_delay */
3, /* 10 scsi_reset_delay */
0, /* bios_id_lun */
0, /* 11 termination_se */
0, /* termination_lvd */
0xFFE7, /* 12 bios_ctrl */
0x4444, /* 13 sdtr_speed2 */
0x4444, /* 14 sdtr_speed3 */
ASC_DEF_MAX_HOST_QNG, /* 15 max_host_qng */
ASC_DEF_MAX_DVC_QNG, /* max_dvc_qng */
0, /* 16 dvc_cntl */
0x4444, /* 17 sdtr_speed4 */
0, /* 18 serial_number_word1 */
0, /* 19 serial_number_word2 */
0, /* 20 serial_number_word3 */
0, /* 21 check_sum */
{ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0 }, /* 22-29 oem_name[16] */
0, /* 30 dvc_err_code */
0, /* 31 adv_err_code */
0, /* 32 adv_err_addr */
0, /* 33 saved_dvc_err_code */
0, /* 34 saved_adv_err_code */
0, /* 35 saved_adv_err_addr */
0, /* 36 reserved */
0, /* 37 reserved */
0, /* 38 reserved */
0, /* 39 reserved */
0, /* 40 reserved */
0, /* 41 reserved */
0, /* 42 reserved */
0, /* 43 reserved */
0, /* 44 reserved */
0, /* 45 reserved */
0, /* 46 reserved */
0, /* 47 reserved */
0, /* 48 reserved */
0, /* 49 reserved */
0, /* 50 reserved */
0, /* 51 reserved */
0, /* 52 reserved */
0, /* 53 reserved */
0, /* 54 reserved */
0, /* 55 reserved */
0, /* 56 cisptr_lsw */
0, /* 57 cisprt_msw */
ADV_PCI_VENDOR_ID, /* 58 subsysvid */
ADV_PCI_DEVID_38C0800_REV1, /* 59 subsysid */
0, /* 60 reserved */
0, /* 61 reserved */
0, /* 62 reserved */
0 /* 63 reserved */
};
STATIC ADVEEP_38C0800_CONFIG
ADVEEP_38C0800_Config_Field_IsChar ASC_INITDATA = {
0, /* 00 cfg_lsw */
0, /* 01 cfg_msw */
0, /* 02 disc_enable */
0, /* 03 wdtr_able */
0, /* 04 sdtr_speed1 */
0, /* 05 start_motor */
0, /* 06 tagqng_able */
0, /* 07 bios_scan */
0, /* 08 scam_tolerant */
1, /* 09 adapter_scsi_id */
1, /* bios_boot_delay */
1, /* 10 scsi_reset_delay */
1, /* bios_id_lun */
1, /* 11 termination_se */
1, /* termination_lvd */
0, /* 12 bios_ctrl */
0, /* 13 sdtr_speed2 */
0, /* 14 sdtr_speed3 */
1, /* 15 max_host_qng */
1, /* max_dvc_qng */
0, /* 16 dvc_cntl */
0, /* 17 sdtr_speed4 */
0, /* 18 serial_number_word1 */
0, /* 19 serial_number_word2 */
0, /* 20 serial_number_word3 */
0, /* 21 check_sum */
{ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1 }, /* 22-29 oem_name[16] */
0, /* 30 dvc_err_code */
0, /* 31 adv_err_code */
0, /* 32 adv_err_addr */
0, /* 33 saved_dvc_err_code */
0, /* 34 saved_adv_err_code */
0, /* 35 saved_adv_err_addr */
0, /* 36 reserved */
0, /* 37 reserved */
0, /* 38 reserved */
0, /* 39 reserved */
0, /* 40 reserved */
0, /* 41 reserved */
0, /* 42 reserved */
0, /* 43 reserved */
0, /* 44 reserved */
0, /* 45 reserved */
0, /* 46 reserved */
0, /* 47 reserved */
0, /* 48 reserved */
0, /* 49 reserved */
0, /* 50 reserved */
0, /* 51 reserved */
0, /* 52 reserved */
0, /* 53 reserved */
0, /* 54 reserved */
0, /* 55 reserved */
0, /* 56 cisptr_lsw */
0, /* 57 cisprt_msw */
0, /* 58 subsysvid */
0, /* 59 subsysid */
0, /* 60 reserved */
0, /* 61 reserved */
0, /* 62 reserved */
0 /* 63 reserved */
};
STATIC ADVEEP_38C1600_CONFIG
Default_38C1600_EEPROM_Config ASC_INITDATA = {
ADV_EEPROM_BIOS_ENABLE, /* 00 cfg_lsw */
0x0000, /* 01 cfg_msw */
0xFFFF, /* 02 disc_enable */
0xFFFF, /* 03 wdtr_able */
0x5555, /* 04 sdtr_speed1 */
0xFFFF, /* 05 start_motor */
0xFFFF, /* 06 tagqng_able */
0xFFFF, /* 07 bios_scan */
0, /* 08 scam_tolerant */
7, /* 09 adapter_scsi_id */
0, /* bios_boot_delay */
3, /* 10 scsi_reset_delay */
0, /* bios_id_lun */
0, /* 11 termination_se */
0, /* termination_lvd */
0xFFE7, /* 12 bios_ctrl */
0x5555, /* 13 sdtr_speed2 */
0x5555, /* 14 sdtr_speed3 */
ASC_DEF_MAX_HOST_QNG, /* 15 max_host_qng */
ASC_DEF_MAX_DVC_QNG, /* max_dvc_qng */
0, /* 16 dvc_cntl */
0x5555, /* 17 sdtr_speed4 */
0, /* 18 serial_number_word1 */
0, /* 19 serial_number_word2 */
0, /* 20 serial_number_word3 */
0, /* 21 check_sum */
{ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0 }, /* 22-29 oem_name[16] */
0, /* 30 dvc_err_code */
0, /* 31 adv_err_code */
0, /* 32 adv_err_addr */
0, /* 33 saved_dvc_err_code */
0, /* 34 saved_adv_err_code */
0, /* 35 saved_adv_err_addr */
0, /* 36 reserved */
0, /* 37 reserved */
0, /* 38 reserved */
0, /* 39 reserved */
0, /* 40 reserved */
0, /* 41 reserved */
0, /* 42 reserved */
0, /* 43 reserved */
0, /* 44 reserved */
0, /* 45 reserved */
0, /* 46 reserved */
0, /* 47 reserved */
0, /* 48 reserved */
0, /* 49 reserved */
0, /* 50 reserved */
0, /* 51 reserved */
0, /* 52 reserved */
0, /* 53 reserved */
0, /* 54 reserved */
0, /* 55 reserved */
0, /* 56 cisptr_lsw */
0, /* 57 cisprt_msw */
ADV_PCI_VENDOR_ID, /* 58 subsysvid */
ADV_PCI_DEVID_38C1600_REV1, /* 59 subsysid */
0, /* 60 reserved */
0, /* 61 reserved */
0, /* 62 reserved */
0 /* 63 reserved */
};
STATIC ADVEEP_38C1600_CONFIG
ADVEEP_38C1600_Config_Field_IsChar ASC_INITDATA = {
0, /* 00 cfg_lsw */
0, /* 01 cfg_msw */
0, /* 02 disc_enable */
0, /* 03 wdtr_able */
0, /* 04 sdtr_speed1 */
0, /* 05 start_motor */
0, /* 06 tagqng_able */
0, /* 07 bios_scan */
0, /* 08 scam_tolerant */
1, /* 09 adapter_scsi_id */
1, /* bios_boot_delay */
1, /* 10 scsi_reset_delay */
1, /* bios_id_lun */
1, /* 11 termination_se */
1, /* termination_lvd */
0, /* 12 bios_ctrl */
0, /* 13 sdtr_speed2 */
0, /* 14 sdtr_speed3 */
1, /* 15 max_host_qng */
1, /* max_dvc_qng */
0, /* 16 dvc_cntl */
0, /* 17 sdtr_speed4 */
0, /* 18 serial_number_word1 */
0, /* 19 serial_number_word2 */
0, /* 20 serial_number_word3 */
0, /* 21 check_sum */
{ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1 }, /* 22-29 oem_name[16] */
0, /* 30 dvc_err_code */
0, /* 31 adv_err_code */
0, /* 32 adv_err_addr */
0, /* 33 saved_dvc_err_code */
0, /* 34 saved_adv_err_code */
0, /* 35 saved_adv_err_addr */
0, /* 36 reserved */
0, /* 37 reserved */
0, /* 38 reserved */
0, /* 39 reserved */
0, /* 40 reserved */
0, /* 41 reserved */
0, /* 42 reserved */
0, /* 43 reserved */
0, /* 44 reserved */
0, /* 45 reserved */
0, /* 46 reserved */
0, /* 47 reserved */
0, /* 48 reserved */
0, /* 49 reserved */
0, /* 50 reserved */
0, /* 51 reserved */
0, /* 52 reserved */
0, /* 53 reserved */
0, /* 54 reserved */
0, /* 55 reserved */
0, /* 56 cisptr_lsw */
0, /* 57 cisprt_msw */
0, /* 58 subsysvid */
0, /* 59 subsysid */
0, /* 60 reserved */
0, /* 61 reserved */
0, /* 62 reserved */
0 /* 63 reserved */
};
/*
* Initialize the ADV_DVC_VAR structure.
*
* On failure set the ADV_DVC_VAR field 'err_code' and return ADV_ERROR.
*
* For a non-fatal error return a warning code. If there are no warnings
* then 0 is returned.
*/
ASC_INITFUNC(
STATIC int,
AdvInitGetConfig(ADV_DVC_VAR *asc_dvc)
)
{
ushort warn_code;
AdvPortAddr iop_base;
uchar pci_cmd_reg;
int status;
warn_code = 0;
asc_dvc->err_code = 0;
iop_base = asc_dvc->iop_base;
/*
* PCI Command Register
*
* Note: AscPCICmdRegBits_BusMastering definition (0x0007) includes
* I/O Space Control, Memory Space Control and Bus Master Control bits.
*/
if (((pci_cmd_reg = DvcAdvReadPCIConfigByte(asc_dvc,
AscPCIConfigCommandRegister))
& AscPCICmdRegBits_BusMastering)
!= AscPCICmdRegBits_BusMastering)
{
pci_cmd_reg |= AscPCICmdRegBits_BusMastering;
DvcAdvWritePCIConfigByte(asc_dvc,
AscPCIConfigCommandRegister, pci_cmd_reg);
if (((DvcAdvReadPCIConfigByte(asc_dvc, AscPCIConfigCommandRegister))
& AscPCICmdRegBits_BusMastering)
!= AscPCICmdRegBits_BusMastering)
{
warn_code |= ASC_WARN_SET_PCI_CONFIG_SPACE;
}
}
/*
* PCI Latency Timer
*
* If the "latency timer" register is 0x20 or above, then we don't need
* to change it. Otherwise, set it to 0x20 (i.e. set it to 0x20 if it
* comes up less than 0x20).
*/
if (DvcAdvReadPCIConfigByte(asc_dvc, AscPCIConfigLatencyTimer) < 0x20) {
DvcAdvWritePCIConfigByte(asc_dvc, AscPCIConfigLatencyTimer, 0x20);
if (DvcAdvReadPCIConfigByte(asc_dvc, AscPCIConfigLatencyTimer) < 0x20)
{
warn_code |= ASC_WARN_SET_PCI_CONFIG_SPACE;
}
}
/*
* Save the state of the PCI Configuration Command Register
* "Parity Error Response Control" Bit. If the bit is clear (0),
* in AdvInitAsc3550/38C0800Driver() tell the microcode to ignore
* DMA parity errors.
*/
asc_dvc->cfg->control_flag = 0;
if (((DvcAdvReadPCIConfigByte(asc_dvc, AscPCIConfigCommandRegister)
& AscPCICmdRegBits_ParErrRespCtrl)) == 0)
{
asc_dvc->cfg->control_flag |= CONTROL_FLAG_IGNORE_PERR;
}
asc_dvc->cfg->lib_version = (ADV_LIB_VERSION_MAJOR << 8) |
ADV_LIB_VERSION_MINOR;
asc_dvc->cfg->chip_version =
AdvGetChipVersion(iop_base, asc_dvc->bus_type);
ASC_DBG2(1, "AdvInitGetConfig: iopb_chip_id_1: 0x%x 0x%xn",
(ushort) AdvReadByteRegister(iop_base, IOPB_CHIP_ID_1),
(ushort) ADV_CHIP_ID_BYTE);
ASC_DBG2(1, "AdvInitGetConfig: iopw_chip_id_0: 0x%x 0x%xn",
(ushort) AdvReadWordRegister(iop_base, IOPW_CHIP_ID_0),
(ushort) ADV_CHIP_ID_WORD);
/*
* Reset the chip to start and allow register writes.
*/
if (AdvFindSignature(iop_base) == 0)
{
asc_dvc->err_code = ASC_IERR_BAD_SIGNATURE;
return ADV_ERROR;
}
else {
/*
* The caller must set 'chip_type' to a valid setting.
*/
if (asc_dvc->chip_type != ADV_CHIP_ASC3550 &&
asc_dvc->chip_type != ADV_CHIP_ASC38C0800 &&
asc_dvc->chip_type != ADV_CHIP_ASC38C1600)
{
asc_dvc->err_code |= ASC_IERR_BAD_CHIPTYPE;
return ADV_ERROR;
}
/*
* Reset Chip.
*/
AdvWriteWordRegister(iop_base, IOPW_CTRL_REG,
ADV_CTRL_REG_CMD_RESET);
DvcSleepMilliSecond(100);
AdvWriteWordRegister(iop_base, IOPW_CTRL_REG,
ADV_CTRL_REG_CMD_WR_IO_REG);
if (asc_dvc->chip_type == ADV_CHIP_ASC38C1600)
{
if ((status = AdvInitFrom38C1600EEP(asc_dvc)) == ADV_ERROR)
{
return ADV_ERROR;
}
} else if (asc_dvc->chip_type == ADV_CHIP_ASC38C0800)
{
if ((status = AdvInitFrom38C0800EEP(asc_dvc)) == ADV_ERROR)
{
return ADV_ERROR;
}
} else
{
if ((status = AdvInitFrom3550EEP(asc_dvc)) == ADV_ERROR)
{
return ADV_ERROR;
}
}
warn_code |= status;
}
return warn_code;
}
/*
* Initialize the ASC-3550.
*
* On failure set the ADV_DVC_VAR field 'err_code' and return ADV_ERROR.
*
* For a non-fatal error return a warning code. If there are no warnings
* then 0 is returned.
*
* Needed after initialization for error recovery.
*/
STATIC int
AdvInitAsc3550Driver(ADV_DVC_VAR *asc_dvc)
{
AdvPortAddr iop_base;
ushort warn_code;
ADV_DCNT sum;
int begin_addr;
int end_addr;
ushort code_sum;
int word;
int j;
int adv_asc3550_expanded_size;
ADV_CARR_T *carrp;
ADV_DCNT contig_len;
ADV_SDCNT buf_size;
ADV_PADDR carr_paddr;
int i;
ushort scsi_cfg1;
uchar tid;
ushort bios_mem[ASC_MC_BIOSLEN/2]; /* BIOS RISC Memory 0x40-0x8F. */
ushort wdtr_able = 0, sdtr_able, tagqng_able;
uchar max_cmd[ADV_MAX_TID + 1];
/* If there is already an error, don't continue. */
if (asc_dvc->err_code != 0)
{
return ADV_ERROR;
}
/*
* The caller must set 'chip_type' to ADV_CHIP_ASC3550.
*/
if (asc_dvc->chip_type != ADV_CHIP_ASC3550)
{
asc_dvc->err_code |= ASC_IERR_BAD_CHIPTYPE;
return ADV_ERROR;
}
warn_code = 0;
iop_base = asc_dvc->iop_base;
/*
* Save the RISC memory BIOS region before writing the microcode.
* The BIOS may already be loaded and using its RISC LRAM region
* so its region must be saved and restored.
*
* Note: This code makes the assumption, which is currently true,
* that a chip reset does not clear RISC LRAM.
*/
for (i = 0; i < ASC_MC_BIOSLEN/2; i++)
{
AdvReadWordLram(iop_base, ASC_MC_BIOSMEM + (2 * i), bios_mem[i]);
}
/*
* Save current per TID negotiated values.
*/
if (bios_mem[(ASC_MC_BIOS_SIGNATURE - ASC_MC_BIOSMEM)/2] == 0x55AA)
{
ushort bios_version, major, minor;
bios_version = bios_mem[(ASC_MC_BIOS_VERSION - ASC_MC_BIOSMEM)/2];
major = (bios_version >> 12) & 0xF;
minor = (bios_version >> 8) & 0xF;
if (major < 3 || (major == 3 && minor == 1))
{
/* BIOS 3.1 and earlier location of 'wdtr_able' variable. */
AdvReadWordLram(iop_base, 0x120, wdtr_able);
} else
{
AdvReadWordLram(iop_base, ASC_MC_WDTR_ABLE, wdtr_able);
}
}
AdvReadWordLram(iop_base, ASC_MC_SDTR_ABLE, sdtr_able);
AdvReadWordLram(iop_base, ASC_MC_TAGQNG_ABLE, tagqng_able);
for (tid = 0; tid <= ADV_MAX_TID; tid++)
{
AdvReadByteLram(iop_base, ASC_MC_NUMBER_OF_MAX_CMD + tid,
max_cmd[tid]);
}
/*
* Load the Microcode
*
* Write the microcode image to RISC memory starting at address 0.
*/
AdvWriteWordRegister(iop_base, IOPW_RAM_ADDR, 0);
/* Assume the following compressed format of the microcode buffer:
*
* 254 word (508 byte) table indexed by byte code followed
* by the following byte codes:
*
* 1-Byte Code:
* 00: Emit word 0 in table.
* 01: Emit word 1 in table.
* .
* FD: Emit word 253 in table.
*
* Multi-Byte Code:
* FE WW WW: (3 byte code) Word to emit is the next word WW WW.
* FF BB WW WW: (4 byte code) Emit BB count times next word WW WW.
*/
word = 0;
for (i = 253 * 2; i < _adv_asc3550_size; i++)
{
if (_adv_asc3550_buf[i] == 0xff)
{
for (j = 0; j < _adv_asc3550_buf[i + 1]; j++)
{
AdvWriteWordAutoIncLram(iop_base, (((ushort)
_adv_asc3550_buf[i + 3] << 8) |
_adv_asc3550_buf[i + 2]));
word++;
}
i += 3;
} else if (_adv_asc3550_buf[i] == 0xfe)
{
AdvWriteWordAutoIncLram(iop_base, (((ushort)
_adv_asc3550_buf[i + 2] << 8) |
_adv_asc3550_buf[i + 1]));
i += 2;
word++;
} else
{
AdvWriteWordAutoIncLram(iop_base, (((ushort)
_adv_asc3550_buf[(_adv_asc3550_buf[i] * 2) + 1] << 8) |
_adv_asc3550_buf[_adv_asc3550_buf[i] * 2]));
word++;
}
}
/*
* Set 'word' for later use to clear the rest of memory and save
* the expanded mcode size.
*/
word *= 2;
adv_asc3550_expanded_size = word;
/*
* Clear the rest of ASC-3550 Internal RAM (8KB).
*/
for (; word < ADV_3550_MEMSIZE; word += 2)
{
AdvWriteWordAutoIncLram(iop_base, 0);
}
/*
* Verify the microcode checksum.
*/
sum = 0;
AdvWriteWordRegister(iop_base, IOPW_RAM_ADDR, 0);
for (word = 0; word < adv_asc3550_expanded_size; word += 2)
{
sum += AdvReadWordAutoIncLram(iop_base);
}
if (sum != _adv_asc3550_chksum)
{
asc_dvc->err_code |= ASC_IERR_MCODE_CHKSUM;
return ADV_ERROR;
}
/*
* Restore the RISC memory BIOS region.
*/
for (i = 0; i < ASC_MC_BIOSLEN/2; i++)
{
AdvWriteWordLram(iop_base, ASC_MC_BIOSMEM + (2 * i), bios_mem[i]);
}
/*
* Calculate and write the microcode code checksum to the microcode
* code checksum location ASC_MC_CODE_CHK_SUM (0x2C).
*/
AdvReadWordLram(iop_base, ASC_MC_CODE_BEGIN_ADDR, begin_addr);
AdvReadWordLram(iop_base, ASC_MC_CODE_END_ADDR, end_addr);
code_sum = 0;
AdvWriteWordRegister(iop_base, IOPW_RAM_ADDR, begin_addr);
for (word = begin_addr; word < end_addr; word += 2)
{
code_sum += AdvReadWordAutoIncLram(iop_base);
}
AdvWriteWordLram(iop_base, ASC_MC_CODE_CHK_SUM, code_sum);
/*
* Read and save microcode version and date.
*/
AdvReadWordLram(iop_base, ASC_MC_VERSION_DATE, asc_dvc->cfg->mcode_date);
AdvReadWordLram(iop_base, ASC_MC_VERSION_NUM, asc_dvc->cfg->mcode_version);
/*
* Set the chip type to indicate the ASC3550.
*/
AdvWriteWordLram(iop_base, ASC_MC_CHIP_TYPE, ADV_CHIP_ASC3550);
/*
* If the PCI Configuration Command Register "Parity Error Response
* Control" Bit was clear (0), then set the microcode variable
* 'control_flag' CONTROL_FLAG_IGNORE_PERR flag to tell the microcode
* to ignore DMA parity errors.
*/
if (asc_dvc->cfg->control_flag & CONTROL_FLAG_IGNORE_PERR)
{
AdvReadWordLram(iop_base, ASC_MC_CONTROL_FLAG, word);
word |= CONTROL_FLAG_IGNORE_PERR;
AdvWriteWordLram(iop_base, ASC_MC_CONTROL_FLAG, word);
}
/*
* For ASC-3550, setting the START_CTL_EMFU [3:2] bits sets a FIFO
* threshold of 128 bytes. This register is only accessible to the host.
*/
AdvWriteByteRegister(iop_base, IOPB_DMA_CFG0,
START_CTL_EMFU | READ_CMD_MRM);
/*
* Microcode operating variables for WDTR, SDTR, and command tag
* queuing will be set in AdvInquiryHandling() based on what a
* device reports it is capable of in Inquiry byte 7.
*
* If SCSI Bus Resets have been disabled, then directly set
* SDTR and WDTR from the EEPROM configuration. This will allow
* the BIOS and warm boot to work without a SCSI bus hang on
* the Inquiry caused by host and target mismatched DTR values.
* Without the SCSI Bus Reset, before an Inquiry a device can't
* be assumed to be in Asynchronous, Narrow mode.
*/
if ((asc_dvc->bios_ctrl & BIOS_CTRL_RESET_SCSI_BUS) == 0)
{
AdvWriteWordLram(iop_base, ASC_MC_WDTR_ABLE, asc_dvc->wdtr_able);
AdvWriteWordLram(iop_base, ASC_MC_SDTR_ABLE, asc_dvc->sdtr_able);
}
/*
* Set microcode operating variables for SDTR_SPEED1, SDTR_SPEED2,
* SDTR_SPEED3, and SDTR_SPEED4 based on the ULTRA EEPROM per TID
* bitmask. These values determine the maximum SDTR speed negotiated
* with a device.
*
* The SDTR per TID bitmask overrides the SDTR_SPEED1, SDTR_SPEED2,
* SDTR_SPEED3, and SDTR_SPEED4 values so it is safe to set them
* without determining here whether the device supports SDTR.
*
* 4-bit speed SDTR speed name
* =========== ===============
* 0000b (0x0) SDTR disabled
* 0001b (0x1) 5 Mhz
* 0010b (0x2) 10 Mhz
* 0011b (0x3) 20 Mhz (Ultra)
* 0100b (0x4) 40 Mhz (LVD/Ultra2)
* 0101b (0x5) 80 Mhz (LVD2/Ultra3)
* 0110b (0x6) Undefined
* .
* 1111b (0xF) Undefined
*/
word = 0;
for (tid = 0; tid <= ADV_MAX_TID; tid++)
{
if (ADV_TID_TO_TIDMASK(tid) & asc_dvc->ultra_able)
{
/* Set Ultra speed for TID 'tid'. */
word |= (0x3 << (4 * (tid % 4)));
} else
{
/* Set Fast speed for TID 'tid'. */
word |= (0x2 << (4 * (tid % 4)));
}
if (tid == 3) /* Check if done with sdtr_speed1. */
{
AdvWriteWordLram(iop_base, ASC_MC_SDTR_SPEED1, word);
word = 0;
} else if (tid == 7) /* Check if done with sdtr_speed2. */
{
AdvWriteWordLram(iop_base, ASC_MC_SDTR_SPEED2, word);
word = 0;
} else if (tid == 11) /* Check if done with sdtr_speed3. */
{
AdvWriteWordLram(iop_base, ASC_MC_SDTR_SPEED3, word);
word = 0;
} else if (tid == 15) /* Check if done with sdtr_speed4. */
{
AdvWriteWordLram(iop_base, ASC_MC_SDTR_SPEED4, word);
/* End of loop. */
}
}
/*
* Set microcode operating variable for the disconnect per TID bitmask.
*/
AdvWriteWordLram(iop_base, ASC_MC_DISC_ENABLE, asc_dvc->cfg->disc_enable);
/*
* Set SCSI_CFG0 Microcode Default Value.
*
* The microcode will set the SCSI_CFG0 register using this value
* after it is started below.
*/
AdvWriteWordLram(iop_base, ASC_MC_DEFAULT_SCSI_CFG0,
PARITY_EN | QUEUE_128 | SEL_TMO_LONG | OUR_ID_EN |
asc_dvc->chip_scsi_id);
/*
* Determine SCSI_CFG1 Microcode Default Value.
*
* The microcode will set the SCSI_CFG1 register using this value
* after it is started below.
*/
/* Read current SCSI_CFG1 Register value. */
scsi_cfg1 = AdvReadWordRegister(iop_base, IOPW_SCSI_CFG1);
/*
* If all three connectors are in use, return an error.
*/
if ((scsi_cfg1 & CABLE_ILLEGAL_A) == 0 ||
(scsi_cfg1 & CABLE_ILLEGAL_B) == 0)
{
asc_dvc->err_code |= ASC_IERR_ILLEGAL_CONNECTION;
return ADV_ERROR;
}
/*
* If the internal narrow cable is reversed all of the SCSI_CTRL
* register signals will be set. Check for and return an error if
* this condition is found.
*/
if ((AdvReadWordRegister(iop_base, IOPW_SCSI_CTRL) & 0x3F07) == 0x3F07)
{
asc_dvc->err_code |= ASC_IERR_REVERSED_CABLE;
return ADV_ERROR;
}
/*
* If this is a differential board and a single-ended device
* is attached to one of the connectors, return an error.
*/
if ((scsi_cfg1 & DIFF_MODE) && (scsi_cfg1 & DIFF_SENSE) == 0)
{
asc_dvc->err_code |= ASC_IERR_SINGLE_END_DEVICE;
return ADV_ERROR;
}
/*
* If automatic termination control is enabled, then set the
* termination value based on a table listed in a_condor.h.
*
* If manual termination was specified with an EEPROM setting
* then 'termination' was set-up in AdvInitFrom3550EEPROM() and
* is ready to be 'ored' into SCSI_CFG1.
*/
if (asc_dvc->cfg->termination == 0)
{
/*
* The software always controls termination by setting TERM_CTL_SEL.
* If TERM_CTL_SEL were set to 0, the hardware would set termination.
*/
asc_dvc->cfg->termination |= TERM_CTL_SEL;
switch(scsi_cfg1 & CABLE_DETECT)
{
/* TERM_CTL_H: on, TERM_CTL_L: on */
case 0x3: case 0x7: case 0xB: case 0xD: case 0xE: case 0xF:
asc_dvc->cfg->termination |= (TERM_CTL_H | TERM_CTL_L);
break;
/* TERM_CTL_H: on, TERM_CTL_L: off */
case 0x1: case 0x5: case 0x9: case 0xA: case 0xC:
asc_dvc->cfg->termination |= TERM_CTL_H;
break;
/* TERM_CTL_H: off, TERM_CTL_L: off */
case 0x2: case 0x6:
break;
}
}
/*
* Clear any set TERM_CTL_H and TERM_CTL_L bits.
*/
scsi_cfg1 &= ~TERM_CTL;
/*
* Invert the TERM_CTL_H and TERM_CTL_L bits and then
* set 'scsi_cfg1'. The TERM_POL bit does not need to be
* referenced, because the hardware internally inverts
* the Termination High and Low bits if TERM_POL is set.
*/
scsi_cfg1 |= (TERM_CTL_SEL | (~asc_dvc->cfg->termination & TERM_CTL));
/*
* Set SCSI_CFG1 Microcode Default Value
*
* Set filter value and possibly modified termination control
* bits in the Microcode SCSI_CFG1 Register Value.
*
* The microcode will set the SCSI_CFG1 register using this value
* after it is started below.
*/
AdvWriteWordLram(iop_base, ASC_MC_DEFAULT_SCSI_CFG1,
FLTR_DISABLE | scsi_cfg1);
/*
* Set MEM_CFG Microcode Default Value
*
* The microcode will set the MEM_CFG register using this value
* after it is started below.
*
* MEM_CFG may be accessed as a word or byte, but only bits 0-7
* are defined.
*
* ASC-3550 has 8KB internal memory.
*/
AdvWriteWordLram(iop_base, ASC_MC_DEFAULT_MEM_CFG,
BIOS_EN | RAM_SZ_8KB);
/*
* Set SEL_MASK Microcode Default Value
*
* The microcode will set the SEL_MASK register using this value
* after it is started below.
*/
AdvWriteWordLram(iop_base, ASC_MC_DEFAULT_SEL_MASK,
ADV_TID_TO_TIDMASK(asc_dvc->chip_scsi_id));
/*
* Build carrier freelist.
*
* Driver must have already allocated memory and set 'carrier_buf'.
*/
ASC_ASSERT(asc_dvc->carrier_buf != NULL);
carrp = (ADV_CARR_T *) ADV_16BALIGN(asc_dvc->carrier_buf);
asc_dvc->carr_freelist = NULL;
if (carrp == (ADV_CARR_T *) asc_dvc->carrier_buf)
{
buf_size = ADV_CARRIER_BUFSIZE;
} else
{
buf_size = ADV_CARRIER_BUFSIZE - sizeof(ADV_CARR_T);
}
do {
/*
* Get physical address of the carrier 'carrp'.
*/
contig_len = sizeof(ADV_CARR_T);
carr_paddr = cpu_to_le32(DvcGetPhyAddr(asc_dvc, NULL, (uchar *) carrp,
(ADV_SDCNT *) &contig_len, ADV_IS_CARRIER_FLAG));
buf_size -= sizeof(ADV_CARR_T);
/*
* If the current carrier is not physically contiguous, then
* maybe there was a page crossing. Try the next carrier aligned
* start address.
*/
if (contig_len < sizeof(ADV_CARR_T))
{
carrp++;
continue;
}
carrp->carr_pa = carr_paddr;
carrp->carr_va = cpu_to_le32(ADV_VADDR_TO_U32(carrp));
/*
* Insert the carrier at the beginning of the freelist.
*/
carrp->next_vpa = cpu_to_le32(ADV_VADDR_TO_U32(asc_dvc->carr_freelist));
asc_dvc->carr_freelist = carrp;
carrp++;
}
while (buf_size > 0);
/*
* Set-up the Host->RISC Initiator Command Queue (ICQ).
*/
if ((asc_dvc->icq_sp = asc_dvc->carr_freelist) == NULL)
{
asc_dvc->err_code |= ASC_IERR_NO_CARRIER;
return ADV_ERROR;
}
asc_dvc->carr_freelist = (ADV_CARR_T *)
ADV_U32_TO_VADDR(le32_to_cpu(asc_dvc->icq_sp->next_vpa));
/*
* The first command issued will be placed in the stopper carrier.
*/
asc_dvc->icq_sp->next_vpa = cpu_to_le32(ASC_CQ_STOPPER);
/*
* Set RISC ICQ physical address start value.
*/
AdvWriteDWordLramNoSwap(iop_base, ASC_MC_ICQ, asc_dvc->icq_sp->carr_pa);
/*
* Set-up the RISC->Host Initiator Response Queue (IRQ).