state 源码搜索结果, 第29页, Verysource

LMS.rar LMS: Least Mean Square the source code for state space environment.
ebook_verilog_fine_state_machine.zip Designing a synchronous finite state machine (FSM) is a common task for a digital logic engineer. This paper discusses a variety of issues regarding FSM design using Synopsys Design Compiler. Verilog and VHDL coding styles are presented, and ...
rc5statemac.rar rc5 encryption- rc5 encryption using vhdl, using state machine, more detailed description can be found in ieee papers.
rc5decstmac.rar RC5 decryption algorithm implementation, using vhdl, with state machine implementation, use ieee papers for more detailed description.
rc5keyexp.rar rc5 key expansion algorithm implementation in vhdl, using state machine too. use ieee papers for more detailed description
gumdisp.rar gum vending machine implementation in vhdl, state machine implementation,
LMS.rar least mean square algorithm for estimation state
kalman.rar The design of Kalman filter for estimation of state
puzzlesolver.rar A 8 puzzle program solver.user have to input the current state and goal state of your 8 puzzle and it solving by the program.
All_Digital_DC2DC_Converters_on_FPGA.zip ... and design consideration are given. The methods to implement the digital DC/DC Converters have been researched. The function module, state machine of digital DC/DC controller and high resolution DPWM with Sigma- Delta dither has been introduced. They are ...