Go To English Version 超过100万源码资源,1000万源码文件免费下载
  • S4.zip state strech routing protocl
  • kalmanexpri.rar The Kalman filter is a set of mathematical equations that provides an efficient computational [recursive] means to estimate the state of a process, in a way that minimizes the mean of the squared error. The filter is very powerful in several aspects: ...
  • traffic_controller.rar it is a verilog code written for traffic light controller will synthesize in xinlix ise 8.2i.i have tested it om my kit.[i mae my own kit for spartan2 device].it is a state machine based code.
  • UART_for_FPGArar.rar it is a verilog code written for MELAY state machine based UART and it wll synthesize in xinlix ise 8.2i.i have tested it om my kit.[i mae my own kit for spartan2 device]
  • CS_Bible.rar ... Building containers with arrays * Writing expressions and statements * Object Oriented Programming with C# * Maintaining state with fields * Defining behavior with methods * Building WinForm and WebFom applications * Using C# ...
  • 1011.rar ... length and cut them randomly until all parts became at most 50 units long. Now he wants to return sticks to the original state, but he forgot how many sticks he had originally and how long they were originally. Please help him and design a program which ...
  • kicc.rar ... length and cut them randomly until all parts became at most 50 units long. Now he wants to return sticks to the original state, but he forgot how many sticks he had originally and how long they were originally. Please help him and design a program which ...
  • lowai.rar ... length and cut them randomly until all parts became at most 50 units long. Now he wants to return sticks to the original state, but he forgot how many sticks he had originally and how long they were originally. Please help him and design a program which ...
  • biaochen.rar ... length and cut them randomly until all parts became at most 50 units long. Now he wants to return sticks to the original state, but he forgot how many sticks he had originally and how long they were originally. Please help him and design a program which ...
  • my_fsm_vhdl.rar How to infer a finite state machine for fpga altera xilinx